Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 16:51:40.665891 lava-dispatcher, installed at version: 2024.01
2 16:51:40.666728 start: 0 validate
3 16:51:40.667226 Start time: 2024-11-11 16:51:40.667194+00:00 (UTC)
4 16:51:40.667820 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 16:51:40.668427 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 16:51:40.721728 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 16:51:40.722329 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-11-11-v6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 16:51:40.754653 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 16:51:40.755321 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-11-11-v6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 16:51:40.788786 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 16:51:40.789286 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 16:51:40.825375 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 16:51:40.825915 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-11-11-v6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 16:51:40.871597 validate duration: 0.20
16 16:51:40.873237 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 16:51:40.873865 start: 1.1 download-retry (timeout 00:10:00) [common]
18 16:51:40.874415 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 16:51:40.875418 Not decompressing ramdisk as can be used compressed.
20 16:51:40.876268 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 16:51:40.876776 saving as /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/ramdisk/initrd.cpio.gz
22 16:51:40.877285 total size: 5628169 (5 MB)
23 16:51:40.923846 progress 0 % (0 MB)
24 16:51:40.932865 progress 5 % (0 MB)
25 16:51:40.941995 progress 10 % (0 MB)
26 16:51:40.950327 progress 15 % (0 MB)
27 16:51:40.959352 progress 20 % (1 MB)
28 16:51:40.963713 progress 25 % (1 MB)
29 16:51:40.967964 progress 30 % (1 MB)
30 16:51:40.972364 progress 35 % (1 MB)
31 16:51:40.976209 progress 40 % (2 MB)
32 16:51:40.980441 progress 45 % (2 MB)
33 16:51:40.984193 progress 50 % (2 MB)
34 16:51:40.988569 progress 55 % (2 MB)
35 16:51:40.992745 progress 60 % (3 MB)
36 16:51:40.996382 progress 65 % (3 MB)
37 16:51:41.000469 progress 70 % (3 MB)
38 16:51:41.004191 progress 75 % (4 MB)
39 16:51:41.008290 progress 80 % (4 MB)
40 16:51:41.011928 progress 85 % (4 MB)
41 16:51:41.016658 progress 90 % (4 MB)
42 16:51:41.020785 progress 95 % (5 MB)
43 16:51:41.024169 progress 100 % (5 MB)
44 16:51:41.024856 5 MB downloaded in 0.15 s (36.37 MB/s)
45 16:51:41.025386 end: 1.1.1 http-download (duration 00:00:00) [common]
47 16:51:41.026269 end: 1.1 download-retry (duration 00:00:00) [common]
48 16:51:41.026557 start: 1.2 download-retry (timeout 00:10:00) [common]
49 16:51:41.026828 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 16:51:41.027411 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/kernel/Image
51 16:51:41.027695 saving as /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/kernel/Image
52 16:51:41.027912 total size: 45713920 (43 MB)
53 16:51:41.028163 No compression specified
54 16:51:41.066199 progress 0 % (0 MB)
55 16:51:41.096363 progress 5 % (2 MB)
56 16:51:41.126237 progress 10 % (4 MB)
57 16:51:41.156867 progress 15 % (6 MB)
58 16:51:41.186218 progress 20 % (8 MB)
59 16:51:41.216413 progress 25 % (10 MB)
60 16:51:41.246328 progress 30 % (13 MB)
61 16:51:41.276312 progress 35 % (15 MB)
62 16:51:41.306238 progress 40 % (17 MB)
63 16:51:41.335758 progress 45 % (19 MB)
64 16:51:41.365580 progress 50 % (21 MB)
65 16:51:41.395137 progress 55 % (24 MB)
66 16:51:41.425202 progress 60 % (26 MB)
67 16:51:41.454857 progress 65 % (28 MB)
68 16:51:41.484370 progress 70 % (30 MB)
69 16:51:41.514197 progress 75 % (32 MB)
70 16:51:41.543562 progress 80 % (34 MB)
71 16:51:41.572915 progress 85 % (37 MB)
72 16:51:41.602119 progress 90 % (39 MB)
73 16:51:41.631934 progress 95 % (41 MB)
74 16:51:41.660840 progress 100 % (43 MB)
75 16:51:41.661334 43 MB downloaded in 0.63 s (68.83 MB/s)
76 16:51:41.661800 end: 1.2.1 http-download (duration 00:00:01) [common]
78 16:51:41.662601 end: 1.2 download-retry (duration 00:00:01) [common]
79 16:51:41.662869 start: 1.3 download-retry (timeout 00:09:59) [common]
80 16:51:41.663129 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 16:51:41.663619 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 16:51:41.663893 saving as /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 16:51:41.664133 total size: 53209 (0 MB)
84 16:51:41.664343 No compression specified
85 16:51:41.703070 progress 61 % (0 MB)
86 16:51:41.703891 progress 100 % (0 MB)
87 16:51:41.704462 0 MB downloaded in 0.04 s (1.26 MB/s)
88 16:51:41.704918 end: 1.3.1 http-download (duration 00:00:00) [common]
90 16:51:41.705712 end: 1.3 download-retry (duration 00:00:00) [common]
91 16:51:41.705968 start: 1.4 download-retry (timeout 00:09:59) [common]
92 16:51:41.706227 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 16:51:41.706685 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 16:51:41.706918 saving as /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/nfsrootfs/full.rootfs.tar
95 16:51:41.707120 total size: 120894716 (115 MB)
96 16:51:41.707327 Using unxz to decompress xz
97 16:51:41.747591 progress 0 % (0 MB)
98 16:51:42.556639 progress 5 % (5 MB)
99 16:51:43.415919 progress 10 % (11 MB)
100 16:51:44.220592 progress 15 % (17 MB)
101 16:51:44.971888 progress 20 % (23 MB)
102 16:51:45.563922 progress 25 % (28 MB)
103 16:51:46.397180 progress 30 % (34 MB)
104 16:51:47.198618 progress 35 % (40 MB)
105 16:51:47.548752 progress 40 % (46 MB)
106 16:51:47.947063 progress 45 % (51 MB)
107 16:51:48.740396 progress 50 % (57 MB)
108 16:51:49.634746 progress 55 % (63 MB)
109 16:51:50.425388 progress 60 % (69 MB)
110 16:51:51.188371 progress 65 % (74 MB)
111 16:51:51.973308 progress 70 % (80 MB)
112 16:51:52.806593 progress 75 % (86 MB)
113 16:51:53.600821 progress 80 % (92 MB)
114 16:51:54.369272 progress 85 % (98 MB)
115 16:51:55.229834 progress 90 % (103 MB)
116 16:51:56.005284 progress 95 % (109 MB)
117 16:51:56.836746 progress 100 % (115 MB)
118 16:51:56.850698 115 MB downloaded in 15.14 s (7.61 MB/s)
119 16:51:56.851647 end: 1.4.1 http-download (duration 00:00:15) [common]
121 16:51:56.853466 end: 1.4 download-retry (duration 00:00:15) [common]
122 16:51:56.854041 start: 1.5 download-retry (timeout 00:09:44) [common]
123 16:51:56.854610 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 16:51:56.855477 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/modules.tar.xz
125 16:51:56.856006 saving as /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/modules/modules.tar
126 16:51:56.856467 total size: 11621176 (11 MB)
127 16:51:56.856927 Using unxz to decompress xz
128 16:51:56.899203 progress 0 % (0 MB)
129 16:51:56.967710 progress 5 % (0 MB)
130 16:51:57.044548 progress 10 % (1 MB)
131 16:51:57.142928 progress 15 % (1 MB)
132 16:51:57.234954 progress 20 % (2 MB)
133 16:51:57.314889 progress 25 % (2 MB)
134 16:51:57.391280 progress 30 % (3 MB)
135 16:51:57.470519 progress 35 % (3 MB)
136 16:51:57.543377 progress 40 % (4 MB)
137 16:51:57.619022 progress 45 % (5 MB)
138 16:51:57.702747 progress 50 % (5 MB)
139 16:51:57.783904 progress 55 % (6 MB)
140 16:51:57.864181 progress 60 % (6 MB)
141 16:51:57.944279 progress 65 % (7 MB)
142 16:51:58.026136 progress 70 % (7 MB)
143 16:51:58.103886 progress 75 % (8 MB)
144 16:51:58.187221 progress 80 % (8 MB)
145 16:51:58.267239 progress 85 % (9 MB)
146 16:51:58.350482 progress 90 % (10 MB)
147 16:51:58.424424 progress 95 % (10 MB)
148 16:51:58.500754 progress 100 % (11 MB)
149 16:51:58.514769 11 MB downloaded in 1.66 s (6.68 MB/s)
150 16:51:58.515678 end: 1.5.1 http-download (duration 00:00:02) [common]
152 16:51:58.517448 end: 1.5 download-retry (duration 00:00:02) [common]
153 16:51:58.518010 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 16:51:58.518570 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 16:52:15.390163 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/975723/extract-nfsrootfs-c5423orj
156 16:52:15.390773 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 16:52:15.391059 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 16:52:15.391793 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq
159 16:52:15.392281 makedir: /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin
160 16:52:15.392605 makedir: /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/tests
161 16:52:15.392914 makedir: /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/results
162 16:52:15.393239 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-add-keys
163 16:52:15.393786 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-add-sources
164 16:52:15.394301 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-background-process-start
165 16:52:15.394785 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-background-process-stop
166 16:52:15.395300 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-common-functions
167 16:52:15.395781 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-echo-ipv4
168 16:52:15.396306 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-install-packages
169 16:52:15.396855 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-installed-packages
170 16:52:15.397333 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-os-build
171 16:52:15.397826 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-probe-channel
172 16:52:15.398313 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-probe-ip
173 16:52:15.398780 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-target-ip
174 16:52:15.399245 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-target-mac
175 16:52:15.399710 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-target-storage
176 16:52:15.400220 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-test-case
177 16:52:15.400696 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-test-event
178 16:52:15.401168 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-test-feedback
179 16:52:15.401664 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-test-raise
180 16:52:15.402156 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-test-reference
181 16:52:15.402629 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-test-runner
182 16:52:15.403101 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-test-set
183 16:52:15.403568 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-test-shell
184 16:52:15.404076 Updating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-add-keys (debian)
185 16:52:15.404616 Updating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-add-sources (debian)
186 16:52:15.405133 Updating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-install-packages (debian)
187 16:52:15.405629 Updating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-installed-packages (debian)
188 16:52:15.406123 Updating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/bin/lava-os-build (debian)
189 16:52:15.406550 Creating /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/environment
190 16:52:15.406916 LAVA metadata
191 16:52:15.407172 - LAVA_JOB_ID=975723
192 16:52:15.407385 - LAVA_DISPATCHER_IP=192.168.6.2
193 16:52:15.407749 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 16:52:15.408899 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 16:52:15.409237 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 16:52:15.409445 skipped lava-vland-overlay
197 16:52:15.409685 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 16:52:15.409937 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 16:52:15.410157 skipped lava-multinode-overlay
200 16:52:15.410397 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 16:52:15.410648 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 16:52:15.410897 Loading test definitions
203 16:52:15.411170 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 16:52:15.411386 Using /lava-975723 at stage 0
205 16:52:15.412510 uuid=975723_1.6.2.4.1 testdef=None
206 16:52:15.412813 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 16:52:15.413074 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 16:52:15.414587 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 16:52:15.415357 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 16:52:15.417261 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 16:52:15.418073 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 16:52:15.419842 runner path: /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/0/tests/0_timesync-off test_uuid 975723_1.6.2.4.1
215 16:52:15.420415 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 16:52:15.421227 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 16:52:15.421454 Using /lava-975723 at stage 0
219 16:52:15.421799 Fetching tests from https://github.com/kernelci/test-definitions.git
220 16:52:15.422083 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/0/tests/1_kselftest-alsa'
221 16:52:19.117190 Running '/usr/bin/git checkout kernelci.org
222 16:52:19.282956 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 16:52:19.284428 uuid=975723_1.6.2.4.5 testdef=None
224 16:52:19.284782 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 16:52:19.285551 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 16:52:19.288435 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 16:52:19.289270 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 16:52:19.295913 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 16:52:19.297793 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 16:52:19.305680 runner path: /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/0/tests/1_kselftest-alsa test_uuid 975723_1.6.2.4.5
234 16:52:19.306270 BOARD='meson-sm1-s905d3-libretech-cc'
235 16:52:19.306730 BRANCH='renesas'
236 16:52:19.307169 SKIPFILE='/dev/null'
237 16:52:19.307605 SKIP_INSTALL='True'
238 16:52:19.308070 TESTPROG_URL='http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 16:52:19.308539 TST_CASENAME=''
240 16:52:19.308980 TST_CMDFILES='alsa'
241 16:52:19.310122 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 16:52:19.311830 Creating lava-test-runner.conf files
244 16:52:19.312356 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/975723/lava-overlay-9_jf9lxq/lava-975723/0 for stage 0
245 16:52:19.313101 - 0_timesync-off
246 16:52:19.313616 - 1_kselftest-alsa
247 16:52:19.314329 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 16:52:19.314939 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 16:52:42.677048 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 16:52:42.677487 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 16:52:42.677748 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 16:52:42.678019 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 16:52:42.678283 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 16:52:43.305556 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 16:52:43.306052 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 16:52:43.306317 extracting modules file /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/975723/extract-nfsrootfs-c5423orj
257 16:52:44.688291 extracting modules file /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/975723/extract-overlay-ramdisk-v2u6aku8/ramdisk
258 16:52:46.103248 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 16:52:46.103743 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 16:52:46.104067 [common] Applying overlay to NFS
261 16:52:46.104303 [common] Applying overlay /var/lib/lava/dispatcher/tmp/975723/compress-overlay-lxrj_yzq/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/975723/extract-nfsrootfs-c5423orj
262 16:52:48.836907 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 16:52:48.837376 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 16:52:48.837676 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 16:52:48.837933 Converting downloaded kernel to a uImage
266 16:52:48.838263 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/kernel/Image /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/kernel/uImage
267 16:52:49.307948 output: Image Name:
268 16:52:49.308411 output: Created: Mon Nov 11 16:52:48 2024
269 16:52:49.308620 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 16:52:49.308822 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 16:52:49.309022 output: Load Address: 01080000
272 16:52:49.309219 output: Entry Point: 01080000
273 16:52:49.309415 output:
274 16:52:49.309744 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 16:52:49.310012 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 16:52:49.310279 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 16:52:49.310530 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 16:52:49.310785 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 16:52:49.311036 Building ramdisk /var/lib/lava/dispatcher/tmp/975723/extract-overlay-ramdisk-v2u6aku8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/975723/extract-overlay-ramdisk-v2u6aku8/ramdisk
280 16:52:51.484062 >> 166829 blocks
281 16:52:59.357798 Adding RAMdisk u-boot header.
282 16:52:59.358524 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/975723/extract-overlay-ramdisk-v2u6aku8/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/975723/extract-overlay-ramdisk-v2u6aku8/ramdisk.cpio.gz.uboot
283 16:52:59.605479 output: Image Name:
284 16:52:59.606147 output: Created: Mon Nov 11 16:52:59 2024
285 16:52:59.606616 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 16:52:59.607075 output: Data Size: 23436031 Bytes = 22886.75 KiB = 22.35 MiB
287 16:52:59.607524 output: Load Address: 00000000
288 16:52:59.607966 output: Entry Point: 00000000
289 16:52:59.608488 output:
290 16:52:59.609651 rename /var/lib/lava/dispatcher/tmp/975723/extract-overlay-ramdisk-v2u6aku8/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/ramdisk/ramdisk.cpio.gz.uboot
291 16:52:59.610437 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 16:52:59.611049 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 16:52:59.611643 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 16:52:59.612214 No LXC device requested
295 16:52:59.612787 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 16:52:59.613362 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 16:52:59.613917 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 16:52:59.614376 Checking files for TFTP limit of 4294967296 bytes.
299 16:52:59.617328 end: 1 tftp-deploy (duration 00:01:19) [common]
300 16:52:59.617961 start: 2 uboot-action (timeout 00:05:00) [common]
301 16:52:59.618552 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 16:52:59.619110 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 16:52:59.619675 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 16:52:59.620304 Using kernel file from prepare-kernel: 975723/tftp-deploy-330hqyvv/kernel/uImage
305 16:52:59.621002 substitutions:
306 16:52:59.621460 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 16:52:59.621916 - {DTB_ADDR}: 0x01070000
308 16:52:59.622359 - {DTB}: 975723/tftp-deploy-330hqyvv/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 16:52:59.622807 - {INITRD}: 975723/tftp-deploy-330hqyvv/ramdisk/ramdisk.cpio.gz.uboot
310 16:52:59.623247 - {KERNEL_ADDR}: 0x01080000
311 16:52:59.623683 - {KERNEL}: 975723/tftp-deploy-330hqyvv/kernel/uImage
312 16:52:59.624155 - {LAVA_MAC}: None
313 16:52:59.624646 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/975723/extract-nfsrootfs-c5423orj
314 16:52:59.625100 - {NFS_SERVER_IP}: 192.168.6.2
315 16:52:59.625540 - {PRESEED_CONFIG}: None
316 16:52:59.625980 - {PRESEED_LOCAL}: None
317 16:52:59.626416 - {RAMDISK_ADDR}: 0x08000000
318 16:52:59.626847 - {RAMDISK}: 975723/tftp-deploy-330hqyvv/ramdisk/ramdisk.cpio.gz.uboot
319 16:52:59.627283 - {ROOT_PART}: None
320 16:52:59.627715 - {ROOT}: None
321 16:52:59.628192 - {SERVER_IP}: 192.168.6.2
322 16:52:59.628628 - {TEE_ADDR}: 0x83000000
323 16:52:59.629063 - {TEE}: None
324 16:52:59.629496 Parsed boot commands:
325 16:52:59.629915 - setenv autoload no
326 16:52:59.630343 - setenv initrd_high 0xffffffff
327 16:52:59.630771 - setenv fdt_high 0xffffffff
328 16:52:59.631194 - dhcp
329 16:52:59.631616 - setenv serverip 192.168.6.2
330 16:52:59.632071 - tftpboot 0x01080000 975723/tftp-deploy-330hqyvv/kernel/uImage
331 16:52:59.632517 - tftpboot 0x08000000 975723/tftp-deploy-330hqyvv/ramdisk/ramdisk.cpio.gz.uboot
332 16:52:59.632951 - tftpboot 0x01070000 975723/tftp-deploy-330hqyvv/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 16:52:59.633384 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/975723/extract-nfsrootfs-c5423orj,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 16:52:59.633830 - bootm 0x01080000 0x08000000 0x01070000
335 16:52:59.634376 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 16:52:59.636059 start: 2.3 connect-device (timeout 00:05:00) [common]
338 16:52:59.636535 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 16:52:59.651556 Setting prompt string to ['lava-test: # ']
340 16:52:59.653246 end: 2.3 connect-device (duration 00:00:00) [common]
341 16:52:59.653945 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 16:52:59.654578 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 16:52:59.655183 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 16:52:59.656462 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 16:52:59.695156 >> OK - accepted request
346 16:52:59.697309 Returned 0 in 0 seconds
347 16:52:59.798466 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 16:52:59.800234 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 16:52:59.800861 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 16:52:59.801433 Setting prompt string to ['Hit any key to stop autoboot']
352 16:52:59.801936 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 16:52:59.803638 Trying 192.168.56.21...
354 16:52:59.804205 Connected to conserv1.
355 16:52:59.804676 Escape character is '^]'.
356 16:52:59.805147
357 16:52:59.805618 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 16:52:59.806083
359 16:53:06.695161 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 16:53:06.695839 bl2_stage_init 0x01
361 16:53:06.696356 bl2_stage_init 0x81
362 16:53:06.700727 hw id: 0x0000 - pwm id 0x01
363 16:53:06.701217 bl2_stage_init 0xc1
364 16:53:06.706274 bl2_stage_init 0x02
365 16:53:06.706784
366 16:53:06.707242 L0:00000000
367 16:53:06.707700 L1:00000703
368 16:53:06.708189 L2:00008067
369 16:53:06.708642 L3:15000000
370 16:53:06.712418 S1:00000000
371 16:53:06.712906 B2:20282000
372 16:53:06.713359 B1:a0f83180
373 16:53:06.713791
374 16:53:06.714223 TE: 66464
375 16:53:06.714657
376 16:53:06.717850 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 16:53:06.718325
378 16:53:06.723480 Board ID = 1
379 16:53:06.723941 Set cpu clk to 24M
380 16:53:06.724409 Set clk81 to 24M
381 16:53:06.729297 Use GP1_pll as DSU clk.
382 16:53:06.729762 DSU clk: 1200 Mhz
383 16:53:06.730196 CPU clk: 1200 MHz
384 16:53:06.734561 Set clk81 to 166.6M
385 16:53:06.740209 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 16:53:06.740676 board id: 1
387 16:53:06.746900 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 16:53:06.757723 fw parse done
389 16:53:06.763510 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 16:53:06.806223 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 16:53:06.817225 PIEI prepare done
392 16:53:06.817701 fastboot data load
393 16:53:06.818139 fastboot data verify
394 16:53:06.822782 verify result: 266
395 16:53:06.828366 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 16:53:06.828834 LPDDR4 probe
397 16:53:06.829266 ddr clk to 1584MHz
398 16:53:06.836389 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 16:53:06.873839
400 16:53:06.874469 dmc_version 0001
401 16:53:06.880333 Check phy result
402 16:53:06.886206 INFO : End of CA training
403 16:53:06.886682 INFO : End of initialization
404 16:53:06.892456 INFO : Training has run successfully!
405 16:53:06.893027 Check phy result
406 16:53:06.897406 INFO : End of initialization
407 16:53:06.897881 INFO : End of read enable training
408 16:53:06.900902 INFO : End of fine write leveling
409 16:53:06.906469 INFO : End of Write leveling coarse delay
410 16:53:06.912052 INFO : Training has run successfully!
411 16:53:06.912547 Check phy result
412 16:53:06.913000 INFO : End of initialization
413 16:53:06.917639 INFO : End of read dq deskew training
414 16:53:06.923226 INFO : End of MPR read delay center optimization
415 16:53:06.923703 INFO : End of write delay center optimization
416 16:53:06.928812 INFO : End of read delay center optimization
417 16:53:06.934413 INFO : End of max read latency training
418 16:53:06.934879 INFO : Training has run successfully!
419 16:53:06.940161 1D training succeed
420 16:53:06.945916 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 16:53:06.993448 Check phy result
422 16:53:06.993933 INFO : End of initialization
423 16:53:07.015837 INFO : End of 2D read delay Voltage center optimization
424 16:53:07.034975 INFO : End of 2D read delay Voltage center optimization
425 16:53:07.086847 INFO : End of 2D write delay Voltage center optimization
426 16:53:07.135948 INFO : End of 2D write delay Voltage center optimization
427 16:53:07.141570 INFO : Training has run successfully!
428 16:53:07.142048
429 16:53:07.142491 channel==0
430 16:53:07.147180 RxClkDly_Margin_A0==78 ps 8
431 16:53:07.147686 TxDqDly_Margin_A0==98 ps 10
432 16:53:07.150467 RxClkDly_Margin_A1==88 ps 9
433 16:53:07.150929 TxDqDly_Margin_A1==98 ps 10
434 16:53:07.156099 TrainedVREFDQ_A0==74
435 16:53:07.156569 TrainedVREFDQ_A1==74
436 16:53:07.157004 VrefDac_Margin_A0==23
437 16:53:07.161708 DeviceVref_Margin_A0==40
438 16:53:07.162171 VrefDac_Margin_A1==23
439 16:53:07.167377 DeviceVref_Margin_A1==40
440 16:53:07.167838
441 16:53:07.168308
442 16:53:07.168743 channel==1
443 16:53:07.169168 RxClkDly_Margin_A0==78 ps 8
444 16:53:07.172896 TxDqDly_Margin_A0==98 ps 10
445 16:53:07.173358 RxClkDly_Margin_A1==78 ps 8
446 16:53:07.178616 TxDqDly_Margin_A1==88 ps 9
447 16:53:07.179085 TrainedVREFDQ_A0==78
448 16:53:07.179517 TrainedVREFDQ_A1==77
449 16:53:07.184029 VrefDac_Margin_A0==22
450 16:53:07.184491 DeviceVref_Margin_A0==36
451 16:53:07.189626 VrefDac_Margin_A1==22
452 16:53:07.190086 DeviceVref_Margin_A1==37
453 16:53:07.190519
454 16:53:07.195228 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 16:53:07.195691
456 16:53:07.223193 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 16:53:07.228818 2D training succeed
458 16:53:07.234389 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 16:53:07.234854 auto size-- 65535DDR cs0 size: 2048MB
460 16:53:07.240021 DDR cs1 size: 2048MB
461 16:53:07.240488 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 16:53:07.245640 cs0 DataBus test pass
463 16:53:07.246097 cs1 DataBus test pass
464 16:53:07.246525 cs0 AddrBus test pass
465 16:53:07.251228 cs1 AddrBus test pass
466 16:53:07.251686
467 16:53:07.252152 100bdlr_step_size ps== 478
468 16:53:07.252600 result report
469 16:53:07.256847 boot times 0Enable ddr reg access
470 16:53:07.264354 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 16:53:07.278170 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 16:53:07.932656 bl2z: ptr: 05129330, size: 00001e40
473 16:53:07.940374 0.0;M3 CHK:0;cm4_sp_mode 0
474 16:53:07.940869 MVN_1=0x00000000
475 16:53:07.941306 MVN_2=0x00000000
476 16:53:07.951900 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 16:53:07.952422 OPS=0x04
478 16:53:07.952863 ring efuse init
479 16:53:07.954835 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 16:53:07.960452 [0.017319 Inits done]
481 16:53:07.960918 secure task start!
482 16:53:07.961351 high task start!
483 16:53:07.961778 low task start!
484 16:53:07.964710 run into bl31
485 16:53:07.973335 NOTICE: BL31: v1.3(release):4fc40b1
486 16:53:07.981149 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 16:53:07.981619 NOTICE: BL31: G12A normal boot!
488 16:53:07.996839 NOTICE: BL31: BL33 decompress pass
489 16:53:08.002397 ERROR: Error initializing runtime service opteed_fast
490 16:53:10.745629 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 16:53:10.746040 bl2_stage_init 0x01
492 16:53:10.746256 bl2_stage_init 0x81
493 16:53:10.751201 hw id: 0x0000 - pwm id 0x01
494 16:53:10.751511 bl2_stage_init 0xc1
495 16:53:10.756780 bl2_stage_init 0x02
496 16:53:10.757079
497 16:53:10.757288 L0:00000000
498 16:53:10.757494 L1:00000703
499 16:53:10.757691 L2:00008067
500 16:53:10.757893 L3:15000000
501 16:53:10.762517 S1:00000000
502 16:53:10.762792 B2:20282000
503 16:53:10.763001 B1:a0f83180
504 16:53:10.763197
505 16:53:10.763400 TE: 68480
506 16:53:10.763595
507 16:53:10.768287 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 16:53:10.768841
509 16:53:10.773733 Board ID = 1
510 16:53:10.774211 Set cpu clk to 24M
511 16:53:10.774655 Set clk81 to 24M
512 16:53:10.779327 Use GP1_pll as DSU clk.
513 16:53:10.779819 DSU clk: 1200 Mhz
514 16:53:10.780342 CPU clk: 1200 MHz
515 16:53:10.784956 Set clk81 to 166.6M
516 16:53:10.790545 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 16:53:10.791015 board id: 1
518 16:53:10.797557 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 16:53:10.808478 fw parse done
520 16:53:10.814414 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 16:53:10.857650 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 16:53:10.868732 PIEI prepare done
523 16:53:10.869207 fastboot data load
524 16:53:10.869643 fastboot data verify
525 16:53:10.874358 verify result: 266
526 16:53:10.879947 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 16:53:10.880464 LPDDR4 probe
528 16:53:10.880893 ddr clk to 1584MHz
529 16:53:10.887900 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 16:53:10.925706
531 16:53:10.926239 dmc_version 0001
532 16:53:10.932704 Check phy result
533 16:53:10.940241 INFO : End of CA training
534 16:53:10.940722 INFO : End of initialization
535 16:53:10.944308 INFO : Training has run successfully!
536 16:53:10.944808 Check phy result
537 16:53:10.949845 INFO : End of initialization
538 16:53:10.950358 INFO : End of read enable training
539 16:53:10.955455 INFO : End of fine write leveling
540 16:53:10.961080 INFO : End of Write leveling coarse delay
541 16:53:10.961574 INFO : Training has run successfully!
542 16:53:10.962028 Check phy result
543 16:53:10.966679 INFO : End of initialization
544 16:53:10.967166 INFO : End of read dq deskew training
545 16:53:10.972305 INFO : End of MPR read delay center optimization
546 16:53:10.977873 INFO : End of write delay center optimization
547 16:53:10.983476 INFO : End of read delay center optimization
548 16:53:10.983961 INFO : End of max read latency training
549 16:53:10.989048 INFO : Training has run successfully!
550 16:53:10.989545 1D training succeed
551 16:53:10.998353 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 16:53:11.046642 Check phy result
553 16:53:11.047160 INFO : End of initialization
554 16:53:11.073969 INFO : End of 2D read delay Voltage center optimization
555 16:53:11.098120 INFO : End of 2D read delay Voltage center optimization
556 16:53:11.154839 INFO : End of 2D write delay Voltage center optimization
557 16:53:11.208864 INFO : End of 2D write delay Voltage center optimization
558 16:53:11.214394 INFO : Training has run successfully!
559 16:53:11.214888
560 16:53:11.215343 channel==0
561 16:53:11.219960 RxClkDly_Margin_A0==88 ps 9
562 16:53:11.220505 TxDqDly_Margin_A0==98 ps 10
563 16:53:11.225559 RxClkDly_Margin_A1==69 ps 7
564 16:53:11.226041 TxDqDly_Margin_A1==88 ps 9
565 16:53:11.226491 TrainedVREFDQ_A0==74
566 16:53:11.231268 TrainedVREFDQ_A1==74
567 16:53:11.231753 VrefDac_Margin_A0==24
568 16:53:11.232253 DeviceVref_Margin_A0==40
569 16:53:11.236767 VrefDac_Margin_A1==23
570 16:53:11.237272 DeviceVref_Margin_A1==40
571 16:53:11.237722
572 16:53:11.238162
573 16:53:11.238641 channel==1
574 16:53:11.242445 RxClkDly_Margin_A0==88 ps 9
575 16:53:11.243024 TxDqDly_Margin_A0==98 ps 10
576 16:53:11.247934 RxClkDly_Margin_A1==78 ps 8
577 16:53:11.248483 TxDqDly_Margin_A1==98 ps 10
578 16:53:11.253621 TrainedVREFDQ_A0==78
579 16:53:11.254210 TrainedVREFDQ_A1==78
580 16:53:11.254674 VrefDac_Margin_A0==22
581 16:53:11.259173 DeviceVref_Margin_A0==36
582 16:53:11.259675 VrefDac_Margin_A1==22
583 16:53:11.264775 DeviceVref_Margin_A1==36
584 16:53:11.265293
585 16:53:11.265754 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 16:53:11.266203
587 16:53:11.298381 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
588 16:53:11.299057 2D training succeed
589 16:53:11.303971 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 16:53:11.309570 auto size-- 65535DDR cs0 size: 2048MB
591 16:53:11.310121 DDR cs1 size: 2048MB
592 16:53:11.315168 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 16:53:11.315696 cs0 DataBus test pass
594 16:53:11.320785 cs1 DataBus test pass
595 16:53:11.321298 cs0 AddrBus test pass
596 16:53:11.321757 cs1 AddrBus test pass
597 16:53:11.322205
598 16:53:11.326375 100bdlr_step_size ps== 471
599 16:53:11.326890 result report
600 16:53:11.332310 boot times 0Enable ddr reg access
601 16:53:11.337201 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 16:53:11.351091 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 16:53:12.010420 bl2z: ptr: 05129330, size: 00001e40
604 16:53:12.018409 0.0;M3 CHK:0;cm4_sp_mode 0
605 16:53:12.018943 MVN_1=0x00000000
606 16:53:12.019406 MVN_2=0x00000000
607 16:53:12.029754 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 16:53:12.030270 OPS=0x04
609 16:53:12.030749 ring efuse init
610 16:53:12.035365 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 16:53:12.035904 [0.017354 Inits done]
612 16:53:12.036418 secure task start!
613 16:53:12.042582 high task start!
614 16:53:12.043089 low task start!
615 16:53:12.043545 run into bl31
616 16:53:12.051259 NOTICE: BL31: v1.3(release):4fc40b1
617 16:53:12.059075 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 16:53:12.059683 NOTICE: BL31: G12A normal boot!
619 16:53:12.074724 NOTICE: BL31: BL33 decompress pass
620 16:53:12.080475 ERROR: Error initializing runtime service opteed_fast
621 16:53:13.449729 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 16:53:13.450386 bl2_stage_init 0x01
623 16:53:13.450854 bl2_stage_init 0x81
624 16:53:13.455320 hw id: 0x0000 - pwm id 0x01
625 16:53:13.455832 bl2_stage_init 0xc1
626 16:53:13.456330 bl2_stage_init 0x02
627 16:53:13.456782
628 16:53:13.460917 L0:00000000
629 16:53:13.461399 L1:00000703
630 16:53:13.461847 L2:00008067
631 16:53:13.462288 L3:15000000
632 16:53:13.462717 S1:00000000
633 16:53:13.466427 B2:20282000
634 16:53:13.466916 B1:a0f83180
635 16:53:13.467358
636 16:53:13.467802 TE: 71438
637 16:53:13.468283
638 16:53:13.472058 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 16:53:13.472559
640 16:53:13.477637 Board ID = 1
641 16:53:13.478125 Set cpu clk to 24M
642 16:53:13.478571 Set clk81 to 24M
643 16:53:13.483302 Use GP1_pll as DSU clk.
644 16:53:13.483871 DSU clk: 1200 Mhz
645 16:53:13.484370 CPU clk: 1200 MHz
646 16:53:13.484816 Set clk81 to 166.6M
647 16:53:13.494457 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 16:53:13.494970 board id: 1
649 16:53:13.500908 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 16:53:13.511817 fw parse done
651 16:53:13.517764 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 16:53:13.561075 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 16:53:13.572008 PIEI prepare done
654 16:53:13.572514 fastboot data load
655 16:53:13.572963 fastboot data verify
656 16:53:13.577680 verify result: 266
657 16:53:13.583141 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 16:53:13.583652 LPDDR4 probe
659 16:53:13.584195 ddr clk to 1584MHz
660 16:53:13.591118 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 16:53:13.628901
662 16:53:13.629417 dmc_version 0001
663 16:53:13.635925 Check phy result
664 16:53:13.641882 INFO : End of CA training
665 16:53:13.642391 INFO : End of initialization
666 16:53:13.647476 INFO : Training has run successfully!
667 16:53:13.647957 Check phy result
668 16:53:13.653079 INFO : End of initialization
669 16:53:13.653557 INFO : End of read enable training
670 16:53:13.656463 INFO : End of fine write leveling
671 16:53:13.662019 INFO : End of Write leveling coarse delay
672 16:53:13.667688 INFO : Training has run successfully!
673 16:53:13.668212 Check phy result
674 16:53:13.668659 INFO : End of initialization
675 16:53:13.673327 INFO : End of read dq deskew training
676 16:53:13.678868 INFO : End of MPR read delay center optimization
677 16:53:13.679355 INFO : End of write delay center optimization
678 16:53:13.684518 INFO : End of read delay center optimization
679 16:53:13.690048 INFO : End of max read latency training
680 16:53:13.690549 INFO : Training has run successfully!
681 16:53:13.695723 1D training succeed
682 16:53:13.701571 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 16:53:13.749861 Check phy result
684 16:53:13.750365 INFO : End of initialization
685 16:53:13.777269 INFO : End of 2D read delay Voltage center optimization
686 16:53:13.801468 INFO : End of 2D read delay Voltage center optimization
687 16:53:13.858101 INFO : End of 2D write delay Voltage center optimization
688 16:53:13.912217 INFO : End of 2D write delay Voltage center optimization
689 16:53:13.917541 INFO : Training has run successfully!
690 16:53:13.918071
691 16:53:13.918537 channel==0
692 16:53:13.923242 RxClkDly_Margin_A0==78 ps 8
693 16:53:13.923726 TxDqDly_Margin_A0==88 ps 9
694 16:53:13.926591 RxClkDly_Margin_A1==69 ps 7
695 16:53:13.927069 TxDqDly_Margin_A1==98 ps 10
696 16:53:13.932089 TrainedVREFDQ_A0==74
697 16:53:13.932569 TrainedVREFDQ_A1==75
698 16:53:13.933018 VrefDac_Margin_A0==24
699 16:53:13.937604 DeviceVref_Margin_A0==40
700 16:53:13.938090 VrefDac_Margin_A1==23
701 16:53:13.943290 DeviceVref_Margin_A1==39
702 16:53:13.943771
703 16:53:13.944258
704 16:53:13.944704 channel==1
705 16:53:13.945142 RxClkDly_Margin_A0==88 ps 9
706 16:53:13.948795 TxDqDly_Margin_A0==98 ps 10
707 16:53:13.949278 RxClkDly_Margin_A1==78 ps 8
708 16:53:13.954548 TxDqDly_Margin_A1==88 ps 9
709 16:53:13.955031 TrainedVREFDQ_A0==78
710 16:53:13.955475 TrainedVREFDQ_A1==75
711 16:53:13.960090 VrefDac_Margin_A0==22
712 16:53:13.960575 DeviceVref_Margin_A0==36
713 16:53:13.965664 VrefDac_Margin_A1==22
714 16:53:13.966137 DeviceVref_Margin_A1==39
715 16:53:13.966584
716 16:53:13.971229 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 16:53:13.971731
718 16:53:13.999113 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 16:53:14.004748 2D training succeed
720 16:53:14.010329 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 16:53:14.010813 auto size-- 65535DDR cs0 size: 2048MB
722 16:53:14.015924 DDR cs1 size: 2048MB
723 16:53:14.016437 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 16:53:14.021506 cs0 DataBus test pass
725 16:53:14.021983 cs1 DataBus test pass
726 16:53:14.022425 cs0 AddrBus test pass
727 16:53:14.027147 cs1 AddrBus test pass
728 16:53:14.027628
729 16:53:14.028120 100bdlr_step_size ps== 471
730 16:53:14.028581 result report
731 16:53:14.032752 boot times 0Enable ddr reg access
732 16:53:14.040291 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 16:53:14.054109 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 16:53:14.713525 bl2z: ptr: 05129330, size: 00001e40
735 16:53:14.720337 0.0;M3 CHK:0;cm4_sp_mode 0
736 16:53:14.720886 MVN_1=0x00000000
737 16:53:14.721367 MVN_2=0x00000000
738 16:53:14.731820 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 16:53:14.732432 OPS=0x04
740 16:53:14.732897 ring efuse init
741 16:53:14.737517 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 16:53:14.738074 [0.017354 Inits done]
743 16:53:14.738535 secure task start!
744 16:53:14.744730 high task start!
745 16:53:14.745291 low task start!
746 16:53:14.745760 run into bl31
747 16:53:14.753341 NOTICE: BL31: v1.3(release):4fc40b1
748 16:53:14.761157 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 16:53:14.761728 NOTICE: BL31: G12A normal boot!
750 16:53:14.776733 NOTICE: BL31: BL33 decompress pass
751 16:53:14.782306 ERROR: Error initializing runtime service opteed_fast
752 16:53:15.577687
753 16:53:15.578112
754 16:53:15.583140 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 16:53:15.583479
756 16:53:15.586743 Model: Libre Computer AML-S905D3-CC Solitude
757 16:53:15.732871 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 16:53:15.748166 DRAM: 2 GiB (effective 3.8 GiB)
759 16:53:15.850025 Core: 406 devices, 33 uclasses, devicetree: separate
760 16:53:15.855932 WDT: Not starting watchdog@f0d0
761 16:53:15.881049 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 16:53:15.893259 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 16:53:15.898225 ** Bad device specification mmc 0 **
764 16:53:15.908246 Card did not respond to voltage select! : -110
765 16:53:15.916001 ** Bad device specification mmc 0 **
766 16:53:15.916367 Couldn't find partition mmc 0
767 16:53:15.924231 Card did not respond to voltage select! : -110
768 16:53:15.929729 ** Bad device specification mmc 0 **
769 16:53:15.930072 Couldn't find partition mmc 0
770 16:53:15.933884 Error: could not access storage.
771 16:53:16.231314 Net: eth0: ethernet@ff3f0000
772 16:53:16.231914 starting USB...
773 16:53:16.475908 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 16:53:16.476513 Starting the controller
775 16:53:16.481986 USB XHCI 1.10
776 16:53:18.037242 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 16:53:18.045331 scanning usb for storage devices... 0 Storage Device(s) found
779 16:53:18.096973 Hit any key to stop autoboot: 1
780 16:53:18.097886 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
781 16:53:18.098523 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
782 16:53:18.099041 Setting prompt string to ['=>']
783 16:53:18.099563 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
784 16:53:18.110402 0
785 16:53:18.111350 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 16:53:18.212690 => setenv autoload no
788 16:53:18.213407 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 16:53:18.218766 setenv autoload no
791 16:53:18.320351 => setenv initrd_high 0xffffffff
792 16:53:18.321064 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 16:53:18.325529 setenv initrd_high 0xffffffff
795 16:53:18.427098 => setenv fdt_high 0xffffffff
796 16:53:18.427901 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 16:53:18.432199 setenv fdt_high 0xffffffff
799 16:53:18.533802 => dhcp
800 16:53:18.534551 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 16:53:18.538636 dhcp
802 16:53:19.044275 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
803 16:53:19.044933 Speed: 1000, full duplex
804 16:53:19.045379 BOOTP broadcast 1
805 16:53:19.292850 BOOTP broadcast 2
806 16:53:19.303900 DHCP client bound to address 192.168.6.21 (259 ms)
808 16:53:19.404991 => setenv serverip 192.168.6.2
809 16:53:19.405532 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 16:53:19.411006 setenv serverip 192.168.6.2
812 16:53:19.512032 => tftpboot 0x01080000 975723/tftp-deploy-330hqyvv/kernel/uImage
813 16:53:19.512597 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
814 16:53:19.749280 tftpboot 0x01080000 975723/tftp-deploy-330hqyvv/kernel/uImage
815 16:53:19.754835 Speed: 1000, full duplex
816 16:53:19.755328 Using ethernet@ff3f0000 device
817 16:53:19.760211 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
818 16:53:19.770302 Filename '975723/tftp-deploy-330hqyvv/kernel/uImage'.
819 16:53:19.770790 Load address: 0x1080000
820 16:53:22.749269 Loading: *################################################## 43.6 MiB
821 16:53:22.749952 14.6 MiB/s
822 16:53:22.750427 done
823 16:53:22.753724 Bytes transferred = 45713984 (2b98a40 hex)
825 16:53:22.855448 => tftpboot 0x08000000 975723/tftp-deploy-330hqyvv/ramdisk/ramdisk.cpio.gz.uboot
826 16:53:22.856331 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
827 16:53:22.863337 tftpboot 0x08000000 975723/tftp-deploy-330hqyvv/ramdisk/ramdisk.cpio.gz.uboot
828 16:53:22.863880 Speed: 1000, full duplex
829 16:53:22.864367 Using ethernet@ff3f0000 device
830 16:53:22.868854 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
831 16:53:22.878595 Filename '975723/tftp-deploy-330hqyvv/ramdisk/ramdisk.cpio.gz.uboot'.
832 16:53:22.879155 Load address: 0x8000000
833 16:53:24.441560 Loading: *################################################# UDP wrong checksum 00000005 0000c459
834 16:53:29.442472 T UDP wrong checksum 00000005 0000c459
835 16:53:39.241996 T UDP wrong checksum 000000ff 0000d44d
836 16:53:39.281098 UDP wrong checksum 000000ff 00007040
837 16:53:39.445506 T UDP wrong checksum 00000005 0000c459
838 16:53:59.448359 T T T UDP wrong checksum 00000005 0000c459
839 16:54:03.704168 T UDP wrong checksum 000000ff 0000731a
840 16:54:03.740896 UDP wrong checksum 000000ff 0000cb92
841 16:54:19.453415 T T T
842 16:54:19.453845 Retry count exceeded; starting again
844 16:54:19.456071 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
847 16:54:19.457136 end: 2.4 uboot-commands (duration 00:01:20) [common]
849 16:54:19.458084 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
851 16:54:19.458715 end: 2 uboot-action (duration 00:01:20) [common]
853 16:54:19.459644 Cleaning after the job
854 16:54:19.459976 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/ramdisk
855 16:54:19.460883 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/kernel
856 16:54:19.464991 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/dtb
857 16:54:19.465685 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/nfsrootfs
858 16:54:19.493573 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975723/tftp-deploy-330hqyvv/modules
859 16:54:19.497648 start: 4.1 power-off (timeout 00:00:30) [common]
860 16:54:19.498260 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
861 16:54:19.544874 >> OK - accepted request
862 16:54:19.546801 Returned 0 in 0 seconds
863 16:54:19.647613 end: 4.1 power-off (duration 00:00:00) [common]
865 16:54:19.648620 start: 4.2 read-feedback (timeout 00:10:00) [common]
866 16:54:19.649373 Listened to connection for namespace 'common' for up to 1s
867 16:54:20.650187 Finalising connection for namespace 'common'
868 16:54:20.650683 Disconnecting from shell: Finalise
869 16:54:20.651011 =>
870 16:54:20.751724 end: 4.2 read-feedback (duration 00:00:01) [common]
871 16:54:20.752227 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/975723
872 16:54:24.025587 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/975723
873 16:54:24.026398 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.