Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 16:55:00.796499 lava-dispatcher, installed at version: 2024.01
2 16:55:00.797317 start: 0 validate
3 16:55:00.797770 Start time: 2024-11-11 16:55:00.797740+00:00 (UTC)
4 16:55:00.798312 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 16:55:00.798850 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 16:55:00.841269 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 16:55:00.841806 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-11-11-v6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 16:55:00.874332 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 16:55:00.875312 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-11-11-v6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 16:55:00.905890 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 16:55:00.906362 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 16:55:00.935014 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 16:55:00.935507 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-11-11-v6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 16:55:00.973566 validate duration: 0.18
16 16:55:00.974451 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 16:55:00.974819 start: 1.1 download-retry (timeout 00:10:00) [common]
18 16:55:00.975162 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 16:55:00.975765 Not decompressing ramdisk as can be used compressed.
20 16:55:00.976930 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 16:55:00.977369 saving as /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/ramdisk/initrd.cpio.gz
22 16:55:00.977823 total size: 5628169 (5 MB)
23 16:55:01.014502 progress 0 % (0 MB)
24 16:55:01.018867 progress 5 % (0 MB)
25 16:55:01.023080 progress 10 % (0 MB)
26 16:55:01.026768 progress 15 % (0 MB)
27 16:55:01.030792 progress 20 % (1 MB)
28 16:55:01.034399 progress 25 % (1 MB)
29 16:55:01.038347 progress 30 % (1 MB)
30 16:55:01.042360 progress 35 % (1 MB)
31 16:55:01.045987 progress 40 % (2 MB)
32 16:55:01.049938 progress 45 % (2 MB)
33 16:55:01.053497 progress 50 % (2 MB)
34 16:55:01.057448 progress 55 % (2 MB)
35 16:55:01.061416 progress 60 % (3 MB)
36 16:55:01.064960 progress 65 % (3 MB)
37 16:55:01.068931 progress 70 % (3 MB)
38 16:55:01.072472 progress 75 % (4 MB)
39 16:55:01.076374 progress 80 % (4 MB)
40 16:55:01.079889 progress 85 % (4 MB)
41 16:55:01.083683 progress 90 % (4 MB)
42 16:55:01.087323 progress 95 % (5 MB)
43 16:55:01.090548 progress 100 % (5 MB)
44 16:55:01.091204 5 MB downloaded in 0.11 s (47.35 MB/s)
45 16:55:01.091749 end: 1.1.1 http-download (duration 00:00:00) [common]
47 16:55:01.092701 end: 1.1 download-retry (duration 00:00:00) [common]
48 16:55:01.093019 start: 1.2 download-retry (timeout 00:10:00) [common]
49 16:55:01.093306 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 16:55:01.093807 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/kernel/Image
51 16:55:01.094072 saving as /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/kernel/Image
52 16:55:01.094295 total size: 45713920 (43 MB)
53 16:55:01.094515 No compression specified
54 16:55:01.129478 progress 0 % (0 MB)
55 16:55:01.157747 progress 5 % (2 MB)
56 16:55:01.186278 progress 10 % (4 MB)
57 16:55:01.214406 progress 15 % (6 MB)
58 16:55:01.242621 progress 20 % (8 MB)
59 16:55:01.270412 progress 25 % (10 MB)
60 16:55:01.298648 progress 30 % (13 MB)
61 16:55:01.326961 progress 35 % (15 MB)
62 16:55:01.355235 progress 40 % (17 MB)
63 16:55:01.383266 progress 45 % (19 MB)
64 16:55:01.411183 progress 50 % (21 MB)
65 16:55:01.439440 progress 55 % (24 MB)
66 16:55:01.467505 progress 60 % (26 MB)
67 16:55:01.495462 progress 65 % (28 MB)
68 16:55:01.523639 progress 70 % (30 MB)
69 16:55:01.551598 progress 75 % (32 MB)
70 16:55:01.579507 progress 80 % (34 MB)
71 16:55:01.607079 progress 85 % (37 MB)
72 16:55:01.634816 progress 90 % (39 MB)
73 16:55:01.662537 progress 95 % (41 MB)
74 16:55:01.689697 progress 100 % (43 MB)
75 16:55:01.690242 43 MB downloaded in 0.60 s (73.16 MB/s)
76 16:55:01.690716 end: 1.2.1 http-download (duration 00:00:01) [common]
78 16:55:01.691540 end: 1.2 download-retry (duration 00:00:01) [common]
79 16:55:01.691813 start: 1.3 download-retry (timeout 00:09:59) [common]
80 16:55:01.692108 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 16:55:01.692567 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 16:55:01.692838 saving as /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 16:55:01.693044 total size: 53209 (0 MB)
84 16:55:01.693253 No compression specified
85 16:55:01.731627 progress 61 % (0 MB)
86 16:55:01.732503 progress 100 % (0 MB)
87 16:55:01.733030 0 MB downloaded in 0.04 s (1.27 MB/s)
88 16:55:01.733488 end: 1.3.1 http-download (duration 00:00:00) [common]
90 16:55:01.734298 end: 1.3 download-retry (duration 00:00:00) [common]
91 16:55:01.734562 start: 1.4 download-retry (timeout 00:09:59) [common]
92 16:55:01.734823 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 16:55:01.735266 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 16:55:01.735506 saving as /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/nfsrootfs/full.rootfs.tar
95 16:55:01.735709 total size: 120894716 (115 MB)
96 16:55:01.735919 Using unxz to decompress xz
97 16:55:01.777699 progress 0 % (0 MB)
98 16:55:02.587600 progress 5 % (5 MB)
99 16:55:03.442846 progress 10 % (11 MB)
100 16:55:04.243590 progress 15 % (17 MB)
101 16:55:04.986642 progress 20 % (23 MB)
102 16:55:05.578116 progress 25 % (28 MB)
103 16:55:06.572095 progress 30 % (34 MB)
104 16:55:07.502132 progress 35 % (40 MB)
105 16:55:07.869273 progress 40 % (46 MB)
106 16:55:08.246698 progress 45 % (51 MB)
107 16:55:08.977814 progress 50 % (57 MB)
108 16:55:09.868554 progress 55 % (63 MB)
109 16:55:10.652767 progress 60 % (69 MB)
110 16:55:11.421194 progress 65 % (74 MB)
111 16:55:12.203869 progress 70 % (80 MB)
112 16:55:13.031335 progress 75 % (86 MB)
113 16:55:13.826888 progress 80 % (92 MB)
114 16:55:14.595901 progress 85 % (98 MB)
115 16:55:15.489276 progress 90 % (103 MB)
116 16:55:16.283553 progress 95 % (109 MB)
117 16:55:17.146756 progress 100 % (115 MB)
118 16:55:17.160581 115 MB downloaded in 15.42 s (7.47 MB/s)
119 16:55:17.161590 end: 1.4.1 http-download (duration 00:00:15) [common]
121 16:55:17.162491 end: 1.4 download-retry (duration 00:00:15) [common]
122 16:55:17.163087 start: 1.5 download-retry (timeout 00:09:44) [common]
123 16:55:17.163739 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 16:55:17.164693 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/modules.tar.xz
125 16:55:17.165202 saving as /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/modules/modules.tar
126 16:55:17.165625 total size: 11621176 (11 MB)
127 16:55:17.166043 Using unxz to decompress xz
128 16:55:17.208211 progress 0 % (0 MB)
129 16:55:17.275941 progress 5 % (0 MB)
130 16:55:17.354532 progress 10 % (1 MB)
131 16:55:17.454380 progress 15 % (1 MB)
132 16:55:17.547514 progress 20 % (2 MB)
133 16:55:17.628313 progress 25 % (2 MB)
134 16:55:17.704550 progress 30 % (3 MB)
135 16:55:17.784913 progress 35 % (3 MB)
136 16:55:17.858906 progress 40 % (4 MB)
137 16:55:17.936934 progress 45 % (5 MB)
138 16:55:18.023193 progress 50 % (5 MB)
139 16:55:18.106862 progress 55 % (6 MB)
140 16:55:18.189497 progress 60 % (6 MB)
141 16:55:18.271382 progress 65 % (7 MB)
142 16:55:18.355530 progress 70 % (7 MB)
143 16:55:18.434541 progress 75 % (8 MB)
144 16:55:18.531284 progress 80 % (8 MB)
145 16:55:18.613543 progress 85 % (9 MB)
146 16:55:18.700684 progress 90 % (10 MB)
147 16:55:18.774897 progress 95 % (10 MB)
148 16:55:18.851526 progress 100 % (11 MB)
149 16:55:18.865997 11 MB downloaded in 1.70 s (6.52 MB/s)
150 16:55:18.866992 end: 1.5.1 http-download (duration 00:00:02) [common]
152 16:55:18.868898 end: 1.5 download-retry (duration 00:00:02) [common]
153 16:55:18.869474 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 16:55:18.870036 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 16:55:36.504855 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/975726/extract-nfsrootfs-hpeh44ro
156 16:55:36.505592 end: 1.6.1 extract-nfsrootfs (duration 00:00:18) [common]
157 16:55:36.505987 start: 1.6.2 lava-overlay (timeout 00:09:24) [common]
158 16:55:36.506984 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee
159 16:55:36.507599 makedir: /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin
160 16:55:36.508117 makedir: /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/tests
161 16:55:36.508553 makedir: /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/results
162 16:55:36.508968 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-add-keys
163 16:55:36.509609 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-add-sources
164 16:55:36.510230 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-background-process-start
165 16:55:36.510827 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-background-process-stop
166 16:55:36.511468 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-common-functions
167 16:55:36.512159 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-echo-ipv4
168 16:55:36.512816 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-install-packages
169 16:55:36.513436 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-installed-packages
170 16:55:36.514021 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-os-build
171 16:55:36.514591 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-probe-channel
172 16:55:36.515162 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-probe-ip
173 16:55:36.515733 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-target-ip
174 16:55:36.516365 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-target-mac
175 16:55:36.516950 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-target-storage
176 16:55:36.517530 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-test-case
177 16:55:36.518107 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-test-event
178 16:55:36.518676 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-test-feedback
179 16:55:36.519237 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-test-raise
180 16:55:36.519800 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-test-reference
181 16:55:36.520407 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-test-runner
182 16:55:36.520988 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-test-set
183 16:55:36.521561 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-test-shell
184 16:55:36.522176 Updating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-add-keys (debian)
185 16:55:36.522822 Updating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-add-sources (debian)
186 16:55:36.523422 Updating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-install-packages (debian)
187 16:55:36.524074 Updating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-installed-packages (debian)
188 16:55:36.524718 Updating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/bin/lava-os-build (debian)
189 16:55:36.525300 Creating /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/environment
190 16:55:36.525899 LAVA metadata
191 16:55:36.526257 - LAVA_JOB_ID=975726
192 16:55:36.526521 - LAVA_DISPATCHER_IP=192.168.6.2
193 16:55:36.526969 start: 1.6.2.1 ssh-authorize (timeout 00:09:24) [common]
194 16:55:36.528133 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 16:55:36.528508 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:24) [common]
196 16:55:36.528762 skipped lava-vland-overlay
197 16:55:36.529057 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 16:55:36.529361 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:24) [common]
199 16:55:36.529627 skipped lava-multinode-overlay
200 16:55:36.529921 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 16:55:36.530222 start: 1.6.2.4 test-definition (timeout 00:09:24) [common]
202 16:55:36.530515 Loading test definitions
203 16:55:36.530845 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:24) [common]
204 16:55:36.531105 Using /lava-975726 at stage 0
205 16:55:36.532403 uuid=975726_1.6.2.4.1 testdef=None
206 16:55:36.532766 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 16:55:36.533096 start: 1.6.2.4.2 test-overlay (timeout 00:09:24) [common]
208 16:55:36.534986 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 16:55:36.535936 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:24) [common]
211 16:55:36.538260 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 16:55:36.539246 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:24) [common]
214 16:55:36.541470 runner path: /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/0/tests/0_timesync-off test_uuid 975726_1.6.2.4.1
215 16:55:36.542125 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 16:55:36.543100 start: 1.6.2.4.5 git-repo-action (timeout 00:09:24) [common]
218 16:55:36.543370 Using /lava-975726 at stage 0
219 16:55:36.543786 Fetching tests from https://github.com/kernelci/test-definitions.git
220 16:55:36.544170 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/0/tests/1_kselftest-rtc'
221 16:55:40.123654 Running '/usr/bin/git checkout kernelci.org
222 16:55:40.289372 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 16:55:40.292143 uuid=975726_1.6.2.4.5 testdef=None
224 16:55:40.292811 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 16:55:40.294417 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 16:55:40.300422 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 16:55:40.302145 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 16:55:40.306155 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 16:55:40.307099 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 16:55:40.311026 runner path: /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/0/tests/1_kselftest-rtc test_uuid 975726_1.6.2.4.5
234 16:55:40.311345 BOARD='meson-sm1-s905d3-libretech-cc'
235 16:55:40.311582 BRANCH='renesas'
236 16:55:40.311799 SKIPFILE='/dev/null'
237 16:55:40.312037 SKIP_INSTALL='True'
238 16:55:40.312259 TESTPROG_URL='http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 16:55:40.312490 TST_CASENAME=''
240 16:55:40.312703 TST_CMDFILES='rtc'
241 16:55:40.313318 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 16:55:40.314165 Creating lava-test-runner.conf files
244 16:55:40.314397 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/975726/lava-overlay-28fuhbee/lava-975726/0 for stage 0
245 16:55:40.314779 - 0_timesync-off
246 16:55:40.315038 - 1_kselftest-rtc
247 16:55:40.315400 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 16:55:40.315714 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 16:56:03.573370 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 16:56:03.573819 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 16:56:03.574108 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 16:56:03.574383 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 16:56:03.574648 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 16:56:04.189975 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 16:56:04.190437 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 16:56:04.190710 extracting modules file /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/975726/extract-nfsrootfs-hpeh44ro
257 16:56:05.542684 extracting modules file /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/975726/extract-overlay-ramdisk-zu3ncjwn/ramdisk
258 16:56:06.922466 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 16:56:06.922944 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 16:56:06.923242 [common] Applying overlay to NFS
261 16:56:06.923472 [common] Applying overlay /var/lib/lava/dispatcher/tmp/975726/compress-overlay-rnltw0hs/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/975726/extract-nfsrootfs-hpeh44ro
262 16:56:09.655372 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 16:56:09.655847 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 16:56:09.656179 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 16:56:09.656441 Converting downloaded kernel to a uImage
266 16:56:09.656765 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/kernel/Image /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/kernel/uImage
267 16:56:10.153847 output: Image Name:
268 16:56:10.154272 output: Created: Mon Nov 11 16:56:09 2024
269 16:56:10.154480 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 16:56:10.154683 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 16:56:10.154884 output: Load Address: 01080000
272 16:56:10.155083 output: Entry Point: 01080000
273 16:56:10.155278 output:
274 16:56:10.155610 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 16:56:10.155875 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 16:56:10.156193 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 16:56:10.156451 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 16:56:10.156710 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 16:56:10.156963 Building ramdisk /var/lib/lava/dispatcher/tmp/975726/extract-overlay-ramdisk-zu3ncjwn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/975726/extract-overlay-ramdisk-zu3ncjwn/ramdisk
280 16:56:12.306713 >> 166829 blocks
281 16:56:20.043133 Adding RAMdisk u-boot header.
282 16:56:20.043857 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/975726/extract-overlay-ramdisk-zu3ncjwn/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/975726/extract-overlay-ramdisk-zu3ncjwn/ramdisk.cpio.gz.uboot
283 16:56:20.290682 output: Image Name:
284 16:56:20.291107 output: Created: Mon Nov 11 16:56:20 2024
285 16:56:20.291330 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 16:56:20.291560 output: Data Size: 23435487 Bytes = 22886.22 KiB = 22.35 MiB
287 16:56:20.291781 output: Load Address: 00000000
288 16:56:20.292050 output: Entry Point: 00000000
289 16:56:20.292292 output:
290 16:56:20.292963 rename /var/lib/lava/dispatcher/tmp/975726/extract-overlay-ramdisk-zu3ncjwn/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/ramdisk/ramdisk.cpio.gz.uboot
291 16:56:20.293408 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 16:56:20.293734 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 16:56:20.294062 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 16:56:20.294333 No LXC device requested
295 16:56:20.294633 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 16:56:20.294941 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 16:56:20.295247 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 16:56:20.295510 Checking files for TFTP limit of 4294967296 bytes.
299 16:56:20.297138 end: 1 tftp-deploy (duration 00:01:19) [common]
300 16:56:20.297510 start: 2 uboot-action (timeout 00:05:00) [common]
301 16:56:20.297817 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 16:56:20.298098 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 16:56:20.298382 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 16:56:20.298694 Using kernel file from prepare-kernel: 975726/tftp-deploy-8_3kg0qt/kernel/uImage
305 16:56:20.299052 substitutions:
306 16:56:20.299280 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 16:56:20.299492 - {DTB_ADDR}: 0x01070000
308 16:56:20.299701 - {DTB}: 975726/tftp-deploy-8_3kg0qt/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 16:56:20.299918 - {INITRD}: 975726/tftp-deploy-8_3kg0qt/ramdisk/ramdisk.cpio.gz.uboot
310 16:56:20.300680 - {KERNEL_ADDR}: 0x01080000
311 16:56:20.301097 - {KERNEL}: 975726/tftp-deploy-8_3kg0qt/kernel/uImage
312 16:56:20.301481 - {LAVA_MAC}: None
313 16:56:20.301890 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/975726/extract-nfsrootfs-hpeh44ro
314 16:56:20.302279 - {NFS_SERVER_IP}: 192.168.6.2
315 16:56:20.302674 - {PRESEED_CONFIG}: None
316 16:56:20.303037 - {PRESEED_LOCAL}: None
317 16:56:20.303395 - {RAMDISK_ADDR}: 0x08000000
318 16:56:20.303764 - {RAMDISK}: 975726/tftp-deploy-8_3kg0qt/ramdisk/ramdisk.cpio.gz.uboot
319 16:56:20.304178 - {ROOT_PART}: None
320 16:56:20.304571 - {ROOT}: None
321 16:56:20.304839 - {SERVER_IP}: 192.168.6.2
322 16:56:20.305071 - {TEE_ADDR}: 0x83000000
323 16:56:20.305297 - {TEE}: None
324 16:56:20.305533 Parsed boot commands:
325 16:56:20.305767 - setenv autoload no
326 16:56:20.306005 - setenv initrd_high 0xffffffff
327 16:56:20.306217 - setenv fdt_high 0xffffffff
328 16:56:20.306424 - dhcp
329 16:56:20.306630 - setenv serverip 192.168.6.2
330 16:56:20.306837 - tftpboot 0x01080000 975726/tftp-deploy-8_3kg0qt/kernel/uImage
331 16:56:20.307049 - tftpboot 0x08000000 975726/tftp-deploy-8_3kg0qt/ramdisk/ramdisk.cpio.gz.uboot
332 16:56:20.307260 - tftpboot 0x01070000 975726/tftp-deploy-8_3kg0qt/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 16:56:20.307469 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/975726/extract-nfsrootfs-hpeh44ro,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 16:56:20.307686 - bootm 0x01080000 0x08000000 0x01070000
335 16:56:20.308731 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 16:56:20.309993 start: 2.3 connect-device (timeout 00:05:00) [common]
338 16:56:20.310394 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 16:56:20.322699 Setting prompt string to ['lava-test: # ']
340 16:56:20.323900 end: 2.3 connect-device (duration 00:00:00) [common]
341 16:56:20.324495 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 16:56:20.325012 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 16:56:20.325505 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 16:56:20.326337 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 16:56:20.362397 >> OK - accepted request
346 16:56:20.364646 Returned 0 in 0 seconds
347 16:56:20.465612 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 16:56:20.466968 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 16:56:20.467452 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 16:56:20.467918 Setting prompt string to ['Hit any key to stop autoboot']
352 16:56:20.468374 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 16:56:20.469461 Trying 192.168.56.21...
354 16:56:20.469881 Connected to conserv1.
355 16:56:20.470262 Escape character is '^]'.
356 16:56:20.470540
357 16:56:20.470795 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 16:56:20.471062
359 16:56:27.658692 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 16:56:27.659360 bl2_stage_init 0x01
361 16:56:27.659858 bl2_stage_init 0x81
362 16:56:27.664268 hw id: 0x0000 - pwm id 0x01
363 16:56:27.664779 bl2_stage_init 0xc1
364 16:56:27.669815 bl2_stage_init 0x02
365 16:56:27.670312
366 16:56:27.670801 L0:00000000
367 16:56:27.671281 L1:00000703
368 16:56:27.671752 L2:00008067
369 16:56:27.672258 L3:15000000
370 16:56:27.675525 S1:00000000
371 16:56:27.676051 B2:20282000
372 16:56:27.676528 B1:a0f83180
373 16:56:27.676973
374 16:56:27.677414 TE: 68942
375 16:56:27.677859
376 16:56:27.681079 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 16:56:27.681568
378 16:56:27.686625 Board ID = 1
379 16:56:27.687110 Set cpu clk to 24M
380 16:56:27.687556 Set clk81 to 24M
381 16:56:27.692292 Use GP1_pll as DSU clk.
382 16:56:27.692778 DSU clk: 1200 Mhz
383 16:56:27.693222 CPU clk: 1200 MHz
384 16:56:27.697845 Set clk81 to 166.6M
385 16:56:27.703471 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 16:56:27.703955 board id: 1
387 16:56:27.710635 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 16:56:27.721302 fw parse done
389 16:56:27.727265 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 16:56:27.769859 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 16:56:27.780806 PIEI prepare done
392 16:56:27.781298 fastboot data load
393 16:56:27.781756 fastboot data verify
394 16:56:27.786399 verify result: 266
395 16:56:27.792021 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 16:56:27.792511 LPDDR4 probe
397 16:56:27.792969 ddr clk to 1584MHz
398 16:56:27.799969 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 16:56:27.837346
400 16:56:27.837934 dmc_version 0001
401 16:56:27.843926 Check phy result
402 16:56:27.849838 INFO : End of CA training
403 16:56:27.850340 INFO : End of initialization
404 16:56:27.855484 INFO : Training has run successfully!
405 16:56:27.856013 Check phy result
406 16:56:27.861033 INFO : End of initialization
407 16:56:27.861524 INFO : End of read enable training
408 16:56:27.864335 INFO : End of fine write leveling
409 16:56:27.869954 INFO : End of Write leveling coarse delay
410 16:56:27.875544 INFO : Training has run successfully!
411 16:56:27.876134 Check phy result
412 16:56:27.876632 INFO : End of initialization
413 16:56:27.881077 INFO : End of read dq deskew training
414 16:56:27.884548 INFO : End of MPR read delay center optimization
415 16:56:27.890130 INFO : End of write delay center optimization
416 16:56:27.895711 INFO : End of read delay center optimization
417 16:56:27.896323 INFO : End of max read latency training
418 16:56:27.901314 INFO : Training has run successfully!
419 16:56:27.901870 1D training succeed
420 16:56:27.909439 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 16:56:27.957151 Check phy result
422 16:56:27.957799 INFO : End of initialization
423 16:56:27.979465 INFO : End of 2D read delay Voltage center optimization
424 16:56:27.998588 INFO : End of 2D read delay Voltage center optimization
425 16:56:28.050659 INFO : End of 2D write delay Voltage center optimization
426 16:56:28.099706 INFO : End of 2D write delay Voltage center optimization
427 16:56:28.105272 INFO : Training has run successfully!
428 16:56:28.105839
429 16:56:28.106347 channel==0
430 16:56:28.110799 RxClkDly_Margin_A0==78 ps 8
431 16:56:28.111347 TxDqDly_Margin_A0==88 ps 9
432 16:56:28.116401 RxClkDly_Margin_A1==88 ps 9
433 16:56:28.116963 TxDqDly_Margin_A1==98 ps 10
434 16:56:28.117464 TrainedVREFDQ_A0==74
435 16:56:28.121970 TrainedVREFDQ_A1==75
436 16:56:28.122522 VrefDac_Margin_A0==23
437 16:56:28.123017 DeviceVref_Margin_A0==40
438 16:56:28.127661 VrefDac_Margin_A1==23
439 16:56:28.128256 DeviceVref_Margin_A1==39
440 16:56:28.128762
441 16:56:28.129243
442 16:56:28.129725 channel==1
443 16:56:28.133240 RxClkDly_Margin_A0==78 ps 8
444 16:56:28.133535 TxDqDly_Margin_A0==98 ps 10
445 16:56:28.138748 RxClkDly_Margin_A1==78 ps 8
446 16:56:28.139044 TxDqDly_Margin_A1==88 ps 9
447 16:56:28.144287 TrainedVREFDQ_A0==78
448 16:56:28.144566 TrainedVREFDQ_A1==78
449 16:56:28.144792 VrefDac_Margin_A0==22
450 16:56:28.150029 DeviceVref_Margin_A0==36
451 16:56:28.150313 VrefDac_Margin_A1==22
452 16:56:28.155554 DeviceVref_Margin_A1==36
453 16:56:28.155859
454 16:56:28.156117 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 16:56:28.156343
456 16:56:28.189210 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 16:56:28.189635 2D training succeed
458 16:56:28.194823 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 16:56:28.200407 auto size-- 65535DDR cs0 size: 2048MB
460 16:56:28.200961 DDR cs1 size: 2048MB
461 16:56:28.205937 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 16:56:28.206414 cs0 DataBus test pass
463 16:56:28.211568 cs1 DataBus test pass
464 16:56:28.212087 cs0 AddrBus test pass
465 16:56:28.212548 cs1 AddrBus test pass
466 16:56:28.213014
467 16:56:28.217222 100bdlr_step_size ps== 478
468 16:56:28.217729 result report
469 16:56:28.222742 boot times 0Enable ddr reg access
470 16:56:28.228005 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 16:56:28.241761 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 16:56:28.897224 bl2z: ptr: 05129330, size: 00001e40
473 16:56:28.904802 0.0;M3 CHK:0;cm4_sp_mode 0
474 16:56:28.905341 MVN_1=0x00000000
475 16:56:28.905798 MVN_2=0x00000000
476 16:56:28.916376 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 16:56:28.916886 OPS=0x04
478 16:56:28.917342 ring efuse init
479 16:56:28.919299 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 16:56:28.925762 [0.017310 Inits done]
481 16:56:28.926253 secure task start!
482 16:56:28.926701 high task start!
483 16:56:28.927150 low task start!
484 16:56:28.930059 run into bl31
485 16:56:28.938566 NOTICE: BL31: v1.3(release):4fc40b1
486 16:56:28.946498 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 16:56:28.946986 NOTICE: BL31: G12A normal boot!
488 16:56:28.961855 NOTICE: BL31: BL33 decompress pass
489 16:56:28.967587 ERROR: Error initializing runtime service opteed_fast
490 16:56:31.709245 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 16:56:31.710081 bl2_stage_init 0x01
492 16:56:31.710605 bl2_stage_init 0x81
493 16:56:31.714395 hw id: 0x0000 - pwm id 0x01
494 16:56:31.714921 bl2_stage_init 0xc1
495 16:56:31.723478 bl2_stage_init 0x02
496 16:56:31.724109
497 16:56:31.724561 L0:00000000
498 16:56:31.725050 L1:00000703
499 16:56:31.725596 L2:00008067
500 16:56:31.726152 L3:15000000
501 16:56:31.727568 S1:00000000
502 16:56:31.728164 B2:20282000
503 16:56:31.728486 B1:a0f83180
504 16:56:31.728727
505 16:56:31.728958 TE: 70201
506 16:56:31.729179
507 16:56:31.731097 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 16:56:31.731651
509 16:56:31.736813 Board ID = 1
510 16:56:31.737190 Set cpu clk to 24M
511 16:56:31.737407 Set clk81 to 24M
512 16:56:31.740147 Use GP1_pll as DSU clk.
513 16:56:31.740455 DSU clk: 1200 Mhz
514 16:56:31.745775 CPU clk: 1200 MHz
515 16:56:31.746338 Set clk81 to 166.6M
516 16:56:31.751396 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 16:56:31.751776 board id: 1
518 16:56:31.760819 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 16:56:31.771477 fw parse done
520 16:56:31.777535 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 16:56:31.820693 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 16:56:31.831974 PIEI prepare done
523 16:56:31.832651 fastboot data load
524 16:56:31.833225 fastboot data verify
525 16:56:31.837481 verify result: 266
526 16:56:31.843075 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 16:56:31.843738 LPDDR4 probe
528 16:56:31.844371 ddr clk to 1584MHz
529 16:56:31.851052 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 16:56:31.888892
531 16:56:31.889629 dmc_version 0001
532 16:56:31.895878 Check phy result
533 16:56:31.901883 INFO : End of CA training
534 16:56:31.902552 INFO : End of initialization
535 16:56:31.907359 INFO : Training has run successfully!
536 16:56:31.908099 Check phy result
537 16:56:31.913017 INFO : End of initialization
538 16:56:31.913701 INFO : End of read enable training
539 16:56:31.918671 INFO : End of fine write leveling
540 16:56:31.924317 INFO : End of Write leveling coarse delay
541 16:56:31.924968 INFO : Training has run successfully!
542 16:56:31.925555 Check phy result
543 16:56:31.929821 INFO : End of initialization
544 16:56:31.930321 INFO : End of read dq deskew training
545 16:56:31.935433 INFO : End of MPR read delay center optimization
546 16:56:31.940998 INFO : End of write delay center optimization
547 16:56:31.946585 INFO : End of read delay center optimization
548 16:56:31.947241 INFO : End of max read latency training
549 16:56:31.952313 INFO : Training has run successfully!
550 16:56:31.953000 1D training succeed
551 16:56:31.961451 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 16:56:32.009709 Check phy result
553 16:56:32.010402 INFO : End of initialization
554 16:56:32.037167 INFO : End of 2D read delay Voltage center optimization
555 16:56:32.061235 INFO : End of 2D read delay Voltage center optimization
556 16:56:32.118053 INFO : End of 2D write delay Voltage center optimization
557 16:56:32.172163 INFO : End of 2D write delay Voltage center optimization
558 16:56:32.177611 INFO : Training has run successfully!
559 16:56:32.178307
560 16:56:32.178887 channel==0
561 16:56:32.183247 RxClkDly_Margin_A0==69 ps 7
562 16:56:32.183912 TxDqDly_Margin_A0==98 ps 10
563 16:56:32.188806 RxClkDly_Margin_A1==69 ps 7
564 16:56:32.189455 TxDqDly_Margin_A1==98 ps 10
565 16:56:32.190009 TrainedVREFDQ_A0==74
566 16:56:32.194364 TrainedVREFDQ_A1==74
567 16:56:32.195067 VrefDac_Margin_A0==23
568 16:56:32.195644 DeviceVref_Margin_A0==40
569 16:56:32.200140 VrefDac_Margin_A1==22
570 16:56:32.200817 DeviceVref_Margin_A1==40
571 16:56:32.201400
572 16:56:32.201959
573 16:56:32.205513 channel==1
574 16:56:32.206164 RxClkDly_Margin_A0==78 ps 8
575 16:56:32.206738 TxDqDly_Margin_A0==88 ps 9
576 16:56:32.211240 RxClkDly_Margin_A1==69 ps 7
577 16:56:32.211902 TxDqDly_Margin_A1==88 ps 9
578 16:56:32.216707 TrainedVREFDQ_A0==75
579 16:56:32.217377 TrainedVREFDQ_A1==75
580 16:56:32.217953 VrefDac_Margin_A0==22
581 16:56:32.222329 DeviceVref_Margin_A0==39
582 16:56:32.223015 VrefDac_Margin_A1==22
583 16:56:32.228052 DeviceVref_Margin_A1==38
584 16:56:32.228653
585 16:56:32.229241 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 16:56:32.229781
587 16:56:32.261479 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
588 16:56:32.262232 2D training succeed
589 16:56:32.267101 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 16:56:32.272674 auto size-- 65535DDR cs0 size: 2048MB
591 16:56:32.273287 DDR cs1 size: 2048MB
592 16:56:32.278336 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 16:56:32.279002 cs0 DataBus test pass
594 16:56:32.283897 cs1 DataBus test pass
595 16:56:32.284600 cs0 AddrBus test pass
596 16:56:32.285148 cs1 AddrBus test pass
597 16:56:32.285691
598 16:56:32.289537 100bdlr_step_size ps== 471
599 16:56:32.290188 result report
600 16:56:32.295096 boot times 0Enable ddr reg access
601 16:56:32.300311 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 16:56:32.314014 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 16:56:32.973482 bl2z: ptr: 05129330, size: 00001e40
604 16:56:32.983019 0.0;M3 CHK:0;cm4_sp_mode 0
605 16:56:32.983534 MVN_1=0x00000000
606 16:56:32.983947 MVN_2=0x00000000
607 16:56:32.994420 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 16:56:32.994926 OPS=0x04
609 16:56:32.995359 ring efuse init
610 16:56:32.997362 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 16:56:33.003328 [0.017354 Inits done]
612 16:56:33.003797 secure task start!
613 16:56:33.004232 high task start!
614 16:56:33.004631 low task start!
615 16:56:33.007647 run into bl31
616 16:56:33.016283 NOTICE: BL31: v1.3(release):4fc40b1
617 16:56:33.024189 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 16:56:33.024693 NOTICE: BL31: G12A normal boot!
619 16:56:33.039636 NOTICE: BL31: BL33 decompress pass
620 16:56:33.045304 ERROR: Error initializing runtime service opteed_fast
621 16:56:34.408066 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 16:56:34.408827 bl2_stage_init 0x01
623 16:56:34.409245 bl2_stage_init 0x81
624 16:56:34.413477 hw id: 0x0000 - pwm id 0x01
625 16:56:34.414014 bl2_stage_init 0xc1
626 16:56:34.419136 bl2_stage_init 0x02
627 16:56:34.419676
628 16:56:34.420244 L0:00000000
629 16:56:34.420662 L1:00000703
630 16:56:34.422137 L2:00008067
631 16:56:34.422566 L3:15000000
632 16:56:34.427364 S1:00000000
633 16:56:34.427855 B2:20282000
634 16:56:34.428329 B1:a0f83180
635 16:56:34.428748
636 16:56:34.429160 TE: 69231
637 16:56:34.429572
638 16:56:34.430831 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 16:56:34.431328
640 16:56:34.436444 Board ID = 1
641 16:56:34.436990 Set cpu clk to 24M
642 16:56:34.437406 Set clk81 to 24M
643 16:56:34.442067 Use GP1_pll as DSU clk.
644 16:56:34.442548 DSU clk: 1200 Mhz
645 16:56:34.442945 CPU clk: 1200 MHz
646 16:56:34.443342 Set clk81 to 166.6M
647 16:56:34.453146 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 16:56:34.453637 board id: 1
649 16:56:34.459962 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 16:56:34.470867 fw parse done
651 16:56:34.476792 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 16:56:34.519934 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 16:56:34.531106 PIEI prepare done
654 16:56:34.531575 fastboot data load
655 16:56:34.531976 fastboot data verify
656 16:56:34.536648 verify result: 266
657 16:56:34.542266 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 16:56:34.542723 LPDDR4 probe
659 16:56:34.543120 ddr clk to 1584MHz
660 16:56:34.550294 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 16:56:34.587965
662 16:56:34.588481 dmc_version 0001
663 16:56:34.595031 Check phy result
664 16:56:34.600994 INFO : End of CA training
665 16:56:34.601453 INFO : End of initialization
666 16:56:34.606612 INFO : Training has run successfully!
667 16:56:34.607069 Check phy result
668 16:56:34.612270 INFO : End of initialization
669 16:56:34.612736 INFO : End of read enable training
670 16:56:34.617808 INFO : End of fine write leveling
671 16:56:34.623389 INFO : End of Write leveling coarse delay
672 16:56:34.623843 INFO : Training has run successfully!
673 16:56:34.624292 Check phy result
674 16:56:34.629006 INFO : End of initialization
675 16:56:34.629475 INFO : End of read dq deskew training
676 16:56:34.634605 INFO : End of MPR read delay center optimization
677 16:56:34.640249 INFO : End of write delay center optimization
678 16:56:34.645793 INFO : End of read delay center optimization
679 16:56:34.646270 INFO : End of max read latency training
680 16:56:34.651362 INFO : Training has run successfully!
681 16:56:34.651830 1D training succeed
682 16:56:34.660552 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 16:56:34.708988 Check phy result
684 16:56:34.709580 INFO : End of initialization
685 16:56:34.736356 INFO : End of 2D read delay Voltage center optimization
686 16:56:34.760424 INFO : End of 2D read delay Voltage center optimization
687 16:56:34.817157 INFO : End of 2D write delay Voltage center optimization
688 16:56:34.871168 INFO : End of 2D write delay Voltage center optimization
689 16:56:34.876701 INFO : Training has run successfully!
690 16:56:34.877162
691 16:56:34.877563 channel==0
692 16:56:34.882316 RxClkDly_Margin_A0==78 ps 8
693 16:56:34.882774 TxDqDly_Margin_A0==98 ps 10
694 16:56:34.887898 RxClkDly_Margin_A1==69 ps 7
695 16:56:34.888379 TxDqDly_Margin_A1==98 ps 10
696 16:56:34.888779 TrainedVREFDQ_A0==74
697 16:56:34.893483 TrainedVREFDQ_A1==74
698 16:56:34.893945 VrefDac_Margin_A0==23
699 16:56:34.894339 DeviceVref_Margin_A0==40
700 16:56:34.899130 VrefDac_Margin_A1==23
701 16:56:34.899580 DeviceVref_Margin_A1==40
702 16:56:34.899977
703 16:56:34.900401
704 16:56:34.904692 channel==1
705 16:56:34.905156 RxClkDly_Margin_A0==78 ps 8
706 16:56:34.905553 TxDqDly_Margin_A0==98 ps 10
707 16:56:34.910315 RxClkDly_Margin_A1==78 ps 8
708 16:56:34.910776 TxDqDly_Margin_A1==88 ps 9
709 16:56:34.915902 TrainedVREFDQ_A0==78
710 16:56:34.916388 TrainedVREFDQ_A1==75
711 16:56:34.916798 VrefDac_Margin_A0==22
712 16:56:34.921510 DeviceVref_Margin_A0==36
713 16:56:34.921974 VrefDac_Margin_A1==22
714 16:56:34.927120 DeviceVref_Margin_A1==39
715 16:56:34.927579
716 16:56:34.927977 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 16:56:34.928408
718 16:56:34.960705 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 16:56:34.961313 2D training succeed
720 16:56:34.966297 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 16:56:34.971883 auto size-- 65535DDR cs0 size: 2048MB
722 16:56:34.972386 DDR cs1 size: 2048MB
723 16:56:34.977503 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 16:56:34.977972 cs0 DataBus test pass
725 16:56:34.983155 cs1 DataBus test pass
726 16:56:34.983616 cs0 AddrBus test pass
727 16:56:34.984041 cs1 AddrBus test pass
728 16:56:34.984434
729 16:56:34.988673 100bdlr_step_size ps== 471
730 16:56:34.989134 result report
731 16:56:34.994274 boot times 0Enable ddr reg access
732 16:56:34.999545 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 16:56:35.013357 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 16:56:35.671911 bl2z: ptr: 05129330, size: 00001e40
735 16:56:35.680561 0.0;M3 CHK:0;cm4_sp_mode 0
736 16:56:35.681065 MVN_1=0x00000000
737 16:56:35.681477 MVN_2=0x00000000
738 16:56:35.692029 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 16:56:35.692520 OPS=0x04
740 16:56:35.692934 ring efuse init
741 16:56:35.697651 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 16:56:35.698128 [0.017355 Inits done]
743 16:56:35.698528 secure task start!
744 16:56:35.705000 high task start!
745 16:56:35.705472 low task start!
746 16:56:35.705874 run into bl31
747 16:56:35.713626 NOTICE: BL31: v1.3(release):4fc40b1
748 16:56:35.721453 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 16:56:35.721932 NOTICE: BL31: G12A normal boot!
750 16:56:35.737054 NOTICE: BL31: BL33 decompress pass
751 16:56:35.742494 ERROR: Error initializing runtime service opteed_fast
752 16:56:36.538069
753 16:56:36.538751
754 16:56:36.543607 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 16:56:36.543964
756 16:56:36.546947 Model: Libre Computer AML-S905D3-CC Solitude
757 16:56:36.693910 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 16:56:36.709383 DRAM: 2 GiB (effective 3.8 GiB)
759 16:56:36.810356 Core: 406 devices, 33 uclasses, devicetree: separate
760 16:56:36.816456 WDT: Not starting watchdog@f0d0
761 16:56:36.841262 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 16:56:36.853500 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 16:56:36.858474 ** Bad device specification mmc 0 **
764 16:56:36.868491 Card did not respond to voltage select! : -110
765 16:56:36.876173 ** Bad device specification mmc 0 **
766 16:56:36.876560 Couldn't find partition mmc 0
767 16:56:36.884553 Card did not respond to voltage select! : -110
768 16:56:36.889978 ** Bad device specification mmc 0 **
769 16:56:36.890293 Couldn't find partition mmc 0
770 16:56:36.895064 Error: could not access storage.
771 16:56:37.191678 Net: eth0: ethernet@ff3f0000
772 16:56:37.192422 starting USB...
773 16:56:37.436453 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 16:56:37.437115 Starting the controller
775 16:56:37.443280 USB XHCI 1.10
776 16:56:38.997536 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 16:56:39.005809 scanning usb for storage devices... 0 Storage Device(s) found
779 16:56:39.056853 Hit any key to stop autoboot: 1
780 16:56:39.057585 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 16:56:39.057951 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 16:56:39.058235 Setting prompt string to ['=>']
783 16:56:39.058512 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 16:56:39.072021 0
785 16:56:39.072671 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 16:56:39.173506 => setenv autoload no
788 16:56:39.174073 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 16:56:39.178695 setenv autoload no
791 16:56:39.279748 => setenv initrd_high 0xffffffff
792 16:56:39.280322 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 16:56:39.284827 setenv initrd_high 0xffffffff
795 16:56:39.386320 => setenv fdt_high 0xffffffff
796 16:56:39.387116 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 16:56:39.391841 setenv fdt_high 0xffffffff
799 16:56:39.493459 => dhcp
800 16:56:39.494229 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 16:56:39.497896 dhcp
802 16:56:40.452351 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
803 16:56:40.452960 Speed: 1000, full duplex
804 16:56:40.453369 BOOTP broadcast 1
805 16:56:40.457590 UDP wrong checksum 00004f00 00003b2d
806 16:56:40.703131 BOOTP broadcast 2
807 16:56:40.717685 DHCP client bound to address 192.168.6.21 (262 ms)
809 16:56:40.819408 => setenv serverip 192.168.6.2
810 16:56:40.820305 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
811 16:56:40.825031 setenv serverip 192.168.6.2
813 16:56:40.926575 => tftpboot 0x01080000 975726/tftp-deploy-8_3kg0qt/kernel/uImage
814 16:56:40.927326 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
815 16:56:40.934190 tftpboot 0x01080000 975726/tftp-deploy-8_3kg0qt/kernel/uImage
816 16:56:40.934664 Speed: 1000, full duplex
817 16:56:40.935071 Using ethernet@ff3f0000 device
818 16:56:40.939666 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
819 16:56:40.945316 Filename '975726/tftp-deploy-8_3kg0qt/kernel/uImage'.
820 16:56:40.949184 Load address: 0x1080000
821 16:56:43.725096 Loading: *################################################## 43.6 MiB
822 16:56:43.725710 15.7 MiB/s
823 16:56:43.726120 done
824 16:56:43.728637 Bytes transferred = 45713984 (2b98a40 hex)
826 16:56:43.830113 => tftpboot 0x08000000 975726/tftp-deploy-8_3kg0qt/ramdisk/ramdisk.cpio.gz.uboot
827 16:56:43.830795 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
828 16:56:43.837460 tftpboot 0x08000000 975726/tftp-deploy-8_3kg0qt/ramdisk/ramdisk.cpio.gz.uboot
829 16:56:43.838012 Speed: 1000, full duplex
830 16:56:43.838417 Using ethernet@ff3f0000 device
831 16:56:43.842977 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
832 16:56:43.852739 Filename '975726/tftp-deploy-8_3kg0qt/ramdisk/ramdisk.cpio.gz.uboot'.
833 16:56:43.853232 Load address: 0x8000000
834 16:56:45.316267 Loading: *################################################# UDP wrong checksum 00000005 00005c55
835 16:56:50.317073 T UDP wrong checksum 00000005 00005c55
836 16:57:00.319176 T T UDP wrong checksum 00000005 00005c55
837 16:57:07.788302 T UDP wrong checksum 000000ff 000041b8
838 16:57:07.850499 UDP wrong checksum 000000ff 0000ddaa
839 16:57:20.322996 T T T UDP wrong checksum 00000005 00005c55
840 16:57:40.327784 T T T
841 16:57:40.328246 Retry count exceeded; starting again
843 16:57:40.331202 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
846 16:57:40.332229 end: 2.4 uboot-commands (duration 00:01:20) [common]
848 16:57:40.332961 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
850 16:57:40.333538 end: 2 uboot-action (duration 00:01:20) [common]
852 16:57:40.334363 Cleaning after the job
853 16:57:40.334665 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/ramdisk
854 16:57:40.335506 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/kernel
855 16:57:40.350459 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/dtb
856 16:57:40.351405 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/nfsrootfs
857 16:57:40.379087 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975726/tftp-deploy-8_3kg0qt/modules
858 16:57:40.385678 start: 4.1 power-off (timeout 00:00:30) [common]
859 16:57:40.386325 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
860 16:57:40.419897 >> OK - accepted request
861 16:57:40.421990 Returned 0 in 0 seconds
862 16:57:40.522743 end: 4.1 power-off (duration 00:00:00) [common]
864 16:57:40.523722 start: 4.2 read-feedback (timeout 00:10:00) [common]
865 16:57:40.524430 Listened to connection for namespace 'common' for up to 1s
866 16:57:41.525372 Finalising connection for namespace 'common'
867 16:57:41.525881 Disconnecting from shell: Finalise
868 16:57:41.526182 =>
869 16:57:41.626827 end: 4.2 read-feedback (duration 00:00:01) [common]
870 16:57:41.627210 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/975726
871 16:57:44.425384 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/975726
872 16:57:44.425980 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.