Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 16:58:21.101982 lava-dispatcher, installed at version: 2024.01
2 16:58:21.102819 start: 0 validate
3 16:58:21.103293 Start time: 2024-11-11 16:58:21.103262+00:00 (UTC)
4 16:58:21.103860 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 16:58:21.104443 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 16:58:21.140685 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 16:58:21.141282 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-11-11-v6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 16:58:21.170859 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 16:58:21.171533 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-11-11-v6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 16:58:21.199262 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 16:58:21.199755 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 16:58:21.232631 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 16:58:21.233152 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-11-11-v6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 16:58:21.269218 validate duration: 0.17
16 16:58:21.270079 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 16:58:21.270407 start: 1.1 download-retry (timeout 00:10:00) [common]
18 16:58:21.270703 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 16:58:21.271329 Not decompressing ramdisk as can be used compressed.
20 16:58:21.271819 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 16:58:21.272128 saving as /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/ramdisk/initrd.cpio.gz
22 16:58:21.272423 total size: 5628140 (5 MB)
23 16:58:21.311545 progress 0 % (0 MB)
24 16:58:21.316346 progress 5 % (0 MB)
25 16:58:21.320590 progress 10 % (0 MB)
26 16:58:21.324428 progress 15 % (0 MB)
27 16:58:21.328545 progress 20 % (1 MB)
28 16:58:21.332249 progress 25 % (1 MB)
29 16:58:21.336299 progress 30 % (1 MB)
30 16:58:21.340327 progress 35 % (1 MB)
31 16:58:21.344036 progress 40 % (2 MB)
32 16:58:21.348143 progress 45 % (2 MB)
33 16:58:21.351705 progress 50 % (2 MB)
34 16:58:21.355724 progress 55 % (2 MB)
35 16:58:21.359762 progress 60 % (3 MB)
36 16:58:21.363416 progress 65 % (3 MB)
37 16:58:21.367426 progress 70 % (3 MB)
38 16:58:21.371000 progress 75 % (4 MB)
39 16:58:21.374960 progress 80 % (4 MB)
40 16:58:21.378383 progress 85 % (4 MB)
41 16:58:21.382092 progress 90 % (4 MB)
42 16:58:21.385792 progress 95 % (5 MB)
43 16:58:21.389133 progress 100 % (5 MB)
44 16:58:21.389809 5 MB downloaded in 0.12 s (45.73 MB/s)
45 16:58:21.390378 end: 1.1.1 http-download (duration 00:00:00) [common]
47 16:58:21.391282 end: 1.1 download-retry (duration 00:00:00) [common]
48 16:58:21.391595 start: 1.2 download-retry (timeout 00:10:00) [common]
49 16:58:21.391874 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 16:58:21.392393 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/kernel/Image
51 16:58:21.392658 saving as /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/kernel/Image
52 16:58:21.392872 total size: 45713920 (43 MB)
53 16:58:21.393087 No compression specified
54 16:58:21.425630 progress 0 % (0 MB)
55 16:58:21.453675 progress 5 % (2 MB)
56 16:58:21.482049 progress 10 % (4 MB)
57 16:58:21.510465 progress 15 % (6 MB)
58 16:58:21.539111 progress 20 % (8 MB)
59 16:58:21.567731 progress 25 % (10 MB)
60 16:58:21.596157 progress 30 % (13 MB)
61 16:58:21.624518 progress 35 % (15 MB)
62 16:58:21.652719 progress 40 % (17 MB)
63 16:58:21.680734 progress 45 % (19 MB)
64 16:58:21.709316 progress 50 % (21 MB)
65 16:58:21.738194 progress 55 % (24 MB)
66 16:58:21.766769 progress 60 % (26 MB)
67 16:58:21.794709 progress 65 % (28 MB)
68 16:58:21.823363 progress 70 % (30 MB)
69 16:58:21.851804 progress 75 % (32 MB)
70 16:58:21.882396 progress 80 % (34 MB)
71 16:58:21.909978 progress 85 % (37 MB)
72 16:58:21.937552 progress 90 % (39 MB)
73 16:58:21.971269 progress 95 % (41 MB)
74 16:58:22.003733 progress 100 % (43 MB)
75 16:58:22.004355 43 MB downloaded in 0.61 s (71.30 MB/s)
76 16:58:22.004841 end: 1.2.1 http-download (duration 00:00:01) [common]
78 16:58:22.005665 end: 1.2 download-retry (duration 00:00:01) [common]
79 16:58:22.005941 start: 1.3 download-retry (timeout 00:09:59) [common]
80 16:58:22.006210 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 16:58:22.006672 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 16:58:22.006944 saving as /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 16:58:22.007156 total size: 53209 (0 MB)
84 16:58:22.007366 No compression specified
85 16:58:22.041165 progress 61 % (0 MB)
86 16:58:22.042014 progress 100 % (0 MB)
87 16:58:22.042545 0 MB downloaded in 0.04 s (1.43 MB/s)
88 16:58:22.043011 end: 1.3.1 http-download (duration 00:00:00) [common]
90 16:58:22.043832 end: 1.3 download-retry (duration 00:00:00) [common]
91 16:58:22.044173 start: 1.4 download-retry (timeout 00:09:59) [common]
92 16:58:22.044500 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 16:58:22.045010 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 16:58:22.045297 saving as /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/nfsrootfs/full.rootfs.tar
95 16:58:22.045527 total size: 474398908 (452 MB)
96 16:58:22.045770 Using unxz to decompress xz
97 16:58:22.081036 progress 0 % (0 MB)
98 16:58:23.181222 progress 5 % (22 MB)
99 16:58:24.706266 progress 10 % (45 MB)
100 16:58:25.181441 progress 15 % (67 MB)
101 16:58:25.980564 progress 20 % (90 MB)
102 16:58:26.569700 progress 25 % (113 MB)
103 16:58:26.986024 progress 30 % (135 MB)
104 16:58:27.631636 progress 35 % (158 MB)
105 16:58:28.521892 progress 40 % (181 MB)
106 16:58:29.325074 progress 45 % (203 MB)
107 16:58:29.898797 progress 50 % (226 MB)
108 16:58:30.550578 progress 55 % (248 MB)
109 16:58:31.762765 progress 60 % (271 MB)
110 16:58:33.165885 progress 65 % (294 MB)
111 16:58:34.759394 progress 70 % (316 MB)
112 16:58:37.894200 progress 75 % (339 MB)
113 16:58:40.432715 progress 80 % (361 MB)
114 16:58:43.336797 progress 85 % (384 MB)
115 16:58:46.503327 progress 90 % (407 MB)
116 16:58:49.719713 progress 95 % (429 MB)
117 16:58:52.911349 progress 100 % (452 MB)
118 16:58:52.925501 452 MB downloaded in 30.88 s (14.65 MB/s)
119 16:58:52.926349 end: 1.4.1 http-download (duration 00:00:31) [common]
121 16:58:52.927920 end: 1.4 download-retry (duration 00:00:31) [common]
122 16:58:52.928481 start: 1.5 download-retry (timeout 00:09:28) [common]
123 16:58:52.928986 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 16:58:52.929883 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-11-v6.12-rc7/arm64/defconfig/gcc-12/modules.tar.xz
125 16:58:52.930352 saving as /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/modules/modules.tar
126 16:58:52.930759 total size: 11621176 (11 MB)
127 16:58:52.931168 Using unxz to decompress xz
128 16:58:52.977891 progress 0 % (0 MB)
129 16:58:53.046069 progress 5 % (0 MB)
130 16:58:53.121801 progress 10 % (1 MB)
131 16:58:53.220221 progress 15 % (1 MB)
132 16:58:53.312949 progress 20 % (2 MB)
133 16:58:53.394061 progress 25 % (2 MB)
134 16:58:53.471032 progress 30 % (3 MB)
135 16:58:53.551063 progress 35 % (3 MB)
136 16:58:53.624413 progress 40 % (4 MB)
137 16:58:53.701171 progress 45 % (5 MB)
138 16:58:53.786634 progress 50 % (5 MB)
139 16:58:53.869319 progress 55 % (6 MB)
140 16:58:53.950904 progress 60 % (6 MB)
141 16:58:54.032180 progress 65 % (7 MB)
142 16:58:54.113606 progress 70 % (7 MB)
143 16:58:54.198750 progress 75 % (8 MB)
144 16:58:54.298095 progress 80 % (8 MB)
145 16:58:54.394876 progress 85 % (9 MB)
146 16:58:54.494811 progress 90 % (10 MB)
147 16:58:54.584141 progress 95 % (10 MB)
148 16:58:54.677597 progress 100 % (11 MB)
149 16:58:54.695268 11 MB downloaded in 1.76 s (6.28 MB/s)
150 16:58:54.695915 end: 1.5.1 http-download (duration 00:00:02) [common]
152 16:58:54.697544 end: 1.5 download-retry (duration 00:00:02) [common]
153 16:58:54.698071 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 16:58:54.698586 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 16:59:10.797744 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/975727/extract-nfsrootfs-d5xr_wrg
156 16:59:10.798353 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 16:59:10.798676 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 16:59:10.799537 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew
159 16:59:10.800050 makedir: /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin
160 16:59:10.800453 makedir: /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/tests
161 16:59:10.800834 makedir: /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/results
162 16:59:10.801179 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-add-keys
163 16:59:10.801717 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-add-sources
164 16:59:10.802278 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-background-process-start
165 16:59:10.802768 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-background-process-stop
166 16:59:10.803270 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-common-functions
167 16:59:10.803743 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-echo-ipv4
168 16:59:10.804253 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-install-packages
169 16:59:10.804734 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-installed-packages
170 16:59:10.805195 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-os-build
171 16:59:10.805668 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-probe-channel
172 16:59:10.806142 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-probe-ip
173 16:59:10.806598 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-target-ip
174 16:59:10.807045 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-target-mac
175 16:59:10.807503 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-target-storage
176 16:59:10.807965 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-test-case
177 16:59:10.808465 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-test-event
178 16:59:10.808987 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-test-feedback
179 16:59:10.809469 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-test-raise
180 16:59:10.809939 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-test-reference
181 16:59:10.810400 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-test-runner
182 16:59:10.810864 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-test-set
183 16:59:10.811321 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-test-shell
184 16:59:10.811790 Updating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-install-packages (oe)
185 16:59:10.812341 Updating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/bin/lava-installed-packages (oe)
186 16:59:10.812770 Creating /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/environment
187 16:59:10.813122 LAVA metadata
188 16:59:10.813375 - LAVA_JOB_ID=975727
189 16:59:10.813588 - LAVA_DISPATCHER_IP=192.168.6.2
190 16:59:10.813940 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 16:59:10.814862 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 16:59:10.815168 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 16:59:10.815377 skipped lava-vland-overlay
194 16:59:10.815616 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 16:59:10.815866 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 16:59:10.816104 skipped lava-multinode-overlay
197 16:59:10.816347 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 16:59:10.816598 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 16:59:10.816839 Loading test definitions
200 16:59:10.817114 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 16:59:10.817333 Using /lava-975727 at stage 0
202 16:59:10.818455 uuid=975727_1.6.2.4.1 testdef=None
203 16:59:10.818754 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 16:59:10.819013 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 16:59:10.820746 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 16:59:10.821528 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 16:59:10.823628 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 16:59:10.824475 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 16:59:10.826498 runner path: /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 975727_1.6.2.4.1
212 16:59:10.827043 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 16:59:10.827792 Creating lava-test-runner.conf files
215 16:59:10.828007 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/975727/lava-overlay-0uggthew/lava-975727/0 for stage 0
216 16:59:10.828331 - 0_v4l2-decoder-conformance-h265
217 16:59:10.828668 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 16:59:10.828940 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 16:59:10.850153 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 16:59:10.850513 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 16:59:10.850772 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 16:59:10.851035 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 16:59:10.851304 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 16:59:11.495310 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 16:59:11.495773 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 16:59:11.496057 extracting modules file /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/975727/extract-nfsrootfs-d5xr_wrg
227 16:59:13.006966 extracting modules file /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/975727/extract-overlay-ramdisk-nooci7co/ramdisk
228 16:59:14.576703 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 16:59:14.577151 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 16:59:14.577428 [common] Applying overlay to NFS
231 16:59:14.577641 [common] Applying overlay /var/lib/lava/dispatcher/tmp/975727/compress-overlay-ag8k51kk/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/975727/extract-nfsrootfs-d5xr_wrg
232 16:59:14.606770 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 16:59:14.607131 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 16:59:14.607402 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 16:59:14.607630 Converting downloaded kernel to a uImage
236 16:59:14.607934 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/kernel/Image /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/kernel/uImage
237 16:59:15.532983 output: Image Name:
238 16:59:15.533476 output: Created: Mon Nov 11 16:59:14 2024
239 16:59:15.533757 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 16:59:15.534020 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 16:59:15.534283 output: Load Address: 01080000
242 16:59:15.534540 output: Entry Point: 01080000
243 16:59:15.534801 output:
244 16:59:15.535227 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 16:59:15.535607 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 16:59:15.535949 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 16:59:15.536355 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 16:59:15.536699 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 16:59:15.537053 Building ramdisk /var/lib/lava/dispatcher/tmp/975727/extract-overlay-ramdisk-nooci7co/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/975727/extract-overlay-ramdisk-nooci7co/ramdisk
250 16:59:17.663424 >> 166829 blocks
251 16:59:25.395216 Adding RAMdisk u-boot header.
252 16:59:25.395639 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/975727/extract-overlay-ramdisk-nooci7co/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/975727/extract-overlay-ramdisk-nooci7co/ramdisk.cpio.gz.uboot
253 16:59:25.642421 output: Image Name:
254 16:59:25.642844 output: Created: Mon Nov 11 16:59:25 2024
255 16:59:25.643058 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 16:59:25.643266 output: Data Size: 23436005 Bytes = 22886.72 KiB = 22.35 MiB
257 16:59:25.643469 output: Load Address: 00000000
258 16:59:25.643669 output: Entry Point: 00000000
259 16:59:25.643867 output:
260 16:59:25.644889 rename /var/lib/lava/dispatcher/tmp/975727/extract-overlay-ramdisk-nooci7co/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/ramdisk/ramdisk.cpio.gz.uboot
261 16:59:25.645611 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 16:59:25.646154 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 16:59:25.646679 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 16:59:25.647131 No LXC device requested
265 16:59:25.647631 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 16:59:25.648216 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 16:59:25.648721 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 16:59:25.649129 Checking files for TFTP limit of 4294967296 bytes.
269 16:59:25.651867 end: 1 tftp-deploy (duration 00:01:04) [common]
270 16:59:25.652485 start: 2 uboot-action (timeout 00:05:00) [common]
271 16:59:25.653007 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 16:59:25.653500 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 16:59:25.653996 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 16:59:25.654519 Using kernel file from prepare-kernel: 975727/tftp-deploy-ns2jy5h_/kernel/uImage
275 16:59:25.655142 substitutions:
276 16:59:25.655545 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 16:59:25.655940 - {DTB_ADDR}: 0x01070000
278 16:59:25.656367 - {DTB}: 975727/tftp-deploy-ns2jy5h_/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 16:59:25.656763 - {INITRD}: 975727/tftp-deploy-ns2jy5h_/ramdisk/ramdisk.cpio.gz.uboot
280 16:59:25.657155 - {KERNEL_ADDR}: 0x01080000
281 16:59:25.657542 - {KERNEL}: 975727/tftp-deploy-ns2jy5h_/kernel/uImage
282 16:59:25.657931 - {LAVA_MAC}: None
283 16:59:25.658354 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/975727/extract-nfsrootfs-d5xr_wrg
284 16:59:25.658747 - {NFS_SERVER_IP}: 192.168.6.2
285 16:59:25.659132 - {PRESEED_CONFIG}: None
286 16:59:25.659518 - {PRESEED_LOCAL}: None
287 16:59:25.659902 - {RAMDISK_ADDR}: 0x08000000
288 16:59:25.660320 - {RAMDISK}: 975727/tftp-deploy-ns2jy5h_/ramdisk/ramdisk.cpio.gz.uboot
289 16:59:25.660709 - {ROOT_PART}: None
290 16:59:25.661096 - {ROOT}: None
291 16:59:25.661478 - {SERVER_IP}: 192.168.6.2
292 16:59:25.661863 - {TEE_ADDR}: 0x83000000
293 16:59:25.662244 - {TEE}: None
294 16:59:25.662626 Parsed boot commands:
295 16:59:25.662999 - setenv autoload no
296 16:59:25.663379 - setenv initrd_high 0xffffffff
297 16:59:25.663759 - setenv fdt_high 0xffffffff
298 16:59:25.664172 - dhcp
299 16:59:25.664554 - setenv serverip 192.168.6.2
300 16:59:25.664938 - tftpboot 0x01080000 975727/tftp-deploy-ns2jy5h_/kernel/uImage
301 16:59:25.665324 - tftpboot 0x08000000 975727/tftp-deploy-ns2jy5h_/ramdisk/ramdisk.cpio.gz.uboot
302 16:59:25.665706 - tftpboot 0x01070000 975727/tftp-deploy-ns2jy5h_/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 16:59:25.666091 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/975727/extract-nfsrootfs-d5xr_wrg,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 16:59:25.666488 - bootm 0x01080000 0x08000000 0x01070000
305 16:59:25.666981 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 16:59:25.668476 start: 2.3 connect-device (timeout 00:05:00) [common]
308 16:59:25.668890 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 16:59:25.683964 Setting prompt string to ['lava-test: # ']
310 16:59:25.685474 end: 2.3 connect-device (duration 00:00:00) [common]
311 16:59:25.686056 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 16:59:25.686590 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 16:59:25.687108 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 16:59:25.688398 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 16:59:25.725518 >> OK - accepted request
316 16:59:25.727810 Returned 0 in 0 seconds
317 16:59:25.828946 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 16:59:25.830508 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 16:59:25.831085 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 16:59:25.831601 Setting prompt string to ['Hit any key to stop autoboot']
322 16:59:25.832103 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 16:59:25.833680 Trying 192.168.56.21...
324 16:59:25.834146 Connected to conserv1.
325 16:59:25.834565 Escape character is '^]'.
326 16:59:25.834977
327 16:59:25.835392 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 16:59:25.835812
329 16:59:32.690309 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 16:59:32.690902 bl2_stage_init 0x01
331 16:59:32.691332 bl2_stage_init 0x81
332 16:59:32.695913 hw id: 0x0000 - pwm id 0x01
333 16:59:32.696398 bl2_stage_init 0xc1
334 16:59:32.696813 bl2_stage_init 0x02
335 16:59:32.697204
336 16:59:32.701450 L0:00000000
337 16:59:32.701909 L1:00000703
338 16:59:32.702305 L2:00008067
339 16:59:32.702694 L3:15000000
340 16:59:32.703080 S1:00000000
341 16:59:32.707022 B2:20282000
342 16:59:32.707458 B1:a0f83180
343 16:59:32.707856
344 16:59:32.708280 TE: 70174
345 16:59:32.708670
346 16:59:32.712652 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 16:59:32.713078
348 16:59:32.718255 Board ID = 1
349 16:59:32.718749 Set cpu clk to 24M
350 16:59:32.719145 Set clk81 to 24M
351 16:59:32.723861 Use GP1_pll as DSU clk.
352 16:59:32.724327 DSU clk: 1200 Mhz
353 16:59:32.724725 CPU clk: 1200 MHz
354 16:59:32.725112 Set clk81 to 166.6M
355 16:59:32.735040 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 16:59:32.735483 board id: 1
357 16:59:32.740473 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 16:59:32.752195 fw parse done
359 16:59:32.757145 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 16:59:32.799897 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 16:59:32.811676 PIEI prepare done
362 16:59:32.812152 fastboot data load
363 16:59:32.812559 fastboot data verify
364 16:59:32.817244 verify result: 266
365 16:59:32.822916 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 16:59:32.823412 LPDDR4 probe
367 16:59:32.823808 ddr clk to 1584MHz
368 16:59:32.829908 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 16:59:32.868140
370 16:59:32.868655 dmc_version 0001
371 16:59:32.873846 Check phy result
372 16:59:32.880733 INFO : End of CA training
373 16:59:32.881215 INFO : End of initialization
374 16:59:32.886348 INFO : Training has run successfully!
375 16:59:32.886789 Check phy result
376 16:59:32.891947 INFO : End of initialization
377 16:59:32.892463 INFO : End of read enable training
378 16:59:32.897519 INFO : End of fine write leveling
379 16:59:32.903088 INFO : End of Write leveling coarse delay
380 16:59:32.903519 INFO : Training has run successfully!
381 16:59:32.903914 Check phy result
382 16:59:32.908680 INFO : End of initialization
383 16:59:32.909106 INFO : End of read dq deskew training
384 16:59:32.914286 INFO : End of MPR read delay center optimization
385 16:59:32.919903 INFO : End of write delay center optimization
386 16:59:32.925476 INFO : End of read delay center optimization
387 16:59:32.925910 INFO : End of max read latency training
388 16:59:32.930952 INFO : Training has run successfully!
389 16:59:32.931364 1D training succeed
390 16:59:32.939204 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 16:59:32.987849 Check phy result
392 16:59:32.988415 INFO : End of initialization
393 16:59:33.010182 INFO : End of 2D read delay Voltage center optimization
394 16:59:33.029490 INFO : End of 2D read delay Voltage center optimization
395 16:59:33.081274 INFO : End of 2D write delay Voltage center optimization
396 16:59:33.130361 INFO : End of 2D write delay Voltage center optimization
397 16:59:33.135924 INFO : Training has run successfully!
398 16:59:33.136396
399 16:59:33.136797 channel==0
400 16:59:33.141538 RxClkDly_Margin_A0==69 ps 7
401 16:59:33.141955 TxDqDly_Margin_A0==98 ps 10
402 16:59:33.144945 RxClkDly_Margin_A1==78 ps 8
403 16:59:33.145363 TxDqDly_Margin_A1==88 ps 9
404 16:59:33.150453 TrainedVREFDQ_A0==74
405 16:59:33.150867 TrainedVREFDQ_A1==74
406 16:59:33.151262 VrefDac_Margin_A0==22
407 16:59:33.156092 DeviceVref_Margin_A0==40
408 16:59:33.156505 VrefDac_Margin_A1==23
409 16:59:33.161648 DeviceVref_Margin_A1==40
410 16:59:33.162060
411 16:59:33.162455
412 16:59:33.162845 channel==1
413 16:59:33.163231 RxClkDly_Margin_A0==88 ps 9
414 16:59:33.167238 TxDqDly_Margin_A0==98 ps 10
415 16:59:33.167658 RxClkDly_Margin_A1==88 ps 9
416 16:59:33.172998 TxDqDly_Margin_A1==88 ps 9
417 16:59:33.173333 TrainedVREFDQ_A0==78
418 16:59:33.173560 TrainedVREFDQ_A1==78
419 16:59:33.178445 VrefDac_Margin_A0==22
420 16:59:33.178714 DeviceVref_Margin_A0==36
421 16:59:33.184169 VrefDac_Margin_A1==22
422 16:59:33.184580 DeviceVref_Margin_A1==36
423 16:59:33.184878
424 16:59:33.189744 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 16:59:33.190143
426 16:59:33.217756 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 16:59:33.223263 2D training succeed
428 16:59:33.228901 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 16:59:33.229135 auto size-- 65535DDR cs0 size: 2048MB
430 16:59:33.234434 DDR cs1 size: 2048MB
431 16:59:33.234654 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 16:59:33.240066 cs0 DataBus test pass
433 16:59:33.240331 cs1 DataBus test pass
434 16:59:33.240533 cs0 AddrBus test pass
435 16:59:33.245708 cs1 AddrBus test pass
436 16:59:33.246182
437 16:59:33.246581 100bdlr_step_size ps== 478
438 16:59:33.246980 result report
439 16:59:33.251281 boot times 0Enable ddr reg access
440 16:59:33.258697 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 16:59:33.272648 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 16:59:33.927881 bl2z: ptr: 05129330, size: 00001e40
443 16:59:33.934697 0.0;M3 CHK:0;cm4_sp_mode 0
444 16:59:33.935148 MVN_1=0x00000000
445 16:59:33.935546 MVN_2=0x00000000
446 16:59:33.946148 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 16:59:33.946583 OPS=0x04
448 16:59:33.946981 ring efuse init
449 16:59:33.949078 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 16:59:33.955452 [0.017310 Inits done]
451 16:59:33.955884 secure task start!
452 16:59:33.956315 high task start!
453 16:59:33.956704 low task start!
454 16:59:33.959731 run into bl31
455 16:59:33.968364 NOTICE: BL31: v1.3(release):4fc40b1
456 16:59:33.976153 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 16:59:33.976590 NOTICE: BL31: G12A normal boot!
458 16:59:33.991754 NOTICE: BL31: BL33 decompress pass
459 16:59:33.997473 ERROR: Error initializing runtime service opteed_fast
460 16:59:36.739719 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 16:59:36.740371 bl2_stage_init 0x01
462 16:59:36.740804 bl2_stage_init 0x81
463 16:59:36.745317 hw id: 0x0000 - pwm id 0x01
464 16:59:36.745784 bl2_stage_init 0xc1
465 16:59:36.750976 bl2_stage_init 0x02
466 16:59:36.751477
467 16:59:36.751878 L0:00000000
468 16:59:36.752309 L1:00000703
469 16:59:36.752706 L2:00008067
470 16:59:36.753094 L3:15000000
471 16:59:36.756495 S1:00000000
472 16:59:36.756916 B2:20282000
473 16:59:36.757302 B1:a0f83180
474 16:59:36.757682
475 16:59:36.758064 TE: 68900
476 16:59:36.758445
477 16:59:36.762152 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 16:59:36.762568
479 16:59:36.767643 Board ID = 1
480 16:59:36.768082 Set cpu clk to 24M
481 16:59:36.768469 Set clk81 to 24M
482 16:59:36.771192 Use GP1_pll as DSU clk.
483 16:59:36.771601 DSU clk: 1200 Mhz
484 16:59:36.776651 CPU clk: 1200 MHz
485 16:59:36.777065 Set clk81 to 166.6M
486 16:59:36.782338 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 16:59:36.782750 board id: 1
488 16:59:36.791789 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 16:59:36.802271 fw parse done
490 16:59:36.808227 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 16:59:36.850999 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 16:59:36.861813 PIEI prepare done
493 16:59:36.862223 fastboot data load
494 16:59:36.862614 fastboot data verify
495 16:59:36.867485 verify result: 266
496 16:59:36.873013 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 16:59:36.873425 LPDDR4 probe
498 16:59:36.873810 ddr clk to 1584MHz
499 16:59:36.880980 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 16:59:36.918278
501 16:59:36.918686 dmc_version 0001
502 16:59:36.924992 Check phy result
503 16:59:36.930875 INFO : End of CA training
504 16:59:36.931333 INFO : End of initialization
505 16:59:36.936527 INFO : Training has run successfully!
506 16:59:36.936957 Check phy result
507 16:59:36.942100 INFO : End of initialization
508 16:59:36.942562 INFO : End of read enable training
509 16:59:36.947723 INFO : End of fine write leveling
510 16:59:36.953294 INFO : End of Write leveling coarse delay
511 16:59:36.953720 INFO : Training has run successfully!
512 16:59:36.954121 Check phy result
513 16:59:36.958866 INFO : End of initialization
514 16:59:36.959291 INFO : End of read dq deskew training
515 16:59:36.964511 INFO : End of MPR read delay center optimization
516 16:59:36.970038 INFO : End of write delay center optimization
517 16:59:36.975691 INFO : End of read delay center optimization
518 16:59:36.976161 INFO : End of max read latency training
519 16:59:36.981292 INFO : Training has run successfully!
520 16:59:36.981715 1D training succeed
521 16:59:36.990535 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 16:59:37.038136 Check phy result
523 16:59:37.038595 INFO : End of initialization
524 16:59:37.060438 INFO : End of 2D read delay Voltage center optimization
525 16:59:37.079619 INFO : End of 2D read delay Voltage center optimization
526 16:59:37.131517 INFO : End of 2D write delay Voltage center optimization
527 16:59:37.180690 INFO : End of 2D write delay Voltage center optimization
528 16:59:37.186266 INFO : Training has run successfully!
529 16:59:37.186695
530 16:59:37.187105 channel==0
531 16:59:37.191751 RxClkDly_Margin_A0==78 ps 8
532 16:59:37.192221 TxDqDly_Margin_A0==98 ps 10
533 16:59:37.197436 RxClkDly_Margin_A1==88 ps 9
534 16:59:37.197853 TxDqDly_Margin_A1==98 ps 10
535 16:59:37.198256 TrainedVREFDQ_A0==74
536 16:59:37.203058 TrainedVREFDQ_A1==74
537 16:59:37.203485 VrefDac_Margin_A0==24
538 16:59:37.203885 DeviceVref_Margin_A0==40
539 16:59:37.208622 VrefDac_Margin_A1==23
540 16:59:37.209045 DeviceVref_Margin_A1==40
541 16:59:37.209443
542 16:59:37.209840
543 16:59:37.214248 channel==1
544 16:59:37.214664 RxClkDly_Margin_A0==78 ps 8
545 16:59:37.215063 TxDqDly_Margin_A0==98 ps 10
546 16:59:37.219796 RxClkDly_Margin_A1==78 ps 8
547 16:59:37.220245 TxDqDly_Margin_A1==88 ps 9
548 16:59:37.225399 TrainedVREFDQ_A0==78
549 16:59:37.225837 TrainedVREFDQ_A1==75
550 16:59:37.226239 VrefDac_Margin_A0==22
551 16:59:37.231057 DeviceVref_Margin_A0==36
552 16:59:37.231474 VrefDac_Margin_A1==22
553 16:59:37.236546 DeviceVref_Margin_A1==39
554 16:59:37.236963
555 16:59:37.237361 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 16:59:37.237756
557 16:59:37.270149 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 16:59:37.270646 2D training succeed
559 16:59:37.275866 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 16:59:37.281371 auto size-- 65535DDR cs0 size: 2048MB
561 16:59:37.281791 DDR cs1 size: 2048MB
562 16:59:37.287000 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 16:59:37.287418 cs0 DataBus test pass
564 16:59:37.292532 cs1 DataBus test pass
565 16:59:37.292952 cs0 AddrBus test pass
566 16:59:37.293346 cs1 AddrBus test pass
567 16:59:37.293735
568 16:59:37.298144 100bdlr_step_size ps== 464
569 16:59:37.298577 result report
570 16:59:37.303773 boot times 0Enable ddr reg access
571 16:59:37.309030 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 16:59:37.322863 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 16:59:37.978767 bl2z: ptr: 05129330, size: 00001e40
574 16:59:37.986800 0.0;M3 CHK:0;cm4_sp_mode 0
575 16:59:37.987254 MVN_1=0x00000000
576 16:59:37.987663 MVN_2=0x00000000
577 16:59:37.998293 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 16:59:37.998751 OPS=0x04
579 16:59:37.999163 ring efuse init
580 16:59:38.003939 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 16:59:38.004421 [0.017310 Inits done]
582 16:59:38.004828 secure task start!
583 16:59:38.011074 high task start!
584 16:59:38.011500 low task start!
585 16:59:38.011904 run into bl31
586 16:59:38.019681 NOTICE: BL31: v1.3(release):4fc40b1
587 16:59:38.027677 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 16:59:38.028157 NOTICE: BL31: G12A normal boot!
589 16:59:38.043063 NOTICE: BL31: BL33 decompress pass
590 16:59:38.048855 ERROR: Error initializing runtime service opteed_fast
591 16:59:39.438074 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 16:59:39.438684 bl2_stage_init 0x01
593 16:59:39.439108 bl2_stage_init 0x81
594 16:59:39.443623 hw id: 0x0000 - pwm id 0x01
595 16:59:39.444128 bl2_stage_init 0xc1
596 16:59:39.448272 bl2_stage_init 0x02
597 16:59:39.448719
598 16:59:39.449130 L0:00000000
599 16:59:39.449534 L1:00000703
600 16:59:39.449990 L2:00008067
601 16:59:39.453868 L3:15000000
602 16:59:39.454317 S1:00000000
603 16:59:39.454724 B2:20282000
604 16:59:39.455122 B1:a0f83180
605 16:59:39.455518
606 16:59:39.455913 TE: 68456
607 16:59:39.456364
608 16:59:39.464885 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 16:59:39.465332
610 16:59:39.465741 Board ID = 1
611 16:59:39.466159 Set cpu clk to 24M
612 16:59:39.466557 Set clk81 to 24M
613 16:59:39.470571 Use GP1_pll as DSU clk.
614 16:59:39.471007 DSU clk: 1200 Mhz
615 16:59:39.471408 CPU clk: 1200 MHz
616 16:59:39.476237 Set clk81 to 166.6M
617 16:59:39.481938 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 16:59:39.482466 board id: 1
619 16:59:39.490430 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 16:59:39.500896 fw parse done
621 16:59:39.506889 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 16:59:39.550036 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 16:59:39.561224 PIEI prepare done
624 16:59:39.561765 fastboot data load
625 16:59:39.562192 fastboot data verify
626 16:59:39.566885 verify result: 266
627 16:59:39.572361 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 16:59:39.572806 LPDDR4 probe
629 16:59:39.573210 ddr clk to 1584MHz
630 16:59:39.580345 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 16:59:39.618503
632 16:59:39.618970 dmc_version 0001
633 16:59:39.625145 Check phy result
634 16:59:39.631104 INFO : End of CA training
635 16:59:39.631540 INFO : End of initialization
636 16:59:39.636707 INFO : Training has run successfully!
637 16:59:39.637151 Check phy result
638 16:59:39.642256 INFO : End of initialization
639 16:59:39.642694 INFO : End of read enable training
640 16:59:39.647928 INFO : End of fine write leveling
641 16:59:39.653584 INFO : End of Write leveling coarse delay
642 16:59:39.654066 INFO : Training has run successfully!
643 16:59:39.654480 Check phy result
644 16:59:39.659101 INFO : End of initialization
645 16:59:39.659541 INFO : End of read dq deskew training
646 16:59:39.664651 INFO : End of MPR read delay center optimization
647 16:59:39.670357 INFO : End of write delay center optimization
648 16:59:39.675936 INFO : End of read delay center optimization
649 16:59:39.676402 INFO : End of max read latency training
650 16:59:39.681551 INFO : Training has run successfully!
651 16:59:39.681988 1D training succeed
652 16:59:39.690750 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 16:59:39.738942 Check phy result
654 16:59:39.739423 INFO : End of initialization
655 16:59:39.766288 INFO : End of 2D read delay Voltage center optimization
656 16:59:39.790452 INFO : End of 2D read delay Voltage center optimization
657 16:59:39.847101 INFO : End of 2D write delay Voltage center optimization
658 16:59:39.901131 INFO : End of 2D write delay Voltage center optimization
659 16:59:39.906678 INFO : Training has run successfully!
660 16:59:39.907118
661 16:59:39.907522 channel==0
662 16:59:39.912279 RxClkDly_Margin_A0==78 ps 8
663 16:59:39.912712 TxDqDly_Margin_A0==98 ps 10
664 16:59:39.917862 RxClkDly_Margin_A1==88 ps 9
665 16:59:39.918295 TxDqDly_Margin_A1==98 ps 10
666 16:59:39.918699 TrainedVREFDQ_A0==74
667 16:59:39.923494 TrainedVREFDQ_A1==75
668 16:59:39.923924 VrefDac_Margin_A0==25
669 16:59:39.924376 DeviceVref_Margin_A0==40
670 16:59:39.929064 VrefDac_Margin_A1==23
671 16:59:39.929495 DeviceVref_Margin_A1==39
672 16:59:39.929900
673 16:59:39.930295
674 16:59:39.934680 channel==1
675 16:59:39.935109 RxClkDly_Margin_A0==78 ps 8
676 16:59:39.935507 TxDqDly_Margin_A0==98 ps 10
677 16:59:39.940301 RxClkDly_Margin_A1==78 ps 8
678 16:59:39.940781 TxDqDly_Margin_A1==78 ps 8
679 16:59:39.945895 TrainedVREFDQ_A0==78
680 16:59:39.946359 TrainedVREFDQ_A1==77
681 16:59:39.946765 VrefDac_Margin_A0==22
682 16:59:39.951480 DeviceVref_Margin_A0==36
683 16:59:39.951911 VrefDac_Margin_A1==22
684 16:59:39.957108 DeviceVref_Margin_A1==37
685 16:59:39.957587
686 16:59:39.957996 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 16:59:39.958399
688 16:59:39.990644 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
689 16:59:39.991131 2D training succeed
690 16:59:39.996323 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 16:59:40.001907 auto size-- 65535DDR cs0 size: 2048MB
692 16:59:40.002350 DDR cs1 size: 2048MB
693 16:59:40.007511 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 16:59:40.007949 cs0 DataBus test pass
695 16:59:40.013063 cs1 DataBus test pass
696 16:59:40.013496 cs0 AddrBus test pass
697 16:59:40.013895 cs1 AddrBus test pass
698 16:59:40.014295
699 16:59:40.018671 100bdlr_step_size ps== 471
700 16:59:40.019115 result report
701 16:59:40.024248 boot times 0Enable ddr reg access
702 16:59:40.029686 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 16:59:40.043414 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 16:59:40.703752 bl2z: ptr: 05129330, size: 00001e40
705 16:59:40.710671 0.0;M3 CHK:0;cm4_sp_mode 0
706 16:59:40.711137 MVN_1=0x00000000
707 16:59:40.711550 MVN_2=0x00000000
708 16:59:40.722180 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 16:59:40.722629 OPS=0x04
710 16:59:40.723039 ring efuse init
711 16:59:40.727785 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 16:59:40.728258 [0.017354 Inits done]
713 16:59:40.728663 secure task start!
714 16:59:40.734986 high task start!
715 16:59:40.735424 low task start!
716 16:59:40.735823 run into bl31
717 16:59:40.743602 NOTICE: BL31: v1.3(release):4fc40b1
718 16:59:40.751408 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 16:59:40.751856 NOTICE: BL31: G12A normal boot!
720 16:59:40.767084 NOTICE: BL31: BL33 decompress pass
721 16:59:40.772755 ERROR: Error initializing runtime service opteed_fast
722 16:59:41.568293
723 16:59:41.568916
724 16:59:41.573564 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 16:59:41.574072
726 16:59:41.577208 Model: Libre Computer AML-S905D3-CC Solitude
727 16:59:41.724239 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 16:59:41.739612 DRAM: 2 GiB (effective 3.8 GiB)
729 16:59:41.840516 Core: 406 devices, 33 uclasses, devicetree: separate
730 16:59:41.846426 WDT: Not starting watchdog@f0d0
731 16:59:41.871471 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 16:59:41.883643 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 16:59:41.888668 ** Bad device specification mmc 0 **
734 16:59:41.898757 Card did not respond to voltage select! : -110
735 16:59:41.906361 ** Bad device specification mmc 0 **
736 16:59:41.906874 Couldn't find partition mmc 0
737 16:59:41.914679 Card did not respond to voltage select! : -110
738 16:59:41.920198 ** Bad device specification mmc 0 **
739 16:59:41.920702 Couldn't find partition mmc 0
740 16:59:41.925282 Error: could not access storage.
741 16:59:42.221630 Net: eth0: ethernet@ff3f0000
742 16:59:42.222252 starting USB...
743 16:59:42.466375 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 16:59:42.467036 Starting the controller
745 16:59:42.473340 USB XHCI 1.10
746 16:59:44.029877 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 16:59:44.038114 scanning usb for storage devices... 0 Storage Device(s) found
749 16:59:44.089760 Hit any key to stop autoboot: 1
750 16:59:44.090617 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
751 16:59:44.091322 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
752 16:59:44.091868 Setting prompt string to ['=>']
753 16:59:44.092496 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
754 16:59:44.104214 0
755 16:59:44.105192 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 16:59:44.206504 => setenv autoload no
758 16:59:44.207510 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 16:59:44.213052 setenv autoload no
761 16:59:44.314625 => setenv initrd_high 0xffffffff
762 16:59:44.315363 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 16:59:44.318613 setenv initrd_high 0xffffffff
765 16:59:44.419838 => setenv fdt_high 0xffffffff
766 16:59:44.420654 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 16:59:44.425038 setenv fdt_high 0xffffffff
769 16:59:44.526872 => dhcp
770 16:59:44.527755 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 16:59:44.530926 dhcp
772 16:59:45.437806 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 16:59:45.438407 Speed: 1000, full duplex
774 16:59:45.438809 BOOTP broadcast 1
775 16:59:45.447352 DHCP client bound to address 192.168.6.21 (9 ms)
777 16:59:45.548859 => setenv serverip 192.168.6.2
778 16:59:45.549605 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
779 16:59:45.554160 setenv serverip 192.168.6.2
781 16:59:45.655570 => tftpboot 0x01080000 975727/tftp-deploy-ns2jy5h_/kernel/uImage
782 16:59:45.656325 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
783 16:59:45.663262 tftpboot 0x01080000 975727/tftp-deploy-ns2jy5h_/kernel/uImage
784 16:59:45.663718 Speed: 1000, full duplex
785 16:59:45.664152 Using ethernet@ff3f0000 device
786 16:59:45.668481 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 16:59:45.674006 Filename '975727/tftp-deploy-ns2jy5h_/kernel/uImage'.
788 16:59:45.677972 Load address: 0x1080000
789 16:59:48.441414 Loading: *################################################## 43.6 MiB
790 16:59:48.442069 15.8 MiB/s
791 16:59:48.442521 done
792 16:59:48.445803 Bytes transferred = 45713984 (2b98a40 hex)
794 16:59:48.547357 => tftpboot 0x08000000 975727/tftp-deploy-ns2jy5h_/ramdisk/ramdisk.cpio.gz.uboot
795 16:59:48.548068 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
796 16:59:48.554677 tftpboot 0x08000000 975727/tftp-deploy-ns2jy5h_/ramdisk/ramdisk.cpio.gz.uboot
797 16:59:48.555184 Speed: 1000, full duplex
798 16:59:48.555625 Using ethernet@ff3f0000 device
799 16:59:48.560133 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 16:59:48.569893 Filename '975727/tftp-deploy-ns2jy5h_/ramdisk/ramdisk.cpio.gz.uboot'.
801 16:59:48.570383 Load address: 0x8000000
802 16:59:50.097403 Loading: *################################################# UDP wrong checksum 00000005 00004367
803 16:59:55.099077 T UDP wrong checksum 00000005 00004367
804 16:59:59.068120 UDP wrong checksum 000000ff 00009fed
805 16:59:59.108068 UDP wrong checksum 000000ff 00002be0
806 17:00:00.271679 T UDP wrong checksum 000000ff 0000de39
807 17:00:00.285265 UDP wrong checksum 000000ff 0000752c
808 17:00:03.568453 UDP wrong checksum 000000ff 000080e0
809 17:00:03.575467 UDP wrong checksum 000000ff 00000dd3
810 17:00:05.101920 T UDP wrong checksum 00000005 00004367
811 17:00:20.542977 T T T UDP wrong checksum 000000ff 0000bc5a
812 17:00:20.556514 UDP wrong checksum 000000ff 0000524d
813 17:00:25.106263 T UDP wrong checksum 00000005 00004367
814 17:00:45.110680 T T T
815 17:00:45.111112 Retry count exceeded; starting again
817 17:00:45.112681 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
820 17:00:45.113902 end: 2.4 uboot-commands (duration 00:01:19) [common]
822 17:00:45.114811 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
824 17:00:45.115523 end: 2 uboot-action (duration 00:01:19) [common]
826 17:00:45.116631 Cleaning after the job
827 17:00:45.117025 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/ramdisk
828 17:00:45.118068 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/kernel
829 17:00:45.149322 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/dtb
830 17:00:45.150511 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/nfsrootfs
831 17:00:45.331257 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975727/tftp-deploy-ns2jy5h_/modules
832 17:00:45.353070 start: 4.1 power-off (timeout 00:00:30) [common]
833 17:00:45.353784 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
834 17:00:45.386520 >> OK - accepted request
835 17:00:45.388732 Returned 0 in 0 seconds
836 17:00:45.489601 end: 4.1 power-off (duration 00:00:00) [common]
838 17:00:45.490645 start: 4.2 read-feedback (timeout 00:10:00) [common]
839 17:00:45.491334 Listened to connection for namespace 'common' for up to 1s
840 17:00:46.492336 Finalising connection for namespace 'common'
841 17:00:46.493119 Disconnecting from shell: Finalise
842 17:00:46.493403 =>
843 17:00:46.594138 end: 4.2 read-feedback (duration 00:00:01) [common]
844 17:00:46.594602 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/975727
845 17:00:49.237455 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/975727
846 17:00:49.238076 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.