Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 13:26:18.710465 lava-dispatcher, installed at version: 2024.01
2 13:26:18.711276 start: 0 validate
3 13:26:18.711751 Start time: 2024-10-01 13:26:18.711721+00:00 (UTC)
4 13:26:18.712354 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 13:26:18.712889 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 13:26:18.752069 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 13:26:18.752634 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fnext%2Frenesas-next-2024-10-01-v6.12-rc1%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 13:26:18.783258 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 13:26:18.783896 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fnext%2Frenesas-next-2024-10-01-v6.12-rc1%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 13:26:18.819252 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 13:26:18.819754 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 13:26:18.856961 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 13:26:18.857463 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fnext%2Frenesas-next-2024-10-01-v6.12-rc1%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 13:26:18.893227 validate duration: 0.18
16 13:26:18.894158 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 13:26:18.894527 start: 1.1 download-retry (timeout 00:10:00) [common]
18 13:26:18.894838 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 13:26:18.895490 Not decompressing ramdisk as can be used compressed.
20 13:26:18.896007 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 13:26:18.896345 saving as /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/ramdisk/initrd.cpio.gz
22 13:26:18.896661 total size: 5628182 (5 MB)
23 13:26:18.936637 progress 0 % (0 MB)
24 13:26:18.940860 progress 5 % (0 MB)
25 13:26:18.945014 progress 10 % (0 MB)
26 13:26:18.948852 progress 15 % (0 MB)
27 13:26:18.953079 progress 20 % (1 MB)
28 13:26:18.956751 progress 25 % (1 MB)
29 13:26:18.960924 progress 30 % (1 MB)
30 13:26:18.965173 progress 35 % (1 MB)
31 13:26:18.968972 progress 40 % (2 MB)
32 13:26:18.973071 progress 45 % (2 MB)
33 13:26:18.976723 progress 50 % (2 MB)
34 13:26:18.980631 progress 55 % (2 MB)
35 13:26:18.984675 progress 60 % (3 MB)
36 13:26:18.988320 progress 65 % (3 MB)
37 13:26:18.992764 progress 70 % (3 MB)
38 13:26:18.996428 progress 75 % (4 MB)
39 13:26:19.000313 progress 80 % (4 MB)
40 13:26:19.003841 progress 85 % (4 MB)
41 13:26:19.007784 progress 90 % (4 MB)
42 13:26:19.011640 progress 95 % (5 MB)
43 13:26:19.014905 progress 100 % (5 MB)
44 13:26:19.015573 5 MB downloaded in 0.12 s (45.14 MB/s)
45 13:26:19.016153 end: 1.1.1 http-download (duration 00:00:00) [common]
47 13:26:19.017057 end: 1.1 download-retry (duration 00:00:00) [common]
48 13:26:19.017356 start: 1.2 download-retry (timeout 00:10:00) [common]
49 13:26:19.017632 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 13:26:19.018114 downloading http://storage.kernelci.org/renesas/next/renesas-next-2024-10-01-v6.12-rc1/arm64/defconfig/gcc-12/kernel/Image
51 13:26:19.018358 saving as /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/kernel/Image
52 13:26:19.018566 total size: 45713920 (43 MB)
53 13:26:19.018777 No compression specified
54 13:26:19.072102 progress 0 % (0 MB)
55 13:26:19.102270 progress 5 % (2 MB)
56 13:26:19.131942 progress 10 % (4 MB)
57 13:26:19.161587 progress 15 % (6 MB)
58 13:26:19.191080 progress 20 % (8 MB)
59 13:26:19.219935 progress 25 % (10 MB)
60 13:26:19.249552 progress 30 % (13 MB)
61 13:26:19.279003 progress 35 % (15 MB)
62 13:26:19.309203 progress 40 % (17 MB)
63 13:26:19.338161 progress 45 % (19 MB)
64 13:26:19.367234 progress 50 % (21 MB)
65 13:26:19.396477 progress 55 % (24 MB)
66 13:26:19.425851 progress 60 % (26 MB)
67 13:26:19.454695 progress 65 % (28 MB)
68 13:26:19.484058 progress 70 % (30 MB)
69 13:26:19.513236 progress 75 % (32 MB)
70 13:26:19.542726 progress 80 % (34 MB)
71 13:26:19.571844 progress 85 % (37 MB)
72 13:26:19.601561 progress 90 % (39 MB)
73 13:26:19.631090 progress 95 % (41 MB)
74 13:26:19.659724 progress 100 % (43 MB)
75 13:26:19.660312 43 MB downloaded in 0.64 s (67.94 MB/s)
76 13:26:19.660790 end: 1.2.1 http-download (duration 00:00:01) [common]
78 13:26:19.661602 end: 1.2 download-retry (duration 00:00:01) [common]
79 13:26:19.661879 start: 1.3 download-retry (timeout 00:09:59) [common]
80 13:26:19.662146 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 13:26:19.662618 downloading http://storage.kernelci.org/renesas/next/renesas-next-2024-10-01-v6.12-rc1/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 13:26:19.662862 saving as /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 13:26:19.663067 total size: 53209 (0 MB)
84 13:26:19.663274 No compression specified
85 13:26:19.703304 progress 61 % (0 MB)
86 13:26:19.704220 progress 100 % (0 MB)
87 13:26:19.704794 0 MB downloaded in 0.04 s (1.22 MB/s)
88 13:26:19.705274 end: 1.3.1 http-download (duration 00:00:00) [common]
90 13:26:19.706089 end: 1.3 download-retry (duration 00:00:00) [common]
91 13:26:19.706355 start: 1.4 download-retry (timeout 00:09:59) [common]
92 13:26:19.706621 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 13:26:19.707097 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 13:26:19.707372 saving as /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/nfsrootfs/full.rootfs.tar
95 13:26:19.707594 total size: 107552908 (102 MB)
96 13:26:19.707807 Using unxz to decompress xz
97 13:26:19.740357 progress 0 % (0 MB)
98 13:26:20.387129 progress 5 % (5 MB)
99 13:26:21.116767 progress 10 % (10 MB)
100 13:26:21.837808 progress 15 % (15 MB)
101 13:26:22.589937 progress 20 % (20 MB)
102 13:26:23.159972 progress 25 % (25 MB)
103 13:26:23.791495 progress 30 % (30 MB)
104 13:26:24.529867 progress 35 % (35 MB)
105 13:26:24.878573 progress 40 % (41 MB)
106 13:26:25.304152 progress 45 % (46 MB)
107 13:26:26.001443 progress 50 % (51 MB)
108 13:26:26.693244 progress 55 % (56 MB)
109 13:26:27.453730 progress 60 % (61 MB)
110 13:26:28.208640 progress 65 % (66 MB)
111 13:26:28.942177 progress 70 % (71 MB)
112 13:26:29.707758 progress 75 % (76 MB)
113 13:26:30.384938 progress 80 % (82 MB)
114 13:26:31.202978 progress 85 % (87 MB)
115 13:26:31.965385 progress 90 % (92 MB)
116 13:26:32.677077 progress 95 % (97 MB)
117 13:26:33.423203 progress 100 % (102 MB)
118 13:26:33.435017 102 MB downloaded in 13.73 s (7.47 MB/s)
119 13:26:33.435764 end: 1.4.1 http-download (duration 00:00:14) [common]
121 13:26:33.437644 end: 1.4 download-retry (duration 00:00:14) [common]
122 13:26:33.438241 start: 1.5 download-retry (timeout 00:09:45) [common]
123 13:26:33.438820 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 13:26:33.439691 downloading http://storage.kernelci.org/renesas/next/renesas-next-2024-10-01-v6.12-rc1/arm64/defconfig/gcc-12/modules.tar.xz
125 13:26:33.440250 saving as /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/modules/modules.tar
126 13:26:33.440708 total size: 11614472 (11 MB)
127 13:26:33.441172 Using unxz to decompress xz
128 13:26:33.489250 progress 0 % (0 MB)
129 13:26:33.558981 progress 5 % (0 MB)
130 13:26:33.636988 progress 10 % (1 MB)
131 13:26:33.723598 progress 15 % (1 MB)
132 13:26:33.800241 progress 20 % (2 MB)
133 13:26:33.883575 progress 25 % (2 MB)
134 13:26:33.963593 progress 30 % (3 MB)
135 13:26:34.043700 progress 35 % (3 MB)
136 13:26:34.117494 progress 40 % (4 MB)
137 13:26:34.194322 progress 45 % (5 MB)
138 13:26:34.273092 progress 50 % (5 MB)
139 13:26:34.345297 progress 55 % (6 MB)
140 13:26:34.429742 progress 60 % (6 MB)
141 13:26:34.516489 progress 65 % (7 MB)
142 13:26:34.598366 progress 70 % (7 MB)
143 13:26:34.690666 progress 75 % (8 MB)
144 13:26:34.786293 progress 80 % (8 MB)
145 13:26:34.867873 progress 85 % (9 MB)
146 13:26:34.943258 progress 90 % (10 MB)
147 13:26:35.015809 progress 95 % (10 MB)
148 13:26:35.092266 progress 100 % (11 MB)
149 13:26:35.103907 11 MB downloaded in 1.66 s (6.66 MB/s)
150 13:26:35.104929 end: 1.5.1 http-download (duration 00:00:02) [common]
152 13:26:35.106551 end: 1.5 download-retry (duration 00:00:02) [common]
153 13:26:35.107078 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 13:26:35.107597 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 13:26:45.398935 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/786555/extract-nfsrootfs-d3k0pwet
156 13:26:45.399550 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 13:26:45.399843 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 13:26:45.400489 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5
159 13:26:45.400937 makedir: /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin
160 13:26:45.401268 makedir: /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/tests
161 13:26:45.401615 makedir: /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/results
162 13:26:45.401968 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-add-keys
163 13:26:45.402519 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-add-sources
164 13:26:45.403050 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-background-process-start
165 13:26:45.403559 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-background-process-stop
166 13:26:45.404132 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-common-functions
167 13:26:45.404658 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-echo-ipv4
168 13:26:45.405157 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-install-packages
169 13:26:45.405669 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-installed-packages
170 13:26:45.406202 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-os-build
171 13:26:45.406785 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-probe-channel
172 13:26:45.407290 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-probe-ip
173 13:26:45.407788 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-target-ip
174 13:26:45.408325 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-target-mac
175 13:26:45.408829 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-target-storage
176 13:26:45.409322 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-test-case
177 13:26:45.409820 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-test-event
178 13:26:45.410370 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-test-feedback
179 13:26:45.410888 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-test-raise
180 13:26:45.411373 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-test-reference
181 13:26:45.411856 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-test-runner
182 13:26:45.412402 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-test-set
183 13:26:45.412898 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-test-shell
184 13:26:45.413406 Updating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-install-packages (oe)
185 13:26:45.413949 Updating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/bin/lava-installed-packages (oe)
186 13:26:45.414400 Creating /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/environment
187 13:26:45.414804 LAVA metadata
188 13:26:45.415097 - LAVA_JOB_ID=786555
189 13:26:45.415322 - LAVA_DISPATCHER_IP=192.168.6.2
190 13:26:45.415714 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 13:26:45.416763 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 13:26:45.417103 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 13:26:45.417314 skipped lava-vland-overlay
194 13:26:45.417556 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 13:26:45.417815 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 13:26:45.418036 skipped lava-multinode-overlay
197 13:26:45.418277 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 13:26:45.418536 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 13:26:45.418792 Loading test definitions
200 13:26:45.419076 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 13:26:45.419299 Using /lava-786555 at stage 0
202 13:26:45.420584 uuid=786555_1.6.2.4.1 testdef=None
203 13:26:45.420919 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 13:26:45.421187 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 13:26:45.423052 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 13:26:45.423857 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 13:26:45.426333 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 13:26:45.427185 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 13:26:45.429497 runner path: /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/0/tests/0_dmesg test_uuid 786555_1.6.2.4.1
212 13:26:45.430110 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 13:26:45.430879 Creating lava-test-runner.conf files
215 13:26:45.431082 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/786555/lava-overlay-flf80sd5/lava-786555/0 for stage 0
216 13:26:45.431437 - 0_dmesg
217 13:26:45.431797 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 13:26:45.432102 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 13:26:45.454383 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 13:26:45.454830 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 13:26:45.455094 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 13:26:45.455363 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 13:26:45.455628 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 13:26:46.081945 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 13:26:46.082407 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 13:26:46.082657 extracting modules file /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/modules/modules.tar to /var/lib/lava/dispatcher/tmp/786555/extract-nfsrootfs-d3k0pwet
227 13:26:47.498316 extracting modules file /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/modules/modules.tar to /var/lib/lava/dispatcher/tmp/786555/extract-overlay-ramdisk-skgms_p4/ramdisk
228 13:26:48.954773 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 13:26:48.955249 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 13:26:48.955534 [common] Applying overlay to NFS
231 13:26:48.955747 [common] Applying overlay /var/lib/lava/dispatcher/tmp/786555/compress-overlay-y8zxgsur/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/786555/extract-nfsrootfs-d3k0pwet
232 13:26:48.986315 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 13:26:48.986759 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 13:26:48.987035 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 13:26:48.987268 Converting downloaded kernel to a uImage
236 13:26:48.987578 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/kernel/Image /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/kernel/uImage
237 13:26:49.445781 output: Image Name:
238 13:26:49.446316 output: Created: Tue Oct 1 13:26:48 2024
239 13:26:49.446718 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 13:26:49.447041 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 13:26:49.447335 output: Load Address: 01080000
242 13:26:49.447664 output: Entry Point: 01080000
243 13:26:49.448026 output:
244 13:26:49.448502 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 13:26:49.448946 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 13:26:49.449362 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 13:26:49.449751 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 13:26:49.450170 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 13:26:49.450576 Building ramdisk /var/lib/lava/dispatcher/tmp/786555/extract-overlay-ramdisk-skgms_p4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/786555/extract-overlay-ramdisk-skgms_p4/ramdisk
250 13:26:51.838813 >> 166772 blocks
251 13:26:59.637326 Adding RAMdisk u-boot header.
252 13:26:59.637775 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/786555/extract-overlay-ramdisk-skgms_p4/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/786555/extract-overlay-ramdisk-skgms_p4/ramdisk.cpio.gz.uboot
253 13:26:59.885034 output: Image Name:
254 13:26:59.885446 output: Created: Tue Oct 1 13:26:59 2024
255 13:26:59.885657 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 13:26:59.885862 output: Data Size: 23422405 Bytes = 22873.44 KiB = 22.34 MiB
257 13:26:59.886064 output: Load Address: 00000000
258 13:26:59.886264 output: Entry Point: 00000000
259 13:26:59.886461 output:
260 13:26:59.887043 rename /var/lib/lava/dispatcher/tmp/786555/extract-overlay-ramdisk-skgms_p4/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/ramdisk/ramdisk.cpio.gz.uboot
261 13:26:59.887467 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 13:26:59.887756 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 13:26:59.888113 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 13:26:59.888588 No LXC device requested
265 13:26:59.889092 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 13:26:59.889599 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 13:26:59.890091 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 13:26:59.890498 Checking files for TFTP limit of 4294967296 bytes.
269 13:26:59.893196 end: 1 tftp-deploy (duration 00:00:41) [common]
270 13:26:59.893775 start: 2 uboot-action (timeout 00:05:00) [common]
271 13:26:59.894295 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 13:26:59.894791 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 13:26:59.895290 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 13:26:59.895813 Using kernel file from prepare-kernel: 786555/tftp-deploy-qghi4b0m/kernel/uImage
275 13:26:59.896474 substitutions:
276 13:26:59.896879 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 13:26:59.897284 - {DTB_ADDR}: 0x01070000
278 13:26:59.897679 - {DTB}: 786555/tftp-deploy-qghi4b0m/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 13:26:59.898072 - {INITRD}: 786555/tftp-deploy-qghi4b0m/ramdisk/ramdisk.cpio.gz.uboot
280 13:26:59.898465 - {KERNEL_ADDR}: 0x01080000
281 13:26:59.898855 - {KERNEL}: 786555/tftp-deploy-qghi4b0m/kernel/uImage
282 13:26:59.899243 - {LAVA_MAC}: None
283 13:26:59.899670 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/786555/extract-nfsrootfs-d3k0pwet
284 13:26:59.900093 - {NFS_SERVER_IP}: 192.168.6.2
285 13:26:59.900486 - {PRESEED_CONFIG}: None
286 13:26:59.900874 - {PRESEED_LOCAL}: None
287 13:26:59.901257 - {RAMDISK_ADDR}: 0x08000000
288 13:26:59.901638 - {RAMDISK}: 786555/tftp-deploy-qghi4b0m/ramdisk/ramdisk.cpio.gz.uboot
289 13:26:59.902022 - {ROOT_PART}: None
290 13:26:59.902407 - {ROOT}: None
291 13:26:59.902791 - {SERVER_IP}: 192.168.6.2
292 13:26:59.903174 - {TEE_ADDR}: 0x83000000
293 13:26:59.903556 - {TEE}: None
294 13:26:59.903941 Parsed boot commands:
295 13:26:59.904357 - setenv autoload no
296 13:26:59.904886 - setenv initrd_high 0xffffffff
297 13:26:59.905361 - setenv fdt_high 0xffffffff
298 13:26:59.905766 - dhcp
299 13:26:59.906156 - setenv serverip 192.168.6.2
300 13:26:59.906539 - tftpboot 0x01080000 786555/tftp-deploy-qghi4b0m/kernel/uImage
301 13:26:59.906925 - tftpboot 0x08000000 786555/tftp-deploy-qghi4b0m/ramdisk/ramdisk.cpio.gz.uboot
302 13:26:59.907313 - tftpboot 0x01070000 786555/tftp-deploy-qghi4b0m/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 13:26:59.907700 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/786555/extract-nfsrootfs-d3k0pwet,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 13:26:59.908130 - bootm 0x01080000 0x08000000 0x01070000
305 13:26:59.908656 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 13:26:59.910133 start: 2.3 connect-device (timeout 00:05:00) [common]
308 13:26:59.910549 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 13:26:59.925039 Setting prompt string to ['lava-test: # ']
310 13:26:59.926516 end: 2.3 connect-device (duration 00:00:00) [common]
311 13:26:59.927102 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 13:26:59.927645 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 13:26:59.928211 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 13:26:59.929339 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 13:26:59.977924 >> OK - accepted request
316 13:26:59.980790 Returned 0 in 0 seconds
317 13:27:00.081795 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 13:27:00.082833 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 13:27:00.083164 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 13:27:00.083453 Setting prompt string to ['Hit any key to stop autoboot']
322 13:27:00.083707 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 13:27:00.084667 Trying 192.168.56.21...
324 13:27:00.084957 Connected to conserv1.
325 13:27:00.085175 Escape character is '^]'.
326 13:27:00.085391
327 13:27:00.085611 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 13:27:00.085833
329 13:27:06.858135 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 13:27:06.858843 bl2_stage_init 0x01
331 13:27:06.859311 bl2_stage_init 0x81
332 13:27:06.863714 hw id: 0x0000 - pwm id 0x01
333 13:27:06.864366 bl2_stage_init 0xc1
334 13:27:06.869422 bl2_stage_init 0x02
335 13:27:06.869838
336 13:27:06.870118 L0:00000000
337 13:27:06.870368 L1:00000703
338 13:27:06.870613 L2:00008067
339 13:27:06.870844 L3:15000000
340 13:27:06.871603 S1:00000000
341 13:27:06.875822 B2:20282000
342 13:27:06.876259 B1:a0f83180
343 13:27:06.876475
344 13:27:06.876951 TE: 70558
345 13:27:06.877449
346 13:27:06.881537 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 13:27:06.881944
348 13:27:06.887009 Board ID = 1
349 13:27:06.887709 Set cpu clk to 24M
350 13:27:06.888010 Set clk81 to 24M
351 13:27:06.888240 Use GP1_pll as DSU clk.
352 13:27:06.892496 DSU clk: 1200 Mhz
353 13:27:06.893135 CPU clk: 1200 MHz
354 13:27:06.893654 Set clk81 to 166.6M
355 13:27:06.903671 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 13:27:06.904127 board id: 1
357 13:27:06.910212 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 13:27:06.920961 fw parse done
359 13:27:06.926866 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 13:27:06.970058 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 13:27:06.981093 PIEI prepare done
362 13:27:06.981705 fastboot data load
363 13:27:06.982073 fastboot data verify
364 13:27:06.986702 verify result: 266
365 13:27:06.992396 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 13:27:06.992817 LPDDR4 probe
367 13:27:06.993050 ddr clk to 1584MHz
368 13:27:07.000487 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 13:27:07.037979
370 13:27:07.038416 dmc_version 0001
371 13:27:07.049479 Check phy result
372 13:27:07.049885 INFO : End of CA training
373 13:27:07.055044 INFO : End of initialization
374 13:27:07.055432 INFO : Training has run successfully!
375 13:27:07.060391 Check phy result
376 13:27:07.060744 INFO : End of initialization
377 13:27:07.066003 INFO : End of read enable training
378 13:27:07.066389 INFO : End of fine write leveling
379 13:27:07.071611 INFO : End of Write leveling coarse delay
380 13:27:07.072019 INFO : Training has run successfully!
381 13:27:07.077240 Check phy result
382 13:27:07.077591 INFO : End of initialization
383 13:27:07.082761 INFO : End of read dq deskew training
384 13:27:07.088483 INFO : End of MPR read delay center optimization
385 13:27:07.088864 INFO : End of write delay center optimization
386 13:27:07.094032 INFO : End of read delay center optimization
387 13:27:07.099613 INFO : End of max read latency training
388 13:27:07.099971 INFO : Training has run successfully!
389 13:27:07.105262 1D training succeed
390 13:27:07.110618 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 13:27:07.158864 Check phy result
392 13:27:07.159485 INFO : End of initialization
393 13:27:07.186231 INFO : End of 2D read delay Voltage center optimization
394 13:27:07.210484 INFO : End of 2D read delay Voltage center optimization
395 13:27:07.267118 INFO : End of 2D write delay Voltage center optimization
396 13:27:07.321253 INFO : End of 2D write delay Voltage center optimization
397 13:27:07.326860 INFO : Training has run successfully!
398 13:27:07.327425
399 13:27:07.327890 channel==0
400 13:27:07.332319 RxClkDly_Margin_A0==78 ps 8
401 13:27:07.332640 TxDqDly_Margin_A0==98 ps 10
402 13:27:07.335654 RxClkDly_Margin_A1==88 ps 9
403 13:27:07.335948 TxDqDly_Margin_A1==98 ps 10
404 13:27:07.341312 TrainedVREFDQ_A0==74
405 13:27:07.341630 TrainedVREFDQ_A1==74
406 13:27:07.341853 VrefDac_Margin_A0==24
407 13:27:07.346859 DeviceVref_Margin_A0==40
408 13:27:07.347187 VrefDac_Margin_A1==23
409 13:27:07.352433 DeviceVref_Margin_A1==40
410 13:27:07.352772
411 13:27:07.353001
412 13:27:07.353222 channel==1
413 13:27:07.353436 RxClkDly_Margin_A0==78 ps 8
414 13:27:07.357953 TxDqDly_Margin_A0==98 ps 10
415 13:27:07.358291 RxClkDly_Margin_A1==78 ps 8
416 13:27:07.363678 TxDqDly_Margin_A1==88 ps 9
417 13:27:07.364050 TrainedVREFDQ_A0==78
418 13:27:07.364286 TrainedVREFDQ_A1==75
419 13:27:07.369225 VrefDac_Margin_A0==22
420 13:27:07.369560 DeviceVref_Margin_A0==36
421 13:27:07.374748 VrefDac_Margin_A1==20
422 13:27:07.375077 DeviceVref_Margin_A1==39
423 13:27:07.375308
424 13:27:07.380353 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 13:27:07.380693
426 13:27:07.408373 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000016 00000017 00000015 00000015 00000017 00000018 0000001a 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 13:27:07.414019 2D training succeed
428 13:27:07.419531 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 13:27:07.419882 auto size-- 65535DDR cs0 size: 2048MB
430 13:27:07.425097 DDR cs1 size: 2048MB
431 13:27:07.425446 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 13:27:07.430729 cs0 DataBus test pass
433 13:27:07.431080 cs1 DataBus test pass
434 13:27:07.431311 cs0 AddrBus test pass
435 13:27:07.436333 cs1 AddrBus test pass
436 13:27:07.436683
437 13:27:07.436921 100bdlr_step_size ps== 471
438 13:27:07.437153 result report
439 13:27:07.441919 boot times 0Enable ddr reg access
440 13:27:07.449499 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 13:27:07.463320 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 13:27:08.122569 bl2z: ptr: 05129330, size: 00001e40
443 13:27:08.130464 0.0;M3 CHK:0;cm4_sp_mode 0
444 13:27:08.131086 MVN_1=0x00000000
445 13:27:08.131554 MVN_2=0x00000000
446 13:27:08.141778 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 13:27:08.142369 OPS=0x04
448 13:27:08.142828 ring efuse init
449 13:27:08.147344 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 13:27:08.147894 [0.017354 Inits done]
451 13:27:08.148453 secure task start!
452 13:27:08.154890 high task start!
453 13:27:08.155465 low task start!
454 13:27:08.155941 run into bl31
455 13:27:08.163546 NOTICE: BL31: v1.3(release):4fc40b1
456 13:27:08.172806 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 13:27:08.173383 NOTICE: BL31: G12A normal boot!
458 13:27:08.186977 NOTICE: BL31: BL33 decompress pass
459 13:27:08.192608 ERROR: Error initializing runtime service opteed_fast
460 13:27:10.906169 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 13:27:10.906847 bl2_stage_init 0x01
462 13:27:10.907333 bl2_stage_init 0x81
463 13:27:10.911744 hw id: 0x0000 - pwm id 0x01
464 13:27:10.912365 bl2_stage_init 0xc1
465 13:27:10.917348 bl2_stage_init 0x02
466 13:27:10.917906
467 13:27:10.918353 L0:00000000
468 13:27:10.918783 L1:00000703
469 13:27:10.919213 L2:00008067
470 13:27:10.919639 L3:15000000
471 13:27:10.922897 S1:00000000
472 13:27:10.923359 B2:20282000
473 13:27:10.923788 B1:a0f83180
474 13:27:10.924393
475 13:27:10.924832 TE: 68963
476 13:27:10.925263
477 13:27:10.928647 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 13:27:10.929124
479 13:27:10.934099 Board ID = 1
480 13:27:10.934567 Set cpu clk to 24M
481 13:27:10.935000 Set clk81 to 24M
482 13:27:10.939697 Use GP1_pll as DSU clk.
483 13:27:10.940195 DSU clk: 1200 Mhz
484 13:27:10.940629 CPU clk: 1200 MHz
485 13:27:10.945296 Set clk81 to 166.6M
486 13:27:10.950900 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 13:27:10.951368 board id: 1
488 13:27:10.958100 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 13:27:10.969025 fw parse done
490 13:27:10.975007 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 13:27:11.018149 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 13:27:11.029266 PIEI prepare done
493 13:27:11.029626 fastboot data load
494 13:27:11.029842 fastboot data verify
495 13:27:11.034807 verify result: 266
496 13:27:11.040387 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 13:27:11.040670 LPDDR4 probe
498 13:27:11.040878 ddr clk to 1584MHz
499 13:27:11.048397 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 13:27:11.086152
501 13:27:11.086512 dmc_version 0001
502 13:27:11.093145 Check phy result
503 13:27:11.099151 INFO : End of CA training
504 13:27:11.099465 INFO : End of initialization
505 13:27:11.104773 INFO : Training has run successfully!
506 13:27:11.105309 Check phy result
507 13:27:11.110376 INFO : End of initialization
508 13:27:11.110811 INFO : End of read enable training
509 13:27:11.113867 INFO : End of fine write leveling
510 13:27:11.119283 INFO : End of Write leveling coarse delay
511 13:27:11.124926 INFO : Training has run successfully!
512 13:27:11.125262 Check phy result
513 13:27:11.125492 INFO : End of initialization
514 13:27:11.130487 INFO : End of read dq deskew training
515 13:27:11.136263 INFO : End of MPR read delay center optimization
516 13:27:11.136738 INFO : End of write delay center optimization
517 13:27:11.141940 INFO : End of read delay center optimization
518 13:27:11.147331 INFO : End of max read latency training
519 13:27:11.147664 INFO : Training has run successfully!
520 13:27:11.152943 1D training succeed
521 13:27:11.158870 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 13:27:11.207125 Check phy result
523 13:27:11.207536 INFO : End of initialization
524 13:27:11.234488 INFO : End of 2D read delay Voltage center optimization
525 13:27:11.258706 INFO : End of 2D read delay Voltage center optimization
526 13:27:11.315344 INFO : End of 2D write delay Voltage center optimization
527 13:27:11.370016 INFO : End of 2D write delay Voltage center optimization
528 13:27:11.374959 INFO : Training has run successfully!
529 13:27:11.375352
530 13:27:11.376714 channel==0
531 13:27:11.383409 RxClkDly_Margin_A0==69 ps 7
532 13:27:11.383946 TxDqDly_Margin_A0==98 ps 10
533 13:27:11.384795 RxClkDly_Margin_A1==88 ps 9
534 13:27:11.385285 TxDqDly_Margin_A1==98 ps 10
535 13:27:11.389434 TrainedVREFDQ_A0==75
536 13:27:11.389943 TrainedVREFDQ_A1==74
537 13:27:11.390409 VrefDac_Margin_A0==23
538 13:27:11.394992 DeviceVref_Margin_A0==39
539 13:27:11.395493 VrefDac_Margin_A1==22
540 13:27:11.400590 DeviceVref_Margin_A1==40
541 13:27:11.401119
542 13:27:11.401590
543 13:27:11.402049 channel==1
544 13:27:11.402503 RxClkDly_Margin_A0==78 ps 8
545 13:27:11.406174 TxDqDly_Margin_A0==98 ps 10
546 13:27:11.406678 RxClkDly_Margin_A1==78 ps 8
547 13:27:11.411751 TxDqDly_Margin_A1==78 ps 8
548 13:27:11.412305 TrainedVREFDQ_A0==78
549 13:27:11.412770 TrainedVREFDQ_A1==75
550 13:27:11.417390 VrefDac_Margin_A0==23
551 13:27:11.417883 DeviceVref_Margin_A0==36
552 13:27:11.422965 VrefDac_Margin_A1==20
553 13:27:11.423465 DeviceVref_Margin_A1==39
554 13:27:11.423919
555 13:27:11.428598 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 13:27:11.429097
557 13:27:11.456557 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000019 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000019 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
558 13:27:11.462191 2D training succeed
559 13:27:11.467769 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 13:27:11.468320 auto size-- 65535DDR cs0 size: 2048MB
561 13:27:11.473364 DDR cs1 size: 2048MB
562 13:27:11.473869 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 13:27:11.478980 cs0 DataBus test pass
564 13:27:11.479477 cs1 DataBus test pass
565 13:27:11.479935 cs0 AddrBus test pass
566 13:27:11.484558 cs1 AddrBus test pass
567 13:27:11.485048
568 13:27:11.485504 100bdlr_step_size ps== 471
569 13:27:11.485961 result report
570 13:27:11.490225 boot times 0Enable ddr reg access
571 13:27:11.497724 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 13:27:11.511579 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 13:27:12.171064 bl2z: ptr: 05129330, size: 00001e40
574 13:27:12.177987 0.0;M3 CHK:0;cm4_sp_mode 0
575 13:27:12.178337 MVN_1=0x00000000
576 13:27:12.178559 MVN_2=0x00000000
577 13:27:12.189683 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 13:27:12.190046 OPS=0x04
579 13:27:12.190281 ring efuse init
580 13:27:12.195021 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 13:27:12.195335 [0.017355 Inits done]
582 13:27:12.195552 secure task start!
583 13:27:12.202363 high task start!
584 13:27:12.202686 low task start!
585 13:27:12.202900 run into bl31
586 13:27:12.212065 NOTICE: BL31: v1.3(release):4fc40b1
587 13:27:12.219666 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 13:27:12.220032 NOTICE: BL31: G12A normal boot!
589 13:27:12.235344 NOTICE: BL31: BL33 decompress pass
590 13:27:12.240952 ERROR: Error initializing runtime service opteed_fast
591 13:27:13.608775 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 13:27:13.609348 bl2_stage_init 0x01
593 13:27:13.609616 bl2_stage_init 0x81
594 13:27:13.614259 hw id: 0x0000 - pwm id 0x01
595 13:27:13.614599 bl2_stage_init 0xc1
596 13:27:13.620031 bl2_stage_init 0x02
597 13:27:13.620492
598 13:27:13.620922 L0:00000000
599 13:27:13.621215 L1:00000703
600 13:27:13.621432 L2:00008067
601 13:27:13.621636 L3:15000000
602 13:27:13.622213 S1:00000000
603 13:27:13.626528 B2:20282000
604 13:27:13.626977 B1:a0f83180
605 13:27:13.627325
606 13:27:13.627661 TE: 69941
607 13:27:13.628044
608 13:27:13.632194 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 13:27:13.632670
610 13:27:13.633036 Board ID = 1
611 13:27:13.637897 Set cpu clk to 24M
612 13:27:13.638386 Set clk81 to 24M
613 13:27:13.638733 Use GP1_pll as DSU clk.
614 13:27:13.643396 DSU clk: 1200 Mhz
615 13:27:13.643748 CPU clk: 1200 MHz
616 13:27:13.643976 Set clk81 to 166.6M
617 13:27:13.654585 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 13:27:13.654974 board id: 1
619 13:27:13.659882 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 13:27:13.671422 fw parse done
621 13:27:13.676500 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 13:27:13.719497 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 13:27:13.730923 PIEI prepare done
624 13:27:13.731468 fastboot data load
625 13:27:13.731836 fastboot data verify
626 13:27:13.736449 verify result: 266
627 13:27:13.742135 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 13:27:13.742477 LPDDR4 probe
629 13:27:13.742702 ddr clk to 1584MHz
630 13:27:13.749130 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 13:27:13.787791
632 13:27:13.788225 dmc_version 0001
633 13:27:13.794050 Check phy result
634 13:27:13.799947 INFO : End of CA training
635 13:27:13.800338 INFO : End of initialization
636 13:27:13.805478 INFO : Training has run successfully!
637 13:27:13.805959 Check phy result
638 13:27:13.811237 INFO : End of initialization
639 13:27:13.811571 INFO : End of read enable training
640 13:27:13.814360 INFO : End of fine write leveling
641 13:27:13.819915 INFO : End of Write leveling coarse delay
642 13:27:13.825601 INFO : Training has run successfully!
643 13:27:13.825984 Check phy result
644 13:27:13.826213 INFO : End of initialization
645 13:27:13.831251 INFO : End of read dq deskew training
646 13:27:13.836884 INFO : End of MPR read delay center optimization
647 13:27:13.837455 INFO : End of write delay center optimization
648 13:27:13.842502 INFO : End of read delay center optimization
649 13:27:13.848092 INFO : End of max read latency training
650 13:27:13.848502 INFO : Training has run successfully!
651 13:27:13.853612 1D training succeed
652 13:27:13.859179 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 13:27:13.906376 Check phy result
654 13:27:13.906783 INFO : End of initialization
655 13:27:13.929315 INFO : End of 2D read delay Voltage center optimization
656 13:27:13.947728 INFO : End of 2D read delay Voltage center optimization
657 13:27:14.000168 INFO : End of 2D write delay Voltage center optimization
658 13:27:14.049683 INFO : End of 2D write delay Voltage center optimization
659 13:27:14.055239 INFO : Training has run successfully!
660 13:27:14.055572
661 13:27:14.055793 channel==0
662 13:27:14.060868 RxClkDly_Margin_A0==88 ps 9
663 13:27:14.061191 TxDqDly_Margin_A0==98 ps 10
664 13:27:14.064351 RxClkDly_Margin_A1==88 ps 9
665 13:27:14.064805 TxDqDly_Margin_A1==88 ps 9
666 13:27:14.069947 TrainedVREFDQ_A0==75
667 13:27:14.070421 TrainedVREFDQ_A1==74
668 13:27:14.070692 VrefDac_Margin_A0==22
669 13:27:14.075452 DeviceVref_Margin_A0==39
670 13:27:14.075900 VrefDac_Margin_A1==23
671 13:27:14.081002 DeviceVref_Margin_A1==40
672 13:27:14.081510
673 13:27:14.081869
674 13:27:14.082108 channel==1
675 13:27:14.082319 RxClkDly_Margin_A0==88 ps 9
676 13:27:14.084611 TxDqDly_Margin_A0==98 ps 10
677 13:27:14.090138 RxClkDly_Margin_A1==78 ps 8
678 13:27:14.090606 TxDqDly_Margin_A1==88 ps 9
679 13:27:14.090958 TrainedVREFDQ_A0==78
680 13:27:14.095657 TrainedVREFDQ_A1==75
681 13:27:14.095976 VrefDac_Margin_A0==22
682 13:27:14.101254 DeviceVref_Margin_A0==36
683 13:27:14.101583 VrefDac_Margin_A1==22
684 13:27:14.101803 DeviceVref_Margin_A1==39
685 13:27:14.102010
686 13:27:14.106945 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 13:27:14.107417
688 13:27:14.140378 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000019 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
689 13:27:14.140938 2D training succeed
690 13:27:14.145990 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 13:27:14.151628 auto size-- 65535DDR cs0 size: 2048MB
692 13:27:14.152005 DDR cs1 size: 2048MB
693 13:27:14.157190 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 13:27:14.157516 cs0 DataBus test pass
695 13:27:14.157734 cs1 DataBus test pass
696 13:27:14.162810 cs0 AddrBus test pass
697 13:27:14.163130 cs1 AddrBus test pass
698 13:27:14.163348
699 13:27:14.168381 100bdlr_step_size ps== 464
700 13:27:14.168727 result report
701 13:27:14.168948 boot times 0Enable ddr reg access
702 13:27:14.177026 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 13:27:14.191232 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 13:27:14.846741 bl2z: ptr: 05129330, size: 00001e40
705 13:27:14.853253 0.0;M3 CHK:0;cm4_sp_mode 0
706 13:27:14.853592 MVN_1=0x00000000
707 13:27:14.853823 MVN_2=0x00000000
708 13:27:14.864639 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 13:27:14.865208 OPS=0x04
710 13:27:14.865646 ring efuse init
711 13:27:14.870300 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 13:27:14.870794 [0.017310 Inits done]
713 13:27:14.871217 secure task start!
714 13:27:14.877370 high task start!
715 13:27:14.877869 low task start!
716 13:27:14.878287 run into bl31
717 13:27:14.886265 NOTICE: BL31: v1.3(release):4fc40b1
718 13:27:14.893060 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 13:27:14.893518 NOTICE: BL31: G12A normal boot!
720 13:27:14.909472 NOTICE: BL31: BL33 decompress pass
721 13:27:14.914191 ERROR: Error initializing runtime service opteed_fast
722 13:27:15.710538
723 13:27:15.711329
724 13:27:15.715915 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 13:27:15.716572
726 13:27:15.719435 Model: Libre Computer AML-S905D3-CC Solitude
727 13:27:15.866602 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 13:27:15.881814 DRAM: 2 GiB (effective 3.8 GiB)
729 13:27:15.982844 Core: 406 devices, 33 uclasses, devicetree: separate
730 13:27:15.988333 WDT: Not starting watchdog@f0d0
731 13:27:16.013776 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 13:27:16.025917 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 13:27:16.029957 ** Bad device specification mmc 0 **
734 13:27:16.040972 Card did not respond to voltage select! : -110
735 13:27:16.048078 ** Bad device specification mmc 0 **
736 13:27:16.048653 Couldn't find partition mmc 0
737 13:27:16.056940 Card did not respond to voltage select! : -110
738 13:27:16.062450 ** Bad device specification mmc 0 **
739 13:27:16.063032 Couldn't find partition mmc 0
740 13:27:16.066584 Error: could not access storage.
741 13:27:16.364074 Net: eth0: ethernet@ff3f0000
742 13:27:16.364848 starting USB...
743 13:27:16.609743 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 13:27:16.610513 Starting the controller
745 13:27:16.616475 USB XHCI 1.10
746 13:27:18.171125 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 13:27:18.178659 scanning usb for storage devices... 0 Storage Device(s) found
749 13:27:18.230540 Hit any key to stop autoboot: 1
750 13:27:18.231576 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
751 13:27:18.232383 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
752 13:27:18.233006 Setting prompt string to ['=>']
753 13:27:18.233631 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
754 13:27:18.244834 0
755 13:27:18.246011 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 13:27:18.347544 => setenv autoload no
758 13:27:18.348478 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
759 13:27:18.354579 setenv autoload no
761 13:27:18.456391 => setenv initrd_high 0xffffffff
762 13:27:18.457242 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 13:27:18.460632 setenv initrd_high 0xffffffff
765 13:27:18.562356 => setenv fdt_high 0xffffffff
766 13:27:18.563158 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 13:27:18.567274 setenv fdt_high 0xffffffff
769 13:27:18.669066 => dhcp
770 13:27:18.669882 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 13:27:18.673649 dhcp
772 13:27:19.329680 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 13:27:19.330408 Speed: 1000, full duplex
774 13:27:19.330960 BOOTP broadcast 1
775 13:27:19.577812 BOOTP broadcast 2
776 13:27:20.078746 BOOTP broadcast 3
777 13:27:21.079807 BOOTP broadcast 4
778 13:27:23.080801 BOOTP broadcast 5
779 13:27:23.096185 DHCP client bound to address 192.168.6.12 (3767 ms)
781 13:27:23.198026 => setenv serverip 192.168.6.2
782 13:27:23.198950 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
783 13:27:23.202899 setenv serverip 192.168.6.2
785 13:27:23.304706 => tftpboot 0x01080000 786555/tftp-deploy-qghi4b0m/kernel/uImage
786 13:27:23.305646 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
787 13:27:23.312373 tftpboot 0x01080000 786555/tftp-deploy-qghi4b0m/kernel/uImage
788 13:27:23.313034 Speed: 1000, full duplex
789 13:27:23.313591 Using ethernet@ff3f0000 device
790 13:27:23.317974 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
791 13:27:23.323632 Filename '786555/tftp-deploy-qghi4b0m/kernel/uImage'.
792 13:27:23.327439 Load address: 0x1080000
793 13:27:23.339504 Loading: * UDP wrong checksum 00000005 00004c3a
794 13:27:28.301770 ################################################## 43.6 MiB
795 13:27:28.302486 8.8 MiB/s
796 13:27:28.302941 done
797 13:27:28.305892 Bytes transferred = 45713984 (2b98a40 hex)
799 13:27:28.407504 => tftpboot 0x08000000 786555/tftp-deploy-qghi4b0m/ramdisk/ramdisk.cpio.gz.uboot
800 13:27:28.408326 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:31)
801 13:27:28.415166 tftpboot 0x08000000 786555/tftp-deploy-qghi4b0m/ramdisk/ramdisk.cpio.gz.uboot
802 13:27:28.415699 Speed: 1000, full duplex
803 13:27:28.416139 Using ethernet@ff3f0000 device
804 13:27:28.420736 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
805 13:27:28.430554 Filename '786555/tftp-deploy-qghi4b0m/ramdisk/ramdisk.cpio.gz.uboot'.
806 13:27:28.431093 Load address: 0x8000000
807 13:27:30.943733 Loading: * UDP wrong checksum 000000ff 0000d231
808 13:27:30.946191 UDP wrong checksum 000000ff 00005824
809 13:27:32.669624 UDP wrong checksum 000000ff 0000cecb
810 13:27:32.679418 UDP wrong checksum 000000ff 000052be
811 13:27:35.694861 T ################################################# UDP wrong checksum 00000005 00001177
812 13:27:40.695699 T UDP wrong checksum 00000005 00001177
813 13:27:42.242194 UDP wrong checksum 000000ff 00002185
814 13:27:42.269087 UDP wrong checksum 000000ff 0000a477
815 13:27:50.697745 T T UDP wrong checksum 00000005 00001177
816 13:27:54.722032 UDP wrong checksum 000000ff 0000c539
817 13:27:54.742735 UDP wrong checksum 000000ff 0000622c
818 13:28:10.700301 T T T UDP wrong checksum 00000005 00001177
819 13:28:25.705637 T T T
820 13:28:25.706393 Retry count exceeded; starting again
822 13:28:25.708247 end: 2.4.3 bootloader-commands (duration 00:01:07) [common]
825 13:28:25.710420 end: 2.4 uboot-commands (duration 00:01:26) [common]
827 13:28:25.712104 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
829 13:28:25.713343 end: 2 uboot-action (duration 00:01:26) [common]
831 13:28:25.715122 Cleaning after the job
832 13:28:25.715789 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/ramdisk
833 13:28:25.717322 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/kernel
834 13:28:25.762856 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/dtb
835 13:28:25.763870 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/nfsrootfs
836 13:28:25.927690 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786555/tftp-deploy-qghi4b0m/modules
837 13:28:25.949526 start: 4.1 power-off (timeout 00:00:30) [common]
838 13:28:25.950283 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
839 13:28:25.984066 >> OK - accepted request
840 13:28:25.985982 Returned 0 in 0 seconds
841 13:28:26.086893 end: 4.1 power-off (duration 00:00:00) [common]
843 13:28:26.088020 start: 4.2 read-feedback (timeout 00:10:00) [common]
844 13:28:26.088778 Listened to connection for namespace 'common' for up to 1s
845 13:28:27.089732 Finalising connection for namespace 'common'
846 13:28:27.090311 Disconnecting from shell: Finalise
847 13:28:27.090660 =>
848 13:28:27.191532 end: 4.2 read-feedback (duration 00:00:01) [common]
849 13:28:27.192388 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/786555
850 13:28:29.245861 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/786555
851 13:28:29.246476 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.