Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 16:13:59.469214 lava-dispatcher, installed at version: 2024.01
2 16:13:59.470101 start: 0 validate
3 16:13:59.470591 Start time: 2024-11-11 16:13:59.470559+00:00 (UTC)
4 16:13:59.471438 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 16:13:59.472039 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 16:13:59.525191 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 16:13:59.525774 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fnext%2Frenesas-next-2024-11-11-v6.12-rc1%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 16:13:59.562357 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 16:13:59.562988 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fnext%2Frenesas-next-2024-11-11-v6.12-rc1%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 16:13:59.603804 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 16:13:59.604405 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 16:13:59.644601 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 16:13:59.645119 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fnext%2Frenesas-next-2024-11-11-v6.12-rc1%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 16:13:59.682598 validate duration: 0.21
16 16:13:59.683500 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 16:13:59.683916 start: 1.1 download-retry (timeout 00:10:00) [common]
18 16:13:59.684419 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 16:13:59.685278 Not decompressing ramdisk as can be used compressed.
20 16:13:59.686214 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 16:13:59.686563 saving as /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/ramdisk/initrd.cpio.gz
22 16:13:59.686874 total size: 5628182 (5 MB)
23 16:13:59.733112 progress 0 % (0 MB)
24 16:13:59.741474 progress 5 % (0 MB)
25 16:13:59.749990 progress 10 % (0 MB)
26 16:13:59.755047 progress 15 % (0 MB)
27 16:13:59.759579 progress 20 % (1 MB)
28 16:13:59.763739 progress 25 % (1 MB)
29 16:13:59.768143 progress 30 % (1 MB)
30 16:13:59.772693 progress 35 % (1 MB)
31 16:13:59.776765 progress 40 % (2 MB)
32 16:13:59.781492 progress 45 % (2 MB)
33 16:13:59.785503 progress 50 % (2 MB)
34 16:13:59.790031 progress 55 % (2 MB)
35 16:13:59.794568 progress 60 % (3 MB)
36 16:13:59.798562 progress 65 % (3 MB)
37 16:13:59.802760 progress 70 % (3 MB)
38 16:13:59.806689 progress 75 % (4 MB)
39 16:13:59.811153 progress 80 % (4 MB)
40 16:13:59.815009 progress 85 % (4 MB)
41 16:13:59.819254 progress 90 % (4 MB)
42 16:13:59.823562 progress 95 % (5 MB)
43 16:13:59.827031 progress 100 % (5 MB)
44 16:13:59.827700 5 MB downloaded in 0.14 s (38.12 MB/s)
45 16:13:59.828293 end: 1.1.1 http-download (duration 00:00:00) [common]
47 16:13:59.829194 end: 1.1 download-retry (duration 00:00:00) [common]
48 16:13:59.829492 start: 1.2 download-retry (timeout 00:10:00) [common]
49 16:13:59.829764 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 16:13:59.830357 downloading http://storage.kernelci.org/renesas/next/renesas-next-2024-11-11-v6.12-rc1/arm64/defconfig/gcc-12/kernel/Image
51 16:13:59.830628 saving as /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/kernel/Image
52 16:13:59.830847 total size: 45713920 (43 MB)
53 16:13:59.831065 No compression specified
54 16:13:59.869016 progress 0 % (0 MB)
55 16:13:59.900074 progress 5 % (2 MB)
56 16:13:59.929430 progress 10 % (4 MB)
57 16:13:59.959389 progress 15 % (6 MB)
58 16:13:59.989332 progress 20 % (8 MB)
59 16:14:00.018676 progress 25 % (10 MB)
60 16:14:00.048669 progress 30 % (13 MB)
61 16:14:00.078257 progress 35 % (15 MB)
62 16:14:00.108382 progress 40 % (17 MB)
63 16:14:00.137640 progress 45 % (19 MB)
64 16:14:00.166850 progress 50 % (21 MB)
65 16:14:00.196912 progress 55 % (24 MB)
66 16:14:00.226705 progress 60 % (26 MB)
67 16:14:00.256241 progress 65 % (28 MB)
68 16:14:00.285912 progress 70 % (30 MB)
69 16:14:00.315826 progress 75 % (32 MB)
70 16:14:00.345600 progress 80 % (34 MB)
71 16:14:00.374960 progress 85 % (37 MB)
72 16:14:00.405301 progress 90 % (39 MB)
73 16:14:00.435356 progress 95 % (41 MB)
74 16:14:00.464403 progress 100 % (43 MB)
75 16:14:00.464942 43 MB downloaded in 0.63 s (68.75 MB/s)
76 16:14:00.465433 end: 1.2.1 http-download (duration 00:00:01) [common]
78 16:14:00.466288 end: 1.2 download-retry (duration 00:00:01) [common]
79 16:14:00.466584 start: 1.3 download-retry (timeout 00:09:59) [common]
80 16:14:00.466868 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 16:14:00.467366 downloading http://storage.kernelci.org/renesas/next/renesas-next-2024-11-11-v6.12-rc1/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 16:14:00.467624 saving as /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 16:14:00.467843 total size: 53209 (0 MB)
84 16:14:00.468090 No compression specified
85 16:14:00.504136 progress 61 % (0 MB)
86 16:14:00.505020 progress 100 % (0 MB)
87 16:14:00.505583 0 MB downloaded in 0.04 s (1.34 MB/s)
88 16:14:00.506049 end: 1.3.1 http-download (duration 00:00:00) [common]
90 16:14:00.506862 end: 1.3 download-retry (duration 00:00:00) [common]
91 16:14:00.507124 start: 1.4 download-retry (timeout 00:09:59) [common]
92 16:14:00.507390 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 16:14:00.507860 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 16:14:00.508139 saving as /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/nfsrootfs/full.rootfs.tar
95 16:14:00.508373 total size: 107552908 (102 MB)
96 16:14:00.508603 Using unxz to decompress xz
97 16:14:00.549637 progress 0 % (0 MB)
98 16:14:01.206226 progress 5 % (5 MB)
99 16:14:01.934677 progress 10 % (10 MB)
100 16:14:02.660574 progress 15 % (15 MB)
101 16:14:03.416717 progress 20 % (20 MB)
102 16:14:03.988898 progress 25 % (25 MB)
103 16:14:04.606815 progress 30 % (30 MB)
104 16:14:05.352826 progress 35 % (35 MB)
105 16:14:05.700209 progress 40 % (41 MB)
106 16:14:06.126181 progress 45 % (46 MB)
107 16:14:06.822586 progress 50 % (51 MB)
108 16:14:07.513131 progress 55 % (56 MB)
109 16:14:08.272106 progress 60 % (61 MB)
110 16:14:09.034478 progress 65 % (66 MB)
111 16:14:09.774667 progress 70 % (71 MB)
112 16:14:10.549822 progress 75 % (76 MB)
113 16:14:11.232157 progress 80 % (82 MB)
114 16:14:11.946042 progress 85 % (87 MB)
115 16:14:12.690328 progress 90 % (92 MB)
116 16:14:13.411935 progress 95 % (97 MB)
117 16:14:14.161410 progress 100 % (102 MB)
118 16:14:14.174595 102 MB downloaded in 13.67 s (7.51 MB/s)
119 16:14:14.175303 end: 1.4.1 http-download (duration 00:00:14) [common]
121 16:14:14.177003 end: 1.4 download-retry (duration 00:00:14) [common]
122 16:14:14.177539 start: 1.5 download-retry (timeout 00:09:46) [common]
123 16:14:14.178063 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 16:14:14.178872 downloading http://storage.kernelci.org/renesas/next/renesas-next-2024-11-11-v6.12-rc1/arm64/defconfig/gcc-12/modules.tar.xz
125 16:14:14.179342 saving as /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/modules/modules.tar
126 16:14:14.179754 total size: 11608784 (11 MB)
127 16:14:14.180221 Using unxz to decompress xz
128 16:14:14.223252 progress 0 % (0 MB)
129 16:14:14.292917 progress 5 % (0 MB)
130 16:14:14.369764 progress 10 % (1 MB)
131 16:14:14.469569 progress 15 % (1 MB)
132 16:14:14.562474 progress 20 % (2 MB)
133 16:14:14.642056 progress 25 % (2 MB)
134 16:14:14.718222 progress 30 % (3 MB)
135 16:14:14.793273 progress 35 % (3 MB)
136 16:14:14.870948 progress 40 % (4 MB)
137 16:14:14.947125 progress 45 % (5 MB)
138 16:14:15.033372 progress 50 % (5 MB)
139 16:14:15.111575 progress 55 % (6 MB)
140 16:14:15.197497 progress 60 % (6 MB)
141 16:14:15.278289 progress 65 % (7 MB)
142 16:14:15.355867 progress 70 % (7 MB)
143 16:14:15.439301 progress 75 % (8 MB)
144 16:14:15.524032 progress 80 % (8 MB)
145 16:14:15.604784 progress 85 % (9 MB)
146 16:14:15.684073 progress 90 % (9 MB)
147 16:14:15.763580 progress 95 % (10 MB)
148 16:14:15.842165 progress 100 % (11 MB)
149 16:14:15.854673 11 MB downloaded in 1.67 s (6.61 MB/s)
150 16:14:15.855260 end: 1.5.1 http-download (duration 00:00:02) [common]
152 16:14:15.856272 end: 1.5 download-retry (duration 00:00:02) [common]
153 16:14:15.856853 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 16:14:15.857450 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 16:14:26.398441 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/975468/extract-nfsrootfs-j81qoajd
156 16:14:26.399223 end: 1.6.1 extract-nfsrootfs (duration 00:00:11) [common]
157 16:14:26.399601 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 16:14:26.400428 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g
159 16:14:26.401064 makedir: /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin
160 16:14:26.401525 makedir: /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/tests
161 16:14:26.402077 makedir: /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/results
162 16:14:26.402768 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-add-keys
163 16:14:26.403594 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-add-sources
164 16:14:26.404397 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-background-process-start
165 16:14:26.405147 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-background-process-stop
166 16:14:26.405906 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-common-functions
167 16:14:26.406638 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-echo-ipv4
168 16:14:26.407327 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-install-packages
169 16:14:26.408067 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-installed-packages
170 16:14:26.408802 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-os-build
171 16:14:26.409510 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-probe-channel
172 16:14:26.410244 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-probe-ip
173 16:14:26.410946 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-target-ip
174 16:14:26.411603 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-target-mac
175 16:14:26.412354 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-target-storage
176 16:14:26.413110 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-test-case
177 16:14:26.413958 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-test-event
178 16:14:26.414693 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-test-feedback
179 16:14:26.415414 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-test-raise
180 16:14:26.416223 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-test-reference
181 16:14:26.416958 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-test-runner
182 16:14:26.417638 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-test-set
183 16:14:26.418311 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-test-shell
184 16:14:26.419002 Updating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-install-packages (oe)
185 16:14:26.419757 Updating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/bin/lava-installed-packages (oe)
186 16:14:26.420534 Creating /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/environment
187 16:14:26.421124 LAVA metadata
188 16:14:26.421488 - LAVA_JOB_ID=975468
189 16:14:26.421759 - LAVA_DISPATCHER_IP=192.168.6.2
190 16:14:26.422265 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 16:14:26.423631 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 16:14:26.424136 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 16:14:26.424412 skipped lava-vland-overlay
194 16:14:26.424720 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 16:14:26.425048 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 16:14:26.425323 skipped lava-multinode-overlay
197 16:14:26.425635 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 16:14:26.425942 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 16:14:26.426266 Loading test definitions
200 16:14:26.426620 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 16:14:26.426901 Using /lava-975468 at stage 0
202 16:14:26.428598 uuid=975468_1.6.2.4.1 testdef=None
203 16:14:26.429092 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 16:14:26.429436 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 16:14:26.431909 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 16:14:26.433014 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 16:14:26.436190 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 16:14:26.437320 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 16:14:26.440359 runner path: /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/0/tests/0_dmesg test_uuid 975468_1.6.2.4.1
212 16:14:26.441314 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 16:14:26.442320 Creating lava-test-runner.conf files
215 16:14:26.442573 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/975468/lava-overlay-yj3fzm3g/lava-975468/0 for stage 0
216 16:14:26.443049 - 0_dmesg
217 16:14:26.443547 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 16:14:26.443933 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 16:14:26.472528 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 16:14:26.473110 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 16:14:26.473452 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 16:14:26.473801 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 16:14:26.474134 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 16:14:27.244109 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 16:14:27.244642 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 16:14:27.244940 extracting modules file /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/975468/extract-nfsrootfs-j81qoajd
227 16:14:28.643244 extracting modules file /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/975468/extract-overlay-ramdisk-03p0yl63/ramdisk
228 16:14:30.071648 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 16:14:30.072147 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 16:14:30.072426 [common] Applying overlay to NFS
231 16:14:30.072642 [common] Applying overlay /var/lib/lava/dispatcher/tmp/975468/compress-overlay-exq5ybqw/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/975468/extract-nfsrootfs-j81qoajd
232 16:14:30.102044 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 16:14:30.102470 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 16:14:30.102745 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 16:14:30.102976 Converting downloaded kernel to a uImage
236 16:14:30.103284 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/kernel/Image /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/kernel/uImage
237 16:14:30.633326 output: Image Name:
238 16:14:30.633751 output: Created: Mon Nov 11 16:14:30 2024
239 16:14:30.633960 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 16:14:30.634166 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 16:14:30.634366 output: Load Address: 01080000
242 16:14:30.634587 output: Entry Point: 01080000
243 16:14:30.634787 output:
244 16:14:30.635122 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 16:14:30.635385 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 16:14:30.635655 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 16:14:30.635909 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 16:14:30.636213 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 16:14:30.636475 Building ramdisk /var/lib/lava/dispatcher/tmp/975468/extract-overlay-ramdisk-03p0yl63/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/975468/extract-overlay-ramdisk-03p0yl63/ramdisk
250 16:14:33.000201 >> 166783 blocks
251 16:14:40.838492 Adding RAMdisk u-boot header.
252 16:14:40.839207 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/975468/extract-overlay-ramdisk-03p0yl63/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/975468/extract-overlay-ramdisk-03p0yl63/ramdisk.cpio.gz.uboot
253 16:14:41.089847 output: Image Name:
254 16:14:41.090315 output: Created: Mon Nov 11 16:14:40 2024
255 16:14:41.090772 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 16:14:41.091198 output: Data Size: 23429537 Bytes = 22880.41 KiB = 22.34 MiB
257 16:14:41.091630 output: Load Address: 00000000
258 16:14:41.092078 output: Entry Point: 00000000
259 16:14:41.092493 output:
260 16:14:41.093528 rename /var/lib/lava/dispatcher/tmp/975468/extract-overlay-ramdisk-03p0yl63/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/ramdisk/ramdisk.cpio.gz.uboot
261 16:14:41.094252 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 16:14:41.094815 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 16:14:41.095410 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 16:14:41.095880 No LXC device requested
265 16:14:41.096435 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 16:14:41.096965 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 16:14:41.097476 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 16:14:41.097896 Checking files for TFTP limit of 4294967296 bytes.
269 16:14:41.100657 end: 1 tftp-deploy (duration 00:00:41) [common]
270 16:14:41.101262 start: 2 uboot-action (timeout 00:05:00) [common]
271 16:14:41.101808 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 16:14:41.102324 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 16:14:41.102839 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 16:14:41.103382 Using kernel file from prepare-kernel: 975468/tftp-deploy-tiv8xdi7/kernel/uImage
275 16:14:41.104051 substitutions:
276 16:14:41.104480 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 16:14:41.104893 - {DTB_ADDR}: 0x01070000
278 16:14:41.105296 - {DTB}: 975468/tftp-deploy-tiv8xdi7/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 16:14:41.105700 - {INITRD}: 975468/tftp-deploy-tiv8xdi7/ramdisk/ramdisk.cpio.gz.uboot
280 16:14:41.106099 - {KERNEL_ADDR}: 0x01080000
281 16:14:41.106497 - {KERNEL}: 975468/tftp-deploy-tiv8xdi7/kernel/uImage
282 16:14:41.106891 - {LAVA_MAC}: None
283 16:14:41.107331 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/975468/extract-nfsrootfs-j81qoajd
284 16:14:41.107735 - {NFS_SERVER_IP}: 192.168.6.2
285 16:14:41.108211 - {PRESEED_CONFIG}: None
286 16:14:41.108619 - {PRESEED_LOCAL}: None
287 16:14:41.109020 - {RAMDISK_ADDR}: 0x08000000
288 16:14:41.109414 - {RAMDISK}: 975468/tftp-deploy-tiv8xdi7/ramdisk/ramdisk.cpio.gz.uboot
289 16:14:41.109812 - {ROOT_PART}: None
290 16:14:41.110211 - {ROOT}: None
291 16:14:41.110608 - {SERVER_IP}: 192.168.6.2
292 16:14:41.111002 - {TEE_ADDR}: 0x83000000
293 16:14:41.111395 - {TEE}: None
294 16:14:41.111793 Parsed boot commands:
295 16:14:41.112210 - setenv autoload no
296 16:14:41.112612 - setenv initrd_high 0xffffffff
297 16:14:41.113010 - setenv fdt_high 0xffffffff
298 16:14:41.113405 - dhcp
299 16:14:41.113798 - setenv serverip 192.168.6.2
300 16:14:41.114193 - tftpboot 0x01080000 975468/tftp-deploy-tiv8xdi7/kernel/uImage
301 16:14:41.114585 - tftpboot 0x08000000 975468/tftp-deploy-tiv8xdi7/ramdisk/ramdisk.cpio.gz.uboot
302 16:14:41.114981 - tftpboot 0x01070000 975468/tftp-deploy-tiv8xdi7/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 16:14:41.115376 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/975468/extract-nfsrootfs-j81qoajd,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 16:14:41.115789 - bootm 0x01080000 0x08000000 0x01070000
305 16:14:41.116348 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 16:14:41.117861 start: 2.3 connect-device (timeout 00:05:00) [common]
308 16:14:41.118295 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 16:14:41.133350 Setting prompt string to ['lava-test: # ']
310 16:14:41.134913 end: 2.3 connect-device (duration 00:00:00) [common]
311 16:14:41.135544 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 16:14:41.136147 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 16:14:41.136717 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 16:14:41.137858 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 16:14:41.174877 >> OK - accepted request
316 16:14:41.177287 Returned 0 in 0 seconds
317 16:14:41.278435 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 16:14:41.280154 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 16:14:41.280777 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 16:14:41.281323 Setting prompt string to ['Hit any key to stop autoboot']
322 16:14:41.281810 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 16:14:41.283406 Trying 192.168.56.21...
324 16:14:41.283888 Connected to conserv1.
325 16:14:41.284369 Escape character is '^]'.
326 16:14:41.284801
327 16:14:41.285229 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 16:14:41.285663
329 16:14:49.343268 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 16:14:49.343743 bl2_stage_init 0x01
331 16:14:49.344013 bl2_stage_init 0x81
332 16:14:49.348920 hw id: 0x0000 - pwm id 0x01
333 16:14:49.349280 bl2_stage_init 0xc1
334 16:14:49.349523 bl2_stage_init 0x02
335 16:14:49.349751
336 16:14:49.355601 L0:00000000
337 16:14:49.356293 L1:00000703
338 16:14:49.356830 L2:00008067
339 16:14:49.357360 L3:15000000
340 16:14:49.357885 S1:00000000
341 16:14:49.359929 B2:20282000
342 16:14:49.360502 B1:a0f83180
343 16:14:49.360966
344 16:14:49.361425 TE: 69040
345 16:14:49.361875
346 16:14:49.365546 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 16:14:49.366060
348 16:14:49.371192 Board ID = 1
349 16:14:49.371712 Set cpu clk to 24M
350 16:14:49.372213 Set clk81 to 24M
351 16:14:49.376873 Use GP1_pll as DSU clk.
352 16:14:49.377426 DSU clk: 1200 Mhz
353 16:14:49.377889 CPU clk: 1200 MHz
354 16:14:49.378335 Set clk81 to 166.6M
355 16:14:49.387955 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 16:14:49.388526 board id: 1
357 16:14:49.393700 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 16:14:49.404833 fw parse done
359 16:14:49.410754 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 16:14:49.452667 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 16:14:49.464434 PIEI prepare done
362 16:14:49.464981 fastboot data load
363 16:14:49.465448 fastboot data verify
364 16:14:49.470135 verify result: 266
365 16:14:49.475569 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 16:14:49.476141 LPDDR4 probe
367 16:14:49.476602 ddr clk to 1584MHz
368 16:14:49.483594 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 16:14:49.520925
370 16:14:49.521528 dmc_version 0001
371 16:14:49.527545 Check phy result
372 16:14:49.533463 INFO : End of CA training
373 16:14:49.534030 INFO : End of initialization
374 16:14:49.539195 INFO : Training has run successfully!
375 16:14:49.539721 Check phy result
376 16:14:49.544643 INFO : End of initialization
377 16:14:49.545167 INFO : End of read enable training
378 16:14:49.550236 INFO : End of fine write leveling
379 16:14:49.555818 INFO : End of Write leveling coarse delay
380 16:14:49.556373 INFO : Training has run successfully!
381 16:14:49.556831 Check phy result
382 16:14:49.561451 INFO : End of initialization
383 16:14:49.561994 INFO : End of read dq deskew training
384 16:14:49.567140 INFO : End of MPR read delay center optimization
385 16:14:49.572604 INFO : End of write delay center optimization
386 16:14:49.578246 INFO : End of read delay center optimization
387 16:14:49.578781 INFO : End of max read latency training
388 16:14:49.583840 INFO : Training has run successfully!
389 16:14:49.584405 1D training succeed
390 16:14:49.592949 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 16:14:49.640566 Check phy result
392 16:14:49.640974 INFO : End of initialization
393 16:14:49.662915 INFO : End of 2D read delay Voltage center optimization
394 16:14:49.682248 INFO : End of 2D read delay Voltage center optimization
395 16:14:49.734188 INFO : End of 2D write delay Voltage center optimization
396 16:14:49.783289 INFO : End of 2D write delay Voltage center optimization
397 16:14:49.788681 INFO : Training has run successfully!
398 16:14:49.789144
399 16:14:49.789555 channel==0
400 16:14:49.794246 RxClkDly_Margin_A0==88 ps 9
401 16:14:49.794695 TxDqDly_Margin_A0==98 ps 10
402 16:14:49.799832 RxClkDly_Margin_A1==78 ps 8
403 16:14:49.800325 TxDqDly_Margin_A1==98 ps 10
404 16:14:49.800735 TrainedVREFDQ_A0==74
405 16:14:49.805486 TrainedVREFDQ_A1==75
406 16:14:49.805932 VrefDac_Margin_A0==22
407 16:14:49.806328 DeviceVref_Margin_A0==40
408 16:14:49.811189 VrefDac_Margin_A1==22
409 16:14:49.811625 DeviceVref_Margin_A1==39
410 16:14:49.812043
411 16:14:49.812442
412 16:14:49.816662 channel==1
413 16:14:49.817129 RxClkDly_Margin_A0==78 ps 8
414 16:14:49.817535 TxDqDly_Margin_A0==98 ps 10
415 16:14:49.822282 RxClkDly_Margin_A1==78 ps 8
416 16:14:49.822706 TxDqDly_Margin_A1==88 ps 9
417 16:14:49.827925 TrainedVREFDQ_A0==78
418 16:14:49.828392 TrainedVREFDQ_A1==78
419 16:14:49.828790 VrefDac_Margin_A0==22
420 16:14:49.833450 DeviceVref_Margin_A0==36
421 16:14:49.833879 VrefDac_Margin_A1==22
422 16:14:49.839260 DeviceVref_Margin_A1==36
423 16:14:49.839688
424 16:14:49.840109 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 16:14:49.840507
426 16:14:49.872693 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
427 16:14:49.873250 2D training succeed
428 16:14:49.878330 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 16:14:49.883929 auto size-- 65535DDR cs0 size: 2048MB
430 16:14:49.884404 DDR cs1 size: 2048MB
431 16:14:49.889442 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 16:14:49.889879 cs0 DataBus test pass
433 16:14:49.895052 cs1 DataBus test pass
434 16:14:49.895478 cs0 AddrBus test pass
435 16:14:49.895872 cs1 AddrBus test pass
436 16:14:49.896311
437 16:14:49.900521 100bdlr_step_size ps== 478
438 16:14:49.900952 result report
439 16:14:49.906251 boot times 0Enable ddr reg access
440 16:14:49.911520 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 16:14:49.925040 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 16:14:50.580491 bl2z: ptr: 05129330, size: 00001e40
443 16:14:50.587331 0.0;M3 CHK:0;cm4_sp_mode 0
444 16:14:50.587826 MVN_1=0x00000000
445 16:14:50.588290 MVN_2=0x00000000
446 16:14:50.598782 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 16:14:50.599288 OPS=0x04
448 16:14:50.599727 ring efuse init
449 16:14:50.604343 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 16:14:50.604788 [0.017319 Inits done]
451 16:14:50.605196 secure task start!
452 16:14:50.612441 high task start!
453 16:14:50.612890 low task start!
454 16:14:50.613299 run into bl31
455 16:14:50.621155 NOTICE: BL31: v1.3(release):4fc40b1
456 16:14:50.628905 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 16:14:50.629361 NOTICE: BL31: G12A normal boot!
458 16:14:50.644341 NOTICE: BL31: BL33 decompress pass
459 16:14:50.649867 ERROR: Error initializing runtime service opteed_fast
460 16:14:53.393988 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 16:14:53.394411 bl2_stage_init 0x01
462 16:14:53.394638 bl2_stage_init 0x81
463 16:14:53.399538 hw id: 0x0000 - pwm id 0x01
464 16:14:53.399858 bl2_stage_init 0xc1
465 16:14:53.403806 bl2_stage_init 0x02
466 16:14:53.404083
467 16:14:53.404290 L0:00000000
468 16:14:53.404488 L1:00000703
469 16:14:53.404686 L2:00008067
470 16:14:53.409496 L3:15000000
471 16:14:53.409712 S1:00000000
472 16:14:53.409910 B2:20282000
473 16:14:53.410104 B1:a0f83180
474 16:14:53.410296
475 16:14:53.410489 TE: 71023
476 16:14:53.415126
477 16:14:53.420664 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 16:14:53.421091
479 16:14:53.421482 Board ID = 1
480 16:14:53.421864 Set cpu clk to 24M
481 16:14:53.422248 Set clk81 to 24M
482 16:14:53.426264 Use GP1_pll as DSU clk.
483 16:14:53.426722 DSU clk: 1200 Mhz
484 16:14:53.427114 CPU clk: 1200 MHz
485 16:14:53.431823 Set clk81 to 166.6M
486 16:14:53.437422 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 16:14:53.437854 board id: 1
488 16:14:53.444994 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 16:14:53.456633 fw parse done
490 16:14:53.461696 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 16:14:53.505256 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 16:14:53.516158 PIEI prepare done
493 16:14:53.516587 fastboot data load
494 16:14:53.516980 fastboot data verify
495 16:14:53.521721 verify result: 266
496 16:14:53.527298 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 16:14:53.527715 LPDDR4 probe
498 16:14:53.528143 ddr clk to 1584MHz
499 16:14:53.535276 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 16:14:53.572582
501 16:14:53.573059 dmc_version 0001
502 16:14:53.579244 Check phy result
503 16:14:53.585143 INFO : End of CA training
504 16:14:53.585596 INFO : End of initialization
505 16:14:53.590723 INFO : Training has run successfully!
506 16:14:53.591151 Check phy result
507 16:14:53.596374 INFO : End of initialization
508 16:14:53.596803 INFO : End of read enable training
509 16:14:53.599618 INFO : End of fine write leveling
510 16:14:53.605234 INFO : End of Write leveling coarse delay
511 16:14:53.610767 INFO : Training has run successfully!
512 16:14:53.611241 Check phy result
513 16:14:53.611652 INFO : End of initialization
514 16:14:53.616374 INFO : End of read dq deskew training
515 16:14:53.621977 INFO : End of MPR read delay center optimization
516 16:14:53.622413 INFO : End of write delay center optimization
517 16:14:53.627636 INFO : End of read delay center optimization
518 16:14:53.633152 INFO : End of max read latency training
519 16:14:53.633578 INFO : Training has run successfully!
520 16:14:53.638749 1D training succeed
521 16:14:53.644721 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 16:14:53.692367 Check phy result
523 16:14:53.692856 INFO : End of initialization
524 16:14:53.714708 INFO : End of 2D read delay Voltage center optimization
525 16:14:53.733794 INFO : End of 2D read delay Voltage center optimization
526 16:14:53.785742 INFO : End of 2D write delay Voltage center optimization
527 16:14:53.834866 INFO : End of 2D write delay Voltage center optimization
528 16:14:53.840419 INFO : Training has run successfully!
529 16:14:53.840855
530 16:14:53.841264 channel==0
531 16:14:53.846016 RxClkDly_Margin_A0==78 ps 8
532 16:14:53.846441 TxDqDly_Margin_A0==98 ps 10
533 16:14:53.851661 RxClkDly_Margin_A1==78 ps 8
534 16:14:53.852152 TxDqDly_Margin_A1==98 ps 10
535 16:14:53.852568 TrainedVREFDQ_A0==75
536 16:14:53.857282 TrainedVREFDQ_A1==75
537 16:14:53.857733 VrefDac_Margin_A0==24
538 16:14:53.858143 DeviceVref_Margin_A0==39
539 16:14:53.862833 VrefDac_Margin_A1==22
540 16:14:53.863261 DeviceVref_Margin_A1==39
541 16:14:53.863661
542 16:14:53.864093
543 16:14:53.868421 channel==1
544 16:14:53.868849 RxClkDly_Margin_A0==88 ps 9
545 16:14:53.869257 TxDqDly_Margin_A0==98 ps 10
546 16:14:53.874041 RxClkDly_Margin_A1==88 ps 9
547 16:14:53.874466 TxDqDly_Margin_A1==78 ps 8
548 16:14:53.879647 TrainedVREFDQ_A0==78
549 16:14:53.880095 TrainedVREFDQ_A1==75
550 16:14:53.880500 VrefDac_Margin_A0==22
551 16:14:53.885288 DeviceVref_Margin_A0==36
552 16:14:53.885712 VrefDac_Margin_A1==22
553 16:14:53.890825 DeviceVref_Margin_A1==39
554 16:14:53.891247
555 16:14:53.891647 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 16:14:53.892074
557 16:14:53.924437 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 16:14:53.924926 2D training succeed
559 16:14:53.930021 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 16:14:53.935656 auto size-- 65535DDR cs0 size: 2048MB
561 16:14:53.936106 DDR cs1 size: 2048MB
562 16:14:53.941274 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 16:14:53.941695 cs0 DataBus test pass
564 16:14:53.946832 cs1 DataBus test pass
565 16:14:53.947259 cs0 AddrBus test pass
566 16:14:53.947661 cs1 AddrBus test pass
567 16:14:53.948082
568 16:14:53.952421 100bdlr_step_size ps== 478
569 16:14:53.952857 result report
570 16:14:53.958044 boot times 0Enable ddr reg access
571 16:14:53.963352 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 16:14:53.977114 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 16:14:54.632560 bl2z: ptr: 05129330, size: 00001e40
574 16:14:54.640915 0.0;M3 CHK:0;cm4_sp_mode 0
575 16:14:54.641396 MVN_1=0x00000000
576 16:14:54.641829 MVN_2=0x00000000
577 16:14:54.652418 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 16:14:54.652869 OPS=0x04
579 16:14:54.653281 ring efuse init
580 16:14:54.657995 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 16:14:54.658433 [0.017319 Inits done]
582 16:14:54.658837 secure task start!
583 16:14:54.665480 high task start!
584 16:14:54.665911 low task start!
585 16:14:54.666317 run into bl31
586 16:14:54.674073 NOTICE: BL31: v1.3(release):4fc40b1
587 16:14:54.682013 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 16:14:54.682453 NOTICE: BL31: G12A normal boot!
589 16:14:54.697481 NOTICE: BL31: BL33 decompress pass
590 16:14:54.703039 ERROR: Error initializing runtime service opteed_fast
591 16:14:56.091596 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 16:14:56.092235 bl2_stage_init 0x01
593 16:14:56.092667 bl2_stage_init 0x81
594 16:14:56.097168 hw id: 0x0000 - pwm id 0x01
595 16:14:56.097613 bl2_stage_init 0xc1
596 16:14:56.102727 bl2_stage_init 0x02
597 16:14:56.103167
598 16:14:56.103579 L0:00000000
599 16:14:56.104009 L1:00000703
600 16:14:56.104417 L2:00008067
601 16:14:56.104817 L3:15000000
602 16:14:56.108326 S1:00000000
603 16:14:56.108757 B2:20282000
604 16:14:56.109158 B1:a0f83180
605 16:14:56.109554
606 16:14:56.109946 TE: 68102
607 16:14:56.110342
608 16:14:56.114057 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 16:14:56.114501
610 16:14:56.119514 Board ID = 1
611 16:14:56.119946 Set cpu clk to 24M
612 16:14:56.120378 Set clk81 to 24M
613 16:14:56.125126 Use GP1_pll as DSU clk.
614 16:14:56.125565 DSU clk: 1200 Mhz
615 16:14:56.125974 CPU clk: 1200 MHz
616 16:14:56.130745 Set clk81 to 166.6M
617 16:14:56.136247 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 16:14:56.136678 board id: 1
619 16:14:56.143531 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 16:14:56.154410 fw parse done
621 16:14:56.160374 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 16:14:56.202795 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 16:14:56.215373 PIEI prepare done
624 16:14:56.216115 fastboot data load
625 16:14:56.216622 fastboot data verify
626 16:14:56.220814 verify result: 266
627 16:14:56.226355 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 16:14:56.226888 LPDDR4 probe
629 16:14:56.227349 ddr clk to 1584MHz
630 16:14:56.234645 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 16:14:56.272020
632 16:14:56.272630 dmc_version 0001
633 16:14:56.278644 Check phy result
634 16:14:56.284664 INFO : End of CA training
635 16:14:56.285200 INFO : End of initialization
636 16:14:56.290464 INFO : Training has run successfully!
637 16:14:56.290984 Check phy result
638 16:14:56.295735 INFO : End of initialization
639 16:14:56.296289 INFO : End of read enable training
640 16:14:56.301409 INFO : End of fine write leveling
641 16:14:56.307273 INFO : End of Write leveling coarse delay
642 16:14:56.307913 INFO : Training has run successfully!
643 16:14:56.308450 Check phy result
644 16:14:56.312649 INFO : End of initialization
645 16:14:56.313274 INFO : End of read dq deskew training
646 16:14:56.318234 INFO : End of MPR read delay center optimization
647 16:14:56.323754 INFO : End of write delay center optimization
648 16:14:56.329428 INFO : End of read delay center optimization
649 16:14:56.329999 INFO : End of max read latency training
650 16:14:56.335136 INFO : Training has run successfully!
651 16:14:56.335669 1D training succeed
652 16:14:56.344272 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 16:14:56.392559 Check phy result
654 16:14:56.393230 INFO : End of initialization
655 16:14:56.419227 INFO : End of 2D read delay Voltage center optimization
656 16:14:56.444235 INFO : End of 2D read delay Voltage center optimization
657 16:14:56.503469 INFO : End of 2D write delay Voltage center optimization
658 16:14:56.554743 INFO : End of 2D write delay Voltage center optimization
659 16:14:56.560740 INFO : Training has run successfully!
660 16:14:56.561346
661 16:14:56.561818 channel==0
662 16:14:56.565986 RxClkDly_Margin_A0==78 ps 8
663 16:14:56.566475 TxDqDly_Margin_A0==88 ps 9
664 16:14:56.569175 RxClkDly_Margin_A1==69 ps 7
665 16:14:56.569655 TxDqDly_Margin_A1==88 ps 9
666 16:14:56.574747 TrainedVREFDQ_A0==74
667 16:14:56.575228 TrainedVREFDQ_A1==75
668 16:14:56.575685 VrefDac_Margin_A0==23
669 16:14:56.580430 DeviceVref_Margin_A0==40
670 16:14:56.580915 VrefDac_Margin_A1==22
671 16:14:56.585919 DeviceVref_Margin_A1==39
672 16:14:56.586398
673 16:14:56.586850
674 16:14:56.587297 channel==1
675 16:14:56.587737 RxClkDly_Margin_A0==78 ps 8
676 16:14:56.591513 TxDqDly_Margin_A0==98 ps 10
677 16:14:56.592036 RxClkDly_Margin_A1==78 ps 8
678 16:14:56.597157 TxDqDly_Margin_A1==88 ps 9
679 16:14:56.597642 TrainedVREFDQ_A0==78
680 16:14:56.598094 TrainedVREFDQ_A1==78
681 16:14:56.602761 VrefDac_Margin_A0==22
682 16:14:56.603238 DeviceVref_Margin_A0==36
683 16:14:56.603696 VrefDac_Margin_A1==22
684 16:14:56.608318 DeviceVref_Margin_A1==36
685 16:14:56.608798
686 16:14:56.613938 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 16:14:56.614417
688 16:14:56.641943 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 16:14:56.647506 2D training succeed
690 16:14:56.653268 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 16:14:56.653755 auto size-- 65535DDR cs0 size: 2048MB
692 16:14:56.658751 DDR cs1 size: 2048MB
693 16:14:56.659248 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 16:14:56.664364 cs0 DataBus test pass
695 16:14:56.664847 cs1 DataBus test pass
696 16:14:56.665337 cs0 AddrBus test pass
697 16:14:56.670030 cs1 AddrBus test pass
698 16:14:56.670530
699 16:14:56.670985 100bdlr_step_size ps== 471
700 16:14:56.671438 result report
701 16:14:56.675575 boot times 0Enable ddr reg access
702 16:14:56.683125 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 16:14:56.696755 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 16:14:57.356034 bl2z: ptr: 05129330, size: 00001e40
705 16:14:57.364920 0.0;M3 CHK:0;cm4_sp_mode 0
706 16:14:57.365545 MVN_1=0x00000000
707 16:14:57.366023 MVN_2=0x00000000
708 16:14:57.376250 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 16:14:57.376841 OPS=0x04
710 16:14:57.377306 ring efuse init
711 16:14:57.379204 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 16:14:57.385726 [0.017355 Inits done]
713 16:14:57.386229 secure task start!
714 16:14:57.386680 high task start!
715 16:14:57.387119 low task start!
716 16:14:57.389922 run into bl31
717 16:14:57.398587 NOTICE: BL31: v1.3(release):4fc40b1
718 16:14:57.406338 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 16:14:57.406703 NOTICE: BL31: G12A normal boot!
720 16:14:57.421817 NOTICE: BL31: BL33 decompress pass
721 16:14:57.427507 ERROR: Error initializing runtime service opteed_fast
722 16:14:58.223017
723 16:14:58.223626
724 16:14:58.228382 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 16:14:58.228882
726 16:14:58.231893 Model: Libre Computer AML-S905D3-CC Solitude
727 16:14:58.378876 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 16:14:58.394418 DRAM: 2 GiB (effective 3.8 GiB)
729 16:14:58.495386 Core: 406 devices, 33 uclasses, devicetree: separate
730 16:14:58.500300 WDT: Not starting watchdog@f0d0
731 16:14:58.526374 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 16:14:58.538632 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 16:14:58.542519 ** Bad device specification mmc 0 **
734 16:14:58.553524 Card did not respond to voltage select! : -110
735 16:14:58.560540 ** Bad device specification mmc 0 **
736 16:14:58.561119 Couldn't find partition mmc 0
737 16:14:58.569540 Card did not respond to voltage select! : -110
738 16:14:58.575071 ** Bad device specification mmc 0 **
739 16:14:58.575587 Couldn't find partition mmc 0
740 16:14:58.579117 Error: could not access storage.
741 16:14:58.875466 Net: eth0: ethernet@ff3f0000
742 16:14:58.876105 starting USB...
743 16:14:59.121166 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 16:14:59.121772 Starting the controller
745 16:14:59.127233 USB XHCI 1.10
746 16:15:00.682268 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 16:15:00.690642 scanning usb for storage devices... 0 Storage Device(s) found
749 16:15:00.742188 Hit any key to stop autoboot: 1
750 16:15:00.743864 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 16:15:00.744479 start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
752 16:15:00.744846 Setting prompt string to ['=>']
753 16:15:00.745187 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
754 16:15:00.756145 0
755 16:15:00.757158 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 16:15:00.858416 => setenv autoload no
758 16:15:00.859163 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
759 16:15:00.864081 setenv autoload no
761 16:15:00.965620 => setenv initrd_high 0xffffffff
762 16:15:00.966594 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 16:15:00.970939 setenv initrd_high 0xffffffff
765 16:15:01.072502 => setenv fdt_high 0xffffffff
766 16:15:01.073461 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 16:15:01.076735 setenv fdt_high 0xffffffff
769 16:15:01.178235 => dhcp
770 16:15:01.178881 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 16:15:01.181786 dhcp
772 16:15:01.887646 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 16:15:01.888335 Speed: 1000, full duplex
774 16:15:01.888790 BOOTP broadcast 1
775 16:15:02.135729 BOOTP broadcast 2
776 16:15:02.147876 DHCP client bound to address 192.168.6.21 (260 ms)
778 16:15:02.248975 => setenv serverip 192.168.6.2
779 16:15:02.249599 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
780 16:15:02.252847 setenv serverip 192.168.6.2
782 16:15:02.354085 => tftpboot 0x01080000 975468/tftp-deploy-tiv8xdi7/kernel/uImage
783 16:15:02.354869 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
784 16:15:02.361385 tftpboot 0x01080000 975468/tftp-deploy-tiv8xdi7/kernel/uImage
785 16:15:02.361882 Speed: 1000, full duplex
786 16:15:02.362298 Using ethernet@ff3f0000 device
787 16:15:02.366878 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 16:15:02.372571 Filename '975468/tftp-deploy-tiv8xdi7/kernel/uImage'.
789 16:15:02.375882 Load address: 0x1080000
790 16:15:03.698325 Loading: *###################### UDP wrong checksum 000000ff 0000d081
791 16:15:03.738093 # UDP wrong checksum 000000ff 00006074
792 16:15:05.267545 ########################### 43.6 MiB
793 16:15:05.268201 15.1 MiB/s
794 16:15:05.268633 done
795 16:15:05.270926 Bytes transferred = 45713984 (2b98a40 hex)
797 16:15:05.372437 => tftpboot 0x08000000 975468/tftp-deploy-tiv8xdi7/ramdisk/ramdisk.cpio.gz.uboot
798 16:15:05.373209 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
799 16:15:05.379788 tftpboot 0x08000000 975468/tftp-deploy-tiv8xdi7/ramdisk/ramdisk.cpio.gz.uboot
800 16:15:05.380318 Speed: 1000, full duplex
801 16:15:05.380740 Using ethernet@ff3f0000 device
802 16:15:05.385373 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
803 16:15:05.395071 Filename '975468/tftp-deploy-tiv8xdi7/ramdisk/ramdisk.cpio.gz.uboot'.
804 16:15:05.395609 Load address: 0x8000000
805 16:15:06.864940 Loading: *################################################# UDP wrong checksum 00000005 000023c2
806 16:15:08.751379 UDP wrong checksum 000000ff 0000163f
807 16:15:08.758180 UDP wrong checksum 000000ff 00006eba
808 16:15:11.863700 T UDP wrong checksum 00000005 000023c2
809 16:15:21.866841 T T UDP wrong checksum 00000005 000023c2
810 16:15:28.692672 T UDP wrong checksum 000000ff 00006782
811 16:15:28.705670 UDP wrong checksum 000000ff 0000f074
812 16:15:38.575856 T T UDP wrong checksum 000000ff 00005b5c
813 16:15:38.598434 UDP wrong checksum 000000ff 0000f24e
814 16:15:41.867565 UDP wrong checksum 00000005 000023c2
815 16:16:01.874922 T T T T
816 16:16:01.875548 Retry count exceeded; starting again
818 16:16:01.877029 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
821 16:16:01.878852 end: 2.4 uboot-commands (duration 00:01:21) [common]
823 16:16:01.880350 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
825 16:16:01.881426 end: 2 uboot-action (duration 00:01:21) [common]
827 16:16:01.883008 Cleaning after the job
828 16:16:01.883548 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/ramdisk
829 16:16:01.884950 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/kernel
830 16:16:01.893264 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/dtb
831 16:16:01.894743 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/nfsrootfs
832 16:16:01.933719 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/975468/tftp-deploy-tiv8xdi7/modules
833 16:16:01.940331 start: 4.1 power-off (timeout 00:00:30) [common]
834 16:16:01.940946 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
835 16:16:01.977084 >> OK - accepted request
836 16:16:01.979038 Returned 0 in 0 seconds
837 16:16:02.079935 end: 4.1 power-off (duration 00:00:00) [common]
839 16:16:02.081684 start: 4.2 read-feedback (timeout 00:10:00) [common]
840 16:16:02.082793 Listened to connection for namespace 'common' for up to 1s
841 16:16:03.083312 Finalising connection for namespace 'common'
842 16:16:03.084081 Disconnecting from shell: Finalise
843 16:16:03.084603 =>
844 16:16:03.185682 end: 4.2 read-feedback (duration 00:00:01) [common]
845 16:16:03.186405 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/975468
846 16:16:04.875148 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/975468
847 16:16:04.875903 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.