Boot log: meson-g12b-a311d-libretech-cc

    1 19:18:53.185225  lava-dispatcher, installed at version: 2024.01
    2 19:18:53.186029  start: 0 validate
    3 19:18:53.186521  Start time: 2024-11-02 19:18:53.186490+00:00 (UTC)
    4 19:18:53.187057  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 19:18:53.187631  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 19:18:53.233006  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 19:18:53.233555  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc5-639-gfd2a582169fe1%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 19:18:53.262973  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 19:18:53.263598  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc5-639-gfd2a582169fe1%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
   10 19:18:53.296130  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 19:18:53.296636  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 19:18:53.329520  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 19:18:53.330026  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc5-639-gfd2a582169fe1%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 19:18:53.368438  validate duration: 0.18
   16 19:18:53.369310  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 19:18:53.369647  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 19:18:53.369977  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 19:18:53.370578  Not decompressing ramdisk as can be used compressed.
   20 19:18:53.371037  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
   21 19:18:53.371325  saving as /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/ramdisk/initrd.cpio.gz
   22 19:18:53.371606  total size: 5628140 (5 MB)
   23 19:18:53.411440  progress   0 % (0 MB)
   24 19:18:53.415919  progress   5 % (0 MB)
   25 19:18:53.420174  progress  10 % (0 MB)
   26 19:18:53.423997  progress  15 % (0 MB)
   27 19:18:53.428181  progress  20 % (1 MB)
   28 19:18:53.431867  progress  25 % (1 MB)
   29 19:18:53.436093  progress  30 % (1 MB)
   30 19:18:53.440358  progress  35 % (1 MB)
   31 19:18:53.444152  progress  40 % (2 MB)
   32 19:18:53.448353  progress  45 % (2 MB)
   33 19:18:53.452194  progress  50 % (2 MB)
   34 19:18:53.456513  progress  55 % (2 MB)
   35 19:18:53.460765  progress  60 % (3 MB)
   36 19:18:53.464621  progress  65 % (3 MB)
   37 19:18:53.469030  progress  70 % (3 MB)
   38 19:18:53.472864  progress  75 % (4 MB)
   39 19:18:53.477116  progress  80 % (4 MB)
   40 19:18:53.480928  progress  85 % (4 MB)
   41 19:18:53.485184  progress  90 % (4 MB)
   42 19:18:53.489325  progress  95 % (5 MB)
   43 19:18:53.492623  progress 100 % (5 MB)
   44 19:18:53.493275  5 MB downloaded in 0.12 s (44.12 MB/s)
   45 19:18:53.493817  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 19:18:53.494685  end: 1.1 download-retry (duration 00:00:00) [common]
   48 19:18:53.494975  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 19:18:53.495244  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 19:18:53.495712  downloading http://storage.kernelci.org/tip/master/v6.12-rc5-639-gfd2a582169fe1/arm64/defconfig/gcc-12/kernel/Image
   51 19:18:53.495952  saving as /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/kernel/Image
   52 19:18:53.496189  total size: 45713920 (43 MB)
   53 19:18:53.496402  No compression specified
   54 19:18:53.532515  progress   0 % (0 MB)
   55 19:18:53.562186  progress   5 % (2 MB)
   56 19:18:53.592842  progress  10 % (4 MB)
   57 19:18:53.623213  progress  15 % (6 MB)
   58 19:18:53.653449  progress  20 % (8 MB)
   59 19:18:53.684001  progress  25 % (10 MB)
   60 19:18:53.714065  progress  30 % (13 MB)
   61 19:18:53.744684  progress  35 % (15 MB)
   62 19:18:53.775009  progress  40 % (17 MB)
   63 19:18:53.805362  progress  45 % (19 MB)
   64 19:18:53.836208  progress  50 % (21 MB)
   65 19:18:53.866446  progress  55 % (24 MB)
   66 19:18:53.897274  progress  60 % (26 MB)
   67 19:18:53.927071  progress  65 % (28 MB)
   68 19:18:53.957375  progress  70 % (30 MB)
   69 19:18:53.987912  progress  75 % (32 MB)
   70 19:18:54.018358  progress  80 % (34 MB)
   71 19:18:54.048470  progress  85 % (37 MB)
   72 19:18:54.078820  progress  90 % (39 MB)
   73 19:18:54.109408  progress  95 % (41 MB)
   74 19:18:54.139098  progress 100 % (43 MB)
   75 19:18:54.139647  43 MB downloaded in 0.64 s (67.75 MB/s)
   76 19:18:54.140147  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 19:18:54.140962  end: 1.2 download-retry (duration 00:00:01) [common]
   79 19:18:54.141234  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 19:18:54.141496  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 19:18:54.141982  downloading http://storage.kernelci.org/tip/master/v6.12-rc5-639-gfd2a582169fe1/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
   82 19:18:54.142252  saving as /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/dtb/meson-g12b-a311d-libretech-cc.dtb
   83 19:18:54.142459  total size: 54703 (0 MB)
   84 19:18:54.142667  No compression specified
   85 19:18:54.181902  progress  59 % (0 MB)
   86 19:18:54.182756  progress 100 % (0 MB)
   87 19:18:54.183300  0 MB downloaded in 0.04 s (1.28 MB/s)
   88 19:18:54.183758  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 19:18:54.184599  end: 1.3 download-retry (duration 00:00:00) [common]
   91 19:18:54.184859  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 19:18:54.185118  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 19:18:54.185598  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
   94 19:18:54.185843  saving as /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/nfsrootfs/full.rootfs.tar
   95 19:18:54.186046  total size: 474398908 (452 MB)
   96 19:18:54.186255  Using unxz to decompress xz
   97 19:18:54.224094  progress   0 % (0 MB)
   98 19:18:55.319712  progress   5 % (22 MB)
   99 19:18:56.803357  progress  10 % (45 MB)
  100 19:18:57.275221  progress  15 % (67 MB)
  101 19:18:58.145638  progress  20 % (90 MB)
  102 19:18:58.696391  progress  25 % (113 MB)
  103 19:18:59.046051  progress  30 % (135 MB)
  104 19:18:59.661860  progress  35 % (158 MB)
  105 19:19:00.610476  progress  40 % (181 MB)
  106 19:19:01.454542  progress  45 % (203 MB)
  107 19:19:02.023632  progress  50 % (226 MB)
  108 19:19:02.658862  progress  55 % (248 MB)
  109 19:19:03.864494  progress  60 % (271 MB)
  110 19:19:05.311498  progress  65 % (294 MB)
  111 19:19:06.982298  progress  70 % (316 MB)
  112 19:19:10.051380  progress  75 % (339 MB)
  113 19:19:12.510094  progress  80 % (361 MB)
  114 19:19:15.385847  progress  85 % (384 MB)
  115 19:19:18.549418  progress  90 % (407 MB)
  116 19:19:21.721087  progress  95 % (429 MB)
  117 19:19:24.914661  progress 100 % (452 MB)
  118 19:19:24.927470  452 MB downloaded in 30.74 s (14.72 MB/s)
  119 19:19:24.928439  end: 1.4.1 http-download (duration 00:00:31) [common]
  121 19:19:24.930170  end: 1.4 download-retry (duration 00:00:31) [common]
  122 19:19:24.930729  start: 1.5 download-retry (timeout 00:09:28) [common]
  123 19:19:24.931284  start: 1.5.1 http-download (timeout 00:09:28) [common]
  124 19:19:24.932160  downloading http://storage.kernelci.org/tip/master/v6.12-rc5-639-gfd2a582169fe1/arm64/defconfig/gcc-12/modules.tar.xz
  125 19:19:24.932656  saving as /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/modules/modules.tar
  126 19:19:24.933098  total size: 11592672 (11 MB)
  127 19:19:24.933551  Using unxz to decompress xz
  128 19:19:24.981318  progress   0 % (0 MB)
  129 19:19:25.060323  progress   5 % (0 MB)
  130 19:19:25.147470  progress  10 % (1 MB)
  131 19:19:25.240821  progress  15 % (1 MB)
  132 19:19:25.330514  progress  20 % (2 MB)
  133 19:19:25.407489  progress  25 % (2 MB)
  134 19:19:25.486002  progress  30 % (3 MB)
  135 19:19:25.558927  progress  35 % (3 MB)
  136 19:19:25.638103  progress  40 % (4 MB)
  137 19:19:25.721604  progress  45 % (5 MB)
  138 19:19:25.796755  progress  50 % (5 MB)
  139 19:19:25.879424  progress  55 % (6 MB)
  140 19:19:25.959951  progress  60 % (6 MB)
  141 19:19:26.038025  progress  65 % (7 MB)
  142 19:19:26.118203  progress  70 % (7 MB)
  143 19:19:26.198145  progress  75 % (8 MB)
  144 19:19:26.279131  progress  80 % (8 MB)
  145 19:19:26.353478  progress  85 % (9 MB)
  146 19:19:26.424941  progress  90 % (9 MB)
  147 19:19:26.522659  progress  95 % (10 MB)
  148 19:19:26.613123  progress 100 % (11 MB)
  149 19:19:26.626619  11 MB downloaded in 1.69 s (6.53 MB/s)
  150 19:19:26.627225  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 19:19:26.628304  end: 1.5 download-retry (duration 00:00:02) [common]
  153 19:19:26.629016  start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
  154 19:19:26.629598  start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
  155 19:19:41.865159  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/928293/extract-nfsrootfs-uqyxrxjs
  156 19:19:41.865776  end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
  157 19:19:41.866102  start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
  158 19:19:41.866850  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm
  159 19:19:41.867363  makedir: /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin
  160 19:19:41.867776  makedir: /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/tests
  161 19:19:41.868489  makedir: /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/results
  162 19:19:41.869243  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-add-keys
  163 19:19:41.869937  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-add-sources
  164 19:19:41.870504  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-background-process-start
  165 19:19:41.871008  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-background-process-stop
  166 19:19:41.871539  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-common-functions
  167 19:19:41.872068  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-echo-ipv4
  168 19:19:41.872608  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-install-packages
  169 19:19:41.873133  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-installed-packages
  170 19:19:41.873619  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-os-build
  171 19:19:41.874102  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-probe-channel
  172 19:19:41.874585  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-probe-ip
  173 19:19:41.875063  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-target-ip
  174 19:19:41.875542  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-target-mac
  175 19:19:41.876047  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-target-storage
  176 19:19:41.876580  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-test-case
  177 19:19:41.877096  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-test-event
  178 19:19:41.877588  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-test-feedback
  179 19:19:41.878067  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-test-raise
  180 19:19:41.878623  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-test-reference
  181 19:19:41.879129  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-test-runner
  182 19:19:41.879623  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-test-set
  183 19:19:41.880134  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-test-shell
  184 19:19:41.880668  Updating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-install-packages (oe)
  185 19:19:41.881232  Updating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/bin/lava-installed-packages (oe)
  186 19:19:41.881690  Creating /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/environment
  187 19:19:41.882076  LAVA metadata
  188 19:19:41.882343  - LAVA_JOB_ID=928293
  189 19:19:41.882559  - LAVA_DISPATCHER_IP=192.168.6.2
  190 19:19:41.882917  start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
  191 19:19:41.883881  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 19:19:41.884241  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
  193 19:19:41.884456  skipped lava-vland-overlay
  194 19:19:41.884697  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 19:19:41.884951  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
  196 19:19:41.885170  skipped lava-multinode-overlay
  197 19:19:41.885409  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 19:19:41.885660  start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
  199 19:19:41.885908  Loading test definitions
  200 19:19:41.886185  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
  201 19:19:41.886407  Using /lava-928293 at stage 0
  202 19:19:41.887557  uuid=928293_1.6.2.4.1 testdef=None
  203 19:19:41.887877  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 19:19:41.888169  start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
  205 19:19:41.889940  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 19:19:41.890745  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
  208 19:19:41.892945  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 19:19:41.893794  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
  211 19:19:41.895872  runner path: /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 928293_1.6.2.4.1
  212 19:19:41.896476  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 19:19:41.897253  Creating lava-test-runner.conf files
  215 19:19:41.897451  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/928293/lava-overlay-wj2w08nm/lava-928293/0 for stage 0
  216 19:19:41.897781  - 0_v4l2-decoder-conformance-h265
  217 19:19:41.898134  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 19:19:41.898414  start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
  219 19:19:41.920425  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 19:19:41.920823  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
  221 19:19:41.921085  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 19:19:41.921351  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 19:19:41.921614  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
  224 19:19:42.536351  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 19:19:42.536832  start: 1.6.4 extract-modules (timeout 00:09:11) [common]
  226 19:19:42.537114  extracting modules file /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/modules/modules.tar to /var/lib/lava/dispatcher/tmp/928293/extract-nfsrootfs-uqyxrxjs
  227 19:19:43.881385  extracting modules file /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/modules/modules.tar to /var/lib/lava/dispatcher/tmp/928293/extract-overlay-ramdisk-b6h2cqqu/ramdisk
  228 19:19:45.265544  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 19:19:45.266044  start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
  230 19:19:45.266347  [common] Applying overlay to NFS
  231 19:19:45.266576  [common] Applying overlay /var/lib/lava/dispatcher/tmp/928293/compress-overlay-w_tepb9s/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/928293/extract-nfsrootfs-uqyxrxjs
  232 19:19:45.295718  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 19:19:45.296142  start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
  234 19:19:45.296448  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
  235 19:19:45.296691  Converting downloaded kernel to a uImage
  236 19:19:45.297024  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/kernel/Image /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/kernel/uImage
  237 19:19:45.795725  output: Image Name:   
  238 19:19:45.796177  output: Created:      Sat Nov  2 19:19:45 2024
  239 19:19:45.796406  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 19:19:45.796619  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  241 19:19:45.796827  output: Load Address: 01080000
  242 19:19:45.797027  output: Entry Point:  01080000
  243 19:19:45.797226  output: 
  244 19:19:45.797563  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
  245 19:19:45.797840  end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
  246 19:19:45.798117  start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
  247 19:19:45.798380  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 19:19:45.798648  start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
  249 19:19:45.798919  Building ramdisk /var/lib/lava/dispatcher/tmp/928293/extract-overlay-ramdisk-b6h2cqqu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/928293/extract-overlay-ramdisk-b6h2cqqu/ramdisk
  250 19:19:47.941910  >> 166823 blocks

  251 19:19:55.636866  Adding RAMdisk u-boot header.
  252 19:19:55.637582  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/928293/extract-overlay-ramdisk-b6h2cqqu/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/928293/extract-overlay-ramdisk-b6h2cqqu/ramdisk.cpio.gz.uboot
  253 19:19:55.889726  output: Image Name:   
  254 19:19:55.890147  output: Created:      Sat Nov  2 19:19:55 2024
  255 19:19:55.890672  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 19:19:55.891131  output: Data Size:    23434363 Bytes = 22885.12 KiB = 22.35 MiB
  257 19:19:55.891600  output: Load Address: 00000000
  258 19:19:55.892087  output: Entry Point:  00000000
  259 19:19:55.892537  output: 
  260 19:19:55.893620  rename /var/lib/lava/dispatcher/tmp/928293/extract-overlay-ramdisk-b6h2cqqu/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/ramdisk/ramdisk.cpio.gz.uboot
  261 19:19:55.894407  end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
  262 19:19:55.895023  end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
  263 19:19:55.895612  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
  264 19:19:55.896158  No LXC device requested
  265 19:19:55.896730  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 19:19:55.897304  start: 1.8 deploy-device-env (timeout 00:08:57) [common]
  267 19:19:55.897857  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 19:19:55.898317  Checking files for TFTP limit of 4294967296 bytes.
  269 19:19:55.901278  end: 1 tftp-deploy (duration 00:01:03) [common]
  270 19:19:55.901911  start: 2 uboot-action (timeout 00:05:00) [common]
  271 19:19:55.902495  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 19:19:55.903058  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 19:19:55.903627  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 19:19:55.904242  Using kernel file from prepare-kernel: 928293/tftp-deploy-o68njy29/kernel/uImage
  275 19:19:55.904939  substitutions:
  276 19:19:55.905390  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 19:19:55.905836  - {DTB_ADDR}: 0x01070000
  278 19:19:55.906280  - {DTB}: 928293/tftp-deploy-o68njy29/dtb/meson-g12b-a311d-libretech-cc.dtb
  279 19:19:55.906719  - {INITRD}: 928293/tftp-deploy-o68njy29/ramdisk/ramdisk.cpio.gz.uboot
  280 19:19:55.907159  - {KERNEL_ADDR}: 0x01080000
  281 19:19:55.907593  - {KERNEL}: 928293/tftp-deploy-o68njy29/kernel/uImage
  282 19:19:55.908087  - {LAVA_MAC}: None
  283 19:19:55.908583  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/928293/extract-nfsrootfs-uqyxrxjs
  284 19:19:55.909030  - {NFS_SERVER_IP}: 192.168.6.2
  285 19:19:55.909466  - {PRESEED_CONFIG}: None
  286 19:19:55.909900  - {PRESEED_LOCAL}: None
  287 19:19:55.910332  - {RAMDISK_ADDR}: 0x08000000
  288 19:19:55.910760  - {RAMDISK}: 928293/tftp-deploy-o68njy29/ramdisk/ramdisk.cpio.gz.uboot
  289 19:19:55.911189  - {ROOT_PART}: None
  290 19:19:55.911621  - {ROOT}: None
  291 19:19:55.912083  - {SERVER_IP}: 192.168.6.2
  292 19:19:55.912523  - {TEE_ADDR}: 0x83000000
  293 19:19:55.912954  - {TEE}: None
  294 19:19:55.913381  Parsed boot commands:
  295 19:19:55.913799  - setenv autoload no
  296 19:19:55.914228  - setenv initrd_high 0xffffffff
  297 19:19:55.914654  - setenv fdt_high 0xffffffff
  298 19:19:55.915078  - dhcp
  299 19:19:55.915505  - setenv serverip 192.168.6.2
  300 19:19:55.915931  - tftpboot 0x01080000 928293/tftp-deploy-o68njy29/kernel/uImage
  301 19:19:55.916401  - tftpboot 0x08000000 928293/tftp-deploy-o68njy29/ramdisk/ramdisk.cpio.gz.uboot
  302 19:19:55.916837  - tftpboot 0x01070000 928293/tftp-deploy-o68njy29/dtb/meson-g12b-a311d-libretech-cc.dtb
  303 19:19:55.917265  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/928293/extract-nfsrootfs-uqyxrxjs,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 19:19:55.917706  - bootm 0x01080000 0x08000000 0x01070000
  305 19:19:55.918250  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 19:19:55.919884  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 19:19:55.920384  [common] connect-device Connecting to device using 'telnet conserv1 3007'
  309 19:19:55.936795  Setting prompt string to ['lava-test: # ']
  310 19:19:55.938355  end: 2.3 connect-device (duration 00:00:00) [common]
  311 19:19:55.939032  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 19:19:55.939634  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 19:19:55.940441  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 19:19:55.941772  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
  315 19:19:55.982587  >> OK - accepted request

  316 19:19:55.984725  Returned 0 in 0 seconds
  317 19:19:56.085942  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 19:19:56.087715  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 19:19:56.088431  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 19:19:56.089020  Setting prompt string to ['Hit any key to stop autoboot']
  322 19:19:56.089537  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 19:19:56.091234  Trying 192.168.56.21...
  324 19:19:56.091751  Connected to conserv1.
  325 19:19:56.092257  Escape character is '^]'.
  326 19:19:56.092733  
  327 19:19:56.093203  ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  328 19:19:56.093665  
  329 19:20:06.708361  G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  330 19:20:06.709046  bl2_stage_init 0x01
  331 19:20:06.709535  bl2_stage_init 0x81
  332 19:20:06.714070  hw id: 0x0000 - pwm id 0x01
  333 19:20:06.714705  bl2_stage_init 0xc1
  334 19:20:06.715148  bl2_stage_init 0x02
  335 19:20:06.715579  
  336 19:20:06.719508  L0:00000000
  337 19:20:06.721411  L1:20000703
  338 19:20:06.721622  L2:00008067
  339 19:20:06.721831  L3:14000000
  340 19:20:06.725190  B2:00402000
  341 19:20:06.725459  B1:e0f83180
  342 19:20:06.725655  
  343 19:20:06.725851  TE: 58159
  344 19:20:06.726045  
  345 19:20:06.730819  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  346 19:20:06.731311  
  347 19:20:06.731746  Board ID = 1
  348 19:20:06.736460  Set A53 clk to 24M
  349 19:20:06.736937  Set A73 clk to 24M
  350 19:20:06.737366  Set clk81 to 24M
  351 19:20:06.742023  A53 clk: 1200 MHz
  352 19:20:06.742499  A73 clk: 1200 MHz
  353 19:20:06.742926  CLK81: 166.6M
  354 19:20:06.743345  smccc: 00012ab5
  355 19:20:06.747555  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  356 19:20:06.753113  board id: 1
  357 19:20:06.758847  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 19:20:06.769694  fw parse done
  359 19:20:06.775422  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 19:20:06.817207  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 19:20:06.829017  PIEI prepare done
  362 19:20:06.829493  fastboot data load
  363 19:20:06.829923  fastboot data verify
  364 19:20:06.834710  verify result: 266
  365 19:20:06.840226  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  366 19:20:06.840704  LPDDR4 probe
  367 19:20:06.841152  ddr clk to 1584MHz
  368 19:20:06.848212  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 19:20:06.884721  
  370 19:20:06.885244  dmc_version 0001
  371 19:20:06.891473  Check phy result
  372 19:20:06.898012  INFO : End of CA training
  373 19:20:06.898522  INFO : End of initialization
  374 19:20:06.903727  INFO : Training has run successfully!
  375 19:20:06.904266  Check phy result
  376 19:20:06.909215  INFO : End of initialization
  377 19:20:06.909703  INFO : End of read enable training
  378 19:20:06.914811  INFO : End of fine write leveling
  379 19:20:06.920433  INFO : End of Write leveling coarse delay
  380 19:20:06.920936  INFO : Training has run successfully!
  381 19:20:06.921380  Check phy result
  382 19:20:06.925985  INFO : End of initialization
  383 19:20:06.926478  INFO : End of read dq deskew training
  384 19:20:06.931725  INFO : End of MPR read delay center optimization
  385 19:20:06.937216  INFO : End of write delay center optimization
  386 19:20:06.942841  INFO : End of read delay center optimization
  387 19:20:06.943305  INFO : End of max read latency training
  388 19:20:06.948419  INFO : Training has run successfully!
  389 19:20:06.948901  1D training succeed
  390 19:20:06.957291  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 19:20:07.004301  Check phy result
  392 19:20:07.004813  INFO : End of initialization
  393 19:20:07.026143  INFO : End of 2D read delay Voltage center optimization
  394 19:20:07.047114  INFO : End of 2D read delay Voltage center optimization
  395 19:20:07.098305  INFO : End of 2D write delay Voltage center optimization
  396 19:20:07.148545  INFO : End of 2D write delay Voltage center optimization
  397 19:20:07.154150  INFO : Training has run successfully!
  398 19:20:07.154627  
  399 19:20:07.155081  channel==0
  400 19:20:07.159760  RxClkDly_Margin_A0==88 ps 9
  401 19:20:07.160321  TxDqDly_Margin_A0==98 ps 10
  402 19:20:07.163047  RxClkDly_Margin_A1==88 ps 9
  403 19:20:07.163522  TxDqDly_Margin_A1==98 ps 10
  404 19:20:07.168633  TrainedVREFDQ_A0==74
  405 19:20:07.169136  TrainedVREFDQ_A1==74
  406 19:20:07.174183  VrefDac_Margin_A0==25
  407 19:20:07.174668  DeviceVref_Margin_A0==40
  408 19:20:07.175115  VrefDac_Margin_A1==25
  409 19:20:07.179804  DeviceVref_Margin_A1==40
  410 19:20:07.180327  
  411 19:20:07.180774  
  412 19:20:07.181213  channel==1
  413 19:20:07.181648  RxClkDly_Margin_A0==98 ps 10
  414 19:20:07.183111  TxDqDly_Margin_A0==98 ps 10
  415 19:20:07.188787  RxClkDly_Margin_A1==88 ps 9
  416 19:20:07.189275  TxDqDly_Margin_A1==88 ps 9
  417 19:20:07.189720  TrainedVREFDQ_A0==77
  418 19:20:07.194311  TrainedVREFDQ_A1==77
  419 19:20:07.194794  VrefDac_Margin_A0==22
  420 19:20:07.199895  DeviceVref_Margin_A0==37
  421 19:20:07.200417  VrefDac_Margin_A1==24
  422 19:20:07.200862  DeviceVref_Margin_A1==37
  423 19:20:07.201298  
  424 19:20:07.205531   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 19:20:07.206012  
  426 19:20:07.239129  soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000018 dram_vref_reg_value 0x 00000060
  427 19:20:07.239734  2D training succeed
  428 19:20:07.244799  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 19:20:07.250273  auto size-- 65535DDR cs0 size: 2048MB
  430 19:20:07.250768  DDR cs1 size: 2048MB
  431 19:20:07.255894  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 19:20:07.256416  cs0 DataBus test pass
  433 19:20:07.256858  cs1 DataBus test pass
  434 19:20:07.261524  cs0 AddrBus test pass
  435 19:20:07.262022  cs1 AddrBus test pass
  436 19:20:07.262469  
  437 19:20:07.267092  100bdlr_step_size ps== 420
  438 19:20:07.267587  result report
  439 19:20:07.268072  boot times 0Enable ddr reg access
  440 19:20:07.276201  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 19:20:07.289660  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  442 19:20:07.864286  0.0;M3 CHK:0;cm4_sp_mode 0
  443 19:20:07.864945  MVN_1=0x00000000
  444 19:20:07.869756  MVN_2=0x00000000
  445 19:20:07.875471  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  446 19:20:07.875953  OPS=0x10
  447 19:20:07.876458  ring efuse init
  448 19:20:07.876903  chipver efuse init
  449 19:20:07.881088  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  450 19:20:07.886713  [0.018961 Inits done]
  451 19:20:07.887184  secure task start!
  452 19:20:07.887628  high task start!
  453 19:20:07.890494  low task start!
  454 19:20:07.890961  run into bl31
  455 19:20:07.897881  NOTICE:  BL31: v1.3(release):4fc40b1
  456 19:20:07.905025  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  457 19:20:07.905499  NOTICE:  BL31: G12A normal boot!
  458 19:20:07.931609  NOTICE:  BL31: BL33 decompress pass
  459 19:20:07.936930  ERROR:   Error initializing runtime service opteed_fast
  460 19:20:09.171713  
  461 19:20:09.172428  
  462 19:20:09.178705  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  463 19:20:09.179320  
  464 19:20:09.179788  Model: Libre Computer AML-A311D-CC Alta
  465 19:20:09.386831  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  466 19:20:09.411326  DRAM:  2 GiB (effective 3.8 GiB)
  467 19:20:09.553504  Core:  408 devices, 31 uclasses, devicetree: separate
  468 19:20:09.558726  WDT:   Not starting watchdog@f0d0
  469 19:20:09.591633  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  470 19:20:09.604626  Loading Environment from FAT... Card did not respond to voltage select! : -110
  471 19:20:09.608536  ** Bad device specification mmc 0 **
  472 19:20:09.619479  Card did not respond to voltage select! : -110
  473 19:20:09.626406  ** Bad device specification mmc 0 **
  474 19:20:09.626911  Couldn't find partition mmc 0
  475 19:20:09.635141  Card did not respond to voltage select! : -110
  476 19:20:09.640655  ** Bad device specification mmc 0 **
  477 19:20:09.641088  Couldn't find partition mmc 0
  478 19:20:09.645401  Error: could not access storage.
  479 19:20:10.908666  G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  480 19:20:10.909340  bl2_stage_init 0x01
  481 19:20:10.909958  bl2_stage_init 0x81
  482 19:20:10.914261  hw id: 0x0000 - pwm id 0x01
  483 19:20:10.914767  bl2_stage_init 0xc1
  484 19:20:10.915353  bl2_stage_init 0x02
  485 19:20:10.915813  
  486 19:20:10.919725  L0:00000000
  487 19:20:10.920257  L1:20000703
  488 19:20:10.920829  L2:00008067
  489 19:20:10.921277  L3:14000000
  490 19:20:10.925361  B2:00402000
  491 19:20:10.925850  B1:e0f83180
  492 19:20:10.926464  
  493 19:20:10.926930  TE: 58124
  494 19:20:10.927372  
  495 19:20:10.930961  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  496 19:20:10.931571  
  497 19:20:10.932094  Board ID = 1
  498 19:20:10.936562  Set A53 clk to 24M
  499 19:20:10.937178  Set A73 clk to 24M
  500 19:20:10.937650  Set clk81 to 24M
  501 19:20:10.942327  A53 clk: 1200 MHz
  502 19:20:10.942855  A73 clk: 1200 MHz
  503 19:20:10.943313  CLK81: 166.6M
  504 19:20:10.943755  smccc: 00012a92
  505 19:20:10.947806  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  506 19:20:10.953410  board id: 1
  507 19:20:10.958761  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  508 19:20:10.969894  fw parse done
  509 19:20:10.974971  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  510 19:20:11.017575  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  511 19:20:11.029404  PIEI prepare done
  512 19:20:11.029964  fastboot data load
  513 19:20:11.030423  fastboot data verify
  514 19:20:11.035050  verify result: 266
  515 19:20:11.040656  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  516 19:20:11.041166  LPDDR4 probe
  517 19:20:11.041827  ddr clk to 1584MHz
  518 19:20:11.048510  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  519 19:20:11.085596  
  520 19:20:11.086198  dmc_version 0001
  521 19:20:11.091823  Check phy result
  522 19:20:11.098492  INFO : End of CA training
  523 19:20:11.099022  INFO : End of initialization
  524 19:20:11.104087  INFO : Training has run successfully!
  525 19:20:11.104640  Check phy result
  526 19:20:11.109719  INFO : End of initialization
  527 19:20:11.110327  INFO : End of read enable training
  528 19:20:11.115443  INFO : End of fine write leveling
  529 19:20:11.120976  INFO : End of Write leveling coarse delay
  530 19:20:11.121575  INFO : Training has run successfully!
  531 19:20:11.122018  Check phy result
  532 19:20:11.126563  INFO : End of initialization
  533 19:20:11.127150  INFO : End of read dq deskew training
  534 19:20:11.132119  INFO : End of MPR read delay center optimization
  535 19:20:11.137734  INFO : End of write delay center optimization
  536 19:20:11.143430  INFO : End of read delay center optimization
  537 19:20:11.143970  INFO : End of max read latency training
  538 19:20:11.148936  INFO : Training has run successfully!
  539 19:20:11.149488  1D training succeed
  540 19:20:11.157186  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  541 19:20:11.206057  Check phy result
  542 19:20:11.206766  INFO : End of initialization
  543 19:20:11.227462  INFO : End of 2D read delay Voltage center optimization
  544 19:20:11.247465  INFO : End of 2D read delay Voltage center optimization
  545 19:20:11.299324  INFO : End of 2D write delay Voltage center optimization
  546 19:20:11.349031  INFO : End of 2D write delay Voltage center optimization
  547 19:20:11.354566  INFO : Training has run successfully!
  548 19:20:11.355234  
  549 19:20:11.355738  channel==0
  550 19:20:11.360271  RxClkDly_Margin_A0==88 ps 9
  551 19:20:11.360834  TxDqDly_Margin_A0==98 ps 10
  552 19:20:11.363406  RxClkDly_Margin_A1==88 ps 9
  553 19:20:11.363929  TxDqDly_Margin_A1==88 ps 9
  554 19:20:11.368951  TrainedVREFDQ_A0==74
  555 19:20:11.369489  TrainedVREFDQ_A1==75
  556 19:20:11.369930  VrefDac_Margin_A0==24
  557 19:20:11.374564  DeviceVref_Margin_A0==40
  558 19:20:11.375085  VrefDac_Margin_A1==24
  559 19:20:11.380238  DeviceVref_Margin_A1==39
  560 19:20:11.380755  
  561 19:20:11.381314  
  562 19:20:11.381810  channel==1
  563 19:20:11.382256  RxClkDly_Margin_A0==88 ps 9
  564 19:20:11.385759  TxDqDly_Margin_A0==98 ps 10
  565 19:20:11.386281  RxClkDly_Margin_A1==88 ps 9
  566 19:20:11.391343  TxDqDly_Margin_A1==88 ps 9
  567 19:20:11.392011  TrainedVREFDQ_A0==77
  568 19:20:11.392491  TrainedVREFDQ_A1==77
  569 19:20:11.396954  VrefDac_Margin_A0==23
  570 19:20:11.397484  DeviceVref_Margin_A0==37
  571 19:20:11.402524  VrefDac_Margin_A1==24
  572 19:20:11.403040  DeviceVref_Margin_A1==37
  573 19:20:11.403474  
  574 19:20:11.408252   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  575 19:20:11.408791  
  576 19:20:11.436236  soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
  577 19:20:11.441738  2D training succeed
  578 19:20:11.447340  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  579 19:20:11.448014  auto size-- 65535DDR cs0 size: 2048MB
  580 19:20:11.452941  DDR cs1 size: 2048MB
  581 19:20:11.453581  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  582 19:20:11.458540  cs0 DataBus test pass
  583 19:20:11.459169  cs1 DataBus test pass
  584 19:20:11.459632  cs0 AddrBus test pass
  585 19:20:11.464247  cs1 AddrBus test pass
  586 19:20:11.464783  
  587 19:20:11.465238  100bdlr_step_size ps== 420
  588 19:20:11.465684  result report
  589 19:20:11.469812  boot times 0Enable ddr reg access
  590 19:20:11.477202  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  591 19:20:11.489818  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  592 19:20:12.064587  0.0;M3 CHK:0;cm4_sp_mode 0
  593 19:20:12.065350  MVN_1=0x00000000
  594 19:20:12.070072  MVN_2=0x00000000
  595 19:20:12.075884  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  596 19:20:12.076474  OPS=0x10
  597 19:20:12.076936  ring efuse init
  598 19:20:12.077370  chipver efuse init
  599 19:20:12.083949  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  600 19:20:12.084663  [0.018961 Inits done]
  601 19:20:12.091283  secure task start!
  602 19:20:12.091796  high task start!
  603 19:20:12.092360  low task start!
  604 19:20:12.092900  run into bl31
  605 19:20:12.098332  NOTICE:  BL31: v1.3(release):4fc40b1
  606 19:20:12.105934  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  607 19:20:12.106455  NOTICE:  BL31: G12A normal boot!
  608 19:20:12.131440  NOTICE:  BL31: BL33 decompress pass
  609 19:20:12.136107  ERROR:   Error initializing runtime service opteed_fast
  610 19:20:13.369958  
  611 19:20:13.370698  
  612 19:20:13.378466  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  613 19:20:13.379004  
  614 19:20:13.379447  Model: Libre Computer AML-A311D-CC Alta
  615 19:20:13.586936  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  616 19:20:13.610094  DRAM:  2 GiB (effective 3.8 GiB)
  617 19:20:13.753169  Core:  408 devices, 31 uclasses, devicetree: separate
  618 19:20:13.759044  WDT:   Not starting watchdog@f0d0
  619 19:20:13.791281  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  620 19:20:13.803863  Loading Environment from FAT... Card did not respond to voltage select! : -110
  621 19:20:13.807883  ** Bad device specification mmc 0 **
  622 19:20:13.819033  Card did not respond to voltage select! : -110
  623 19:20:13.826726  ** Bad device specification mmc 0 **
  624 19:20:13.827199  Couldn't find partition mmc 0
  625 19:20:13.834921  Card did not respond to voltage select! : -110
  626 19:20:13.840498  ** Bad device specification mmc 0 **
  627 19:20:13.840967  Couldn't find partition mmc 0
  628 19:20:13.845494  Error: could not access storage.
  629 19:20:14.189128  Net:   eth0: ethernet@ff3f0000
  630 19:20:14.189711  starting USB...
  631 19:20:14.440902  Bus usb@ff500000: Register 3000140 NbrPorts 3
  632 19:20:14.441445  Starting the controller
  633 19:20:14.447876  USB XHCI 1.10
  634 19:20:16.158865  scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  635 19:20:16.159508  bl2_stage_init 0x01
  636 19:20:16.159975  bl2_stage_init 0x81
  637 19:20:16.164401  hw id: 0x0000 - pwm id 0x01
  638 19:20:16.164921  bl2_stage_init 0xc1
  639 19:20:16.165376  bl2_stage_init 0x02
  640 19:20:16.165818  
  641 19:20:16.169987  L0:00000000
  642 19:20:16.170501  L1:20000703
  643 19:20:16.170954  L2:00008067
  644 19:20:16.171391  L3:14000000
  645 19:20:16.172955  B2:00402000
  646 19:20:16.173433  B1:e0f83180
  647 19:20:16.173872  
  648 19:20:16.174311  TE: 58124
  649 19:20:16.174746  
  650 19:20:16.184076  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  651 19:20:16.184601  
  652 19:20:16.185056  Board ID = 1
  653 19:20:16.185497  Set A53 clk to 24M
  654 19:20:16.185930  Set A73 clk to 24M
  655 19:20:16.189668  Set clk81 to 24M
  656 19:20:16.190177  A53 clk: 1200 MHz
  657 19:20:16.190625  A73 clk: 1200 MHz
  658 19:20:16.193070  CLK81: 166.6M
  659 19:20:16.193586  smccc: 00012a92
  660 19:20:16.198680  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  661 19:20:16.204283  board id: 1
  662 19:20:16.208531  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  663 19:20:16.220162  fw parse done
  664 19:20:16.225131  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  665 19:20:16.267810  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  666 19:20:16.279755  PIEI prepare done
  667 19:20:16.280318  fastboot data load
  668 19:20:16.280788  fastboot data verify
  669 19:20:16.285330  verify result: 266
  670 19:20:16.290982  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  671 19:20:16.291497  LPDDR4 probe
  672 19:20:16.292017  ddr clk to 1584MHz
  673 19:20:16.297917  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  674 19:20:16.336186  
  675 19:20:16.336698  dmc_version 0001
  676 19:20:16.342774  Check phy result
  677 19:20:16.348644  INFO : End of CA training
  678 19:20:16.349114  INFO : End of initialization
  679 19:20:16.354247  INFO : Training has run successfully!
  680 19:20:16.354721  Check phy result
  681 19:20:16.359892  INFO : End of initialization
  682 19:20:16.360398  INFO : End of read enable training
  683 19:20:16.365448  INFO : End of fine write leveling
  684 19:20:16.371042  INFO : End of Write leveling coarse delay
  685 19:20:16.371514  INFO : Training has run successfully!
  686 19:20:16.371960  Check phy result
  687 19:20:16.376649  INFO : End of initialization
  688 19:20:16.377121  INFO : End of read dq deskew training
  689 19:20:16.382297  INFO : End of MPR read delay center optimization
  690 19:20:16.388013  INFO : End of write delay center optimization
  691 19:20:16.393564  INFO : End of read delay center optimization
  692 19:20:16.394062  INFO : End of max read latency training
  693 19:20:16.399153  INFO : Training has run successfully!
  694 19:20:16.399646  1D training succeed
  695 19:20:16.407305  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  696 19:20:16.455027  Check phy result
  697 19:20:16.455548  INFO : End of initialization
  698 19:20:16.477648  INFO : End of 2D read delay Voltage center optimization
  699 19:20:16.497878  INFO : End of 2D read delay Voltage center optimization
  700 19:20:16.549363  INFO : End of 2D write delay Voltage center optimization
  701 19:20:16.599260  INFO : End of 2D write delay Voltage center optimization
  702 19:20:16.604905  INFO : Training has run successfully!
  703 19:20:16.605426  
  704 19:20:16.605883  channel==0
  705 19:20:16.610481  RxClkDly_Margin_A0==88 ps 9
  706 19:20:16.610998  TxDqDly_Margin_A0==98 ps 10
  707 19:20:16.613754  RxClkDly_Margin_A1==88 ps 9
  708 19:20:16.614252  TxDqDly_Margin_A1==88 ps 9
  709 19:20:16.619305  TrainedVREFDQ_A0==74
  710 19:20:16.619812  TrainedVREFDQ_A1==74
  711 19:20:16.620286  VrefDac_Margin_A0==25
  712 19:20:16.624884  DeviceVref_Margin_A0==40
  713 19:20:16.625390  VrefDac_Margin_A1==25
  714 19:20:16.630444  DeviceVref_Margin_A1==40
  715 19:20:16.630944  
  716 19:20:16.631378  
  717 19:20:16.631803  channel==1
  718 19:20:16.632263  RxClkDly_Margin_A0==98 ps 10
  719 19:20:16.636229  TxDqDly_Margin_A0==98 ps 10
  720 19:20:16.636742  RxClkDly_Margin_A1==98 ps 10
  721 19:20:16.641650  TxDqDly_Margin_A1==88 ps 9
  722 19:20:16.642161  TrainedVREFDQ_A0==77
  723 19:20:16.642596  TrainedVREFDQ_A1==77
  724 19:20:16.647317  VrefDac_Margin_A0==22
  725 19:20:16.647819  DeviceVref_Margin_A0==37
  726 19:20:16.652921  VrefDac_Margin_A1==22
  727 19:20:16.653424  DeviceVref_Margin_A1==37
  728 19:20:16.653854  
  729 19:20:16.658486   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  730 19:20:16.658993  
  731 19:20:16.686452  soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
  732 19:20:16.692093  2D training succeed
  733 19:20:16.697633  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  734 19:20:16.698138  auto size-- 65535DDR cs0 size: 2048MB
  735 19:20:16.703316  DDR cs1 size: 2048MB
  736 19:20:16.703776  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  737 19:20:16.708879  cs0 DataBus test pass
  738 19:20:16.709341  cs1 DataBus test pass
  739 19:20:16.709729  cs0 AddrBus test pass
  740 19:20:16.714482  cs1 AddrBus test pass
  741 19:20:16.714976  
  742 19:20:16.715442  100bdlr_step_size ps== 420
  743 19:20:16.715883  result report
  744 19:20:16.720172  boot times 0Enable ddr reg access
  745 19:20:16.726840  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  746 19:20:16.740267  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  747 19:20:17.314927  0.0;M3 CHK:0;cm4_sp_mode 0
  748 19:20:17.315503  MVN_1=0x00000000
  749 19:20:17.320366  MVN_2=0x00000000
  750 19:20:17.326147  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  751 19:20:17.326778  OPS=0x10
  752 19:20:17.327231  ring efuse init
  753 19:20:17.327656  chipver efuse init
  754 19:20:17.331726  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  755 19:20:17.337372  [0.018961 Inits done]
  756 19:20:17.337848  secure task start!
  757 19:20:17.338276  high task start!
  758 19:20:17.342133  low task start!
  759 19:20:17.342596  run into bl31
  760 19:20:17.348617  NOTICE:  BL31: v1.3(release):4fc40b1
  761 19:20:17.355426  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  762 19:20:17.355933  NOTICE:  BL31: G12A normal boot!
  763 19:20:17.381724  NOTICE:  BL31: BL33 decompress pass
  764 19:20:17.386514  ERROR:   Error initializing runtime service opteed_fast
  765 19:20:18.620329  
  766 19:20:18.620960  
  767 19:20:18.628670  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  768 19:20:18.629234  
  769 19:20:18.629676  Model: Libre Computer AML-A311D-CC Alta
  770 19:20:18.837078  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  771 19:20:18.860473  DRAM:  2 GiB (effective 3.8 GiB)
  772 19:20:19.003523  Core:  408 devices, 31 uclasses, devicetree: separate
  773 19:20:19.009402  WDT:   Not starting watchdog@f0d0
  774 19:20:19.041563  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  775 19:20:19.054040  Loading Environment from FAT... Card did not respond to voltage select! : -110
  776 19:20:19.059077  ** Bad device specification mmc 0 **
  777 19:20:19.069414  Card did not respond to voltage select! : -110
  778 19:20:19.077038  ** Bad device specification mmc 0 **
  779 19:20:19.077535  Couldn't find partition mmc 0
  780 19:20:19.085382  Card did not respond to voltage select! : -110
  781 19:20:19.090922  ** Bad device specification mmc 0 **
  782 19:20:19.091412  Couldn't find partition mmc 0
  783 19:20:19.095930  Error: could not access storage.
  784 19:20:19.438499  Net:   eth0: ethernet@ff3f0000
  785 19:20:19.439175  starting USB...
  786 19:20:19.690176  Bus usb@ff500000: Register 3000140 NbrPorts 3
  787 19:20:19.690706  Starting the controller
  788 19:20:19.697133  USB XHCI 1.10
  789 19:20:21.859026  scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  790 19:20:21.859623  bl2_stage_init 0x01
  791 19:20:21.860110  bl2_stage_init 0x81
  792 19:20:21.864679  hw id: 0x0000 - pwm id 0x01
  793 19:20:21.865160  bl2_stage_init 0xc1
  794 19:20:21.865596  bl2_stage_init 0x02
  795 19:20:21.866024  
  796 19:20:21.870274  L0:00000000
  797 19:20:21.870741  L1:20000703
  798 19:20:21.871170  L2:00008067
  799 19:20:21.871595  L3:14000000
  800 19:20:21.875881  B2:00402000
  801 19:20:21.876380  B1:e0f83180
  802 19:20:21.876809  
  803 19:20:21.877235  TE: 58124
  804 19:20:21.877659  
  805 19:20:21.881440  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  806 19:20:21.881916  
  807 19:20:21.882347  Board ID = 1
  808 19:20:21.887009  Set A53 clk to 24M
  809 19:20:21.887479  Set A73 clk to 24M
  810 19:20:21.887906  Set clk81 to 24M
  811 19:20:21.892661  A53 clk: 1200 MHz
  812 19:20:21.893129  A73 clk: 1200 MHz
  813 19:20:21.893556  CLK81: 166.6M
  814 19:20:21.893981  smccc: 00012a92
  815 19:20:21.898223  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  816 19:20:21.903935  board id: 1
  817 19:20:21.909868  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  818 19:20:21.920244  fw parse done
  819 19:20:21.926171  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  820 19:20:21.968865  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  821 19:20:21.979722  PIEI prepare done
  822 19:20:21.980237  fastboot data load
  823 19:20:21.980678  fastboot data verify
  824 19:20:21.985491  verify result: 266
  825 19:20:21.991055  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  826 19:20:21.991545  LPDDR4 probe
  827 19:20:21.991977  ddr clk to 1584MHz
  828 19:20:21.999048  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  829 19:20:22.036316  
  830 19:20:22.036898  dmc_version 0001
  831 19:20:22.043008  Check phy result
  832 19:20:22.048853  INFO : End of CA training
  833 19:20:22.049356  INFO : End of initialization
  834 19:20:22.054499  INFO : Training has run successfully!
  835 19:20:22.055068  Check phy result
  836 19:20:22.060057  INFO : End of initialization
  837 19:20:22.060558  INFO : End of read enable training
  838 19:20:22.065650  INFO : End of fine write leveling
  839 19:20:22.071227  INFO : End of Write leveling coarse delay
  840 19:20:22.071723  INFO : Training has run successfully!
  841 19:20:22.072198  Check phy result
  842 19:20:22.076867  INFO : End of initialization
  843 19:20:22.077357  INFO : End of read dq deskew training
  844 19:20:22.082422  INFO : End of MPR read delay center optimization
  845 19:20:22.088052  INFO : End of write delay center optimization
  846 19:20:22.093661  INFO : End of read delay center optimization
  847 19:20:22.094150  INFO : End of max read latency training
  848 19:20:22.099248  INFO : Training has run successfully!
  849 19:20:22.099735  1D training succeed
  850 19:20:22.108421  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  851 19:20:22.156037  Check phy result
  852 19:20:22.156531  INFO : End of initialization
  853 19:20:22.178467  INFO : End of 2D read delay Voltage center optimization
  854 19:20:22.198568  INFO : End of 2D read delay Voltage center optimization
  855 19:20:22.250498  INFO : End of 2D write delay Voltage center optimization
  856 19:20:22.299718  INFO : End of 2D write delay Voltage center optimization
  857 19:20:22.305285  INFO : Training has run successfully!
  858 19:20:22.305772  
  859 19:20:22.306204  channel==0
  860 19:20:22.310901  RxClkDly_Margin_A0==88 ps 9
  861 19:20:22.311405  TxDqDly_Margin_A0==98 ps 10
  862 19:20:22.316495  RxClkDly_Margin_A1==88 ps 9
  863 19:20:22.316977  TxDqDly_Margin_A1==98 ps 10
  864 19:20:22.317410  TrainedVREFDQ_A0==74
  865 19:20:22.322103  TrainedVREFDQ_A1==74
  866 19:20:22.322589  VrefDac_Margin_A0==24
  867 19:20:22.323012  DeviceVref_Margin_A0==40
  868 19:20:22.327760  VrefDac_Margin_A1==25
  869 19:20:22.328280  DeviceVref_Margin_A1==40
  870 19:20:22.328708  
  871 19:20:22.329132  
  872 19:20:22.333298  channel==1
  873 19:20:22.333779  RxClkDly_Margin_A0==98 ps 10
  874 19:20:22.334204  TxDqDly_Margin_A0==98 ps 10
  875 19:20:22.338887  RxClkDly_Margin_A1==88 ps 9
  876 19:20:22.339379  TxDqDly_Margin_A1==98 ps 10
  877 19:20:22.344475  TrainedVREFDQ_A0==77
  878 19:20:22.344965  TrainedVREFDQ_A1==77
  879 19:20:22.345395  VrefDac_Margin_A0==22
  880 19:20:22.350100  DeviceVref_Margin_A0==37
  881 19:20:22.350582  VrefDac_Margin_A1==24
  882 19:20:22.355705  DeviceVref_Margin_A1==37
  883 19:20:22.356216  
  884 19:20:22.356644   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  885 19:20:22.361302  
  886 19:20:22.389235  soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
  887 19:20:22.389753  2D training succeed
  888 19:20:22.394898  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  889 19:20:22.400481  auto size-- 65535DDR cs0 size: 2048MB
  890 19:20:22.400962  DDR cs1 size: 2048MB
  891 19:20:22.406073  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  892 19:20:22.406558  cs0 DataBus test pass
  893 19:20:22.411695  cs1 DataBus test pass
  894 19:20:22.412219  cs0 AddrBus test pass
  895 19:20:22.412649  cs1 AddrBus test pass
  896 19:20:22.413067  
  897 19:20:22.417284  100bdlr_step_size ps== 420
  898 19:20:22.417775  result report
  899 19:20:22.422905  boot times 0Enable ddr reg access
  900 19:20:22.428312  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  901 19:20:22.441829  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  902 19:20:23.013760  0.0;M3 CHK:0;cm4_sp_mode 0
  903 19:20:23.014325  MVN_1=0x00000000
  904 19:20:23.019210  MVN_2=0x00000000
  905 19:20:23.024980  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  906 19:20:23.025463  OPS=0x10
  907 19:20:23.025902  ring efuse init
  908 19:20:23.026328  chipver efuse init
  909 19:20:23.033274  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  910 19:20:23.033763  [0.018960 Inits done]
  911 19:20:23.034194  secure task start!
  912 19:20:23.040829  high task start!
  913 19:20:23.041292  low task start!
  914 19:20:23.041717  run into bl31
  915 19:20:23.047420  NOTICE:  BL31: v1.3(release):4fc40b1
  916 19:20:23.055225  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  917 19:20:23.055703  NOTICE:  BL31: G12A normal boot!
  918 19:20:23.080572  NOTICE:  BL31: BL33 decompress pass
  919 19:20:23.086252  ERROR:   Error initializing runtime service opteed_fast
  920 19:20:24.319225  
  921 19:20:24.319796  
  922 19:20:24.327544  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  923 19:20:24.328067  
  924 19:20:24.328524  Model: Libre Computer AML-A311D-CC Alta
  925 19:20:24.535973  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  926 19:20:24.559384  DRAM:  2 GiB (effective 3.8 GiB)
  927 19:20:24.702350  Core:  408 devices, 31 uclasses, devicetree: separate
  928 19:20:24.708225  WDT:   Not starting watchdog@f0d0
  929 19:20:24.740513  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  930 19:20:24.752971  Loading Environment from FAT... Card did not respond to voltage select! : -110
  931 19:20:24.757964  ** Bad device specification mmc 0 **
  932 19:20:24.768268  Card did not respond to voltage select! : -110
  933 19:20:24.775950  ** Bad device specification mmc 0 **
  934 19:20:24.776461  Couldn't find partition mmc 0
  935 19:20:24.784261  Card did not respond to voltage select! : -110
  936 19:20:24.789780  ** Bad device specification mmc 0 **
  937 19:20:24.790257  Couldn't find partition mmc 0
  938 19:20:24.794853  Error: could not access storage.
  939 19:20:25.137322  Net:   eth0: ethernet@ff3f0000
  940 19:20:25.137938  starting USB...
  941 19:20:25.389161  Bus usb@ff500000: Register 3000140 NbrPorts 3
  942 19:20:25.389684  Starting the controller
  943 19:20:25.396117  USB XHCI 1.10
  944 19:20:26.950432  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  945 19:20:26.958727         scanning usb for storage devices... 0 Storage Device(s) found
  947 19:20:27.010331  Hit any key to stop autoboot:  1 
  948 19:20:27.011146  end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
  949 19:20:27.011814  start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
  950 19:20:27.012380  Setting prompt string to ['=>']
  951 19:20:27.012913  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
  952 19:20:27.026234   0 
  953 19:20:27.027172  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  954 19:20:27.027723  Sending with 10 millisecond of delay
  956 19:20:28.162480  => setenv autoload no
  957 19:20:28.173288  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
  958 19:20:28.178600  setenv autoload no
  959 19:20:28.179363  Sending with 10 millisecond of delay
  961 19:20:29.976173  => setenv initrd_high 0xffffffff
  962 19:20:29.986965  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
  963 19:20:29.987861  setenv initrd_high 0xffffffff
  964 19:20:29.988672  Sending with 10 millisecond of delay
  966 19:20:31.604827  => setenv fdt_high 0xffffffff
  967 19:20:31.615618  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
  968 19:20:31.616491  setenv fdt_high 0xffffffff
  969 19:20:31.617248  Sending with 10 millisecond of delay
  971 19:20:31.909059  => dhcp
  972 19:20:31.919703  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
  973 19:20:31.920549  dhcp
  974 19:20:31.921021  Speed: 1000, full duplex
  975 19:20:31.921466  BOOTP broadcast 1
  976 19:20:32.055009  DHCP client bound to address 192.168.6.27 (136 ms)
  977 19:20:32.055763  Sending with 10 millisecond of delay
  979 19:20:33.732331  => setenv serverip 192.168.6.2
  980 19:20:33.743163  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
  981 19:20:33.744135  setenv serverip 192.168.6.2
  982 19:20:33.744873  Sending with 10 millisecond of delay
  984 19:20:37.467583  => tftpboot 0x01080000 928293/tftp-deploy-o68njy29/kernel/uImage
  985 19:20:37.478195  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
  986 19:20:37.478700  tftpboot 0x01080000 928293/tftp-deploy-o68njy29/kernel/uImage
  987 19:20:37.478945  Speed: 1000, full duplex
  988 19:20:37.479155  Using ethernet@ff3f0000 device
  989 19:20:37.481060  TFTP from server 192.168.6.2; our IP address is 192.168.6.27
  990 19:20:37.486494  Filename '928293/tftp-deploy-o68njy29/kernel/uImage'.
  991 19:20:37.490419  Load address: 0x1080000
  992 19:20:40.366804  Loading: *##################################################  43.6 MiB
  993 19:20:40.367217  	 15.1 MiB/s
  994 19:20:40.367457  done
  995 19:20:40.371120  Bytes transferred = 45713984 (2b98a40 hex)
  996 19:20:40.371637  Sending with 10 millisecond of delay
  998 19:20:45.057797  => tftpboot 0x08000000 928293/tftp-deploy-o68njy29/ramdisk/ramdisk.cpio.gz.uboot
  999 19:20:45.068634  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
 1000 19:20:45.069493  tftpboot 0x08000000 928293/tftp-deploy-o68njy29/ramdisk/ramdisk.cpio.gz.uboot
 1001 19:20:45.069977  Speed: 1000, full duplex
 1002 19:20:45.070420  Using ethernet@ff3f0000 device
 1003 19:20:45.071184  TFTP from server 192.168.6.2; our IP address is 192.168.6.27
 1004 19:20:45.079837  Filename '928293/tftp-deploy-o68njy29/ramdisk/ramdisk.cpio.gz.uboot'.
 1005 19:20:45.080406  Load address: 0x8000000
 1006 19:20:47.701133  Loading: *###################### UDP wrong checksum 000000ff 0000989f
 1007 19:20:47.728594   UDP wrong checksum 000000ff 00002592
 1008 19:20:51.962760  T ########################### UDP wrong checksum 00000005 00004755
 1009 19:20:56.965372  T  UDP wrong checksum 00000005 00004755
 1010 19:21:06.967269  T T  UDP wrong checksum 00000005 00004755
 1011 19:21:26.971398  T T T T  UDP wrong checksum 00000005 00004755
 1012 19:21:41.975486  T T 
 1013 19:21:41.976148  Retry count exceeded; starting again
 1015 19:21:41.977557  end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
 1018 19:21:41.979416  end: 2.4 uboot-commands (duration 00:01:46) [common]
 1020 19:21:41.980906  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
 1022 19:21:41.981916  end: 2 uboot-action (duration 00:01:46) [common]
 1024 19:21:41.983388  Cleaning after the job
 1025 19:21:41.983917  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/ramdisk
 1026 19:21:41.985048  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/kernel
 1027 19:21:42.032262  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/dtb
 1028 19:21:42.033044  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/nfsrootfs
 1029 19:21:42.334971  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/928293/tftp-deploy-o68njy29/modules
 1030 19:21:42.353957  start: 4.1 power-off (timeout 00:00:30) [common]
 1031 19:21:42.354582  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
 1032 19:21:42.389519  >> OK - accepted request

 1033 19:21:42.391519  Returned 0 in 0 seconds
 1034 19:21:42.492223  end: 4.1 power-off (duration 00:00:00) [common]
 1036 19:21:42.493097  start: 4.2 read-feedback (timeout 00:10:00) [common]
 1037 19:21:42.493738  Listened to connection for namespace 'common' for up to 1s
 1038 19:21:43.494594  Finalising connection for namespace 'common'
 1039 19:21:43.494962  Disconnecting from shell: Finalise
 1040 19:21:43.495227  => 
 1041 19:21:43.595764  end: 4.2 read-feedback (duration 00:00:01) [common]
 1042 19:21:43.596142  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/928293
 1043 19:21:46.093741  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/928293
 1044 19:21:46.094410  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.