Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:54:29.148014 lava-dispatcher, installed at version: 2024.01
2 08:54:29.148810 start: 0 validate
3 08:54:29.149261 Start time: 2024-11-04 08:54:29.149230+00:00 (UTC)
4 08:54:29.149830 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:54:29.150358 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:54:29.195463 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:54:29.196024 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-328-gf46306bca74bb%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:54:29.231575 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:54:29.232251 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-328-gf46306bca74bb%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 08:54:29.259768 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:54:29.260281 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:54:29.302464 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:54:29.303062 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-328-gf46306bca74bb%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 08:54:29.349737 validate duration: 0.20
16 08:54:29.350561 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:54:29.350881 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:54:29.351179 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:54:29.351776 Not decompressing ramdisk as can be used compressed.
20 08:54:29.352322 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 08:54:29.352603 saving as /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/ramdisk/initrd.cpio.gz
22 08:54:29.352863 total size: 5628169 (5 MB)
23 08:54:29.391762 progress 0 % (0 MB)
24 08:54:29.395955 progress 5 % (0 MB)
25 08:54:29.400090 progress 10 % (0 MB)
26 08:54:29.403707 progress 15 % (0 MB)
27 08:54:29.407824 progress 20 % (1 MB)
28 08:54:29.411493 progress 25 % (1 MB)
29 08:54:29.415523 progress 30 % (1 MB)
30 08:54:29.419649 progress 35 % (1 MB)
31 08:54:29.423249 progress 40 % (2 MB)
32 08:54:29.427234 progress 45 % (2 MB)
33 08:54:29.430845 progress 50 % (2 MB)
34 08:54:29.434918 progress 55 % (2 MB)
35 08:54:29.438921 progress 60 % (3 MB)
36 08:54:29.442504 progress 65 % (3 MB)
37 08:54:29.446602 progress 70 % (3 MB)
38 08:54:29.450250 progress 75 % (4 MB)
39 08:54:29.454214 progress 80 % (4 MB)
40 08:54:29.457843 progress 85 % (4 MB)
41 08:54:29.461808 progress 90 % (4 MB)
42 08:54:29.465707 progress 95 % (5 MB)
43 08:54:29.468978 progress 100 % (5 MB)
44 08:54:29.469626 5 MB downloaded in 0.12 s (45.98 MB/s)
45 08:54:29.470157 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:54:29.471039 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:54:29.471329 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:54:29.471598 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:54:29.472099 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-328-gf46306bca74bb/arm64/defconfig/gcc-12/kernel/Image
51 08:54:29.472349 saving as /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/kernel/Image
52 08:54:29.472556 total size: 45713920 (43 MB)
53 08:54:29.472764 No compression specified
54 08:54:29.511005 progress 0 % (0 MB)
55 08:54:29.538591 progress 5 % (2 MB)
56 08:54:29.565916 progress 10 % (4 MB)
57 08:54:29.593266 progress 15 % (6 MB)
58 08:54:29.620544 progress 20 % (8 MB)
59 08:54:29.647341 progress 25 % (10 MB)
60 08:54:29.674430 progress 30 % (13 MB)
61 08:54:29.701644 progress 35 % (15 MB)
62 08:54:29.729365 progress 40 % (17 MB)
63 08:54:29.756269 progress 45 % (19 MB)
64 08:54:29.783699 progress 50 % (21 MB)
65 08:54:29.811535 progress 55 % (24 MB)
66 08:54:29.839071 progress 60 % (26 MB)
67 08:54:29.866359 progress 65 % (28 MB)
68 08:54:29.893802 progress 70 % (30 MB)
69 08:54:29.922333 progress 75 % (32 MB)
70 08:54:29.950241 progress 80 % (34 MB)
71 08:54:29.977400 progress 85 % (37 MB)
72 08:54:30.006420 progress 90 % (39 MB)
73 08:54:30.035125 progress 95 % (41 MB)
74 08:54:30.062133 progress 100 % (43 MB)
75 08:54:30.062715 43 MB downloaded in 0.59 s (73.87 MB/s)
76 08:54:30.063198 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:54:30.064033 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:54:30.064314 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:54:30.064577 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:54:30.065055 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-328-gf46306bca74bb/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 08:54:30.065322 saving as /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 08:54:30.065530 total size: 53209 (0 MB)
84 08:54:30.065736 No compression specified
85 08:54:30.098880 progress 61 % (0 MB)
86 08:54:30.099737 progress 100 % (0 MB)
87 08:54:30.100300 0 MB downloaded in 0.03 s (1.46 MB/s)
88 08:54:30.100798 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:54:30.101600 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:54:30.101856 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:54:30.102120 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:54:30.102587 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 08:54:30.102829 saving as /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/nfsrootfs/full.rootfs.tar
95 08:54:30.103032 total size: 120894716 (115 MB)
96 08:54:30.103241 Using unxz to decompress xz
97 08:54:30.150336 progress 0 % (0 MB)
98 08:54:30.951583 progress 5 % (5 MB)
99 08:54:31.795341 progress 10 % (11 MB)
100 08:54:32.589596 progress 15 % (17 MB)
101 08:54:33.328590 progress 20 % (23 MB)
102 08:54:33.919170 progress 25 % (28 MB)
103 08:54:34.746205 progress 30 % (34 MB)
104 08:54:35.533393 progress 35 % (40 MB)
105 08:54:35.888605 progress 40 % (46 MB)
106 08:54:36.259690 progress 45 % (51 MB)
107 08:54:36.983322 progress 50 % (57 MB)
108 08:54:37.869482 progress 55 % (63 MB)
109 08:54:38.654716 progress 60 % (69 MB)
110 08:54:39.415764 progress 65 % (74 MB)
111 08:54:40.197965 progress 70 % (80 MB)
112 08:54:41.021926 progress 75 % (86 MB)
113 08:54:41.821854 progress 80 % (92 MB)
114 08:54:42.588417 progress 85 % (98 MB)
115 08:54:43.444760 progress 90 % (103 MB)
116 08:54:44.236855 progress 95 % (109 MB)
117 08:54:45.077027 progress 100 % (115 MB)
118 08:54:45.089487 115 MB downloaded in 14.99 s (7.69 MB/s)
119 08:54:45.090064 end: 1.4.1 http-download (duration 00:00:15) [common]
121 08:54:45.090883 end: 1.4 download-retry (duration 00:00:15) [common]
122 08:54:45.091146 start: 1.5 download-retry (timeout 00:09:44) [common]
123 08:54:45.091404 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 08:54:45.091899 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-328-gf46306bca74bb/arm64/defconfig/gcc-12/modules.tar.xz
125 08:54:45.092305 saving as /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/modules/modules.tar
126 08:54:45.092710 total size: 11614628 (11 MB)
127 08:54:45.093120 Using unxz to decompress xz
128 08:54:45.139041 progress 0 % (0 MB)
129 08:54:45.205422 progress 5 % (0 MB)
130 08:54:45.279495 progress 10 % (1 MB)
131 08:54:45.375123 progress 15 % (1 MB)
132 08:54:45.466994 progress 20 % (2 MB)
133 08:54:45.546806 progress 25 % (2 MB)
134 08:54:45.622384 progress 30 % (3 MB)
135 08:54:45.701155 progress 35 % (3 MB)
136 08:54:45.773749 progress 40 % (4 MB)
137 08:54:45.850398 progress 45 % (5 MB)
138 08:54:45.934708 progress 50 % (5 MB)
139 08:54:46.011958 progress 55 % (6 MB)
140 08:54:46.097174 progress 60 % (6 MB)
141 08:54:46.177711 progress 65 % (7 MB)
142 08:54:46.257931 progress 70 % (7 MB)
143 08:54:46.335869 progress 75 % (8 MB)
144 08:54:46.418718 progress 80 % (8 MB)
145 08:54:46.498246 progress 85 % (9 MB)
146 08:54:46.580807 progress 90 % (10 MB)
147 08:54:46.653952 progress 95 % (10 MB)
148 08:54:46.730473 progress 100 % (11 MB)
149 08:54:46.742350 11 MB downloaded in 1.65 s (6.71 MB/s)
150 08:54:46.742939 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:54:46.743762 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:54:46.744116 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 08:54:46.744703 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 08:55:04.168053 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/933557/extract-nfsrootfs-dz7dhz5v
156 08:55:04.168795 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 08:55:04.169149 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 08:55:04.170027 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp
159 08:55:04.170563 makedir: /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin
160 08:55:04.170971 makedir: /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/tests
161 08:55:04.171386 makedir: /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/results
162 08:55:04.171787 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-add-keys
163 08:55:04.172484 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-add-sources
164 08:55:04.173116 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-background-process-start
165 08:55:04.173765 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-background-process-stop
166 08:55:04.174409 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-common-functions
167 08:55:04.175009 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-echo-ipv4
168 08:55:04.175585 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-install-packages
169 08:55:04.176201 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-installed-packages
170 08:55:04.176804 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-os-build
171 08:55:04.177367 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-probe-channel
172 08:55:04.177937 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-probe-ip
173 08:55:04.178508 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-target-ip
174 08:55:04.179166 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-target-mac
175 08:55:04.179754 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-target-storage
176 08:55:04.180388 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-test-case
177 08:55:04.181019 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-test-event
178 08:55:04.181636 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-test-feedback
179 08:55:04.182242 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-test-raise
180 08:55:04.182838 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-test-reference
181 08:55:04.183402 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-test-runner
182 08:55:04.184018 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-test-set
183 08:55:04.184632 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-test-shell
184 08:55:04.185254 Updating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-add-keys (debian)
185 08:55:04.185921 Updating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-add-sources (debian)
186 08:55:04.186547 Updating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-install-packages (debian)
187 08:55:04.187152 Updating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-installed-packages (debian)
188 08:55:04.187783 Updating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/bin/lava-os-build (debian)
189 08:55:04.188423 Creating /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/environment
190 08:55:04.188906 LAVA metadata
191 08:55:04.189237 - LAVA_JOB_ID=933557
192 08:55:04.189497 - LAVA_DISPATCHER_IP=192.168.6.2
193 08:55:04.189965 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 08:55:04.191234 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 08:55:04.191654 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 08:55:04.191908 skipped lava-vland-overlay
197 08:55:04.192247 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 08:55:04.192564 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 08:55:04.192841 skipped lava-multinode-overlay
200 08:55:04.193143 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 08:55:04.193443 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 08:55:04.193757 Loading test definitions
203 08:55:04.194099 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 08:55:04.194369 Using /lava-933557 at stage 0
205 08:55:04.195843 uuid=933557_1.6.2.4.1 testdef=None
206 08:55:04.196269 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 08:55:04.196596 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 08:55:04.198683 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 08:55:04.199675 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 08:55:04.202191 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 08:55:04.203322 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 08:55:04.205848 runner path: /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/0/tests/0_timesync-off test_uuid 933557_1.6.2.4.1
215 08:55:04.206681 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 08:55:04.207699 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 08:55:04.208001 Using /lava-933557 at stage 0
219 08:55:04.208469 Fetching tests from https://github.com/kernelci/test-definitions.git
220 08:55:04.208828 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/0/tests/1_kselftest-kvm'
221 08:55:07.724739 Running '/usr/bin/git checkout kernelci.org
222 08:55:08.169970 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/0/tests/1_kselftest-kvm/automated/linux/kselftest/kselftest.yaml
223 08:55:08.171397 uuid=933557_1.6.2.4.5 testdef=None
224 08:55:08.171735 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 08:55:08.172539 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 08:55:08.175382 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 08:55:08.176275 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 08:55:08.180061 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 08:55:08.180931 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 08:55:08.184533 runner path: /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/0/tests/1_kselftest-kvm test_uuid 933557_1.6.2.4.5
234 08:55:08.184834 BOARD='meson-sm1-s905d3-libretech-cc'
235 08:55:08.185038 BRANCH='tip'
236 08:55:08.185234 SKIPFILE='/dev/null'
237 08:55:08.185430 SKIP_INSTALL='True'
238 08:55:08.185623 TESTPROG_URL='http://storage.kernelci.org/tip/master/v6.12-rc6-328-gf46306bca74bb/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 08:55:08.185821 TST_CASENAME=''
240 08:55:08.186013 TST_CMDFILES='kvm'
241 08:55:08.186569 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 08:55:08.187368 Creating lava-test-runner.conf files
244 08:55:08.187571 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/933557/lava-overlay-w_uy6egp/lava-933557/0 for stage 0
245 08:55:08.187921 - 0_timesync-off
246 08:55:08.188196 - 1_kselftest-kvm
247 08:55:08.188533 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 08:55:08.188819 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 08:55:32.377509 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 08:55:32.377953 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 08:55:32.378216 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 08:55:32.378485 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 08:55:32.378749 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 08:55:33.004911 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 08:55:33.005397 start: 1.6.4 extract-modules (timeout 00:08:56) [common]
256 08:55:33.005652 extracting modules file /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933557/extract-nfsrootfs-dz7dhz5v
257 08:55:34.384925 extracting modules file /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933557/extract-overlay-ramdisk-x7u3_7lj/ramdisk
258 08:55:35.790246 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 08:55:35.790732 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 08:55:35.791032 [common] Applying overlay to NFS
261 08:55:35.791260 [common] Applying overlay /var/lib/lava/dispatcher/tmp/933557/compress-overlay-1p7e3e_c/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/933557/extract-nfsrootfs-dz7dhz5v
262 08:55:38.543271 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 08:55:38.543754 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 08:55:38.544059 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 08:55:38.544303 Converting downloaded kernel to a uImage
266 08:55:38.544617 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/kernel/Image /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/kernel/uImage
267 08:55:39.040778 output: Image Name:
268 08:55:39.041196 output: Created: Mon Nov 4 08:55:38 2024
269 08:55:39.041408 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 08:55:39.041616 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 08:55:39.041818 output: Load Address: 01080000
272 08:55:39.042020 output: Entry Point: 01080000
273 08:55:39.042220 output:
274 08:55:39.042552 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 08:55:39.042819 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 08:55:39.043085 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
277 08:55:39.043339 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 08:55:39.043597 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
279 08:55:39.043852 Building ramdisk /var/lib/lava/dispatcher/tmp/933557/extract-overlay-ramdisk-x7u3_7lj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/933557/extract-overlay-ramdisk-x7u3_7lj/ramdisk
280 08:55:41.169547 >> 166824 blocks
281 08:55:48.839316 Adding RAMdisk u-boot header.
282 08:55:48.839758 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/933557/extract-overlay-ramdisk-x7u3_7lj/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/933557/extract-overlay-ramdisk-x7u3_7lj/ramdisk.cpio.gz.uboot
283 08:55:49.087466 output: Image Name:
284 08:55:49.087886 output: Created: Mon Nov 4 08:55:48 2024
285 08:55:49.088271 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 08:55:49.088727 output: Data Size: 23434089 Bytes = 22884.85 KiB = 22.35 MiB
287 08:55:49.089172 output: Load Address: 00000000
288 08:55:49.089607 output: Entry Point: 00000000
289 08:55:49.090042 output:
290 08:55:49.091379 rename /var/lib/lava/dispatcher/tmp/933557/extract-overlay-ramdisk-x7u3_7lj/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/ramdisk/ramdisk.cpio.gz.uboot
291 08:55:49.092195 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 08:55:49.092799 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 08:55:49.093371 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 08:55:49.093880 No LXC device requested
295 08:55:49.094426 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 08:55:49.094985 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 08:55:49.095525 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 08:55:49.095974 Checking files for TFTP limit of 4294967296 bytes.
299 08:55:49.098906 end: 1 tftp-deploy (duration 00:01:20) [common]
300 08:55:49.099527 start: 2 uboot-action (timeout 00:05:00) [common]
301 08:55:49.100131 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 08:55:49.100680 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 08:55:49.101228 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 08:55:49.101793 Using kernel file from prepare-kernel: 933557/tftp-deploy-81zr256w/kernel/uImage
305 08:55:49.102475 substitutions:
306 08:55:49.102922 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 08:55:49.103367 - {DTB_ADDR}: 0x01070000
308 08:55:49.103803 - {DTB}: 933557/tftp-deploy-81zr256w/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 08:55:49.104277 - {INITRD}: 933557/tftp-deploy-81zr256w/ramdisk/ramdisk.cpio.gz.uboot
310 08:55:49.104715 - {KERNEL_ADDR}: 0x01080000
311 08:55:49.105147 - {KERNEL}: 933557/tftp-deploy-81zr256w/kernel/uImage
312 08:55:49.105574 - {LAVA_MAC}: None
313 08:55:49.106040 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/933557/extract-nfsrootfs-dz7dhz5v
314 08:55:49.106472 - {NFS_SERVER_IP}: 192.168.6.2
315 08:55:49.106899 - {PRESEED_CONFIG}: None
316 08:55:49.107323 - {PRESEED_LOCAL}: None
317 08:55:49.107751 - {RAMDISK_ADDR}: 0x08000000
318 08:55:49.108251 - {RAMDISK}: 933557/tftp-deploy-81zr256w/ramdisk/ramdisk.cpio.gz.uboot
319 08:55:49.108692 - {ROOT_PART}: None
320 08:55:49.109117 - {ROOT}: None
321 08:55:49.109544 - {SERVER_IP}: 192.168.6.2
322 08:55:49.109968 - {TEE_ADDR}: 0x83000000
323 08:55:49.110389 - {TEE}: None
324 08:55:49.110807 Parsed boot commands:
325 08:55:49.111216 - setenv autoload no
326 08:55:49.111636 - setenv initrd_high 0xffffffff
327 08:55:49.112080 - setenv fdt_high 0xffffffff
328 08:55:49.112504 - dhcp
329 08:55:49.112924 - setenv serverip 192.168.6.2
330 08:55:49.113348 - tftpboot 0x01080000 933557/tftp-deploy-81zr256w/kernel/uImage
331 08:55:49.113776 - tftpboot 0x08000000 933557/tftp-deploy-81zr256w/ramdisk/ramdisk.cpio.gz.uboot
332 08:55:49.114201 - tftpboot 0x01070000 933557/tftp-deploy-81zr256w/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 08:55:49.114624 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/933557/extract-nfsrootfs-dz7dhz5v,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 08:55:49.115061 - bootm 0x01080000 0x08000000 0x01070000
335 08:55:49.115594 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 08:55:49.117250 start: 2.3 connect-device (timeout 00:05:00) [common]
338 08:55:49.117708 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 08:55:49.133154 Setting prompt string to ['lava-test: # ']
340 08:55:49.134788 end: 2.3 connect-device (duration 00:00:00) [common]
341 08:55:49.135453 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 08:55:49.136096 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 08:55:49.136699 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 08:55:49.138004 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 08:55:49.179344 >> OK - accepted request
346 08:55:49.181495 Returned 0 in 0 seconds
347 08:55:49.282654 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 08:55:49.284474 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 08:55:49.285101 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 08:55:49.285673 Setting prompt string to ['Hit any key to stop autoboot']
352 08:55:49.286184 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 08:55:49.287913 Trying 192.168.56.21...
354 08:55:49.288472 Connected to conserv1.
355 08:55:49.288952 Escape character is '^]'.
356 08:55:49.289411
357 08:55:49.289875 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 08:55:49.290338
359 08:55:56.917355 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 08:55:56.918049 bl2_stage_init 0x01
361 08:55:56.918518 bl2_stage_init 0x81
362 08:55:56.922916 hw id: 0x0000 - pwm id 0x01
363 08:55:56.923484 bl2_stage_init 0xc1
364 08:55:56.923955 bl2_stage_init 0x02
365 08:55:56.924470
366 08:55:56.928504 L0:00000000
367 08:55:56.929054 L1:00000703
368 08:55:56.929515 L2:00008067
369 08:55:56.929968 L3:15000000
370 08:55:56.930412 S1:00000000
371 08:55:56.934090 B2:20282000
372 08:55:56.934648 B1:a0f83180
373 08:55:56.935110
374 08:55:56.935548 TE: 73601
375 08:55:56.936017
376 08:55:56.939776 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 08:55:56.940344
378 08:55:56.945236 Board ID = 1
379 08:55:56.945726 Set cpu clk to 24M
380 08:55:56.946179 Set clk81 to 24M
381 08:55:56.950883 Use GP1_pll as DSU clk.
382 08:55:56.951432 DSU clk: 1200 Mhz
383 08:55:56.951870 CPU clk: 1200 MHz
384 08:55:56.952355 Set clk81 to 166.6M
385 08:55:56.962091 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 08:55:56.962660 board id: 1
387 08:55:56.968541 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 08:55:56.979421 fw parse done
389 08:55:56.985366 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 08:55:57.028587 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 08:55:57.039518 PIEI prepare done
392 08:55:57.040095 fastboot data load
393 08:55:57.040544 fastboot data verify
394 08:55:57.045119 verify result: 266
395 08:55:57.050765 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 08:55:57.051272 LPDDR4 probe
397 08:55:57.051711 ddr clk to 1584MHz
398 08:55:57.058819 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 08:55:57.096520
400 08:55:57.097068 dmc_version 0001
401 08:55:57.103564 Check phy result
402 08:55:57.109492 INFO : End of CA training
403 08:55:57.110013 INFO : End of initialization
404 08:55:57.115064 INFO : Training has run successfully!
405 08:55:57.115580 Check phy result
406 08:55:57.120724 INFO : End of initialization
407 08:55:57.121225 INFO : End of read enable training
408 08:55:57.126266 INFO : End of fine write leveling
409 08:55:57.131894 INFO : End of Write leveling coarse delay
410 08:55:57.132410 INFO : Training has run successfully!
411 08:55:57.132849 Check phy result
412 08:55:57.137463 INFO : End of initialization
413 08:55:57.137966 INFO : End of read dq deskew training
414 08:55:57.143071 INFO : End of MPR read delay center optimization
415 08:55:57.148726 INFO : End of write delay center optimization
416 08:55:57.154266 INFO : End of read delay center optimization
417 08:55:57.154769 INFO : End of max read latency training
418 08:55:57.159926 INFO : Training has run successfully!
419 08:55:57.160472 1D training succeed
420 08:55:57.169070 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 08:55:57.217491 Check phy result
422 08:55:57.218103 INFO : End of initialization
423 08:55:57.244962 INFO : End of 2D read delay Voltage center optimization
424 08:55:57.267956 INFO : End of 2D read delay Voltage center optimization
425 08:55:57.325109 INFO : End of 2D write delay Voltage center optimization
426 08:55:57.379585 INFO : End of 2D write delay Voltage center optimization
427 08:55:57.385165 INFO : Training has run successfully!
428 08:55:57.385639
429 08:55:57.386090 channel==0
430 08:55:57.390747 RxClkDly_Margin_A0==78 ps 8
431 08:55:57.391212 TxDqDly_Margin_A0==88 ps 9
432 08:55:57.394016 RxClkDly_Margin_A1==88 ps 9
433 08:55:57.394469 TxDqDly_Margin_A1==88 ps 9
434 08:55:57.399565 TrainedVREFDQ_A0==74
435 08:55:57.400058 TrainedVREFDQ_A1==75
436 08:55:57.400498 VrefDac_Margin_A0==24
437 08:55:57.405132 DeviceVref_Margin_A0==40
438 08:55:57.405586 VrefDac_Margin_A1==22
439 08:55:57.410751 DeviceVref_Margin_A1==39
440 08:55:57.411202
441 08:55:57.411635
442 08:55:57.412102 channel==1
443 08:55:57.412537 RxClkDly_Margin_A0==78 ps 8
444 08:55:57.414145 TxDqDly_Margin_A0==98 ps 10
445 08:55:57.419724 RxClkDly_Margin_A1==78 ps 8
446 08:55:57.420228 TxDqDly_Margin_A1==78 ps 8
447 08:55:57.420668 TrainedVREFDQ_A0==78
448 08:55:57.425260 TrainedVREFDQ_A1==75
449 08:55:57.425717 VrefDac_Margin_A0==22
450 08:55:57.430864 DeviceVref_Margin_A0==36
451 08:55:57.431322 VrefDac_Margin_A1==22
452 08:55:57.431753 DeviceVref_Margin_A1==38
453 08:55:57.432218
454 08:55:57.436476 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 08:55:57.436940
456 08:55:57.470076 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 08:55:57.470615 2D training succeed
458 08:55:57.475702 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 08:55:57.481265 auto size-- 65535DDR cs0 size: 2048MB
460 08:55:57.481726 DDR cs1 size: 2048MB
461 08:55:57.486885 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 08:55:57.487346 cs0 DataBus test pass
463 08:55:57.487780 cs1 DataBus test pass
464 08:55:57.492517 cs0 AddrBus test pass
465 08:55:57.492978 cs1 AddrBus test pass
466 08:55:57.493408
467 08:55:57.498102 100bdlr_step_size ps== 485
468 08:55:57.498573 result report
469 08:55:57.499002 boot times 0Enable ddr reg access
470 08:55:57.506841 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 08:55:57.521786 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 08:55:58.181495 bl2z: ptr: 05129330, size: 00001e40
473 08:55:58.189908 0.0;M3 CHK:0;cm4_sp_mode 0
474 08:55:58.190423 MVN_1=0x00000000
475 08:55:58.190870 MVN_2=0x00000000
476 08:55:58.201291 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 08:55:58.201819 OPS=0x04
478 08:55:58.202280 ring efuse init
479 08:55:58.206901 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 08:55:58.207427 [0.017354 Inits done]
481 08:55:58.207882 secure task start!
482 08:55:58.214254 high task start!
483 08:55:58.214757 low task start!
484 08:55:58.215199 run into bl31
485 08:55:58.222987 NOTICE: BL31: v1.3(release):4fc40b1
486 08:55:58.230337 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 08:55:58.230893 NOTICE: BL31: G12A normal boot!
488 08:55:58.246170 NOTICE: BL31: BL33 decompress pass
489 08:55:58.251876 ERROR: Error initializing runtime service opteed_fast
490 08:56:00.962451 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 08:56:00.963137 bl2_stage_init 0x01
492 08:56:00.963620 bl2_stage_init 0x81
493 08:56:00.968205 hw id: 0x0000 - pwm id 0x01
494 08:56:00.968769 bl2_stage_init 0xc1
495 08:56:00.973361 bl2_stage_init 0x02
496 08:56:00.973939
497 08:56:00.974383 L0:00000000
498 08:56:00.974819 L1:00000703
499 08:56:00.975253 L2:00008067
500 08:56:00.975681 L3:15000000
501 08:56:00.978885 S1:00000000
502 08:56:00.979370 B2:20282000
503 08:56:00.979801 B1:a0f83180
504 08:56:00.980270
505 08:56:00.980706 TE: 68250
506 08:56:00.981133
507 08:56:00.984443 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 08:56:00.990125
509 08:56:00.990610 Board ID = 1
510 08:56:00.991048 Set cpu clk to 24M
511 08:56:00.991477 Set clk81 to 24M
512 08:56:00.995653 Use GP1_pll as DSU clk.
513 08:56:00.996166 DSU clk: 1200 Mhz
514 08:56:00.996601 CPU clk: 1200 MHz
515 08:56:01.001279 Set clk81 to 166.6M
516 08:56:01.006884 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 08:56:01.007364 board id: 1
518 08:56:01.014399 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 08:56:01.025191 fw parse done
520 08:56:01.031032 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 08:56:01.073661 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 08:56:01.084555 PIEI prepare done
523 08:56:01.085030 fastboot data load
524 08:56:01.085462 fastboot data verify
525 08:56:01.090317 verify result: 266
526 08:56:01.095933 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 08:56:01.096476 LPDDR4 probe
528 08:56:01.096912 ddr clk to 1584MHz
529 08:56:01.103824 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 08:56:01.141141
531 08:56:01.141668 dmc_version 0001
532 08:56:01.147815 Check phy result
533 08:56:01.153761 INFO : End of CA training
534 08:56:01.154308 INFO : End of initialization
535 08:56:01.159386 INFO : Training has run successfully!
536 08:56:01.159921 Check phy result
537 08:56:01.164954 INFO : End of initialization
538 08:56:01.165464 INFO : End of read enable training
539 08:56:01.168350 INFO : End of fine write leveling
540 08:56:01.173858 INFO : End of Write leveling coarse delay
541 08:56:01.179439 INFO : Training has run successfully!
542 08:56:01.179941 Check phy result
543 08:56:01.180434 INFO : End of initialization
544 08:56:01.185033 INFO : End of read dq deskew training
545 08:56:01.188439 INFO : End of MPR read delay center optimization
546 08:56:01.194023 INFO : End of write delay center optimization
547 08:56:01.199665 INFO : End of read delay center optimization
548 08:56:01.200222 INFO : End of max read latency training
549 08:56:01.205335 INFO : Training has run successfully!
550 08:56:01.205847 1D training succeed
551 08:56:01.213395 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 08:56:01.260930 Check phy result
553 08:56:01.261474 INFO : End of initialization
554 08:56:01.283268 INFO : End of 2D read delay Voltage center optimization
555 08:56:01.302474 INFO : End of 2D read delay Voltage center optimization
556 08:56:01.354520 INFO : End of 2D write delay Voltage center optimization
557 08:56:01.403547 INFO : End of 2D write delay Voltage center optimization
558 08:56:01.409115 INFO : Training has run successfully!
559 08:56:01.409654
560 08:56:01.410110 channel==0
561 08:56:01.414691 RxClkDly_Margin_A0==88 ps 9
562 08:56:01.415211 TxDqDly_Margin_A0==98 ps 10
563 08:56:01.420399 RxClkDly_Margin_A1==88 ps 9
564 08:56:01.420925 TxDqDly_Margin_A1==98 ps 10
565 08:56:01.421375 TrainedVREFDQ_A0==74
566 08:56:01.425870 TrainedVREFDQ_A1==75
567 08:56:01.426395 VrefDac_Margin_A0==24
568 08:56:01.426847 DeviceVref_Margin_A0==40
569 08:56:01.431510 VrefDac_Margin_A1==22
570 08:56:01.432064 DeviceVref_Margin_A1==39
571 08:56:01.432517
572 08:56:01.432962
573 08:56:01.437082 channel==1
574 08:56:01.437606 RxClkDly_Margin_A0==78 ps 8
575 08:56:01.438053 TxDqDly_Margin_A0==98 ps 10
576 08:56:01.442658 RxClkDly_Margin_A1==78 ps 8
577 08:56:01.443177 TxDqDly_Margin_A1==88 ps 9
578 08:56:01.448343 TrainedVREFDQ_A0==78
579 08:56:01.448845 TrainedVREFDQ_A1==77
580 08:56:01.449299 VrefDac_Margin_A0==22
581 08:56:01.453831 DeviceVref_Margin_A0==36
582 08:56:01.454333 VrefDac_Margin_A1==22
583 08:56:01.459451 DeviceVref_Margin_A1==37
584 08:56:01.459950
585 08:56:01.460445 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 08:56:01.460897
587 08:56:01.493054 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
588 08:56:01.493650 2D training succeed
589 08:56:01.498668 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 08:56:01.504350 auto size-- 65535DDR cs0 size: 2048MB
591 08:56:01.504857 DDR cs1 size: 2048MB
592 08:56:01.509855 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 08:56:01.510362 cs0 DataBus test pass
594 08:56:01.515468 cs1 DataBus test pass
595 08:56:01.515970 cs0 AddrBus test pass
596 08:56:01.516473 cs1 AddrBus test pass
597 08:56:01.516915
598 08:56:01.521106 100bdlr_step_size ps== 464
599 08:56:01.521625 result report
600 08:56:01.526667 boot times 0Enable ddr reg access
601 08:56:01.531947 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 08:56:01.545618 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 08:56:02.200170 bl2z: ptr: 05129330, size: 00001e40
604 08:56:02.208457 0.0;M3 CHK:0;cm4_sp_mode 0
605 08:56:02.208975 MVN_1=0x00000000
606 08:56:02.209427 MVN_2=0x00000000
607 08:56:02.219920 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 08:56:02.220505 OPS=0x04
609 08:56:02.220973 ring efuse init
610 08:56:02.225565 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 08:56:02.226065 [0.017318 Inits done]
612 08:56:02.226514 secure task start!
613 08:56:02.233429 high task start!
614 08:56:02.233964 low task start!
615 08:56:02.234420 run into bl31
616 08:56:02.241932 NOTICE: BL31: v1.3(release):4fc40b1
617 08:56:02.249716 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 08:56:02.250244 NOTICE: BL31: G12A normal boot!
619 08:56:02.265242 NOTICE: BL31: BL33 decompress pass
620 08:56:02.269989 ERROR: Error initializing runtime service opteed_fast
621 08:56:03.665437 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 08:56:03.666067 bl2_stage_init 0x01
623 08:56:03.666527 bl2_stage_init 0x81
624 08:56:03.670958 hw id: 0x0000 - pwm id 0x01
625 08:56:03.671438 bl2_stage_init 0xc1
626 08:56:03.675422 bl2_stage_init 0x02
627 08:56:03.675904
628 08:56:03.676425 L0:00000000
629 08:56:03.676873 L1:00000703
630 08:56:03.677317 L2:00008067
631 08:56:03.680972 L3:15000000
632 08:56:03.681447 S1:00000000
633 08:56:03.681896 B2:20282000
634 08:56:03.682335 B1:a0f83180
635 08:56:03.682767
636 08:56:03.683204 TE: 72163
637 08:56:03.683642
638 08:56:03.692195 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 08:56:03.692681
640 08:56:03.693136 Board ID = 1
641 08:56:03.693576 Set cpu clk to 24M
642 08:56:03.694013 Set clk81 to 24M
643 08:56:03.695680 Use GP1_pll as DSU clk.
644 08:56:03.701224 DSU clk: 1200 Mhz
645 08:56:03.701697 CPU clk: 1200 MHz
646 08:56:03.702141 Set clk81 to 166.6M
647 08:56:03.706761 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 08:56:03.712336 board id: 1
649 08:56:03.716269 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 08:56:03.728168 fw parse done
651 08:56:03.734147 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 08:56:03.776540 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 08:56:03.788403 PIEI prepare done
654 08:56:03.788880 fastboot data load
655 08:56:03.789328 fastboot data verify
656 08:56:03.793954 verify result: 266
657 08:56:03.799557 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 08:56:03.800068 LPDDR4 probe
659 08:56:03.800520 ddr clk to 1584MHz
660 08:56:03.807668 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 08:56:03.845353
662 08:56:03.845853 dmc_version 0001
663 08:56:03.852425 Check phy result
664 08:56:03.858332 INFO : End of CA training
665 08:56:03.858811 INFO : End of initialization
666 08:56:03.863922 INFO : Training has run successfully!
667 08:56:03.864432 Check phy result
668 08:56:03.869574 INFO : End of initialization
669 08:56:03.870046 INFO : End of read enable training
670 08:56:03.875118 INFO : End of fine write leveling
671 08:56:03.880753 INFO : End of Write leveling coarse delay
672 08:56:03.881266 INFO : Training has run successfully!
673 08:56:03.881720 Check phy result
674 08:56:03.886321 INFO : End of initialization
675 08:56:03.886798 INFO : End of read dq deskew training
676 08:56:03.891901 INFO : End of MPR read delay center optimization
677 08:56:03.897567 INFO : End of write delay center optimization
678 08:56:03.903112 INFO : End of read delay center optimization
679 08:56:03.903591 INFO : End of max read latency training
680 08:56:03.908732 INFO : Training has run successfully!
681 08:56:03.909210 1D training succeed
682 08:56:03.917905 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 08:56:03.966247 Check phy result
684 08:56:03.966746 INFO : End of initialization
685 08:56:03.993783 INFO : End of 2D read delay Voltage center optimization
686 08:56:04.017873 INFO : End of 2D read delay Voltage center optimization
687 08:56:04.074635 INFO : End of 2D write delay Voltage center optimization
688 08:56:04.128571 INFO : End of 2D write delay Voltage center optimization
689 08:56:04.134392 INFO : Training has run successfully!
690 08:56:04.135447
691 08:56:04.135948 channel==0
692 08:56:04.139803 RxClkDly_Margin_A0==78 ps 8
693 08:56:04.140238 TxDqDly_Margin_A0==98 ps 10
694 08:56:04.143011 RxClkDly_Margin_A1==88 ps 9
695 08:56:04.143351 TxDqDly_Margin_A1==88 ps 9
696 08:56:04.148706 TrainedVREFDQ_A0==75
697 08:56:04.149209 TrainedVREFDQ_A1==74
698 08:56:04.149670 VrefDac_Margin_A0==23
699 08:56:04.154229 DeviceVref_Margin_A0==39
700 08:56:04.154637 VrefDac_Margin_A1==23
701 08:56:04.159915 DeviceVref_Margin_A1==40
702 08:56:04.160588
703 08:56:04.161062
704 08:56:04.161529 channel==1
705 08:56:04.161873 RxClkDly_Margin_A0==78 ps 8
706 08:56:04.165552 TxDqDly_Margin_A0==98 ps 10
707 08:56:04.165951 RxClkDly_Margin_A1==78 ps 8
708 08:56:04.171097 TxDqDly_Margin_A1==88 ps 9
709 08:56:04.171673 TrainedVREFDQ_A0==78
710 08:56:04.171947 TrainedVREFDQ_A1==75
711 08:56:04.176577 VrefDac_Margin_A0==22
712 08:56:04.176970 DeviceVref_Margin_A0==36
713 08:56:04.182524 VrefDac_Margin_A1==22
714 08:56:04.182938 DeviceVref_Margin_A1==39
715 08:56:04.183308
716 08:56:04.187969 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 08:56:04.188600
718 08:56:04.215765 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 08:56:04.221279 2D training succeed
720 08:56:04.227003 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 08:56:04.227599 auto size-- 65535DDR cs0 size: 2048MB
722 08:56:04.232577 DDR cs1 size: 2048MB
723 08:56:04.233169 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 08:56:04.238192 cs0 DataBus test pass
725 08:56:04.238619 cs1 DataBus test pass
726 08:56:04.238855 cs0 AddrBus test pass
727 08:56:04.243629 cs1 AddrBus test pass
728 08:56:04.243929
729 08:56:04.244222 100bdlr_step_size ps== 485
730 08:56:04.244452 result report
731 08:56:04.249210 boot times 0Enable ddr reg access
732 08:56:04.256743 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 08:56:04.270778 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 08:56:04.931163 bl2z: ptr: 05129330, size: 00001e40
735 08:56:04.939466 0.0;M3 CHK:0;cm4_sp_mode 0
736 08:56:04.939964 MVN_1=0x00000000
737 08:56:04.940426 MVN_2=0x00000000
738 08:56:04.950912 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 08:56:04.951388 OPS=0x04
740 08:56:04.951828 ring efuse init
741 08:56:04.953855 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 08:56:04.959940 [0.017354 Inits done]
743 08:56:04.960428 secure task start!
744 08:56:04.960841 high task start!
745 08:56:04.961254 low task start!
746 08:56:04.964242 run into bl31
747 08:56:04.972859 NOTICE: BL31: v1.3(release):4fc40b1
748 08:56:04.980775 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 08:56:04.981244 NOTICE: BL31: G12A normal boot!
750 08:56:04.996184 NOTICE: BL31: BL33 decompress pass
751 08:56:05.001862 ERROR: Error initializing runtime service opteed_fast
752 08:56:05.797276
753 08:56:05.797850
754 08:56:05.802670 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 08:56:05.803143
756 08:56:05.806166 Model: Libre Computer AML-S905D3-CC Solitude
757 08:56:05.952293 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 08:56:05.968556 DRAM: 2 GiB (effective 3.8 GiB)
759 08:56:06.069534 Core: 406 devices, 33 uclasses, devicetree: separate
760 08:56:06.075404 WDT: Not starting watchdog@f0d0
761 08:56:06.100486 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 08:56:06.112824 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 08:56:06.117770 ** Bad device specification mmc 0 **
764 08:56:06.127870 Card did not respond to voltage select! : -110
765 08:56:06.135406 ** Bad device specification mmc 0 **
766 08:56:06.135869 Couldn't find partition mmc 0
767 08:56:06.143865 Card did not respond to voltage select! : -110
768 08:56:06.149255 ** Bad device specification mmc 0 **
769 08:56:06.149717 Couldn't find partition mmc 0
770 08:56:06.154312 Error: could not access storage.
771 08:56:06.450728 Net: eth0: ethernet@ff3f0000
772 08:56:06.451265 starting USB...
773 08:56:06.695383 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 08:56:06.695913 Starting the controller
775 08:56:06.702377 USB XHCI 1.10
776 08:56:08.256406 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 08:56:08.264700 scanning usb for storage devices... 0 Storage Device(s) found
779 08:56:08.316166 Hit any key to stop autoboot: 1
780 08:56:08.316910 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 08:56:08.317531 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 08:56:08.318015 Setting prompt string to ['=>']
783 08:56:08.318521 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 08:56:08.329830 0
785 08:56:08.330722 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 08:56:08.431930 => setenv autoload no
788 08:56:08.432628 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 08:56:08.437444 setenv autoload no
791 08:56:08.538887 => setenv initrd_high 0xffffffff
792 08:56:08.539528 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 08:56:08.543051 setenv initrd_high 0xffffffff
795 08:56:08.644497 => setenv fdt_high 0xffffffff
796 08:56:08.645166 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
797 08:56:08.649431 setenv fdt_high 0xffffffff
799 08:56:08.750898 => dhcp
800 08:56:08.751552 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
801 08:56:08.755589 dhcp
802 08:56:09.713154 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
803 08:56:09.713863 Speed: 1000, full duplex
804 08:56:09.714334 BOOTP broadcast 1
805 08:56:09.960150 BOOTP broadcast 2
806 08:56:09.971287 DHCP client bound to address 192.168.6.21 (259 ms)
808 08:56:10.072838 => setenv serverip 192.168.6.2
809 08:56:10.073489 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
810 08:56:10.078023 setenv serverip 192.168.6.2
812 08:56:10.179519 => tftpboot 0x01080000 933557/tftp-deploy-81zr256w/kernel/uImage
813 08:56:10.180208 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
814 08:56:10.186788 tftpboot 0x01080000 933557/tftp-deploy-81zr256w/kernel/uImage
815 08:56:10.187284 Speed: 1000, full duplex
816 08:56:10.187728 Using ethernet@ff3f0000 device
817 08:56:10.192286 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
818 08:56:10.197913 Filename '933557/tftp-deploy-81zr256w/kernel/uImage'.
819 08:56:10.201724 Load address: 0x1080000
820 08:56:12.960353 Loading: *################################################## 43.6 MiB
821 08:56:12.961023 15.8 MiB/s
822 08:56:12.961479 done
823 08:56:12.964902 Bytes transferred = 45713984 (2b98a40 hex)
825 08:56:13.066407 => tftpboot 0x08000000 933557/tftp-deploy-81zr256w/ramdisk/ramdisk.cpio.gz.uboot
826 08:56:13.067021 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
827 08:56:13.073736 tftpboot 0x08000000 933557/tftp-deploy-81zr256w/ramdisk/ramdisk.cpio.gz.uboot
828 08:56:13.074225 Speed: 1000, full duplex
829 08:56:13.074664 Using ethernet@ff3f0000 device
830 08:56:13.079281 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
831 08:56:13.089025 Filename '933557/tftp-deploy-81zr256w/ramdisk/ramdisk.cpio.gz.uboot'.
832 08:56:13.089502 Load address: 0x8000000
833 08:56:14.489383 Loading: *################################################# UDP wrong checksum 00000005 000011cd
834 08:56:19.490091 T UDP wrong checksum 00000005 000011cd
835 08:56:29.491753 T T UDP wrong checksum 00000005 000011cd
836 08:56:49.495798 T T T T UDP wrong checksum 00000005 000011cd
837 08:57:09.500857 T T T
838 08:57:09.501510 Retry count exceeded; starting again
840 08:57:09.503057 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
843 08:57:09.505224 end: 2.4 uboot-commands (duration 00:01:20) [common]
845 08:57:09.506754 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
847 08:57:09.507846 end: 2 uboot-action (duration 00:01:20) [common]
849 08:57:09.509571 Cleaning after the job
850 08:57:09.510160 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/ramdisk
851 08:57:09.511525 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/kernel
852 08:57:09.559394 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/dtb
853 08:57:09.560214 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/nfsrootfs
854 08:57:09.727214 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933557/tftp-deploy-81zr256w/modules
855 08:57:09.745905 start: 4.1 power-off (timeout 00:00:30) [common]
856 08:57:09.746530 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
857 08:57:09.780155 >> OK - accepted request
858 08:57:09.782408 Returned 0 in 0 seconds
859 08:57:09.883301 end: 4.1 power-off (duration 00:00:00) [common]
861 08:57:09.884606 start: 4.2 read-feedback (timeout 00:10:00) [common]
862 08:57:09.885492 Listened to connection for namespace 'common' for up to 1s
863 08:57:10.886347 Finalising connection for namespace 'common'
864 08:57:10.886833 Disconnecting from shell: Finalise
865 08:57:10.887123 =>
866 08:57:10.987766 end: 4.2 read-feedback (duration 00:00:01) [common]
867 08:57:10.988157 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/933557
868 08:57:13.913419 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/933557
869 08:57:13.914052 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.