Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:58:48.880171 lava-dispatcher, installed at version: 2024.01
2 08:58:48.880945 start: 0 validate
3 08:58:48.881421 Start time: 2024-11-04 08:58:48.881392+00:00 (UTC)
4 08:58:48.881949 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:58:48.882492 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:58:48.922500 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:58:48.923031 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-328-gf46306bca74bb%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:58:48.954324 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:58:48.954910 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-328-gf46306bca74bb%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 08:58:48.985626 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:58:48.986393 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:58:49.018580 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:58:49.019326 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-328-gf46306bca74bb%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 08:58:49.056656 validate duration: 0.18
16 08:58:49.057483 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:58:49.057796 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:58:49.058098 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:58:49.058664 Not decompressing ramdisk as can be used compressed.
20 08:58:49.059108 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 08:58:49.059378 saving as /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/ramdisk/initrd.cpio.gz
22 08:58:49.059639 total size: 5628140 (5 MB)
23 08:58:49.098606 progress 0 % (0 MB)
24 08:58:49.106482 progress 5 % (0 MB)
25 08:58:49.114774 progress 10 % (0 MB)
26 08:58:49.122044 progress 15 % (0 MB)
27 08:58:49.127217 progress 20 % (1 MB)
28 08:58:49.130934 progress 25 % (1 MB)
29 08:58:49.135144 progress 30 % (1 MB)
30 08:58:49.139392 progress 35 % (1 MB)
31 08:58:49.143172 progress 40 % (2 MB)
32 08:58:49.147266 progress 45 % (2 MB)
33 08:58:49.151033 progress 50 % (2 MB)
34 08:58:49.155229 progress 55 % (2 MB)
35 08:58:49.159396 progress 60 % (3 MB)
36 08:58:49.163443 progress 65 % (3 MB)
37 08:58:49.167603 progress 70 % (3 MB)
38 08:58:49.171354 progress 75 % (4 MB)
39 08:58:49.175505 progress 80 % (4 MB)
40 08:58:49.179277 progress 85 % (4 MB)
41 08:58:49.183428 progress 90 % (4 MB)
42 08:58:49.187507 progress 95 % (5 MB)
43 08:58:49.190902 progress 100 % (5 MB)
44 08:58:49.191596 5 MB downloaded in 0.13 s (40.68 MB/s)
45 08:58:49.192213 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:58:49.193190 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:58:49.193534 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:58:49.193838 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:58:49.194344 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-328-gf46306bca74bb/arm64/defconfig/gcc-12/kernel/Image
51 08:58:49.194627 saving as /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/kernel/Image
52 08:58:49.194860 total size: 45713920 (43 MB)
53 08:58:49.195089 No compression specified
54 08:58:49.232178 progress 0 % (0 MB)
55 08:58:49.261069 progress 5 % (2 MB)
56 08:58:49.289308 progress 10 % (4 MB)
57 08:58:49.318649 progress 15 % (6 MB)
58 08:58:49.347176 progress 20 % (8 MB)
59 08:58:49.375202 progress 25 % (10 MB)
60 08:58:49.404594 progress 30 % (13 MB)
61 08:58:49.432816 progress 35 % (15 MB)
62 08:58:49.462005 progress 40 % (17 MB)
63 08:58:49.490443 progress 45 % (19 MB)
64 08:58:49.519065 progress 50 % (21 MB)
65 08:58:49.547915 progress 55 % (24 MB)
66 08:58:49.576113 progress 60 % (26 MB)
67 08:58:49.605498 progress 65 % (28 MB)
68 08:58:49.634449 progress 70 % (30 MB)
69 08:58:49.663924 progress 75 % (32 MB)
70 08:58:49.693232 progress 80 % (34 MB)
71 08:58:49.722083 progress 85 % (37 MB)
72 08:58:49.750862 progress 90 % (39 MB)
73 08:58:49.779519 progress 95 % (41 MB)
74 08:58:49.808133 progress 100 % (43 MB)
75 08:58:49.808702 43 MB downloaded in 0.61 s (71.02 MB/s)
76 08:58:49.809243 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:58:49.810131 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:58:49.810450 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:58:49.810751 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:58:49.811245 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-328-gf46306bca74bb/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 08:58:49.811551 saving as /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/dtb/meson-g12b-a311d-libretech-cc.dtb
83 08:58:49.811782 total size: 54703 (0 MB)
84 08:58:49.812030 No compression specified
85 08:58:49.853469 progress 59 % (0 MB)
86 08:58:49.854328 progress 100 % (0 MB)
87 08:58:49.854930 0 MB downloaded in 0.04 s (1.21 MB/s)
88 08:58:49.855436 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:58:49.856869 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:58:49.857439 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:58:49.857965 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:58:49.858758 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 08:58:49.859218 saving as /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/nfsrootfs/full.rootfs.tar
95 08:58:49.859623 total size: 474398908 (452 MB)
96 08:58:49.860095 Using unxz to decompress xz
97 08:58:49.891702 progress 0 % (0 MB)
98 08:58:50.982057 progress 5 % (22 MB)
99 08:58:52.448217 progress 10 % (45 MB)
100 08:58:52.888122 progress 15 % (67 MB)
101 08:58:53.665488 progress 20 % (90 MB)
102 08:58:54.211739 progress 25 % (113 MB)
103 08:58:54.570768 progress 30 % (135 MB)
104 08:58:55.174929 progress 35 % (158 MB)
105 08:58:56.108727 progress 40 % (181 MB)
106 08:58:56.979050 progress 45 % (203 MB)
107 08:58:57.559802 progress 50 % (226 MB)
108 08:58:58.205341 progress 55 % (248 MB)
109 08:58:59.425616 progress 60 % (271 MB)
110 08:59:00.926941 progress 65 % (294 MB)
111 08:59:02.579341 progress 70 % (316 MB)
112 08:59:05.629072 progress 75 % (339 MB)
113 08:59:08.036030 progress 80 % (361 MB)
114 08:59:10.925689 progress 85 % (384 MB)
115 08:59:14.064997 progress 90 % (407 MB)
116 08:59:17.287601 progress 95 % (429 MB)
117 08:59:20.439748 progress 100 % (452 MB)
118 08:59:20.452808 452 MB downloaded in 30.59 s (14.79 MB/s)
119 08:59:20.453392 end: 1.4.1 http-download (duration 00:00:31) [common]
121 08:59:20.454206 end: 1.4 download-retry (duration 00:00:31) [common]
122 08:59:20.454470 start: 1.5 download-retry (timeout 00:09:29) [common]
123 08:59:20.454730 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 08:59:20.455196 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-328-gf46306bca74bb/arm64/defconfig/gcc-12/modules.tar.xz
125 08:59:20.455434 saving as /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/modules/modules.tar
126 08:59:20.455638 total size: 11614628 (11 MB)
127 08:59:20.455847 Using unxz to decompress xz
128 08:59:20.503281 progress 0 % (0 MB)
129 08:59:20.569465 progress 5 % (0 MB)
130 08:59:20.643434 progress 10 % (1 MB)
131 08:59:20.738630 progress 15 % (1 MB)
132 08:59:20.829951 progress 20 % (2 MB)
133 08:59:20.909067 progress 25 % (2 MB)
134 08:59:20.983751 progress 30 % (3 MB)
135 08:59:21.062802 progress 35 % (3 MB)
136 08:59:21.134724 progress 40 % (4 MB)
137 08:59:21.210245 progress 45 % (5 MB)
138 08:59:21.294260 progress 50 % (5 MB)
139 08:59:21.372856 progress 55 % (6 MB)
140 08:59:21.457503 progress 60 % (6 MB)
141 08:59:21.539517 progress 65 % (7 MB)
142 08:59:21.621395 progress 70 % (7 MB)
143 08:59:21.699586 progress 75 % (8 MB)
144 08:59:21.784008 progress 80 % (8 MB)
145 08:59:21.863802 progress 85 % (9 MB)
146 08:59:21.946530 progress 90 % (10 MB)
147 08:59:22.019741 progress 95 % (10 MB)
148 08:59:22.096586 progress 100 % (11 MB)
149 08:59:22.108503 11 MB downloaded in 1.65 s (6.70 MB/s)
150 08:59:22.109117 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:59:22.109953 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:59:22.110224 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 08:59:22.110493 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 08:59:37.442243 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/933564/extract-nfsrootfs-s5a8q0ms
156 08:59:37.442842 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 08:59:37.443126 start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
158 08:59:37.443836 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip
159 08:59:37.444337 makedir: /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin
160 08:59:37.444687 makedir: /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/tests
161 08:59:37.445018 makedir: /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/results
162 08:59:37.445349 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-add-keys
163 08:59:37.445875 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-add-sources
164 08:59:37.446383 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-background-process-start
165 08:59:37.446955 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-background-process-stop
166 08:59:37.447527 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-common-functions
167 08:59:37.448085 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-echo-ipv4
168 08:59:37.448648 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-install-packages
169 08:59:37.449182 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-installed-packages
170 08:59:37.449689 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-os-build
171 08:59:37.450170 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-probe-channel
172 08:59:37.450656 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-probe-ip
173 08:59:37.451131 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-target-ip
174 08:59:37.451606 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-target-mac
175 08:59:37.452122 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-target-storage
176 08:59:37.452634 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-test-case
177 08:59:37.453124 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-test-event
178 08:59:37.453606 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-test-feedback
179 08:59:37.454089 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-test-raise
180 08:59:37.454645 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-test-reference
181 08:59:37.455133 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-test-runner
182 08:59:37.455620 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-test-set
183 08:59:37.456131 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-test-shell
184 08:59:37.456630 Updating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-install-packages (oe)
185 08:59:37.457172 Updating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/bin/lava-installed-packages (oe)
186 08:59:37.457621 Creating /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/environment
187 08:59:37.457996 LAVA metadata
188 08:59:37.458252 - LAVA_JOB_ID=933564
189 08:59:37.458466 - LAVA_DISPATCHER_IP=192.168.6.2
190 08:59:37.458822 start: 1.6.2.1 ssh-authorize (timeout 00:09:12) [common]
191 08:59:37.459808 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 08:59:37.460145 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:12) [common]
193 08:59:37.460355 skipped lava-vland-overlay
194 08:59:37.460597 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 08:59:37.460850 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:12) [common]
196 08:59:37.461065 skipped lava-multinode-overlay
197 08:59:37.461304 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 08:59:37.461554 start: 1.6.2.4 test-definition (timeout 00:09:12) [common]
199 08:59:37.461801 Loading test definitions
200 08:59:37.462078 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:12) [common]
201 08:59:37.462296 Using /lava-933564 at stage 0
202 08:59:37.463480 uuid=933564_1.6.2.4.1 testdef=None
203 08:59:37.463785 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 08:59:37.464067 start: 1.6.2.4.2 test-overlay (timeout 00:09:12) [common]
205 08:59:37.465809 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 08:59:37.466588 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:12) [common]
208 08:59:37.468746 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 08:59:37.469579 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:12) [common]
211 08:59:37.471641 runner path: /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 933564_1.6.2.4.1
212 08:59:37.472249 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 08:59:37.473007 Creating lava-test-runner.conf files
215 08:59:37.473205 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/933564/lava-overlay-nloxbdip/lava-933564/0 for stage 0
216 08:59:37.473562 - 0_v4l2-decoder-conformance-vp9
217 08:59:37.473923 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 08:59:37.474199 start: 1.6.2.5 compress-overlay (timeout 00:09:12) [common]
219 08:59:37.495813 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 08:59:37.496199 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:12) [common]
221 08:59:37.496457 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 08:59:37.496720 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 08:59:37.496978 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:12) [common]
224 08:59:38.113257 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 08:59:38.113720 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 08:59:38.113966 extracting modules file /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933564/extract-nfsrootfs-s5a8q0ms
227 08:59:39.483425 extracting modules file /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933564/extract-overlay-ramdisk-a3iuzfth/ramdisk
228 08:59:40.894101 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 08:59:40.894587 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 08:59:40.894862 [common] Applying overlay to NFS
231 08:59:40.895072 [common] Applying overlay /var/lib/lava/dispatcher/tmp/933564/compress-overlay-gns1pg65/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/933564/extract-nfsrootfs-s5a8q0ms
232 08:59:40.924541 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 08:59:40.924918 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 08:59:40.925186 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 08:59:40.925413 Converting downloaded kernel to a uImage
236 08:59:40.925719 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/kernel/Image /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/kernel/uImage
237 08:59:41.423494 output: Image Name:
238 08:59:41.423904 output: Created: Mon Nov 4 08:59:40 2024
239 08:59:41.424152 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 08:59:41.424358 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 08:59:41.424557 output: Load Address: 01080000
242 08:59:41.424755 output: Entry Point: 01080000
243 08:59:41.424950 output:
244 08:59:41.425283 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 08:59:41.425549 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 08:59:41.425815 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 08:59:41.426067 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 08:59:41.426323 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 08:59:41.426574 Building ramdisk /var/lib/lava/dispatcher/tmp/933564/extract-overlay-ramdisk-a3iuzfth/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/933564/extract-overlay-ramdisk-a3iuzfth/ramdisk
250 08:59:43.577573 >> 166824 blocks
251 08:59:51.291411 Adding RAMdisk u-boot header.
252 08:59:51.292165 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/933564/extract-overlay-ramdisk-a3iuzfth/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/933564/extract-overlay-ramdisk-a3iuzfth/ramdisk.cpio.gz.uboot
253 08:59:51.532359 output: Image Name:
254 08:59:51.532763 output: Created: Mon Nov 4 08:59:51 2024
255 08:59:51.532977 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 08:59:51.533181 output: Data Size: 23434815 Bytes = 22885.56 KiB = 22.35 MiB
257 08:59:51.533383 output: Load Address: 00000000
258 08:59:51.533582 output: Entry Point: 00000000
259 08:59:51.533778 output:
260 08:59:51.534543 rename /var/lib/lava/dispatcher/tmp/933564/extract-overlay-ramdisk-a3iuzfth/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/ramdisk/ramdisk.cpio.gz.uboot
261 08:59:51.534985 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 08:59:51.535305 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 08:59:51.535609 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:58) [common]
264 08:59:51.535868 No LXC device requested
265 08:59:51.536435 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 08:59:51.537039 start: 1.8 deploy-device-env (timeout 00:08:58) [common]
267 08:59:51.537591 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 08:59:51.538044 Checking files for TFTP limit of 4294967296 bytes.
269 08:59:51.541002 end: 1 tftp-deploy (duration 00:01:02) [common]
270 08:59:51.541624 start: 2 uboot-action (timeout 00:05:00) [common]
271 08:59:51.542196 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 08:59:51.542735 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 08:59:51.543283 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 08:59:51.543858 Using kernel file from prepare-kernel: 933564/tftp-deploy-mt9ig6ak/kernel/uImage
275 08:59:51.544596 substitutions:
276 08:59:51.545043 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 08:59:51.545478 - {DTB_ADDR}: 0x01070000
278 08:59:51.545916 - {DTB}: 933564/tftp-deploy-mt9ig6ak/dtb/meson-g12b-a311d-libretech-cc.dtb
279 08:59:51.546349 - {INITRD}: 933564/tftp-deploy-mt9ig6ak/ramdisk/ramdisk.cpio.gz.uboot
280 08:59:51.546783 - {KERNEL_ADDR}: 0x01080000
281 08:59:51.547211 - {KERNEL}: 933564/tftp-deploy-mt9ig6ak/kernel/uImage
282 08:59:51.547638 - {LAVA_MAC}: None
283 08:59:51.548133 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/933564/extract-nfsrootfs-s5a8q0ms
284 08:59:51.548573 - {NFS_SERVER_IP}: 192.168.6.2
285 08:59:51.548999 - {PRESEED_CONFIG}: None
286 08:59:51.549425 - {PRESEED_LOCAL}: None
287 08:59:51.549849 - {RAMDISK_ADDR}: 0x08000000
288 08:59:51.550269 - {RAMDISK}: 933564/tftp-deploy-mt9ig6ak/ramdisk/ramdisk.cpio.gz.uboot
289 08:59:51.550692 - {ROOT_PART}: None
290 08:59:51.551121 - {ROOT}: None
291 08:59:51.551542 - {SERVER_IP}: 192.168.6.2
292 08:59:51.551966 - {TEE_ADDR}: 0x83000000
293 08:59:51.552428 - {TEE}: None
294 08:59:51.552855 Parsed boot commands:
295 08:59:51.553267 - setenv autoload no
296 08:59:51.553687 - setenv initrd_high 0xffffffff
297 08:59:51.554104 - setenv fdt_high 0xffffffff
298 08:59:51.554522 - dhcp
299 08:59:51.554940 - setenv serverip 192.168.6.2
300 08:59:51.555358 - tftpboot 0x01080000 933564/tftp-deploy-mt9ig6ak/kernel/uImage
301 08:59:51.555781 - tftpboot 0x08000000 933564/tftp-deploy-mt9ig6ak/ramdisk/ramdisk.cpio.gz.uboot
302 08:59:51.556241 - tftpboot 0x01070000 933564/tftp-deploy-mt9ig6ak/dtb/meson-g12b-a311d-libretech-cc.dtb
303 08:59:51.556667 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/933564/extract-nfsrootfs-s5a8q0ms,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 08:59:51.557107 - bootm 0x01080000 0x08000000 0x01070000
305 08:59:51.557642 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 08:59:51.559250 start: 2.3 connect-device (timeout 00:05:00) [common]
308 08:59:51.559703 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 08:59:51.576338 Setting prompt string to ['lava-test: # ']
310 08:59:51.577933 end: 2.3 connect-device (duration 00:00:00) [common]
311 08:59:51.578585 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 08:59:51.579170 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 08:59:51.579918 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 08:59:51.581203 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 08:59:51.618804 >> OK - accepted request
316 08:59:51.621128 Returned 0 in 0 seconds
317 08:59:51.722295 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 08:59:51.724036 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 08:59:51.724674 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 08:59:51.725240 Setting prompt string to ['Hit any key to stop autoboot']
322 08:59:51.725740 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 08:59:51.727404 Trying 192.168.56.21...
324 08:59:51.727914 Connected to conserv1.
325 08:59:51.728400 Escape character is '^]'.
326 08:59:51.728855
327 08:59:51.729308 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 08:59:51.729753
329 09:00:03.118788 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 09:00:03.119432 bl2_stage_init 0x01
331 09:00:03.119877 bl2_stage_init 0x81
332 09:00:03.124335 hw id: 0x0000 - pwm id 0x01
333 09:00:03.124826 bl2_stage_init 0xc1
334 09:00:03.125273 bl2_stage_init 0x02
335 09:00:03.125700
336 09:00:03.129917 L0:00000000
337 09:00:03.130389 L1:20000703
338 09:00:03.130816 L2:00008067
339 09:00:03.131238 L3:14000000
340 09:00:03.135600 B2:00402000
341 09:00:03.136102 B1:e0f83180
342 09:00:03.136530
343 09:00:03.136954 TE: 58159
344 09:00:03.137380
345 09:00:03.141095 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 09:00:03.141557
347 09:00:03.141987 Board ID = 1
348 09:00:03.146707 Set A53 clk to 24M
349 09:00:03.147161 Set A73 clk to 24M
350 09:00:03.147586 Set clk81 to 24M
351 09:00:03.152307 A53 clk: 1200 MHz
352 09:00:03.152760 A73 clk: 1200 MHz
353 09:00:03.153184 CLK81: 166.6M
354 09:00:03.153604 smccc: 00012ab5
355 09:00:03.157872 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 09:00:03.163550 board id: 1
357 09:00:03.169380 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 09:00:03.180044 fw parse done
359 09:00:03.186010 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 09:00:03.228664 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 09:00:03.239576 PIEI prepare done
362 09:00:03.240102 fastboot data load
363 09:00:03.240541 fastboot data verify
364 09:00:03.245195 verify result: 266
365 09:00:03.250775 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 09:00:03.251225 LPDDR4 probe
367 09:00:03.251648 ddr clk to 1584MHz
368 09:00:03.258776 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 09:00:03.296008
370 09:00:03.296479 dmc_version 0001
371 09:00:03.302727 Check phy result
372 09:00:03.308649 INFO : End of CA training
373 09:00:03.309102 INFO : End of initialization
374 09:00:03.314158 INFO : Training has run successfully!
375 09:00:03.314612 Check phy result
376 09:00:03.319767 INFO : End of initialization
377 09:00:03.320253 INFO : End of read enable training
378 09:00:03.325393 INFO : End of fine write leveling
379 09:00:03.330958 INFO : End of Write leveling coarse delay
380 09:00:03.331412 INFO : Training has run successfully!
381 09:00:03.331841 Check phy result
382 09:00:03.336626 INFO : End of initialization
383 09:00:03.337078 INFO : End of read dq deskew training
384 09:00:03.342172 INFO : End of MPR read delay center optimization
385 09:00:03.347776 INFO : End of write delay center optimization
386 09:00:03.353366 INFO : End of read delay center optimization
387 09:00:03.353822 INFO : End of max read latency training
388 09:00:03.358982 INFO : Training has run successfully!
389 09:00:03.359433 1D training succeed
390 09:00:03.368205 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 09:00:03.415754 Check phy result
392 09:00:03.416264 INFO : End of initialization
393 09:00:03.438174 INFO : End of 2D read delay Voltage center optimization
394 09:00:03.458365 INFO : End of 2D read delay Voltage center optimization
395 09:00:03.510184 INFO : End of 2D write delay Voltage center optimization
396 09:00:03.559439 INFO : End of 2D write delay Voltage center optimization
397 09:00:03.565023 INFO : Training has run successfully!
398 09:00:03.565476
399 09:00:03.565910 channel==0
400 09:00:03.570715 RxClkDly_Margin_A0==88 ps 9
401 09:00:03.571167 TxDqDly_Margin_A0==98 ps 10
402 09:00:03.576229 RxClkDly_Margin_A1==88 ps 9
403 09:00:03.576675 TxDqDly_Margin_A1==98 ps 10
404 09:00:03.577105 TrainedVREFDQ_A0==74
405 09:00:03.581829 TrainedVREFDQ_A1==74
406 09:00:03.582282 VrefDac_Margin_A0==25
407 09:00:03.582710 DeviceVref_Margin_A0==40
408 09:00:03.587446 VrefDac_Margin_A1==25
409 09:00:03.587893 DeviceVref_Margin_A1==40
410 09:00:03.588366
411 09:00:03.588793
412 09:00:03.593034 channel==1
413 09:00:03.593488 RxClkDly_Margin_A0==98 ps 10
414 09:00:03.593913 TxDqDly_Margin_A0==98 ps 10
415 09:00:03.598703 RxClkDly_Margin_A1==98 ps 10
416 09:00:03.599153 TxDqDly_Margin_A1==88 ps 9
417 09:00:03.604220 TrainedVREFDQ_A0==77
418 09:00:03.604670 TrainedVREFDQ_A1==77
419 09:00:03.605102 VrefDac_Margin_A0==22
420 09:00:03.609838 DeviceVref_Margin_A0==37
421 09:00:03.610289 VrefDac_Margin_A1==22
422 09:00:03.615417 DeviceVref_Margin_A1==37
423 09:00:03.615866
424 09:00:03.616331 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 09:00:03.621040
426 09:00:03.649030 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000017 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000018 dram_vref_reg_value 0x 00000060
427 09:00:03.649565 2D training succeed
428 09:00:03.654725 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 09:00:03.660227 auto size-- 65535DDR cs0 size: 2048MB
430 09:00:03.660681 DDR cs1 size: 2048MB
431 09:00:03.665844 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 09:00:03.666294 cs0 DataBus test pass
433 09:00:03.671406 cs1 DataBus test pass
434 09:00:03.671855 cs0 AddrBus test pass
435 09:00:03.672315 cs1 AddrBus test pass
436 09:00:03.672739
437 09:00:03.677028 100bdlr_step_size ps== 420
438 09:00:03.677487 result report
439 09:00:03.682701 boot times 0Enable ddr reg access
440 09:00:03.688079 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 09:00:03.701553 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 09:00:04.273451 0.0;M3 CHK:0;cm4_sp_mode 0
443 09:00:04.273987 MVN_1=0x00000000
444 09:00:04.279007 MVN_2=0x00000000
445 09:00:04.284792 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 09:00:04.285250 OPS=0x10
447 09:00:04.285678 ring efuse init
448 09:00:04.286101 chipver efuse init
449 09:00:04.290336 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 09:00:04.295960 [0.018961 Inits done]
451 09:00:04.296472 secure task start!
452 09:00:04.296896 high task start!
453 09:00:04.300531 low task start!
454 09:00:04.300986 run into bl31
455 09:00:04.307203 NOTICE: BL31: v1.3(release):4fc40b1
456 09:00:04.314983 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 09:00:04.315443 NOTICE: BL31: G12A normal boot!
458 09:00:04.340900 NOTICE: BL31: BL33 decompress pass
459 09:00:04.346566 ERROR: Error initializing runtime service opteed_fast
460 09:00:05.579455
461 09:00:05.580071
462 09:00:05.587814 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 09:00:05.588319
464 09:00:05.588785 Model: Libre Computer AML-A311D-CC Alta
465 09:00:05.796188 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 09:00:05.819647 DRAM: 2 GiB (effective 3.8 GiB)
467 09:00:05.962610 Core: 408 devices, 31 uclasses, devicetree: separate
468 09:00:05.968470 WDT: Not starting watchdog@f0d0
469 09:00:06.000719 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 09:00:06.013223 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 09:00:06.018187 ** Bad device specification mmc 0 **
472 09:00:06.028595 Card did not respond to voltage select! : -110
473 09:00:06.036179 ** Bad device specification mmc 0 **
474 09:00:06.036640 Couldn't find partition mmc 0
475 09:00:06.044491 Card did not respond to voltage select! : -110
476 09:00:06.050019 ** Bad device specification mmc 0 **
477 09:00:06.050486 Couldn't find partition mmc 0
478 09:00:06.055081 Error: could not access storage.
479 09:00:07.319334 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 09:00:07.319958 bl2_stage_init 0x81
481 09:00:07.324778 hw id: 0x0000 - pwm id 0x01
482 09:00:07.325293 bl2_stage_init 0xc1
483 09:00:07.325748 bl2_stage_init 0x02
484 09:00:07.326190
485 09:00:07.330375 L0:00000000
486 09:00:07.330858 L1:20000703
487 09:00:07.331298 L2:00008067
488 09:00:07.331734 L3:14000000
489 09:00:07.332203 B2:00402000
490 09:00:07.336002 B1:e0f83180
491 09:00:07.336470
492 09:00:07.336911 TE: 58150
493 09:00:07.337348
494 09:00:07.341493 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 09:00:07.341963
496 09:00:07.342403 Board ID = 1
497 09:00:07.347247 Set A53 clk to 24M
498 09:00:07.347710 Set A73 clk to 24M
499 09:00:07.348181 Set clk81 to 24M
500 09:00:07.352854 A53 clk: 1200 MHz
501 09:00:07.353319 A73 clk: 1200 MHz
502 09:00:07.353760 CLK81: 166.6M
503 09:00:07.354195 smccc: 00012aac
504 09:00:07.358500 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 09:00:07.363848 board id: 1
506 09:00:07.369784 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 09:00:07.380226 fw parse done
508 09:00:07.386290 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 09:00:07.428845 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 09:00:07.439774 PIEI prepare done
511 09:00:07.440298 fastboot data load
512 09:00:07.440746 fastboot data verify
513 09:00:07.445426 verify result: 266
514 09:00:07.450988 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 09:00:07.451458 LPDDR4 probe
516 09:00:07.451895 ddr clk to 1584MHz
517 09:00:07.458981 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 09:00:07.496304
519 09:00:07.496782 dmc_version 0001
520 09:00:07.502930 Check phy result
521 09:00:07.508868 INFO : End of CA training
522 09:00:07.509331 INFO : End of initialization
523 09:00:07.514378 INFO : Training has run successfully!
524 09:00:07.514843 Check phy result
525 09:00:07.520012 INFO : End of initialization
526 09:00:07.520483 INFO : End of read enable training
527 09:00:07.525581 INFO : End of fine write leveling
528 09:00:07.531256 INFO : End of Write leveling coarse delay
529 09:00:07.531722 INFO : Training has run successfully!
530 09:00:07.532200 Check phy result
531 09:00:07.536752 INFO : End of initialization
532 09:00:07.537215 INFO : End of read dq deskew training
533 09:00:07.542366 INFO : End of MPR read delay center optimization
534 09:00:07.548029 INFO : End of write delay center optimization
535 09:00:07.553568 INFO : End of read delay center optimization
536 09:00:07.554031 INFO : End of max read latency training
537 09:00:07.559227 INFO : Training has run successfully!
538 09:00:07.559689 1D training succeed
539 09:00:07.568425 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 09:00:07.615971 Check phy result
541 09:00:07.616466 INFO : End of initialization
542 09:00:07.637721 INFO : End of 2D read delay Voltage center optimization
543 09:00:07.657946 INFO : End of 2D read delay Voltage center optimization
544 09:00:07.709999 INFO : End of 2D write delay Voltage center optimization
545 09:00:07.759327 INFO : End of 2D write delay Voltage center optimization
546 09:00:07.764931 INFO : Training has run successfully!
547 09:00:07.765402
548 09:00:07.765858 channel==0
549 09:00:07.770516 RxClkDly_Margin_A0==88 ps 9
550 09:00:07.770991 TxDqDly_Margin_A0==98 ps 10
551 09:00:07.776116 RxClkDly_Margin_A1==88 ps 9
552 09:00:07.776574 TxDqDly_Margin_A1==98 ps 10
553 09:00:07.777023 TrainedVREFDQ_A0==74
554 09:00:07.781695 TrainedVREFDQ_A1==74
555 09:00:07.782162 VrefDac_Margin_A0==25
556 09:00:07.782601 DeviceVref_Margin_A0==40
557 09:00:07.787320 VrefDac_Margin_A1==25
558 09:00:07.787778 DeviceVref_Margin_A1==40
559 09:00:07.788248
560 09:00:07.788687
561 09:00:07.792891 channel==1
562 09:00:07.793354 RxClkDly_Margin_A0==98 ps 10
563 09:00:07.793791 TxDqDly_Margin_A0==98 ps 10
564 09:00:07.798476 RxClkDly_Margin_A1==98 ps 10
565 09:00:07.798937 TxDqDly_Margin_A1==88 ps 9
566 09:00:07.804075 TrainedVREFDQ_A0==77
567 09:00:07.804561 TrainedVREFDQ_A1==77
568 09:00:07.805005 VrefDac_Margin_A0==22
569 09:00:07.809705 DeviceVref_Margin_A0==37
570 09:00:07.810206 VrefDac_Margin_A1==22
571 09:00:07.815325 DeviceVref_Margin_A1==37
572 09:00:07.815801
573 09:00:07.816278 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 09:00:07.820887
575 09:00:07.848898 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
576 09:00:07.849404 2D training succeed
577 09:00:07.854508 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 09:00:07.860087 auto size-- 65535DDR cs0 size: 2048MB
579 09:00:07.860551 DDR cs1 size: 2048MB
580 09:00:07.865714 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 09:00:07.866183 cs0 DataBus test pass
582 09:00:07.871313 cs1 DataBus test pass
583 09:00:07.871778 cs0 AddrBus test pass
584 09:00:07.872264 cs1 AddrBus test pass
585 09:00:07.872708
586 09:00:07.876909 100bdlr_step_size ps== 420
587 09:00:07.877393 result report
588 09:00:07.882511 boot times 0Enable ddr reg access
589 09:00:07.887975 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 09:00:07.901422 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 09:00:08.475163 0.0;M3 CHK:0;cm4_sp_mode 0
592 09:00:08.475772 MVN_1=0x00000000
593 09:00:08.480656 MVN_2=0x00000000
594 09:00:08.486432 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 09:00:08.486953 OPS=0x10
596 09:00:08.487410 ring efuse init
597 09:00:08.487873 chipver efuse init
598 09:00:08.492068 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 09:00:08.497624 [0.018961 Inits done]
600 09:00:08.498100 secure task start!
601 09:00:08.498527 high task start!
602 09:00:08.502214 low task start!
603 09:00:08.502685 run into bl31
604 09:00:08.508867 NOTICE: BL31: v1.3(release):4fc40b1
605 09:00:08.516672 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 09:00:08.517138 NOTICE: BL31: G12A normal boot!
607 09:00:08.542063 NOTICE: BL31: BL33 decompress pass
608 09:00:08.547693 ERROR: Error initializing runtime service opteed_fast
609 09:00:09.780777
610 09:00:09.781408
611 09:00:09.788933 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 09:00:09.789415
613 09:00:09.789864 Model: Libre Computer AML-A311D-CC Alta
614 09:00:09.997317 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 09:00:10.020773 DRAM: 2 GiB (effective 3.8 GiB)
616 09:00:10.163732 Core: 408 devices, 31 uclasses, devicetree: separate
617 09:00:10.169666 WDT: Not starting watchdog@f0d0
618 09:00:10.201855 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 09:00:10.214354 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 09:00:10.219347 ** Bad device specification mmc 0 **
621 09:00:10.229648 Card did not respond to voltage select! : -110
622 09:00:10.237290 ** Bad device specification mmc 0 **
623 09:00:10.237776 Couldn't find partition mmc 0
624 09:00:10.245646 Card did not respond to voltage select! : -110
625 09:00:10.251250 ** Bad device specification mmc 0 **
626 09:00:10.251726 Couldn't find partition mmc 0
627 09:00:10.256206 Error: could not access storage.
628 09:00:10.598759 Net: eth0: ethernet@ff3f0000
629 09:00:10.599331 starting USB...
630 09:00:10.850441 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 09:00:10.850978 Starting the controller
632 09:00:10.857456 USB XHCI 1.10
633 09:00:12.569527 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 09:00:12.570177 bl2_stage_init 0x01
635 09:00:12.570645 bl2_stage_init 0x81
636 09:00:12.575045 hw id: 0x0000 - pwm id 0x01
637 09:00:12.575536 bl2_stage_init 0xc1
638 09:00:12.576025 bl2_stage_init 0x02
639 09:00:12.576477
640 09:00:12.580742 L0:00000000
641 09:00:12.581224 L1:20000703
642 09:00:12.581664 L2:00008067
643 09:00:12.582102 L3:14000000
644 09:00:12.583587 B2:00402000
645 09:00:12.584090 B1:e0f83180
646 09:00:12.584536
647 09:00:12.584974 TE: 58124
648 09:00:12.585408
649 09:00:12.594653 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 09:00:12.595143
651 09:00:12.595590 Board ID = 1
652 09:00:12.596058 Set A53 clk to 24M
653 09:00:12.596496 Set A73 clk to 24M
654 09:00:12.600298 Set clk81 to 24M
655 09:00:12.600783 A53 clk: 1200 MHz
656 09:00:12.601223 A73 clk: 1200 MHz
657 09:00:12.603807 CLK81: 166.6M
658 09:00:12.604332 smccc: 00012a92
659 09:00:12.609482 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 09:00:12.615048 board id: 1
661 09:00:12.620279 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 09:00:12.630626 fw parse done
663 09:00:12.636606 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 09:00:12.678377 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 09:00:12.690139 PIEI prepare done
666 09:00:12.690672 fastboot data load
667 09:00:12.691235 fastboot data verify
668 09:00:12.695719 verify result: 266
669 09:00:12.701332 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 09:00:12.701834 LPDDR4 probe
671 09:00:12.702279 ddr clk to 1584MHz
672 09:00:12.709303 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 09:00:12.746554
674 09:00:12.747113 dmc_version 0001
675 09:00:12.753235 Check phy result
676 09:00:12.759100 INFO : End of CA training
677 09:00:12.759585 INFO : End of initialization
678 09:00:12.764703 INFO : Training has run successfully!
679 09:00:12.765203 Check phy result
680 09:00:12.770298 INFO : End of initialization
681 09:00:12.770845 INFO : End of read enable training
682 09:00:12.775954 INFO : End of fine write leveling
683 09:00:12.781578 INFO : End of Write leveling coarse delay
684 09:00:12.782064 INFO : Training has run successfully!
685 09:00:12.782615 Check phy result
686 09:00:12.787089 INFO : End of initialization
687 09:00:12.787635 INFO : End of read dq deskew training
688 09:00:12.792730 INFO : End of MPR read delay center optimization
689 09:00:12.798328 INFO : End of write delay center optimization
690 09:00:12.804007 INFO : End of read delay center optimization
691 09:00:12.804506 INFO : End of max read latency training
692 09:00:12.809628 INFO : Training has run successfully!
693 09:00:12.810145 1D training succeed
694 09:00:12.818700 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 09:00:12.866298 Check phy result
696 09:00:12.866826 INFO : End of initialization
697 09:00:12.888707 INFO : End of 2D read delay Voltage center optimization
698 09:00:12.908837 INFO : End of 2D read delay Voltage center optimization
699 09:00:12.960695 INFO : End of 2D write delay Voltage center optimization
700 09:00:13.010016 INFO : End of 2D write delay Voltage center optimization
701 09:00:13.015506 INFO : Training has run successfully!
702 09:00:13.016034
703 09:00:13.016490 channel==0
704 09:00:13.021099 RxClkDly_Margin_A0==88 ps 9
705 09:00:13.021566 TxDqDly_Margin_A0==98 ps 10
706 09:00:13.026683 RxClkDly_Margin_A1==88 ps 9
707 09:00:13.027154 TxDqDly_Margin_A1==98 ps 10
708 09:00:13.027598 TrainedVREFDQ_A0==74
709 09:00:13.032293 TrainedVREFDQ_A1==74
710 09:00:13.032778 VrefDac_Margin_A0==25
711 09:00:13.033221 DeviceVref_Margin_A0==40
712 09:00:13.038005 VrefDac_Margin_A1==24
713 09:00:13.038472 DeviceVref_Margin_A1==40
714 09:00:13.038908
715 09:00:13.039447
716 09:00:13.043505 channel==1
717 09:00:13.044011 RxClkDly_Margin_A0==98 ps 10
718 09:00:13.044529 TxDqDly_Margin_A0==88 ps 9
719 09:00:13.049083 RxClkDly_Margin_A1==88 ps 9
720 09:00:13.049551 TxDqDly_Margin_A1==88 ps 9
721 09:00:13.054716 TrainedVREFDQ_A0==77
722 09:00:13.055187 TrainedVREFDQ_A1==77
723 09:00:13.055630 VrefDac_Margin_A0==22
724 09:00:13.060283 DeviceVref_Margin_A0==37
725 09:00:13.060766 VrefDac_Margin_A1==24
726 09:00:13.066009 DeviceVref_Margin_A1==37
727 09:00:13.066478
728 09:00:13.066918 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 09:00:13.067354
730 09:00:13.099484 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
731 09:00:13.100048 2D training succeed
732 09:00:13.105088 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 09:00:13.110674 auto size-- 65535DDR cs0 size: 2048MB
734 09:00:13.111142 DDR cs1 size: 2048MB
735 09:00:13.116305 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 09:00:13.116819 cs0 DataBus test pass
737 09:00:13.121986 cs1 DataBus test pass
738 09:00:13.122460 cs0 AddrBus test pass
739 09:00:13.122903 cs1 AddrBus test pass
740 09:00:13.123338
741 09:00:13.127501 100bdlr_step_size ps== 420
742 09:00:13.128012 result report
743 09:00:13.133090 boot times 0Enable ddr reg access
744 09:00:13.138349 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 09:00:13.151823 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 09:00:13.723847 0.0;M3 CHK:0;cm4_sp_mode 0
747 09:00:13.724477 MVN_1=0x00000000
748 09:00:13.729362 MVN_2=0x00000000
749 09:00:13.735173 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 09:00:13.735722 OPS=0x10
751 09:00:13.736208 ring efuse init
752 09:00:13.736635 chipver efuse init
753 09:00:13.740722 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 09:00:13.746314 [0.018961 Inits done]
755 09:00:13.746780 secure task start!
756 09:00:13.747208 high task start!
757 09:00:13.750897 low task start!
758 09:00:13.751352 run into bl31
759 09:00:13.757539 NOTICE: BL31: v1.3(release):4fc40b1
760 09:00:13.765362 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 09:00:13.765829 NOTICE: BL31: G12A normal boot!
762 09:00:13.790704 NOTICE: BL31: BL33 decompress pass
763 09:00:13.796409 ERROR: Error initializing runtime service opteed_fast
764 09:00:15.029410
765 09:00:15.030077
766 09:00:15.037647 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 09:00:15.038131
768 09:00:15.038580 Model: Libre Computer AML-A311D-CC Alta
769 09:00:15.246029 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 09:00:15.269402 DRAM: 2 GiB (effective 3.8 GiB)
771 09:00:15.412541 Core: 408 devices, 31 uclasses, devicetree: separate
772 09:00:15.418323 WDT: Not starting watchdog@f0d0
773 09:00:15.450545 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 09:00:15.462995 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 09:00:15.467976 ** Bad device specification mmc 0 **
776 09:00:15.478341 Card did not respond to voltage select! : -110
777 09:00:15.485966 ** Bad device specification mmc 0 **
778 09:00:15.486434 Couldn't find partition mmc 0
779 09:00:15.494288 Card did not respond to voltage select! : -110
780 09:00:15.499862 ** Bad device specification mmc 0 **
781 09:00:15.500365 Couldn't find partition mmc 0
782 09:00:15.504983 Error: could not access storage.
783 09:00:15.847444 Net: eth0: ethernet@ff3f0000
784 09:00:15.848099 starting USB...
785 09:00:16.099397 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 09:00:16.099827 Starting the controller
787 09:00:16.106164 USB XHCI 1.10
788 09:00:18.270849 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 09:00:18.271251 bl2_stage_init 0x01
790 09:00:18.271463 bl2_stage_init 0x81
791 09:00:18.276433 hw id: 0x0000 - pwm id 0x01
792 09:00:18.276820 bl2_stage_init 0xc1
793 09:00:18.277142 bl2_stage_init 0x02
794 09:00:18.277455
795 09:00:18.281968 L0:00000000
796 09:00:18.282224 L1:20000703
797 09:00:18.282424 L2:00008067
798 09:00:18.282621 L3:14000000
799 09:00:18.287584 B2:00402000
800 09:00:18.287960 B1:e0f83180
801 09:00:18.288309
802 09:00:18.288624 TE: 58124
803 09:00:18.288938
804 09:00:18.293254 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 09:00:18.293624
806 09:00:18.293858 Board ID = 1
807 09:00:18.298805 Set A53 clk to 24M
808 09:00:18.299063 Set A73 clk to 24M
809 09:00:18.299265 Set clk81 to 24M
810 09:00:18.304450 A53 clk: 1200 MHz
811 09:00:18.304851 A73 clk: 1200 MHz
812 09:00:18.305177 CLK81: 166.6M
813 09:00:18.305486 smccc: 00012a92
814 09:00:18.309951 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 09:00:18.315582 board id: 1
816 09:00:18.321548 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 09:00:18.332120 fw parse done
818 09:00:18.338154 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 09:00:18.380619 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 09:00:18.391486 PIEI prepare done
821 09:00:18.391746 fastboot data load
822 09:00:18.391955 fastboot data verify
823 09:00:18.397166 verify result: 266
824 09:00:18.402762 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 09:00:18.403257 LPDDR4 probe
826 09:00:18.403711 ddr clk to 1584MHz
827 09:00:18.410856 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 09:00:18.447965
829 09:00:18.448488 dmc_version 0001
830 09:00:18.454656 Check phy result
831 09:00:18.460536 INFO : End of CA training
832 09:00:18.461014 INFO : End of initialization
833 09:00:18.466156 INFO : Training has run successfully!
834 09:00:18.466630 Check phy result
835 09:00:18.471773 INFO : End of initialization
836 09:00:18.472283 INFO : End of read enable training
837 09:00:18.475052 INFO : End of fine write leveling
838 09:00:18.480591 INFO : End of Write leveling coarse delay
839 09:00:18.486160 INFO : Training has run successfully!
840 09:00:18.486641 Check phy result
841 09:00:18.487088 INFO : End of initialization
842 09:00:18.491752 INFO : End of read dq deskew training
843 09:00:18.495158 INFO : End of MPR read delay center optimization
844 09:00:18.500783 INFO : End of write delay center optimization
845 09:00:18.506324 INFO : End of read delay center optimization
846 09:00:18.506799 INFO : End of max read latency training
847 09:00:18.511956 INFO : Training has run successfully!
848 09:00:18.512457 1D training succeed
849 09:00:18.520224 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 09:00:18.567730 Check phy result
851 09:00:18.568242 INFO : End of initialization
852 09:00:18.589526 INFO : End of 2D read delay Voltage center optimization
853 09:00:18.609696 INFO : End of 2D read delay Voltage center optimization
854 09:00:18.661748 INFO : End of 2D write delay Voltage center optimization
855 09:00:18.711188 INFO : End of 2D write delay Voltage center optimization
856 09:00:18.716740 INFO : Training has run successfully!
857 09:00:18.717258
858 09:00:18.717741 channel==0
859 09:00:18.722264 RxClkDly_Margin_A0==88 ps 9
860 09:00:18.722760 TxDqDly_Margin_A0==98 ps 10
861 09:00:18.727904 RxClkDly_Margin_A1==88 ps 9
862 09:00:18.728441 TxDqDly_Margin_A1==98 ps 10
863 09:00:18.728936 TrainedVREFDQ_A0==74
864 09:00:18.733562 TrainedVREFDQ_A1==74
865 09:00:18.734142 VrefDac_Margin_A0==25
866 09:00:18.734605 DeviceVref_Margin_A0==40
867 09:00:18.739245 VrefDac_Margin_A1==25
868 09:00:18.739808 DeviceVref_Margin_A1==40
869 09:00:18.740308
870 09:00:18.740742
871 09:00:18.744755 channel==1
872 09:00:18.745236 RxClkDly_Margin_A0==98 ps 10
873 09:00:18.745660 TxDqDly_Margin_A0==98 ps 10
874 09:00:18.750338 RxClkDly_Margin_A1==98 ps 10
875 09:00:18.750820 TxDqDly_Margin_A1==108 ps 11
876 09:00:18.755864 TrainedVREFDQ_A0==77
877 09:00:18.756379 TrainedVREFDQ_A1==78
878 09:00:18.756812 VrefDac_Margin_A0==22
879 09:00:18.761520 DeviceVref_Margin_A0==37
880 09:00:18.761998 VrefDac_Margin_A1==22
881 09:00:18.767129 DeviceVref_Margin_A1==36
882 09:00:18.767602
883 09:00:18.772703 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 09:00:18.773181
885 09:00:18.800720 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
886 09:00:18.801234 2D training succeed
887 09:00:18.806349 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 09:00:18.811821 auto size-- 65535DDR cs0 size: 2048MB
889 09:00:18.812355 DDR cs1 size: 2048MB
890 09:00:18.817402 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 09:00:18.817875 cs0 DataBus test pass
892 09:00:18.822996 cs1 DataBus test pass
893 09:00:18.823472 cs0 AddrBus test pass
894 09:00:18.823896 cs1 AddrBus test pass
895 09:00:18.824352
896 09:00:18.828585 100bdlr_step_size ps== 420
897 09:00:18.829065 result report
898 09:00:18.834199 boot times 0Enable ddr reg access
899 09:00:18.839839 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 09:00:18.853303 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 09:00:19.427005 0.0;M3 CHK:0;cm4_sp_mode 0
902 09:00:19.427634 MVN_1=0x00000000
903 09:00:19.432535 MVN_2=0x00000000
904 09:00:19.438269 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 09:00:19.438767 OPS=0x10
906 09:00:19.439224 ring efuse init
907 09:00:19.439669 chipver efuse init
908 09:00:19.443895 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 09:00:19.449484 [0.018960 Inits done]
910 09:00:19.449972 secure task start!
911 09:00:19.450420 high task start!
912 09:00:19.454071 low task start!
913 09:00:19.454557 run into bl31
914 09:00:19.460878 NOTICE: BL31: v1.3(release):4fc40b1
915 09:00:19.468555 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 09:00:19.469050 NOTICE: BL31: G12A normal boot!
917 09:00:19.493859 NOTICE: BL31: BL33 decompress pass
918 09:00:19.499625 ERROR: Error initializing runtime service opteed_fast
919 09:00:20.732395
920 09:00:20.732954
921 09:00:20.740836 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 09:00:20.741335
923 09:00:20.741790 Model: Libre Computer AML-A311D-CC Alta
924 09:00:20.949227 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 09:00:20.972664 DRAM: 2 GiB (effective 3.8 GiB)
926 09:00:21.115610 Core: 408 devices, 31 uclasses, devicetree: separate
927 09:00:21.121536 WDT: Not starting watchdog@f0d0
928 09:00:21.153768 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 09:00:21.166264 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 09:00:21.171229 ** Bad device specification mmc 0 **
931 09:00:21.181550 Card did not respond to voltage select! : -110
932 09:00:21.189226 ** Bad device specification mmc 0 **
933 09:00:21.189711 Couldn't find partition mmc 0
934 09:00:21.197545 Card did not respond to voltage select! : -110
935 09:00:21.203092 ** Bad device specification mmc 0 **
936 09:00:21.203572 Couldn't find partition mmc 0
937 09:00:21.208174 Error: could not access storage.
938 09:00:21.551621 Net: eth0: ethernet@ff3f0000
939 09:00:21.552186 starting USB...
940 09:00:21.803382 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 09:00:21.803893 Starting the controller
942 09:00:21.810407 USB XHCI 1.10
943 09:00:23.364561 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 09:00:23.372738 scanning usb for storage devices... 0 Storage Device(s) found
946 09:00:23.424369 Hit any key to stop autoboot: 1
947 09:00:23.425204 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 09:00:23.425858 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 09:00:23.426391 Setting prompt string to ['=>']
950 09:00:23.426935 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 09:00:23.440193 0
952 09:00:23.441126 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 09:00:23.441674 Sending with 10 millisecond of delay
955 09:00:24.576367 => setenv autoload no
956 09:00:24.587118 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 09:00:24.592491 setenv autoload no
958 09:00:24.593279 Sending with 10 millisecond of delay
960 09:00:26.389939 => setenv initrd_high 0xffffffff
961 09:00:26.400739 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 09:00:26.401623 setenv initrd_high 0xffffffff
963 09:00:26.402397 Sending with 10 millisecond of delay
965 09:00:28.018487 => setenv fdt_high 0xffffffff
966 09:00:28.029299 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 09:00:28.030196 setenv fdt_high 0xffffffff
968 09:00:28.030967 Sending with 10 millisecond of delay
970 09:00:28.322809 => dhcp
971 09:00:28.333571 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 09:00:28.334443 dhcp
973 09:00:28.334926 Speed: 1000, full duplex
974 09:00:28.335376 BOOTP broadcast 1
975 09:00:28.495203 DHCP client bound to address 192.168.6.27 (161 ms)
976 09:00:28.496091 Sending with 10 millisecond of delay
978 09:00:30.174487 => setenv serverip 192.168.6.2
979 09:00:30.185342 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 09:00:30.186310 setenv serverip 192.168.6.2
981 09:00:30.187054 Sending with 10 millisecond of delay
983 09:00:33.910426 => tftpboot 0x01080000 933564/tftp-deploy-mt9ig6ak/kernel/uImage
984 09:00:33.921281 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 09:00:33.922153 tftpboot 0x01080000 933564/tftp-deploy-mt9ig6ak/kernel/uImage
986 09:00:33.922638 Speed: 1000, full duplex
987 09:00:33.923093 Using ethernet@ff3f0000 device
988 09:00:33.923939 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 09:00:33.929561 Filename '933564/tftp-deploy-mt9ig6ak/kernel/uImage'.
990 09:00:33.933402 Load address: 0x1080000
991 09:00:37.479444 Loading: *################################################## 43.6 MiB
992 09:00:37.480156 12.3 MiB/s
993 09:00:37.480643 done
994 09:00:37.483865 Bytes transferred = 45713984 (2b98a40 hex)
995 09:00:37.484746 Sending with 10 millisecond of delay
997 09:00:42.171404 => tftpboot 0x08000000 933564/tftp-deploy-mt9ig6ak/ramdisk/ramdisk.cpio.gz.uboot
998 09:00:42.182304 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
999 09:00:42.183193 tftpboot 0x08000000 933564/tftp-deploy-mt9ig6ak/ramdisk/ramdisk.cpio.gz.uboot
1000 09:00:42.183683 Speed: 1000, full duplex
1001 09:00:42.184173 Using ethernet@ff3f0000 device
1002 09:00:42.185186 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 09:00:42.193842 Filename '933564/tftp-deploy-mt9ig6ak/ramdisk/ramdisk.cpio.gz.uboot'.
1004 09:00:42.194404 Load address: 0x8000000
1005 09:00:43.620944 Loading: *################################################# UDP wrong checksum 00000005 00001f06
1006 09:00:48.621517 T UDP wrong checksum 00000005 00001f06
1007 09:00:58.624443 T T UDP wrong checksum 00000005 00001f06
1008 09:01:18.628582 T T T T UDP wrong checksum 00000005 00001f06
1009 09:01:38.633690 T T T
1010 09:01:38.634364 Retry count exceeded; starting again
1012 09:01:38.635893 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1015 09:01:38.638070 end: 2.4 uboot-commands (duration 00:01:47) [common]
1017 09:01:38.639594 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1019 09:01:38.640754 end: 2 uboot-action (duration 00:01:47) [common]
1021 09:01:38.642382 Cleaning after the job
1022 09:01:38.642975 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/ramdisk
1023 09:01:38.644433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/kernel
1024 09:01:38.690993 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/dtb
1025 09:01:38.691752 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/nfsrootfs
1026 09:01:39.003689 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933564/tftp-deploy-mt9ig6ak/modules
1027 09:01:39.024306 start: 4.1 power-off (timeout 00:00:30) [common]
1028 09:01:39.024951 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1029 09:01:39.062774 >> OK - accepted request
1030 09:01:39.064930 Returned 0 in 0 seconds
1031 09:01:39.165666 end: 4.1 power-off (duration 00:00:00) [common]
1033 09:01:39.166605 start: 4.2 read-feedback (timeout 00:10:00) [common]
1034 09:01:39.167262 Listened to connection for namespace 'common' for up to 1s
1035 09:01:40.168116 Finalising connection for namespace 'common'
1036 09:01:40.168495 Disconnecting from shell: Finalise
1037 09:01:40.168770 =>
1038 09:01:40.269430 end: 4.2 read-feedback (duration 00:00:01) [common]
1039 09:01:40.269824 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/933564
1040 09:01:42.793245 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/933564
1041 09:01:42.793863 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.