Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:30:44.598446 lava-dispatcher, installed at version: 2024.01
2 09:30:44.599266 start: 0 validate
3 09:30:44.599752 Start time: 2024-11-05 09:30:44.599722+00:00 (UTC)
4 09:30:44.600341 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:30:44.600869 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 09:30:44.640552 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:30:44.641129 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-401-g1596ed05f2f47%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 09:30:45.692591 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:30:45.693250 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-401-g1596ed05f2f47%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 09:30:50.766517 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:30:50.767005 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-401-g1596ed05f2f47%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 09:30:51.840173 validate duration: 7.24
14 09:30:51.841756 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:30:51.842401 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:30:51.843007 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:30:51.844243 Not decompressing ramdisk as can be used compressed.
18 09:30:51.845042 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 09:30:51.845593 saving as /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/ramdisk/rootfs.cpio.gz
20 09:30:51.846162 total size: 8181887 (7 MB)
21 09:30:51.894583 progress 0 % (0 MB)
22 09:30:51.906742 progress 5 % (0 MB)
23 09:30:51.918231 progress 10 % (0 MB)
24 09:30:51.930472 progress 15 % (1 MB)
25 09:30:51.940572 progress 20 % (1 MB)
26 09:30:51.946418 progress 25 % (1 MB)
27 09:30:51.951675 progress 30 % (2 MB)
28 09:30:51.957469 progress 35 % (2 MB)
29 09:30:51.962741 progress 40 % (3 MB)
30 09:30:51.968494 progress 45 % (3 MB)
31 09:30:51.973963 progress 50 % (3 MB)
32 09:30:51.979701 progress 55 % (4 MB)
33 09:30:51.985092 progress 60 % (4 MB)
34 09:30:51.990731 progress 65 % (5 MB)
35 09:30:51.996026 progress 70 % (5 MB)
36 09:30:52.001655 progress 75 % (5 MB)
37 09:30:52.006874 progress 80 % (6 MB)
38 09:30:52.012521 progress 85 % (6 MB)
39 09:30:52.017768 progress 90 % (7 MB)
40 09:30:52.023400 progress 95 % (7 MB)
41 09:30:52.028470 progress 100 % (7 MB)
42 09:30:52.029111 7 MB downloaded in 0.18 s (42.65 MB/s)
43 09:30:52.029679 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:30:52.030585 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:30:52.030887 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:30:52.031166 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:30:52.031639 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-401-g1596ed05f2f47/arm64/defconfig/gcc-12/kernel/Image
49 09:30:52.031889 saving as /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/kernel/Image
50 09:30:52.032132 total size: 45713920 (43 MB)
51 09:30:52.032354 No compression specified
52 09:30:52.073206 progress 0 % (0 MB)
53 09:30:52.100857 progress 5 % (2 MB)
54 09:30:52.128940 progress 10 % (4 MB)
55 09:30:52.156993 progress 15 % (6 MB)
56 09:30:52.185095 progress 20 % (8 MB)
57 09:30:52.213045 progress 25 % (10 MB)
58 09:30:52.240944 progress 30 % (13 MB)
59 09:30:52.269127 progress 35 % (15 MB)
60 09:30:52.297369 progress 40 % (17 MB)
61 09:30:52.325006 progress 45 % (19 MB)
62 09:30:52.353291 progress 50 % (21 MB)
63 09:30:52.381453 progress 55 % (24 MB)
64 09:30:52.411613 progress 60 % (26 MB)
65 09:30:52.442808 progress 65 % (28 MB)
66 09:30:52.471616 progress 70 % (30 MB)
67 09:30:52.500717 progress 75 % (32 MB)
68 09:30:52.529215 progress 80 % (34 MB)
69 09:30:52.557622 progress 85 % (37 MB)
70 09:30:52.586350 progress 90 % (39 MB)
71 09:30:52.615408 progress 95 % (41 MB)
72 09:30:52.643692 progress 100 % (43 MB)
73 09:30:52.644262 43 MB downloaded in 0.61 s (71.22 MB/s)
74 09:30:52.644755 end: 1.2.1 http-download (duration 00:00:01) [common]
76 09:30:52.645624 end: 1.2 download-retry (duration 00:00:01) [common]
77 09:30:52.645909 start: 1.3 download-retry (timeout 00:09:59) [common]
78 09:30:52.646188 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 09:30:52.646653 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-401-g1596ed05f2f47/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 09:30:52.646946 saving as /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 09:30:52.647162 total size: 53209 (0 MB)
82 09:30:52.647373 No compression specified
83 09:30:52.690909 progress 61 % (0 MB)
84 09:30:52.691767 progress 100 % (0 MB)
85 09:30:52.692359 0 MB downloaded in 0.05 s (1.12 MB/s)
86 09:30:52.692882 end: 1.3.1 http-download (duration 00:00:00) [common]
88 09:30:52.694062 end: 1.3 download-retry (duration 00:00:00) [common]
89 09:30:52.694336 start: 1.4 download-retry (timeout 00:09:59) [common]
90 09:30:52.694606 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 09:30:52.695078 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-401-g1596ed05f2f47/arm64/defconfig/gcc-12/modules.tar.xz
92 09:30:52.695326 saving as /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/modules/modules.tar
93 09:30:52.695533 total size: 11611116 (11 MB)
94 09:30:52.695747 Using unxz to decompress xz
95 09:30:52.735516 progress 0 % (0 MB)
96 09:30:52.804901 progress 5 % (0 MB)
97 09:30:52.879139 progress 10 % (1 MB)
98 09:30:52.974937 progress 15 % (1 MB)
99 09:30:53.067690 progress 20 % (2 MB)
100 09:30:53.146371 progress 25 % (2 MB)
101 09:30:53.221801 progress 30 % (3 MB)
102 09:30:53.299645 progress 35 % (3 MB)
103 09:30:53.371744 progress 40 % (4 MB)
104 09:30:53.447444 progress 45 % (5 MB)
105 09:30:53.531167 progress 50 % (5 MB)
106 09:30:53.608706 progress 55 % (6 MB)
107 09:30:53.693116 progress 60 % (6 MB)
108 09:30:53.773108 progress 65 % (7 MB)
109 09:30:53.855372 progress 70 % (7 MB)
110 09:30:53.933203 progress 75 % (8 MB)
111 09:30:54.016308 progress 80 % (8 MB)
112 09:30:54.095699 progress 85 % (9 MB)
113 09:30:54.173778 progress 90 % (9 MB)
114 09:30:54.251362 progress 95 % (10 MB)
115 09:30:54.328305 progress 100 % (11 MB)
116 09:30:54.339772 11 MB downloaded in 1.64 s (6.73 MB/s)
117 09:30:54.340680 end: 1.4.1 http-download (duration 00:00:02) [common]
119 09:30:54.342323 end: 1.4 download-retry (duration 00:00:02) [common]
120 09:30:54.342849 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 09:30:54.343365 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 09:30:54.343853 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 09:30:54.344395 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 09:30:54.345362 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g
125 09:30:54.346223 makedir: /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin
126 09:30:54.346873 makedir: /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/tests
127 09:30:54.347498 makedir: /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/results
128 09:30:54.348134 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-add-keys
129 09:30:54.349088 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-add-sources
130 09:30:54.350039 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-background-process-start
131 09:30:54.351028 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-background-process-stop
132 09:30:54.352125 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-common-functions
133 09:30:54.353090 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-echo-ipv4
134 09:30:54.354012 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-install-packages
135 09:30:54.354913 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-installed-packages
136 09:30:54.355819 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-os-build
137 09:30:54.356782 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-probe-channel
138 09:30:54.357692 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-probe-ip
139 09:30:54.358597 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-target-ip
140 09:30:54.359538 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-target-mac
141 09:30:54.360519 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-target-storage
142 09:30:54.361468 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-test-case
143 09:30:54.362384 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-test-event
144 09:30:54.363342 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-test-feedback
145 09:30:54.364318 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-test-raise
146 09:30:54.365232 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-test-reference
147 09:30:54.366134 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-test-runner
148 09:30:54.367029 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-test-set
149 09:30:54.367920 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-test-shell
150 09:30:54.368877 Updating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-install-packages (oe)
151 09:30:54.369897 Updating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/bin/lava-installed-packages (oe)
152 09:30:54.370754 Creating /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/environment
153 09:30:54.371483 LAVA metadata
154 09:30:54.372039 - LAVA_JOB_ID=939387
155 09:30:54.372488 - LAVA_DISPATCHER_IP=192.168.6.2
156 09:30:54.373159 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 09:30:54.374968 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 09:30:54.375580 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 09:30:54.376026 skipped lava-vland-overlay
160 09:30:54.376541 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 09:30:54.377055 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 09:30:54.377485 skipped lava-multinode-overlay
163 09:30:54.377971 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 09:30:54.378474 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 09:30:54.378955 Loading test definitions
166 09:30:54.379504 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 09:30:54.379946 Using /lava-939387 at stage 0
168 09:30:54.381290 uuid=939387_1.5.2.4.1 testdef=None
169 09:30:54.381630 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 09:30:54.381907 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 09:30:54.383802 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 09:30:54.384693 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 09:30:54.387053 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 09:30:54.387913 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 09:30:54.390198 runner path: /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/0/tests/0_dmesg test_uuid 939387_1.5.2.4.1
178 09:30:54.390807 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 09:30:54.391609 Creating lava-test-runner.conf files
181 09:30:54.391814 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/939387/lava-overlay-4pt2r42g/lava-939387/0 for stage 0
182 09:30:54.392282 - 0_dmesg
183 09:30:54.392680 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 09:30:54.392976 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 09:30:54.417038 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 09:30:54.417474 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 09:30:54.417749 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 09:30:54.418024 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 09:30:54.418294 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 09:30:55.345072 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 09:30:55.345549 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 09:30:55.345802 extracting modules file /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/939387/extract-overlay-ramdisk-skw38pew/ramdisk
193 09:30:56.677692 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 09:30:56.678185 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 09:30:56.678461 [common] Applying overlay /var/lib/lava/dispatcher/tmp/939387/compress-overlay-3qr0f7ls/overlay-1.5.2.5.tar.gz to ramdisk
196 09:30:56.678674 [common] Applying overlay /var/lib/lava/dispatcher/tmp/939387/compress-overlay-3qr0f7ls/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/939387/extract-overlay-ramdisk-skw38pew/ramdisk
197 09:30:56.710122 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 09:30:56.710571 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 09:30:56.710845 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 09:30:56.711101 Converting downloaded kernel to a uImage
201 09:30:56.711428 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/kernel/Image /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/kernel/uImage
202 09:30:57.168864 output: Image Name:
203 09:30:57.169270 output: Created: Tue Nov 5 09:30:56 2024
204 09:30:57.169479 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 09:30:57.169685 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 09:30:57.169886 output: Load Address: 01080000
207 09:30:57.170084 output: Entry Point: 01080000
208 09:30:57.170282 output:
209 09:30:57.170609 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 09:30:57.170877 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 09:30:57.171146 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 09:30:57.171399 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 09:30:57.171653 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 09:30:57.171914 Building ramdisk /var/lib/lava/dispatcher/tmp/939387/extract-overlay-ramdisk-skw38pew/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/939387/extract-overlay-ramdisk-skw38pew/ramdisk
215 09:30:59.571087 >> 181608 blocks
216 09:31:08.019869 Adding RAMdisk u-boot header.
217 09:31:08.020601 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/939387/extract-overlay-ramdisk-skw38pew/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/939387/extract-overlay-ramdisk-skw38pew/ramdisk.cpio.gz.uboot
218 09:31:08.294302 output: Image Name:
219 09:31:08.294729 output: Created: Tue Nov 5 09:31:08 2024
220 09:31:08.294940 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 09:31:08.295143 output: Data Size: 26062437 Bytes = 25451.60 KiB = 24.86 MiB
222 09:31:08.295342 output: Load Address: 00000000
223 09:31:08.295541 output: Entry Point: 00000000
224 09:31:08.295735 output:
225 09:31:08.296774 rename /var/lib/lava/dispatcher/tmp/939387/extract-overlay-ramdisk-skw38pew/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/ramdisk/ramdisk.cpio.gz.uboot
226 09:31:08.297562 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 09:31:08.298156 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 09:31:08.298773 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:44) [common]
229 09:31:08.299271 No LXC device requested
230 09:31:08.299822 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 09:31:08.300425 start: 1.7 deploy-device-env (timeout 00:09:44) [common]
232 09:31:08.300968 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 09:31:08.301418 Checking files for TFTP limit of 4294967296 bytes.
234 09:31:08.304336 end: 1 tftp-deploy (duration 00:00:16) [common]
235 09:31:08.304961 start: 2 uboot-action (timeout 00:05:00) [common]
236 09:31:08.305536 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 09:31:08.306081 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 09:31:08.306632 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 09:31:08.307215 Using kernel file from prepare-kernel: 939387/tftp-deploy-efblam8f/kernel/uImage
240 09:31:08.307879 substitutions:
241 09:31:08.308366 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 09:31:08.308811 - {DTB_ADDR}: 0x01070000
243 09:31:08.309249 - {DTB}: 939387/tftp-deploy-efblam8f/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 09:31:08.309689 - {INITRD}: 939387/tftp-deploy-efblam8f/ramdisk/ramdisk.cpio.gz.uboot
245 09:31:08.310125 - {KERNEL_ADDR}: 0x01080000
246 09:31:08.310556 - {KERNEL}: 939387/tftp-deploy-efblam8f/kernel/uImage
247 09:31:08.310994 - {LAVA_MAC}: None
248 09:31:08.311467 - {PRESEED_CONFIG}: None
249 09:31:08.311901 - {PRESEED_LOCAL}: None
250 09:31:08.312358 - {RAMDISK_ADDR}: 0x08000000
251 09:31:08.312788 - {RAMDISK}: 939387/tftp-deploy-efblam8f/ramdisk/ramdisk.cpio.gz.uboot
252 09:31:08.313218 - {ROOT_PART}: None
253 09:31:08.313647 - {ROOT}: None
254 09:31:08.314073 - {SERVER_IP}: 192.168.6.2
255 09:31:08.314508 - {TEE_ADDR}: 0x83000000
256 09:31:08.314935 - {TEE}: None
257 09:31:08.315362 Parsed boot commands:
258 09:31:08.315776 - setenv autoload no
259 09:31:08.316264 - setenv initrd_high 0xffffffff
260 09:31:08.316695 - setenv fdt_high 0xffffffff
261 09:31:08.317121 - dhcp
262 09:31:08.317545 - setenv serverip 192.168.6.2
263 09:31:08.317969 - tftpboot 0x01080000 939387/tftp-deploy-efblam8f/kernel/uImage
264 09:31:08.318399 - tftpboot 0x08000000 939387/tftp-deploy-efblam8f/ramdisk/ramdisk.cpio.gz.uboot
265 09:31:08.318824 - tftpboot 0x01070000 939387/tftp-deploy-efblam8f/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 09:31:08.319252 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 09:31:08.319686 - bootm 0x01080000 0x08000000 0x01070000
268 09:31:08.320260 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 09:31:08.321901 start: 2.3 connect-device (timeout 00:05:00) [common]
271 09:31:08.322392 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 09:31:08.338687 Setting prompt string to ['lava-test: # ']
273 09:31:08.340369 end: 2.3 connect-device (duration 00:00:00) [common]
274 09:31:08.341026 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 09:31:08.341621 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 09:31:08.342380 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 09:31:08.343692 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 09:31:08.384373 >> OK - accepted request
279 09:31:08.386581 Returned 0 in 0 seconds
280 09:31:08.487785 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 09:31:08.489594 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 09:31:08.490209 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 09:31:08.490770 Setting prompt string to ['Hit any key to stop autoboot']
285 09:31:08.491260 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 09:31:08.492994 Trying 192.168.56.21...
287 09:31:08.493525 Connected to conserv1.
288 09:31:08.493968 Escape character is '^]'.
289 09:31:08.494430
290 09:31:08.494880 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 09:31:08.495344
292 09:31:15.684282 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 09:31:15.684729 bl2_stage_init 0x01
294 09:31:15.684974 bl2_stage_init 0x81
295 09:31:15.689818 hw id: 0x0000 - pwm id 0x01
296 09:31:15.690219 bl2_stage_init 0xc1
297 09:31:15.695311 bl2_stage_init 0x02
298 09:31:15.695708
299 09:31:15.696087 L0:00000000
300 09:31:15.696421 L1:00000703
301 09:31:15.696661 L2:00008067
302 09:31:15.696875 L3:15000000
303 09:31:15.700947 S1:00000000
304 09:31:15.701316 B2:20282000
305 09:31:15.701646 B1:a0f83180
306 09:31:15.701966
307 09:31:15.702280 TE: 69017
308 09:31:15.702600
309 09:31:15.706440 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 09:31:15.706716
311 09:31:15.712065 Board ID = 1
312 09:31:15.712343 Set cpu clk to 24M
313 09:31:15.712556 Set clk81 to 24M
314 09:31:15.715534 Use GP1_pll as DSU clk.
315 09:31:15.715901 DSU clk: 1200 Mhz
316 09:31:15.721026 CPU clk: 1200 MHz
317 09:31:15.721396 Set clk81 to 166.6M
318 09:31:15.726687 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 09:31:15.727059 board id: 1
320 09:31:15.736156 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 09:31:15.746926 fw parse done
322 09:31:15.752762 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 09:31:15.795415 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 09:31:15.806272 PIEI prepare done
325 09:31:15.806566 fastboot data load
326 09:31:15.806792 fastboot data verify
327 09:31:15.811968 verify result: 266
328 09:31:15.817507 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 09:31:15.818030 LPDDR4 probe
330 09:31:15.818471 ddr clk to 1584MHz
331 09:31:15.825496 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 09:31:15.862741
333 09:31:15.863194 dmc_version 0001
334 09:31:15.869388 Check phy result
335 09:31:15.875313 INFO : End of CA training
336 09:31:15.875831 INFO : End of initialization
337 09:31:15.880954 INFO : Training has run successfully!
338 09:31:15.881406 Check phy result
339 09:31:15.886480 INFO : End of initialization
340 09:31:15.886919 INFO : End of read enable training
341 09:31:15.892204 INFO : End of fine write leveling
342 09:31:15.897722 INFO : End of Write leveling coarse delay
343 09:31:15.898173 INFO : Training has run successfully!
344 09:31:15.898586 Check phy result
345 09:31:15.903308 INFO : End of initialization
346 09:31:15.903770 INFO : End of read dq deskew training
347 09:31:15.908945 INFO : End of MPR read delay center optimization
348 09:31:15.914512 INFO : End of write delay center optimization
349 09:31:15.920213 INFO : End of read delay center optimization
350 09:31:15.920668 INFO : End of max read latency training
351 09:31:15.925817 INFO : Training has run successfully!
352 09:31:15.926260 1D training succeed
353 09:31:15.935076 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 09:31:15.982690 Check phy result
355 09:31:15.983280 INFO : End of initialization
356 09:31:16.004907 INFO : End of 2D read delay Voltage center optimization
357 09:31:16.024202 INFO : End of 2D read delay Voltage center optimization
358 09:31:16.076045 INFO : End of 2D write delay Voltage center optimization
359 09:31:16.125128 INFO : End of 2D write delay Voltage center optimization
360 09:31:16.130688 INFO : Training has run successfully!
361 09:31:16.131142
362 09:31:16.131559 channel==0
363 09:31:16.136349 RxClkDly_Margin_A0==78 ps 8
364 09:31:16.136808 TxDqDly_Margin_A0==88 ps 9
365 09:31:16.139591 RxClkDly_Margin_A1==88 ps 9
366 09:31:16.140067 TxDqDly_Margin_A1==88 ps 9
367 09:31:16.145180 TrainedVREFDQ_A0==75
368 09:31:16.145625 TrainedVREFDQ_A1==74
369 09:31:16.146036 VrefDac_Margin_A0==22
370 09:31:16.150910 DeviceVref_Margin_A0==39
371 09:31:16.151366 VrefDac_Margin_A1==23
372 09:31:16.156494 DeviceVref_Margin_A1==40
373 09:31:16.156943
374 09:31:16.157360
375 09:31:16.157760 channel==1
376 09:31:16.158158 RxClkDly_Margin_A0==88 ps 9
377 09:31:16.162081 TxDqDly_Margin_A0==98 ps 10
378 09:31:16.162545 RxClkDly_Margin_A1==88 ps 9
379 09:31:16.167674 TxDqDly_Margin_A1==88 ps 9
380 09:31:16.168147 TrainedVREFDQ_A0==78
381 09:31:16.168563 TrainedVREFDQ_A1==75
382 09:31:16.173286 VrefDac_Margin_A0==22
383 09:31:16.173765 DeviceVref_Margin_A0==36
384 09:31:16.174256 VrefDac_Margin_A1==22
385 09:31:16.178791 DeviceVref_Margin_A1==39
386 09:31:16.179244
387 09:31:16.184497 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 09:31:16.184955
389 09:31:16.212426 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
390 09:31:16.218016 2D training succeed
391 09:31:16.223533 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 09:31:16.224006 auto size-- 65535DDR cs0 size: 2048MB
393 09:31:16.229123 DDR cs1 size: 2048MB
394 09:31:16.229560 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 09:31:16.234716 cs0 DataBus test pass
396 09:31:16.235175 cs1 DataBus test pass
397 09:31:16.235589 cs0 AddrBus test pass
398 09:31:16.240317 cs1 AddrBus test pass
399 09:31:16.240765
400 09:31:16.241177 100bdlr_step_size ps== 478
401 09:31:16.241593 result report
402 09:31:16.245987 boot times 0Enable ddr reg access
403 09:31:16.253286 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 09:31:16.267116 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 09:31:16.922186 bl2z: ptr: 05129330, size: 00001e40
406 09:31:16.929376 0.0;M3 CHK:0;cm4_sp_mode 0
407 09:31:16.929859 MVN_1=0x00000000
408 09:31:16.930282 MVN_2=0x00000000
409 09:31:16.940851 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 09:31:16.941306 OPS=0x04
411 09:31:16.941721 ring efuse init
412 09:31:16.946486 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 09:31:16.946938 [0.017319 Inits done]
414 09:31:16.947349 secure task start!
415 09:31:16.954284 high task start!
416 09:31:16.954771 low task start!
417 09:31:16.955187 run into bl31
418 09:31:16.962937 NOTICE: BL31: v1.3(release):4fc40b1
419 09:31:16.970753 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 09:31:16.971247 NOTICE: BL31: G12A normal boot!
421 09:31:16.986433 NOTICE: BL31: BL33 decompress pass
422 09:31:16.992069 ERROR: Error initializing runtime service opteed_fast
423 09:31:19.736349 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 09:31:19.736986 bl2_stage_init 0x01
425 09:31:19.737430 bl2_stage_init 0x81
426 09:31:19.741950 hw id: 0x0000 - pwm id 0x01
427 09:31:19.742461 bl2_stage_init 0xc1
428 09:31:19.747579 bl2_stage_init 0x02
429 09:31:19.748147
430 09:31:19.748556 L0:00000000
431 09:31:19.748946 L1:00000703
432 09:31:19.749333 L2:00008067
433 09:31:19.749718 L3:15000000
434 09:31:19.753124 S1:00000000
435 09:31:19.753555 B2:20282000
436 09:31:19.753947 B1:a0f83180
437 09:31:19.754332
438 09:31:19.754717 TE: 71293
439 09:31:19.755104
440 09:31:19.758746 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 09:31:19.759208
442 09:31:19.764315 Board ID = 1
443 09:31:19.764737 Set cpu clk to 24M
444 09:31:19.765146 Set clk81 to 24M
445 09:31:19.769938 Use GP1_pll as DSU clk.
446 09:31:19.770383 DSU clk: 1200 Mhz
447 09:31:19.770771 CPU clk: 1200 MHz
448 09:31:19.775528 Set clk81 to 166.6M
449 09:31:19.781124 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 09:31:19.781557 board id: 1
451 09:31:19.788300 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 09:31:19.799003 fw parse done
453 09:31:19.804951 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 09:31:19.847640 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 09:31:19.858510 PIEI prepare done
456 09:31:19.858983 fastboot data load
457 09:31:19.859379 fastboot data verify
458 09:31:19.864084 verify result: 266
459 09:31:19.869707 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 09:31:19.870148 LPDDR4 probe
461 09:31:19.870535 ddr clk to 1584MHz
462 09:31:19.877673 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 09:31:19.914970
464 09:31:19.915484 dmc_version 0001
465 09:31:19.921598 Check phy result
466 09:31:19.927515 INFO : End of CA training
467 09:31:19.927940 INFO : End of initialization
468 09:31:19.933113 INFO : Training has run successfully!
469 09:31:19.933553 Check phy result
470 09:31:19.938710 INFO : End of initialization
471 09:31:19.939161 INFO : End of read enable training
472 09:31:19.944304 INFO : End of fine write leveling
473 09:31:19.949883 INFO : End of Write leveling coarse delay
474 09:31:19.950318 INFO : Training has run successfully!
475 09:31:19.950726 Check phy result
476 09:31:19.955513 INFO : End of initialization
477 09:31:19.955941 INFO : End of read dq deskew training
478 09:31:19.961107 INFO : End of MPR read delay center optimization
479 09:31:19.966671 INFO : End of write delay center optimization
480 09:31:19.972321 INFO : End of read delay center optimization
481 09:31:19.972759 INFO : End of max read latency training
482 09:31:19.977926 INFO : Training has run successfully!
483 09:31:19.978408 1D training succeed
484 09:31:19.987088 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 09:31:20.034743 Check phy result
486 09:31:20.035321 INFO : End of initialization
487 09:31:20.057031 INFO : End of 2D read delay Voltage center optimization
488 09:31:20.076226 INFO : End of 2D read delay Voltage center optimization
489 09:31:20.128148 INFO : End of 2D write delay Voltage center optimization
490 09:31:20.177415 INFO : End of 2D write delay Voltage center optimization
491 09:31:20.182834 INFO : Training has run successfully!
492 09:31:20.183345
493 09:31:20.183763 channel==0
494 09:31:20.188533 RxClkDly_Margin_A0==78 ps 8
495 09:31:20.188976 TxDqDly_Margin_A0==88 ps 9
496 09:31:20.194042 RxClkDly_Margin_A1==88 ps 9
497 09:31:20.194538 TxDqDly_Margin_A1==88 ps 9
498 09:31:20.194957 TrainedVREFDQ_A0==74
499 09:31:20.199621 TrainedVREFDQ_A1==75
500 09:31:20.200100 VrefDac_Margin_A0==25
501 09:31:20.200514 DeviceVref_Margin_A0==40
502 09:31:20.205410 VrefDac_Margin_A1==23
503 09:31:20.205851 DeviceVref_Margin_A1==39
504 09:31:20.206265
505 09:31:20.206667
506 09:31:20.207067 channel==1
507 09:31:20.210802 RxClkDly_Margin_A0==88 ps 9
508 09:31:20.211252 TxDqDly_Margin_A0==98 ps 10
509 09:31:20.216569 RxClkDly_Margin_A1==88 ps 9
510 09:31:20.217068 TxDqDly_Margin_A1==78 ps 8
511 09:31:20.222041 TrainedVREFDQ_A0==78
512 09:31:20.222491 TrainedVREFDQ_A1==75
513 09:31:20.222897 VrefDac_Margin_A0==22
514 09:31:20.227620 DeviceVref_Margin_A0==36
515 09:31:20.228093 VrefDac_Margin_A1==22
516 09:31:20.228502 DeviceVref_Margin_A1==38
517 09:31:20.233287
518 09:31:20.233730 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 09:31:20.234142
520 09:31:20.266827 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000060
521 09:31:20.267385 2D training succeed
522 09:31:20.272613 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 09:31:20.278010 auto size-- 65535DDR cs0 size: 2048MB
524 09:31:20.278472 DDR cs1 size: 2048MB
525 09:31:20.283604 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 09:31:20.284082 cs0 DataBus test pass
527 09:31:20.289213 cs1 DataBus test pass
528 09:31:20.289651 cs0 AddrBus test pass
529 09:31:20.290054 cs1 AddrBus test pass
530 09:31:20.290450
531 09:31:20.294838 100bdlr_step_size ps== 478
532 09:31:20.295357 result report
533 09:31:20.300563 boot times 0Enable ddr reg access
534 09:31:20.305618 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 09:31:20.319361 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 09:31:20.974040 bl2z: ptr: 05129330, size: 00001e40
537 09:31:20.981676 0.0;M3 CHK:0;cm4_sp_mode 0
538 09:31:20.982176 MVN_1=0x00000000
539 09:31:20.982592 MVN_2=0x00000000
540 09:31:20.993188 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 09:31:20.993648 OPS=0x04
542 09:31:20.994063 ring efuse init
543 09:31:20.998835 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 09:31:20.999362 [0.017310 Inits done]
545 09:31:20.999783 secure task start!
546 09:31:21.006130 high task start!
547 09:31:21.006580 low task start!
548 09:31:21.006992 run into bl31
549 09:31:21.014751 NOTICE: BL31: v1.3(release):4fc40b1
550 09:31:21.022564 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 09:31:21.023009 NOTICE: BL31: G12A normal boot!
552 09:31:21.038032 NOTICE: BL31: BL33 decompress pass
553 09:31:21.043746 ERROR: Error initializing runtime service opteed_fast
554 09:31:22.436275 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 09:31:22.436885 bl2_stage_init 0x01
556 09:31:22.437312 bl2_stage_init 0x81
557 09:31:22.441923 hw id: 0x0000 - pwm id 0x01
558 09:31:22.442371 bl2_stage_init 0xc1
559 09:31:22.447142 bl2_stage_init 0x02
560 09:31:22.447583
561 09:31:22.448041 L0:00000000
562 09:31:22.448455 L1:00000703
563 09:31:22.448858 L2:00008067
564 09:31:22.449257 L3:15000000
565 09:31:22.452681 S1:00000000
566 09:31:22.453119 B2:20282000
567 09:31:22.453520 B1:a0f83180
568 09:31:22.453916
569 09:31:22.454314 TE: 71015
570 09:31:22.454709
571 09:31:22.458261 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 09:31:22.463971
573 09:31:22.464433 Board ID = 1
574 09:31:22.464837 Set cpu clk to 24M
575 09:31:22.465229 Set clk81 to 24M
576 09:31:22.469414 Use GP1_pll as DSU clk.
577 09:31:22.469854 DSU clk: 1200 Mhz
578 09:31:22.470257 CPU clk: 1200 MHz
579 09:31:22.475068 Set clk81 to 166.6M
580 09:31:22.480690 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 09:31:22.481131 board id: 1
582 09:31:22.488223 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 09:31:22.498940 fw parse done
584 09:31:22.504942 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 09:31:22.547406 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 09:31:22.558384 PIEI prepare done
587 09:31:22.558856 fastboot data load
588 09:31:22.559279 fastboot data verify
589 09:31:22.563962 verify result: 266
590 09:31:22.569556 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 09:31:22.569998 LPDDR4 probe
592 09:31:22.570405 ddr clk to 1584MHz
593 09:31:22.577552 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 09:31:22.614794
595 09:31:22.615251 dmc_version 0001
596 09:31:22.621469 Check phy result
597 09:31:22.627382 INFO : End of CA training
598 09:31:22.627816 INFO : End of initialization
599 09:31:22.633045 INFO : Training has run successfully!
600 09:31:22.633478 Check phy result
601 09:31:22.638544 INFO : End of initialization
602 09:31:22.638973 INFO : End of read enable training
603 09:31:22.644251 INFO : End of fine write leveling
604 09:31:22.649815 INFO : End of Write leveling coarse delay
605 09:31:22.650246 INFO : Training has run successfully!
606 09:31:22.650652 Check phy result
607 09:31:22.655391 INFO : End of initialization
608 09:31:22.655815 INFO : End of read dq deskew training
609 09:31:22.661026 INFO : End of MPR read delay center optimization
610 09:31:22.666612 INFO : End of write delay center optimization
611 09:31:22.672257 INFO : End of read delay center optimization
612 09:31:22.672687 INFO : End of max read latency training
613 09:31:22.677824 INFO : Training has run successfully!
614 09:31:22.678256 1D training succeed
615 09:31:22.687039 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 09:31:22.734618 Check phy result
617 09:31:22.735122 INFO : End of initialization
618 09:31:22.757111 INFO : End of 2D read delay Voltage center optimization
619 09:31:22.776167 INFO : End of 2D read delay Voltage center optimization
620 09:31:22.827951 INFO : End of 2D write delay Voltage center optimization
621 09:31:22.877162 INFO : End of 2D write delay Voltage center optimization
622 09:31:22.882823 INFO : Training has run successfully!
623 09:31:22.883255
624 09:31:22.883663 channel==0
625 09:31:22.888263 RxClkDly_Margin_A0==78 ps 8
626 09:31:22.888703 TxDqDly_Margin_A0==88 ps 9
627 09:31:22.891704 RxClkDly_Margin_A1==78 ps 8
628 09:31:22.892164 TxDqDly_Margin_A1==88 ps 9
629 09:31:22.897222 TrainedVREFDQ_A0==74
630 09:31:22.897653 TrainedVREFDQ_A1==74
631 09:31:22.898061 VrefDac_Margin_A0==22
632 09:31:22.902817 DeviceVref_Margin_A0==40
633 09:31:22.903251 VrefDac_Margin_A1==22
634 09:31:22.908394 DeviceVref_Margin_A1==40
635 09:31:22.908827
636 09:31:22.909231
637 09:31:22.909628 channel==1
638 09:31:22.910022 RxClkDly_Margin_A0==88 ps 9
639 09:31:22.911837 TxDqDly_Margin_A0==98 ps 10
640 09:31:22.917442 RxClkDly_Margin_A1==78 ps 8
641 09:31:22.917877 TxDqDly_Margin_A1==88 ps 9
642 09:31:22.918284 TrainedVREFDQ_A0==78
643 09:31:22.923043 TrainedVREFDQ_A1==78
644 09:31:22.923474 VrefDac_Margin_A0==22
645 09:31:22.928602 DeviceVref_Margin_A0==36
646 09:31:22.929039 VrefDac_Margin_A1==22
647 09:31:22.929443 DeviceVref_Margin_A1==36
648 09:31:22.929839
649 09:31:22.934232 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 09:31:22.934668
651 09:31:22.967816 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
652 09:31:22.968311 2D training succeed
653 09:31:22.973418 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 09:31:22.978932 auto size-- 65535DDR cs0 size: 2048MB
655 09:31:22.979365 DDR cs1 size: 2048MB
656 09:31:22.984453 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 09:31:22.984885 cs0 DataBus test pass
658 09:31:22.985293 cs1 DataBus test pass
659 09:31:22.990063 cs0 AddrBus test pass
660 09:31:22.990494 cs1 AddrBus test pass
661 09:31:22.990896
662 09:31:22.995676 100bdlr_step_size ps== 478
663 09:31:22.996137 result report
664 09:31:22.996542 boot times 0Enable ddr reg access
665 09:31:23.005312 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 09:31:23.019124 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 09:31:23.673564 bl2z: ptr: 05129330, size: 00001e40
668 09:31:23.679406 0.0;M3 CHK:0;cm4_sp_mode 0
669 09:31:23.679888 MVN_1=0x00000000
670 09:31:23.680388 MVN_2=0x00000000
671 09:31:23.690979 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 09:31:23.691443 OPS=0x04
673 09:31:23.691859 ring efuse init
674 09:31:23.693998 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 09:31:23.699521 [0.017320 Inits done]
676 09:31:23.699969 secure task start!
677 09:31:23.700414 high task start!
678 09:31:23.700816 low task start!
679 09:31:23.703784 run into bl31
680 09:31:23.712466 NOTICE: BL31: v1.3(release):4fc40b1
681 09:31:23.720287 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 09:31:23.720875 NOTICE: BL31: G12A normal boot!
683 09:31:23.735750 NOTICE: BL31: BL33 decompress pass
684 09:31:23.741399 ERROR: Error initializing runtime service opteed_fast
685 09:31:24.535647
686 09:31:24.536355
687 09:31:24.541026 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 09:31:24.541574
689 09:31:24.544484 Model: Libre Computer AML-S905D3-CC Solitude
690 09:31:24.691415 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 09:31:24.706729 DRAM: 2 GiB (effective 3.8 GiB)
692 09:31:24.807620 Core: 406 devices, 33 uclasses, devicetree: separate
693 09:31:24.813986 WDT: Not starting watchdog@f0d0
694 09:31:24.838630 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 09:31:24.850893 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 09:31:24.855751 ** Bad device specification mmc 0 **
697 09:31:24.865919 Card did not respond to voltage select! : -110
698 09:31:24.873512 ** Bad device specification mmc 0 **
699 09:31:24.874085 Couldn't find partition mmc 0
700 09:31:24.881831 Card did not respond to voltage select! : -110
701 09:31:24.887299 ** Bad device specification mmc 0 **
702 09:31:24.887778 Couldn't find partition mmc 0
703 09:31:24.892358 Error: could not access storage.
704 09:31:25.189006 Net: eth0: ethernet@ff3f0000
705 09:31:25.189682 starting USB...
706 09:31:25.433557 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 09:31:25.434211 Starting the controller
708 09:31:25.440406 USB XHCI 1.10
709 09:31:26.994165 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 09:31:27.002583 scanning usb for storage devices... 0 Storage Device(s) found
712 09:31:27.054384 Hit any key to stop autoboot: 1
713 09:31:27.055317 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 09:31:27.055977 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 09:31:27.056550 Setting prompt string to ['=>']
716 09:31:27.057083 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 09:31:27.068566 0
718 09:31:27.069533 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 09:31:27.170836 => setenv autoload no
721 09:31:27.171568 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 09:31:27.176890 setenv autoload no
724 09:31:27.278502 => setenv initrd_high 0xffffffff
725 09:31:27.279284 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 09:31:27.283615 setenv initrd_high 0xffffffff
728 09:31:27.385233 => setenv fdt_high 0xffffffff
729 09:31:27.385945 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 09:31:27.390333 setenv fdt_high 0xffffffff
732 09:31:27.491899 => dhcp
733 09:31:27.492622 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 09:31:27.496628 dhcp
735 09:31:28.402619 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 09:31:28.403275 Speed: 1000, full duplex
737 09:31:28.403742 BOOTP broadcast 1
738 09:31:28.650896 BOOTP broadcast 2
739 09:31:28.662989 DHCP client bound to address 192.168.6.21 (259 ms)
741 09:31:28.764685 => setenv serverip 192.168.6.2
742 09:31:28.765469 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
743 09:31:28.769924 setenv serverip 192.168.6.2
745 09:31:28.871464 => tftpboot 0x01080000 939387/tftp-deploy-efblam8f/kernel/uImage
746 09:31:28.872280 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
747 09:31:28.879161 tftpboot 0x01080000 939387/tftp-deploy-efblam8f/kernel/uImage
748 09:31:28.879687 Speed: 1000, full duplex
749 09:31:28.880186 Using ethernet@ff3f0000 device
750 09:31:28.884576 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
751 09:31:28.890179 Filename '939387/tftp-deploy-efblam8f/kernel/uImage'.
752 09:31:28.894040 Load address: 0x1080000
753 09:31:31.667006 Loading: *################################################## 43.6 MiB
754 09:31:31.667662 15.7 MiB/s
755 09:31:31.668186 done
756 09:31:31.671502 Bytes transferred = 45713984 (2b98a40 hex)
758 09:31:31.773207 => tftpboot 0x08000000 939387/tftp-deploy-efblam8f/ramdisk/ramdisk.cpio.gz.uboot
759 09:31:31.774011 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
760 09:31:31.780702 tftpboot 0x08000000 939387/tftp-deploy-efblam8f/ramdisk/ramdisk.cpio.gz.uboot
761 09:31:31.781193 Speed: 1000, full duplex
762 09:31:31.781634 Using ethernet@ff3f0000 device
763 09:31:31.786335 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
764 09:31:31.795137 Filename '939387/tftp-deploy-efblam8f/ramdisk/ramdisk.cpio.gz.uboot'.
765 09:31:31.795618 Load address: 0x8000000
766 09:31:33.425576 Loading: *################################################# UDP wrong checksum 00000005 00000e9a
767 09:31:38.425931 T UDP wrong checksum 00000005 00000e9a
768 09:31:48.427825 T T UDP wrong checksum 00000005 00000e9a
769 09:31:59.639396 T T UDP wrong checksum 000000ff 00006a2b
770 09:31:59.689690 UDP wrong checksum 000000ff 0000041e
771 09:32:01.229764 UDP wrong checksum 000000ff 0000b9ae
772 09:32:01.279786 UDP wrong checksum 000000ff 000052a1
773 09:32:04.769772 T UDP wrong checksum 000000ff 000049a3
774 09:32:04.809472 UDP wrong checksum 000000ff 0000d495
775 09:32:08.431826 T UDP wrong checksum 00000005 00000e9a
776 09:32:15.220726 T UDP wrong checksum 000000ff 00005583
777 09:32:15.270561 UDP wrong checksum 000000ff 0000f075
778 09:32:16.750821 UDP wrong checksum 000000ff 00000908
779 09:32:16.800911 UDP wrong checksum 000000ff 00008dfa
780 09:32:28.436677 T T
781 09:32:28.437351 Retry count exceeded; starting again
783 09:32:28.438893 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
786 09:32:28.441065 end: 2.4 uboot-commands (duration 00:01:20) [common]
788 09:32:28.442571 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
790 09:32:28.443737 end: 2 uboot-action (duration 00:01:20) [common]
792 09:32:28.445439 Cleaning after the job
793 09:32:28.446024 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/ramdisk
794 09:32:28.447471 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/kernel
795 09:32:28.495165 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/dtb
796 09:32:28.496064 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939387/tftp-deploy-efblam8f/modules
797 09:32:28.514857 start: 4.1 power-off (timeout 00:00:30) [common]
798 09:32:28.515496 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
799 09:32:28.553073 >> OK - accepted request
800 09:32:28.555080 Returned 0 in 0 seconds
801 09:32:28.655962 end: 4.1 power-off (duration 00:00:00) [common]
803 09:32:28.657696 start: 4.2 read-feedback (timeout 00:10:00) [common]
804 09:32:28.658806 Listened to connection for namespace 'common' for up to 1s
805 09:32:29.659614 Finalising connection for namespace 'common'
806 09:32:29.660434 Disconnecting from shell: Finalise
807 09:32:29.661013 =>
808 09:32:29.762024 end: 4.2 read-feedback (duration 00:00:01) [common]
809 09:32:29.762639 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/939387
810 09:32:30.051349 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/939387
811 09:32:30.051961 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.