Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:43:45.062990 lava-dispatcher, installed at version: 2024.01
2 09:43:45.064325 start: 0 validate
3 09:43:45.064835 Start time: 2024-11-05 09:43:45.064803+00:00 (UTC)
4 09:43:45.065409 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:43:45.065988 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:43:45.111886 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:43:45.112455 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-401-g1596ed05f2f47%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 09:43:45.144078 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:43:45.144680 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-401-g1596ed05f2f47%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 09:43:45.180826 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:43:45.181296 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:43:45.216588 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:43:45.217107 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-401-g1596ed05f2f47%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 09:43:45.262859 validate duration: 0.20
16 09:43:45.264330 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:43:45.264942 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:43:45.265496 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:43:45.266542 Not decompressing ramdisk as can be used compressed.
20 09:43:45.267321 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 09:43:45.267813 saving as /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/ramdisk/initrd.cpio.gz
22 09:43:45.268367 total size: 5628169 (5 MB)
23 09:43:45.310775 progress 0 % (0 MB)
24 09:43:45.318233 progress 5 % (0 MB)
25 09:43:45.325843 progress 10 % (0 MB)
26 09:43:45.332724 progress 15 % (0 MB)
27 09:43:45.340378 progress 20 % (1 MB)
28 09:43:45.345659 progress 25 % (1 MB)
29 09:43:45.349614 progress 30 % (1 MB)
30 09:43:45.353605 progress 35 % (1 MB)
31 09:43:45.357256 progress 40 % (2 MB)
32 09:43:45.361194 progress 45 % (2 MB)
33 09:43:45.364790 progress 50 % (2 MB)
34 09:43:45.368733 progress 55 % (2 MB)
35 09:43:45.372682 progress 60 % (3 MB)
36 09:43:45.376232 progress 65 % (3 MB)
37 09:43:45.380132 progress 70 % (3 MB)
38 09:43:45.383735 progress 75 % (4 MB)
39 09:43:45.387633 progress 80 % (4 MB)
40 09:43:45.391185 progress 85 % (4 MB)
41 09:43:45.395188 progress 90 % (4 MB)
42 09:43:45.398968 progress 95 % (5 MB)
43 09:43:45.402239 progress 100 % (5 MB)
44 09:43:45.402885 5 MB downloaded in 0.13 s (39.90 MB/s)
45 09:43:45.403409 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:43:45.404324 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:43:45.404618 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:43:45.404887 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:43:45.405350 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-401-g1596ed05f2f47/arm64/defconfig/gcc-12/kernel/Image
51 09:43:45.405595 saving as /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/kernel/Image
52 09:43:45.405805 total size: 45713920 (43 MB)
53 09:43:45.406013 No compression specified
54 09:43:45.444095 progress 0 % (0 MB)
55 09:43:45.484900 progress 5 % (2 MB)
56 09:43:45.525604 progress 10 % (4 MB)
57 09:43:45.566740 progress 15 % (6 MB)
58 09:43:45.604106 progress 20 % (8 MB)
59 09:43:45.633160 progress 25 % (10 MB)
60 09:43:45.662535 progress 30 % (13 MB)
61 09:43:45.692049 progress 35 % (15 MB)
62 09:43:45.721743 progress 40 % (17 MB)
63 09:43:45.750634 progress 45 % (19 MB)
64 09:43:45.780219 progress 50 % (21 MB)
65 09:43:45.809775 progress 55 % (24 MB)
66 09:43:45.839626 progress 60 % (26 MB)
67 09:43:45.868474 progress 65 % (28 MB)
68 09:43:45.897852 progress 70 % (30 MB)
69 09:43:45.927094 progress 75 % (32 MB)
70 09:43:45.956763 progress 80 % (34 MB)
71 09:43:45.985724 progress 85 % (37 MB)
72 09:43:46.015080 progress 90 % (39 MB)
73 09:43:46.044582 progress 95 % (41 MB)
74 09:43:46.073153 progress 100 % (43 MB)
75 09:43:46.073677 43 MB downloaded in 0.67 s (65.28 MB/s)
76 09:43:46.074153 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:43:46.074971 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:43:46.075246 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:43:46.075514 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:43:46.076002 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-401-g1596ed05f2f47/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 09:43:46.076285 saving as /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 09:43:46.076495 total size: 53209 (0 MB)
84 09:43:46.076704 No compression specified
85 09:43:46.119741 progress 61 % (0 MB)
86 09:43:46.120634 progress 100 % (0 MB)
87 09:43:46.121210 0 MB downloaded in 0.04 s (1.14 MB/s)
88 09:43:46.121724 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:43:46.122574 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:43:46.122857 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:43:46.123139 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:43:46.123618 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 09:43:46.123879 saving as /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/nfsrootfs/full.rootfs.tar
95 09:43:46.124130 total size: 120894716 (115 MB)
96 09:43:46.124358 Using unxz to decompress xz
97 09:43:46.165343 progress 0 % (0 MB)
98 09:43:46.949106 progress 5 % (5 MB)
99 09:43:47.809907 progress 10 % (11 MB)
100 09:43:48.632600 progress 15 % (17 MB)
101 09:43:49.389625 progress 20 % (23 MB)
102 09:43:50.007377 progress 25 % (28 MB)
103 09:43:50.832587 progress 30 % (34 MB)
104 09:43:51.617033 progress 35 % (40 MB)
105 09:43:51.986773 progress 40 % (46 MB)
106 09:43:52.372629 progress 45 % (51 MB)
107 09:43:53.085207 progress 50 % (57 MB)
108 09:43:53.967188 progress 55 % (63 MB)
109 09:43:54.746970 progress 60 % (69 MB)
110 09:43:55.511172 progress 65 % (74 MB)
111 09:43:56.299174 progress 70 % (80 MB)
112 09:43:57.116487 progress 75 % (86 MB)
113 09:43:57.926606 progress 80 % (92 MB)
114 09:43:58.686531 progress 85 % (98 MB)
115 09:43:59.530282 progress 90 % (103 MB)
116 09:44:00.296493 progress 95 % (109 MB)
117 09:44:01.137451 progress 100 % (115 MB)
118 09:44:01.149418 115 MB downloaded in 15.03 s (7.67 MB/s)
119 09:44:01.150398 end: 1.4.1 http-download (duration 00:00:15) [common]
121 09:44:01.152011 end: 1.4 download-retry (duration 00:00:15) [common]
122 09:44:01.152538 start: 1.5 download-retry (timeout 00:09:44) [common]
123 09:44:01.153045 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 09:44:01.154118 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-401-g1596ed05f2f47/arm64/defconfig/gcc-12/modules.tar.xz
125 09:44:01.154604 saving as /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/modules/modules.tar
126 09:44:01.155021 total size: 11611116 (11 MB)
127 09:44:01.155443 Using unxz to decompress xz
128 09:44:01.206637 progress 0 % (0 MB)
129 09:44:01.296234 progress 5 % (0 MB)
130 09:44:01.373663 progress 10 % (1 MB)
131 09:44:01.473463 progress 15 % (1 MB)
132 09:44:01.567900 progress 20 % (2 MB)
133 09:44:01.649719 progress 25 % (2 MB)
134 09:44:01.730483 progress 30 % (3 MB)
135 09:44:01.808908 progress 35 % (3 MB)
136 09:44:01.881423 progress 40 % (4 MB)
137 09:44:01.957058 progress 45 % (5 MB)
138 09:44:02.040537 progress 50 % (5 MB)
139 09:44:02.116833 progress 55 % (6 MB)
140 09:44:02.203541 progress 60 % (6 MB)
141 09:44:02.282760 progress 65 % (7 MB)
142 09:44:02.362597 progress 70 % (7 MB)
143 09:44:02.440310 progress 75 % (8 MB)
144 09:44:02.523846 progress 80 % (8 MB)
145 09:44:02.603417 progress 85 % (9 MB)
146 09:44:02.681732 progress 90 % (9 MB)
147 09:44:02.759620 progress 95 % (10 MB)
148 09:44:02.837463 progress 100 % (11 MB)
149 09:44:02.848894 11 MB downloaded in 1.69 s (6.54 MB/s)
150 09:44:02.849457 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:44:02.850289 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:44:02.850558 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 09:44:02.851222 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 09:44:19.429256 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/939343/extract-nfsrootfs-ho2neami
156 09:44:19.429836 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 09:44:19.430120 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 09:44:19.430828 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2
159 09:44:19.431269 makedir: /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin
160 09:44:19.431584 makedir: /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/tests
161 09:44:19.431887 makedir: /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/results
162 09:44:19.432262 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-add-keys
163 09:44:19.432791 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-add-sources
164 09:44:19.433303 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-background-process-start
165 09:44:19.433810 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-background-process-stop
166 09:44:19.434311 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-common-functions
167 09:44:19.434789 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-echo-ipv4
168 09:44:19.435260 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-install-packages
169 09:44:19.435720 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-installed-packages
170 09:44:19.436213 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-os-build
171 09:44:19.436793 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-probe-channel
172 09:44:19.437297 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-probe-ip
173 09:44:19.437761 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-target-ip
174 09:44:19.438230 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-target-mac
175 09:44:19.438696 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-target-storage
176 09:44:19.439163 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-test-case
177 09:44:19.439635 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-test-event
178 09:44:19.440132 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-test-feedback
179 09:44:19.440646 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-test-raise
180 09:44:19.441140 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-test-reference
181 09:44:19.441604 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-test-runner
182 09:44:19.442073 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-test-set
183 09:44:19.442533 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-test-shell
184 09:44:19.443004 Updating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-add-keys (debian)
185 09:44:19.443520 Updating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-add-sources (debian)
186 09:44:19.444033 Updating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-install-packages (debian)
187 09:44:19.444540 Updating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-installed-packages (debian)
188 09:44:19.445020 Updating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/bin/lava-os-build (debian)
189 09:44:19.445445 Creating /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/environment
190 09:44:19.445804 LAVA metadata
191 09:44:19.446057 - LAVA_JOB_ID=939343
192 09:44:19.446265 - LAVA_DISPATCHER_IP=192.168.6.2
193 09:44:19.446613 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 09:44:19.447540 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 09:44:19.447846 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 09:44:19.448083 skipped lava-vland-overlay
197 09:44:19.448327 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 09:44:19.448577 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 09:44:19.448785 skipped lava-multinode-overlay
200 09:44:19.449019 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 09:44:19.449263 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 09:44:19.449505 Loading test definitions
203 09:44:19.449774 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 09:44:19.449990 Using /lava-939343 at stage 0
205 09:44:19.451056 uuid=939343_1.6.2.4.1 testdef=None
206 09:44:19.451351 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 09:44:19.451610 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 09:44:19.453189 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 09:44:19.453960 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 09:44:19.455817 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 09:44:19.456673 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 09:44:19.458436 runner path: /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/0/tests/0_timesync-off test_uuid 939343_1.6.2.4.1
215 09:44:19.458958 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 09:44:19.459757 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 09:44:19.459975 Using /lava-939343 at stage 0
219 09:44:19.460347 Fetching tests from https://github.com/kernelci/test-definitions.git
220 09:44:19.460631 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/0/tests/1_kselftest-alsa'
221 09:44:23.101078 Running '/usr/bin/git checkout kernelci.org
222 09:44:23.247642 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 09:44:23.249128 uuid=939343_1.6.2.4.5 testdef=None
224 09:44:23.249470 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 09:44:23.250221 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 09:44:23.253047 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 09:44:23.253855 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 09:44:23.257549 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 09:44:23.258401 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 09:44:23.262020 runner path: /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/0/tests/1_kselftest-alsa test_uuid 939343_1.6.2.4.5
234 09:44:23.262306 BOARD='meson-sm1-s905d3-libretech-cc'
235 09:44:23.262508 BRANCH='tip'
236 09:44:23.262701 SKIPFILE='/dev/null'
237 09:44:23.262894 SKIP_INSTALL='True'
238 09:44:23.263087 TESTPROG_URL='http://storage.kernelci.org/tip/master/v6.12-rc6-401-g1596ed05f2f47/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 09:44:23.263283 TST_CASENAME=''
240 09:44:23.263476 TST_CMDFILES='alsa'
241 09:44:23.264054 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 09:44:23.265576 Creating lava-test-runner.conf files
244 09:44:23.265971 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/939343/lava-overlay-bxigopb2/lava-939343/0 for stage 0
245 09:44:23.266603 - 0_timesync-off
246 09:44:23.267047 - 1_kselftest-alsa
247 09:44:23.267657 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 09:44:23.268217 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 09:44:46.621131 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 09:44:46.621557 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 09:44:46.621824 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 09:44:46.622091 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 09:44:46.622361 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 09:44:47.248948 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 09:44:47.249403 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 09:44:47.249654 extracting modules file /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/modules/modules.tar to /var/lib/lava/dispatcher/tmp/939343/extract-nfsrootfs-ho2neami
257 09:44:48.678667 extracting modules file /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/modules/modules.tar to /var/lib/lava/dispatcher/tmp/939343/extract-overlay-ramdisk-cpufilih/ramdisk
258 09:44:50.096309 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 09:44:50.096790 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 09:44:50.097054 [common] Applying overlay to NFS
261 09:44:50.097266 [common] Applying overlay /var/lib/lava/dispatcher/tmp/939343/compress-overlay-kijdyx_f/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/939343/extract-nfsrootfs-ho2neami
262 09:44:52.834265 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 09:44:52.834740 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 09:44:52.835015 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 09:44:52.835246 Converting downloaded kernel to a uImage
266 09:44:52.835552 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/kernel/Image /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/kernel/uImage
267 09:44:53.345173 output: Image Name:
268 09:44:53.345596 output: Created: Tue Nov 5 09:44:52 2024
269 09:44:53.345807 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 09:44:53.346011 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 09:44:53.346211 output: Load Address: 01080000
272 09:44:53.346407 output: Entry Point: 01080000
273 09:44:53.346602 output:
274 09:44:53.346932 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 09:44:53.347196 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 09:44:53.347462 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 09:44:53.347714 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 09:44:53.347970 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 09:44:53.348271 Building ramdisk /var/lib/lava/dispatcher/tmp/939343/extract-overlay-ramdisk-cpufilih/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/939343/extract-overlay-ramdisk-cpufilih/ramdisk
280 09:44:55.555283 >> 166825 blocks
281 09:45:03.273711 Adding RAMdisk u-boot header.
282 09:45:03.274421 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/939343/extract-overlay-ramdisk-cpufilih/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/939343/extract-overlay-ramdisk-cpufilih/ramdisk.cpio.gz.uboot
283 09:45:03.526470 output: Image Name:
284 09:45:03.526878 output: Created: Tue Nov 5 09:45:03 2024
285 09:45:03.527087 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 09:45:03.527292 output: Data Size: 23435797 Bytes = 22886.52 KiB = 22.35 MiB
287 09:45:03.527492 output: Load Address: 00000000
288 09:45:03.527688 output: Entry Point: 00000000
289 09:45:03.527888 output:
290 09:45:03.528941 rename /var/lib/lava/dispatcher/tmp/939343/extract-overlay-ramdisk-cpufilih/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/ramdisk/ramdisk.cpio.gz.uboot
291 09:45:03.529722 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 09:45:03.530311 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 09:45:03.530881 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 09:45:03.531337 No LXC device requested
295 09:45:03.531868 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 09:45:03.532464 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 09:45:03.533005 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 09:45:03.533454 Checking files for TFTP limit of 4294967296 bytes.
299 09:45:03.536356 end: 1 tftp-deploy (duration 00:01:18) [common]
300 09:45:03.536976 start: 2 uboot-action (timeout 00:05:00) [common]
301 09:45:03.537547 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 09:45:03.538087 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 09:45:03.538635 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 09:45:03.539211 Using kernel file from prepare-kernel: 939343/tftp-deploy-mwi1h504/kernel/uImage
305 09:45:03.539897 substitutions:
306 09:45:03.540381 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 09:45:03.540826 - {DTB_ADDR}: 0x01070000
308 09:45:03.541264 - {DTB}: 939343/tftp-deploy-mwi1h504/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 09:45:03.541704 - {INITRD}: 939343/tftp-deploy-mwi1h504/ramdisk/ramdisk.cpio.gz.uboot
310 09:45:03.542138 - {KERNEL_ADDR}: 0x01080000
311 09:45:03.542568 - {KERNEL}: 939343/tftp-deploy-mwi1h504/kernel/uImage
312 09:45:03.542997 - {LAVA_MAC}: None
313 09:45:03.543465 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/939343/extract-nfsrootfs-ho2neami
314 09:45:03.543898 - {NFS_SERVER_IP}: 192.168.6.2
315 09:45:03.544360 - {PRESEED_CONFIG}: None
316 09:45:03.544790 - {PRESEED_LOCAL}: None
317 09:45:03.545213 - {RAMDISK_ADDR}: 0x08000000
318 09:45:03.545634 - {RAMDISK}: 939343/tftp-deploy-mwi1h504/ramdisk/ramdisk.cpio.gz.uboot
319 09:45:03.546060 - {ROOT_PART}: None
320 09:45:03.546485 - {ROOT}: None
321 09:45:03.546908 - {SERVER_IP}: 192.168.6.2
322 09:45:03.547332 - {TEE_ADDR}: 0x83000000
323 09:45:03.547753 - {TEE}: None
324 09:45:03.548240 Parsed boot commands:
325 09:45:03.548658 - setenv autoload no
326 09:45:03.549079 - setenv initrd_high 0xffffffff
327 09:45:03.549500 - setenv fdt_high 0xffffffff
328 09:45:03.549918 - dhcp
329 09:45:03.550335 - setenv serverip 192.168.6.2
330 09:45:03.550758 - tftpboot 0x01080000 939343/tftp-deploy-mwi1h504/kernel/uImage
331 09:45:03.551181 - tftpboot 0x08000000 939343/tftp-deploy-mwi1h504/ramdisk/ramdisk.cpio.gz.uboot
332 09:45:03.551607 - tftpboot 0x01070000 939343/tftp-deploy-mwi1h504/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 09:45:03.552054 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/939343/extract-nfsrootfs-ho2neami,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 09:45:03.552498 - bootm 0x01080000 0x08000000 0x01070000
335 09:45:03.553034 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 09:45:03.554639 start: 2.3 connect-device (timeout 00:05:00) [common]
338 09:45:03.555093 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 09:45:03.570619 Setting prompt string to ['lava-test: # ']
340 09:45:03.572842 end: 2.3 connect-device (duration 00:00:00) [common]
341 09:45:03.573601 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 09:45:03.574254 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 09:45:03.574857 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 09:45:03.576167 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 09:45:03.613445 >> OK - accepted request
346 09:45:03.615320 Returned 0 in 0 seconds
347 09:45:03.716541 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 09:45:03.718343 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 09:45:03.718957 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 09:45:03.719510 Setting prompt string to ['Hit any key to stop autoboot']
352 09:45:03.720061 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 09:45:03.722105 Trying 192.168.56.21...
354 09:45:03.722664 Connected to conserv1.
355 09:45:03.723112 Escape character is '^]'.
356 09:45:03.723566
357 09:45:03.724049 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 09:45:03.724524
359 09:45:10.981642 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 09:45:10.982311 bl2_stage_init 0x01
361 09:45:10.982788 bl2_stage_init 0x81
362 09:45:10.987239 hw id: 0x0000 - pwm id 0x01
363 09:45:10.987808 bl2_stage_init 0xc1
364 09:45:10.993007 bl2_stage_init 0x02
365 09:45:10.993572
366 09:45:10.994091 L0:00000000
367 09:45:10.994587 L1:00000703
368 09:45:10.995075 L2:00008067
369 09:45:10.995560 L3:15000000
370 09:45:10.998319 S1:00000000
371 09:45:10.998913 B2:20282000
372 09:45:10.999412 B1:a0f83180
373 09:45:10.999885
374 09:45:11.000404 TE: 70479
375 09:45:11.000877
376 09:45:11.003929 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 09:45:11.004506
378 09:45:11.009503 Board ID = 1
379 09:45:11.010024 Set cpu clk to 24M
380 09:45:11.010462 Set clk81 to 24M
381 09:45:11.014975 Use GP1_pll as DSU clk.
382 09:45:11.015462 DSU clk: 1200 Mhz
383 09:45:11.015901 CPU clk: 1200 MHz
384 09:45:11.020659 Set clk81 to 166.6M
385 09:45:11.026186 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 09:45:11.026683 board id: 1
387 09:45:11.033430 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 09:45:11.044450 fw parse done
389 09:45:11.050396 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 09:45:11.093462 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 09:45:11.104707 PIEI prepare done
392 09:45:11.105234 fastboot data load
393 09:45:11.105677 fastboot data verify
394 09:45:11.110244 verify result: 266
395 09:45:11.115916 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 09:45:11.116463 LPDDR4 probe
397 09:45:11.116895 ddr clk to 1584MHz
398 09:45:11.123812 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 09:45:11.161682
400 09:45:11.162241 dmc_version 0001
401 09:45:11.168624 Check phy result
402 09:45:11.174589 INFO : End of CA training
403 09:45:11.175086 INFO : End of initialization
404 09:45:11.180268 INFO : Training has run successfully!
405 09:45:11.180781 Check phy result
406 09:45:11.185815 INFO : End of initialization
407 09:45:11.186317 INFO : End of read enable training
408 09:45:11.191348 INFO : End of fine write leveling
409 09:45:11.196932 INFO : End of Write leveling coarse delay
410 09:45:11.197433 INFO : Training has run successfully!
411 09:45:11.197838 Check phy result
412 09:45:11.202587 INFO : End of initialization
413 09:45:11.203090 INFO : End of read dq deskew training
414 09:45:11.208142 INFO : End of MPR read delay center optimization
415 09:45:11.213679 INFO : End of write delay center optimization
416 09:45:11.219275 INFO : End of read delay center optimization
417 09:45:11.219771 INFO : End of max read latency training
418 09:45:11.224879 INFO : Training has run successfully!
419 09:45:11.225378 1D training succeed
420 09:45:11.234102 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 09:45:11.282428 Check phy result
422 09:45:11.282980 INFO : End of initialization
423 09:45:11.309798 INFO : End of 2D read delay Voltage center optimization
424 09:45:11.333929 INFO : End of 2D read delay Voltage center optimization
425 09:45:11.390581 INFO : End of 2D write delay Voltage center optimization
426 09:45:11.444640 INFO : End of 2D write delay Voltage center optimization
427 09:45:11.450130 INFO : Training has run successfully!
428 09:45:11.450617
429 09:45:11.451025 channel==0
430 09:45:11.455826 RxClkDly_Margin_A0==78 ps 8
431 09:45:11.456371 TxDqDly_Margin_A0==98 ps 10
432 09:45:11.461329 RxClkDly_Margin_A1==88 ps 9
433 09:45:11.461801 TxDqDly_Margin_A1==88 ps 9
434 09:45:11.462199 TrainedVREFDQ_A0==74
435 09:45:11.466836 TrainedVREFDQ_A1==75
436 09:45:11.467354 VrefDac_Margin_A0==24
437 09:45:11.467756 DeviceVref_Margin_A0==40
438 09:45:11.472445 VrefDac_Margin_A1==23
439 09:45:11.472923 DeviceVref_Margin_A1==39
440 09:45:11.473322
441 09:45:11.473717
442 09:45:11.474113 channel==1
443 09:45:11.478034 RxClkDly_Margin_A0==88 ps 9
444 09:45:11.478525 TxDqDly_Margin_A0==88 ps 9
445 09:45:11.483828 RxClkDly_Margin_A1==88 ps 9
446 09:45:11.484359 TxDqDly_Margin_A1==88 ps 9
447 09:45:11.489266 TrainedVREFDQ_A0==77
448 09:45:11.489741 TrainedVREFDQ_A1==75
449 09:45:11.490140 VrefDac_Margin_A0==22
450 09:45:11.494912 DeviceVref_Margin_A0==37
451 09:45:11.495395 VrefDac_Margin_A1==22
452 09:45:11.495794 DeviceVref_Margin_A1==39
453 09:45:11.500537
454 09:45:11.501041 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 09:45:11.501446
456 09:45:11.534037 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
457 09:45:11.534669 2D training succeed
458 09:45:11.539731 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 09:45:11.545165 auto size-- 65535DDR cs0 size: 2048MB
460 09:45:11.545666 DDR cs1 size: 2048MB
461 09:45:11.550758 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 09:45:11.551228 cs0 DataBus test pass
463 09:45:11.556359 cs1 DataBus test pass
464 09:45:11.556844 cs0 AddrBus test pass
465 09:45:11.557243 cs1 AddrBus test pass
466 09:45:11.557634
467 09:45:11.561951 100bdlr_step_size ps== 471
468 09:45:11.562422 result report
469 09:45:11.567638 boot times 0Enable ddr reg access
470 09:45:11.572801 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 09:45:11.586517 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 09:45:12.245704 bl2z: ptr: 05129330, size: 00001e40
473 09:45:12.255143 0.0;M3 CHK:0;cm4_sp_mode 0
474 09:45:12.255709 MVN_1=0x00000000
475 09:45:12.256163 MVN_2=0x00000000
476 09:45:12.266593 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 09:45:12.267132 OPS=0x04
478 09:45:12.267540 ring efuse init
479 09:45:12.269492 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 09:45:12.275716 [0.017355 Inits done]
481 09:45:12.276231 secure task start!
482 09:45:12.276634 high task start!
483 09:45:12.277028 low task start!
484 09:45:12.280077 run into bl31
485 09:45:12.288751 NOTICE: BL31: v1.3(release):4fc40b1
486 09:45:12.296478 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 09:45:12.297016 NOTICE: BL31: G12A normal boot!
488 09:45:12.312072 NOTICE: BL31: BL33 decompress pass
489 09:45:12.317718 ERROR: Error initializing runtime service opteed_fast
490 09:45:15.032129 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 09:45:15.032951 bl2_stage_init 0x01
492 09:45:15.033537 bl2_stage_init 0x81
493 09:45:15.037634 hw id: 0x0000 - pwm id 0x01
494 09:45:15.038260 bl2_stage_init 0xc1
495 09:45:15.043208 bl2_stage_init 0x02
496 09:45:15.043839
497 09:45:15.044415 L0:00000000
498 09:45:15.044940 L1:00000703
499 09:45:15.045447 L2:00008067
500 09:45:15.045948 L3:15000000
501 09:45:15.048772 S1:00000000
502 09:45:15.049331 B2:20282000
503 09:45:15.049848 B1:a0f83180
504 09:45:15.050355
505 09:45:15.050865 TE: 69975
506 09:45:15.051376
507 09:45:15.054369 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 09:45:15.054924
509 09:45:15.060116 Board ID = 1
510 09:45:15.060670 Set cpu clk to 24M
511 09:45:15.061181 Set clk81 to 24M
512 09:45:15.065563 Use GP1_pll as DSU clk.
513 09:45:15.066113 DSU clk: 1200 Mhz
514 09:45:15.066632 CPU clk: 1200 MHz
515 09:45:15.071194 Set clk81 to 166.6M
516 09:45:15.076776 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 09:45:15.077321 board id: 1
518 09:45:15.083965 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 09:45:15.094680 fw parse done
520 09:45:15.100624 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 09:45:15.143251 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 09:45:15.154242 PIEI prepare done
523 09:45:15.154795 fastboot data load
524 09:45:15.155318 fastboot data verify
525 09:45:15.159772 verify result: 266
526 09:45:15.165381 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 09:45:15.165940 LPDDR4 probe
528 09:45:15.166460 ddr clk to 1584MHz
529 09:45:15.173366 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 09:45:15.210662
531 09:45:15.211270 dmc_version 0001
532 09:45:15.217326 Check phy result
533 09:45:15.223264 INFO : End of CA training
534 09:45:15.223900 INFO : End of initialization
535 09:45:15.228863 INFO : Training has run successfully!
536 09:45:15.229463 Check phy result
537 09:45:15.234458 INFO : End of initialization
538 09:45:15.235045 INFO : End of read enable training
539 09:45:15.240065 INFO : End of fine write leveling
540 09:45:15.245648 INFO : End of Write leveling coarse delay
541 09:45:15.246213 INFO : Training has run successfully!
542 09:45:15.246749 Check phy result
543 09:45:15.251243 INFO : End of initialization
544 09:45:15.251817 INFO : End of read dq deskew training
545 09:45:15.256824 INFO : End of MPR read delay center optimization
546 09:45:15.262398 INFO : End of write delay center optimization
547 09:45:15.268035 INFO : End of read delay center optimization
548 09:45:15.268627 INFO : End of max read latency training
549 09:45:15.273609 INFO : Training has run successfully!
550 09:45:15.274176 1D training succeed
551 09:45:15.282796 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 09:45:15.330421 Check phy result
553 09:45:15.331036 INFO : End of initialization
554 09:45:15.352765 INFO : End of 2D read delay Voltage center optimization
555 09:45:15.371929 INFO : End of 2D read delay Voltage center optimization
556 09:45:15.423941 INFO : End of 2D write delay Voltage center optimization
557 09:45:15.473061 INFO : End of 2D write delay Voltage center optimization
558 09:45:15.478611 INFO : Training has run successfully!
559 09:45:15.479191
560 09:45:15.479747 channel==0
561 09:45:15.484207 RxClkDly_Margin_A0==69 ps 7
562 09:45:15.484778 TxDqDly_Margin_A0==98 ps 10
563 09:45:15.489772 RxClkDly_Margin_A1==88 ps 9
564 09:45:15.490336 TxDqDly_Margin_A1==88 ps 9
565 09:45:15.490863 TrainedVREFDQ_A0==74
566 09:45:15.495369 TrainedVREFDQ_A1==74
567 09:45:15.495940 VrefDac_Margin_A0==24
568 09:45:15.496526 DeviceVref_Margin_A0==40
569 09:45:15.501028 VrefDac_Margin_A1==23
570 09:45:15.501597 DeviceVref_Margin_A1==40
571 09:45:15.502131
572 09:45:15.502666
573 09:45:15.503183 channel==1
574 09:45:15.506580 RxClkDly_Margin_A0==78 ps 8
575 09:45:15.507140 TxDqDly_Margin_A0==98 ps 10
576 09:45:15.512216 RxClkDly_Margin_A1==78 ps 8
577 09:45:15.512771 TxDqDly_Margin_A1==88 ps 9
578 09:45:15.517785 TrainedVREFDQ_A0==78
579 09:45:15.518364 TrainedVREFDQ_A1==75
580 09:45:15.518889 VrefDac_Margin_A0==23
581 09:45:15.523390 DeviceVref_Margin_A0==36
582 09:45:15.523947 VrefDac_Margin_A1==22
583 09:45:15.528993 DeviceVref_Margin_A1==39
584 09:45:15.529540
585 09:45:15.530066 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 09:45:15.530593
587 09:45:15.562565 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
588 09:45:15.563194 2D training succeed
589 09:45:15.568208 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 09:45:15.573773 auto size-- 65535DDR cs0 size: 2048MB
591 09:45:15.574344 DDR cs1 size: 2048MB
592 09:45:15.579400 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 09:45:15.579961 cs0 DataBus test pass
594 09:45:15.584993 cs1 DataBus test pass
595 09:45:15.585582 cs0 AddrBus test pass
596 09:45:15.586111 cs1 AddrBus test pass
597 09:45:15.586627
598 09:45:15.590574 100bdlr_step_size ps== 478
599 09:45:15.591140 result report
600 09:45:15.596227 boot times 0Enable ddr reg access
601 09:45:15.601366 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 09:45:15.615212 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 09:45:16.270285 bl2z: ptr: 05129330, size: 00001e40
604 09:45:16.277886 0.0;M3 CHK:0;cm4_sp_mode 0
605 09:45:16.278339 MVN_1=0x00000000
606 09:45:16.278578 MVN_2=0x00000000
607 09:45:16.289367 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 09:45:16.289675 OPS=0x04
609 09:45:16.289887 ring efuse init
610 09:45:16.294964 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 09:45:16.295265 [0.017319 Inits done]
612 09:45:16.295477 secure task start!
613 09:45:16.302991 high task start!
614 09:45:16.303391 low task start!
615 09:45:16.303700 run into bl31
616 09:45:16.311623 NOTICE: BL31: v1.3(release):4fc40b1
617 09:45:16.319396 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 09:45:16.319801 NOTICE: BL31: G12A normal boot!
619 09:45:16.334952 NOTICE: BL31: BL33 decompress pass
620 09:45:16.340635 ERROR: Error initializing runtime service opteed_fast
621 09:45:17.728649 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 09:45:17.729236 bl2_stage_init 0x01
623 09:45:17.729662 bl2_stage_init 0x81
624 09:45:17.734177 hw id: 0x0000 - pwm id 0x01
625 09:45:17.734651 bl2_stage_init 0xc1
626 09:45:17.739772 bl2_stage_init 0x02
627 09:45:17.740284
628 09:45:17.740702 L0:00000000
629 09:45:17.741132 L1:00000703
630 09:45:17.741549 L2:00008067
631 09:45:17.741951 L3:15000000
632 09:45:17.742693 S1:00000000
633 09:45:17.746448 B2:20282000
634 09:45:17.746947 B1:a0f83180
635 09:45:17.747373
636 09:45:17.747787 TE: 67238
637 09:45:17.748234
638 09:45:17.752108 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 09:45:17.752587
640 09:45:17.753003 Board ID = 1
641 09:45:17.757767 Set cpu clk to 24M
642 09:45:17.758242 Set clk81 to 24M
643 09:45:17.758657 Use GP1_pll as DSU clk.
644 09:45:17.763318 DSU clk: 1200 Mhz
645 09:45:17.763781 CPU clk: 1200 MHz
646 09:45:17.764226 Set clk81 to 166.6M
647 09:45:17.774449 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 09:45:17.774934 board id: 1
649 09:45:17.780595 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 09:45:17.791171 fw parse done
651 09:45:17.797143 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 09:45:17.839776 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 09:45:17.850711 PIEI prepare done
654 09:45:17.851177 fastboot data load
655 09:45:17.851594 fastboot data verify
656 09:45:17.856281 verify result: 266
657 09:45:17.861900 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 09:45:17.862367 LPDDR4 probe
659 09:45:17.862778 ddr clk to 1584MHz
660 09:45:17.869926 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 09:45:17.907196
662 09:45:17.907779 dmc_version 0001
663 09:45:17.913933 Check phy result
664 09:45:17.919816 INFO : End of CA training
665 09:45:17.920408 INFO : End of initialization
666 09:45:17.925393 INFO : Training has run successfully!
667 09:45:17.925885 Check phy result
668 09:45:17.930938 INFO : End of initialization
669 09:45:17.931471 INFO : End of read enable training
670 09:45:17.936552 INFO : End of fine write leveling
671 09:45:17.942196 INFO : End of Write leveling coarse delay
672 09:45:17.942698 INFO : Training has run successfully!
673 09:45:17.943115 Check phy result
674 09:45:17.947865 INFO : End of initialization
675 09:45:17.948433 INFO : End of read dq deskew training
676 09:45:17.953374 INFO : End of MPR read delay center optimization
677 09:45:17.958966 INFO : End of write delay center optimization
678 09:45:17.964554 INFO : End of read delay center optimization
679 09:45:17.965057 INFO : End of max read latency training
680 09:45:17.970277 INFO : Training has run successfully!
681 09:45:17.970807 1D training succeed
682 09:45:17.979275 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 09:45:18.026932 Check phy result
684 09:45:18.027477 INFO : End of initialization
685 09:45:18.049257 INFO : End of 2D read delay Voltage center optimization
686 09:45:18.068401 INFO : End of 2D read delay Voltage center optimization
687 09:45:18.120292 INFO : End of 2D write delay Voltage center optimization
688 09:45:18.169505 INFO : End of 2D write delay Voltage center optimization
689 09:45:18.174962 INFO : Training has run successfully!
690 09:45:18.175449
691 09:45:18.175863 channel==0
692 09:45:18.180748 RxClkDly_Margin_A0==78 ps 8
693 09:45:18.181214 TxDqDly_Margin_A0==98 ps 10
694 09:45:18.183926 RxClkDly_Margin_A1==69 ps 7
695 09:45:18.184407 TxDqDly_Margin_A1==98 ps 10
696 09:45:18.189597 TrainedVREFDQ_A0==77
697 09:45:18.190062 TrainedVREFDQ_A1==75
698 09:45:18.190477 VrefDac_Margin_A0==22
699 09:45:18.195169 DeviceVref_Margin_A0==37
700 09:45:18.195629 VrefDac_Margin_A1==23
701 09:45:18.200773 DeviceVref_Margin_A1==39
702 09:45:18.201242
703 09:45:18.201657
704 09:45:18.202062 channel==1
705 09:45:18.202461 RxClkDly_Margin_A0==78 ps 8
706 09:45:18.204197 TxDqDly_Margin_A0==98 ps 10
707 09:45:18.209634 RxClkDly_Margin_A1==78 ps 8
708 09:45:18.210110 TxDqDly_Margin_A1==88 ps 9
709 09:45:18.210522 TrainedVREFDQ_A0==78
710 09:45:18.215220 TrainedVREFDQ_A1==77
711 09:45:18.215689 VrefDac_Margin_A0==22
712 09:45:18.220899 DeviceVref_Margin_A0==36
713 09:45:18.221359 VrefDac_Margin_A1==22
714 09:45:18.221766 DeviceVref_Margin_A1==37
715 09:45:18.222164
716 09:45:18.226408 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 09:45:18.226871
718 09:45:18.259950 soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 09:45:18.260529 2D training succeed
720 09:45:18.265629 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 09:45:18.271203 auto size-- 65535DDR cs0 size: 2048MB
722 09:45:18.271673 DDR cs1 size: 2048MB
723 09:45:18.276818 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 09:45:18.277298 cs0 DataBus test pass
725 09:45:18.277708 cs1 DataBus test pass
726 09:45:18.282415 cs0 AddrBus test pass
727 09:45:18.282926 cs1 AddrBus test pass
728 09:45:18.283335
729 09:45:18.288061 100bdlr_step_size ps== 478
730 09:45:18.288542 result report
731 09:45:18.288953 boot times 0Enable ddr reg access
732 09:45:18.297776 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 09:45:18.311646 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 09:45:18.966845 bl2z: ptr: 05129330, size: 00001e40
735 09:45:18.975066 0.0;M3 CHK:0;cm4_sp_mode 0
736 09:45:18.975571 MVN_1=0x00000000
737 09:45:18.976030 MVN_2=0x00000000
738 09:45:18.986542 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 09:45:18.987027 OPS=0x04
740 09:45:18.987442 ring efuse init
741 09:45:18.992173 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 09:45:18.992662 [0.017310 Inits done]
743 09:45:18.993070 secure task start!
744 09:45:18.999467 high task start!
745 09:45:18.999955 low task start!
746 09:45:19.000398 run into bl31
747 09:45:19.008178 NOTICE: BL31: v1.3(release):4fc40b1
748 09:45:19.015887 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 09:45:19.016398 NOTICE: BL31: G12A normal boot!
750 09:45:19.031362 NOTICE: BL31: BL33 decompress pass
751 09:45:19.037074 ERROR: Error initializing runtime service opteed_fast
752 09:45:19.831258
753 09:45:19.831684
754 09:45:19.836915 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 09:45:19.837775
756 09:45:19.840055 Model: Libre Computer AML-S905D3-CC Solitude
757 09:45:19.986947 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 09:45:20.002295 DRAM: 2 GiB (effective 3.8 GiB)
759 09:45:20.103357 Core: 406 devices, 33 uclasses, devicetree: separate
760 09:45:20.109196 WDT: Not starting watchdog@f0d0
761 09:45:20.134292 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 09:45:20.146567 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 09:45:20.151399 ** Bad device specification mmc 0 **
764 09:45:20.161425 Card did not respond to voltage select! : -110
765 09:45:20.170050 ** Bad device specification mmc 0 **
766 09:45:20.170707 Couldn't find partition mmc 0
767 09:45:20.177367 Card did not respond to voltage select! : -110
768 09:45:20.182853 ** Bad device specification mmc 0 **
769 09:45:20.183383 Couldn't find partition mmc 0
770 09:45:20.187959 Error: could not access storage.
771 09:45:20.484734 Net: eth0: ethernet@ff3f0000
772 09:45:20.485386 starting USB...
773 09:45:20.728994 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 09:45:20.729668 Starting the controller
775 09:45:20.735959 USB XHCI 1.10
776 09:45:22.290080 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 09:45:22.298319 scanning usb for storage devices... 0 Storage Device(s) found
779 09:45:22.349963 Hit any key to stop autoboot: 1
780 09:45:22.350837 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 09:45:22.351557 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 09:45:22.352185 Setting prompt string to ['=>']
783 09:45:22.352714 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 09:45:22.364325 0
785 09:45:22.365342 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 09:45:22.466668 => setenv autoload no
788 09:45:22.467474 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 09:45:22.472955 setenv autoload no
791 09:45:22.574555 => setenv initrd_high 0xffffffff
792 09:45:22.575344 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 09:45:22.579890 setenv initrd_high 0xffffffff
795 09:45:22.681476 => setenv fdt_high 0xffffffff
796 09:45:22.682261 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 09:45:22.686822 setenv fdt_high 0xffffffff
799 09:45:22.788454 => dhcp
800 09:45:22.789270 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 09:45:22.793661 dhcp
802 09:45:23.699486 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
803 09:45:23.700214 Speed: 1000, full duplex
804 09:45:23.700683 BOOTP broadcast 1
805 09:45:23.721584 DHCP client bound to address 192.168.6.21 (22 ms)
807 09:45:23.823246 => setenv serverip 192.168.6.2
808 09:45:23.824068 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
809 09:45:23.828597 setenv serverip 192.168.6.2
811 09:45:23.930220 => tftpboot 0x01080000 939343/tftp-deploy-mwi1h504/kernel/uImage
812 09:45:23.931051 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
813 09:45:23.937778 tftpboot 0x01080000 939343/tftp-deploy-mwi1h504/kernel/uImage
814 09:45:23.938316 Speed: 1000, full duplex
815 09:45:23.938768 Using ethernet@ff3f0000 device
816 09:45:23.943244 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
817 09:45:23.948827 Filename '939343/tftp-deploy-mwi1h504/kernel/uImage'.
818 09:45:23.952908 Load address: 0x1080000
819 09:45:27.031086 Loading: *################################################## 43.6 MiB
820 09:45:27.031518 14.1 MiB/s
821 09:45:27.031742 done
822 09:45:27.035476 Bytes transferred = 45713984 (2b98a40 hex)
824 09:45:27.136592 => tftpboot 0x08000000 939343/tftp-deploy-mwi1h504/ramdisk/ramdisk.cpio.gz.uboot
825 09:45:27.137113 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 09:45:27.144071 tftpboot 0x08000000 939343/tftp-deploy-mwi1h504/ramdisk/ramdisk.cpio.gz.uboot
827 09:45:27.144411 Speed: 1000, full duplex
828 09:45:27.144618 Using ethernet@ff3f0000 device
829 09:45:27.149507 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
830 09:45:27.159309 Filename '939343/tftp-deploy-mwi1h504/ramdisk/ramdisk.cpio.gz.uboot'.
831 09:45:27.159660 Load address: 0x8000000
832 09:45:28.604275 Loading: *################################################# UDP wrong checksum 00000005 0000e03d
833 09:45:31.729210 UDP wrong checksum 000000ff 000045dd
834 09:45:31.770360 UDP wrong checksum 000000ff 0000e0cf
835 09:45:33.606257 T UDP wrong checksum 00000005 0000e03d
836 09:45:43.608365 T T UDP wrong checksum 00000005 0000e03d
837 09:45:45.135771 UDP wrong checksum 000000ff 0000219e
838 09:45:45.170400 UDP wrong checksum 000000ff 0000bb90
839 09:46:03.612385 T T T T UDP wrong checksum 00000005 0000e03d
840 09:46:23.616231 T T T
841 09:46:23.616616 Retry count exceeded; starting again
843 09:46:23.617529 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
846 09:46:23.618543 end: 2.4 uboot-commands (duration 00:01:20) [common]
848 09:46:23.619307 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
850 09:46:23.619853 end: 2 uboot-action (duration 00:01:20) [common]
852 09:46:23.620798 Cleaning after the job
853 09:46:23.621135 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/ramdisk
854 09:46:23.621812 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/kernel
855 09:46:23.625703 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/dtb
856 09:46:23.626364 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/nfsrootfs
857 09:46:23.666277 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939343/tftp-deploy-mwi1h504/modules
858 09:46:23.670211 start: 4.1 power-off (timeout 00:00:30) [common]
859 09:46:23.670852 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
860 09:46:23.704232 >> OK - accepted request
861 09:46:23.705973 Returned 0 in 0 seconds
862 09:46:23.806789 end: 4.1 power-off (duration 00:00:00) [common]
864 09:46:23.807811 start: 4.2 read-feedback (timeout 00:10:00) [common]
865 09:46:23.808564 Listened to connection for namespace 'common' for up to 1s
866 09:46:24.809458 Finalising connection for namespace 'common'
867 09:46:24.809944 Disconnecting from shell: Finalise
868 09:46:24.810241 =>
869 09:46:24.910959 end: 4.2 read-feedback (duration 00:00:01) [common]
870 09:46:24.911619 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/939343
871 09:46:27.769138 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/939343
872 09:46:27.769753 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.