Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:43:43.971768 lava-dispatcher, installed at version: 2024.01
2 03:43:43.972614 start: 0 validate
3 03:43:43.973104 Start time: 2024-11-08 03:43:43.973074+00:00 (UTC)
4 03:43:43.973678 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:43:43.974209 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:43:44.015453 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:43:44.016050 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-574-g603e41d0858f1%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:43:44.047325 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:43:44.047938 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-574-g603e41d0858f1%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 03:43:44.077525 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:43:44.078285 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:43:44.108476 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:43:44.108960 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-574-g603e41d0858f1%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:43:44.148110 validate duration: 0.18
16 03:43:44.148944 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:43:44.149286 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:43:44.149595 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:43:44.150207 Not decompressing ramdisk as can be used compressed.
20 03:43:44.150673 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 03:43:44.150954 saving as /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/ramdisk/initrd.cpio.gz
22 03:43:44.151246 total size: 5628182 (5 MB)
23 03:43:44.186114 progress 0 % (0 MB)
24 03:43:44.191236 progress 5 % (0 MB)
25 03:43:44.196431 progress 10 % (0 MB)
26 03:43:44.201173 progress 15 % (0 MB)
27 03:43:44.206073 progress 20 % (1 MB)
28 03:43:44.210868 progress 25 % (1 MB)
29 03:43:44.216137 progress 30 % (1 MB)
30 03:43:44.221306 progress 35 % (1 MB)
31 03:43:44.225986 progress 40 % (2 MB)
32 03:43:44.231511 progress 45 % (2 MB)
33 03:43:44.236415 progress 50 % (2 MB)
34 03:43:44.241613 progress 55 % (2 MB)
35 03:43:44.246812 progress 60 % (3 MB)
36 03:43:44.251508 progress 65 % (3 MB)
37 03:43:44.256690 progress 70 % (3 MB)
38 03:43:44.261602 progress 75 % (4 MB)
39 03:43:44.266922 progress 80 % (4 MB)
40 03:43:44.271531 progress 85 % (4 MB)
41 03:43:44.276761 progress 90 % (4 MB)
42 03:43:44.281740 progress 95 % (5 MB)
43 03:43:44.285687 progress 100 % (5 MB)
44 03:43:44.286462 5 MB downloaded in 0.14 s (39.70 MB/s)
45 03:43:44.287129 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:43:44.288243 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:43:44.288606 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:43:44.288939 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:43:44.289517 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/kernel/Image
51 03:43:44.289812 saving as /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/kernel/Image
52 03:43:44.290068 total size: 45713920 (43 MB)
53 03:43:44.290327 No compression specified
54 03:43:44.324638 progress 0 % (0 MB)
55 03:43:44.356548 progress 5 % (2 MB)
56 03:43:44.391306 progress 10 % (4 MB)
57 03:43:44.420616 progress 15 % (6 MB)
58 03:43:44.449151 progress 20 % (8 MB)
59 03:43:44.477604 progress 25 % (10 MB)
60 03:43:44.506056 progress 30 % (13 MB)
61 03:43:44.534141 progress 35 % (15 MB)
62 03:43:44.562590 progress 40 % (17 MB)
63 03:43:44.590626 progress 45 % (19 MB)
64 03:43:44.619590 progress 50 % (21 MB)
65 03:43:44.647788 progress 55 % (24 MB)
66 03:43:44.676814 progress 60 % (26 MB)
67 03:43:44.705538 progress 65 % (28 MB)
68 03:43:44.733302 progress 70 % (30 MB)
69 03:43:44.761304 progress 75 % (32 MB)
70 03:43:44.789213 progress 80 % (34 MB)
71 03:43:44.817287 progress 85 % (37 MB)
72 03:43:44.845419 progress 90 % (39 MB)
73 03:43:44.873309 progress 95 % (41 MB)
74 03:43:44.900904 progress 100 % (43 MB)
75 03:43:44.901456 43 MB downloaded in 0.61 s (71.31 MB/s)
76 03:43:44.901932 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:43:44.902745 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:43:44.903019 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:43:44.903285 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:43:44.903759 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 03:43:44.904051 saving as /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 03:43:44.904265 total size: 53209 (0 MB)
84 03:43:44.904473 No compression specified
85 03:43:44.946582 progress 61 % (0 MB)
86 03:43:44.947417 progress 100 % (0 MB)
87 03:43:44.947966 0 MB downloaded in 0.04 s (1.16 MB/s)
88 03:43:44.948518 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:43:44.949389 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:43:44.949675 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:43:44.949962 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:43:44.950443 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 03:43:44.950704 saving as /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/nfsrootfs/full.rootfs.tar
95 03:43:44.950932 total size: 107552908 (102 MB)
96 03:43:44.951178 Using unxz to decompress xz
97 03:43:44.991105 progress 0 % (0 MB)
98 03:43:45.650458 progress 5 % (5 MB)
99 03:43:46.377257 progress 10 % (10 MB)
100 03:43:47.109932 progress 15 % (15 MB)
101 03:43:47.872035 progress 20 % (20 MB)
102 03:43:48.445422 progress 25 % (25 MB)
103 03:43:49.071523 progress 30 % (30 MB)
104 03:43:49.809399 progress 35 % (35 MB)
105 03:43:50.166599 progress 40 % (41 MB)
106 03:43:50.635180 progress 45 % (46 MB)
107 03:43:51.367130 progress 50 % (51 MB)
108 03:43:52.061522 progress 55 % (56 MB)
109 03:43:52.833070 progress 60 % (61 MB)
110 03:43:53.594158 progress 65 % (66 MB)
111 03:43:54.335186 progress 70 % (71 MB)
112 03:43:55.131853 progress 75 % (76 MB)
113 03:43:55.960583 progress 80 % (82 MB)
114 03:43:56.771932 progress 85 % (87 MB)
115 03:43:57.538963 progress 90 % (92 MB)
116 03:43:58.391432 progress 95 % (97 MB)
117 03:43:59.277632 progress 100 % (102 MB)
118 03:43:59.292765 102 MB downloaded in 14.34 s (7.15 MB/s)
119 03:43:59.293739 end: 1.4.1 http-download (duration 00:00:14) [common]
121 03:43:59.295574 end: 1.4 download-retry (duration 00:00:14) [common]
122 03:43:59.296224 start: 1.5 download-retry (timeout 00:09:45) [common]
123 03:43:59.296819 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 03:43:59.297801 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/modules.tar.xz
125 03:43:59.298326 saving as /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/modules/modules.tar
126 03:43:59.298788 total size: 11610020 (11 MB)
127 03:43:59.299259 Using unxz to decompress xz
128 03:43:59.347903 progress 0 % (0 MB)
129 03:43:59.416969 progress 5 % (0 MB)
130 03:43:59.493564 progress 10 % (1 MB)
131 03:43:59.594657 progress 15 % (1 MB)
132 03:43:59.693799 progress 20 % (2 MB)
133 03:43:59.773761 progress 25 % (2 MB)
134 03:43:59.849894 progress 30 % (3 MB)
135 03:43:59.929241 progress 35 % (3 MB)
136 03:44:00.002899 progress 40 % (4 MB)
137 03:44:00.079692 progress 45 % (5 MB)
138 03:44:00.164944 progress 50 % (5 MB)
139 03:44:00.243089 progress 55 % (6 MB)
140 03:44:00.329742 progress 60 % (6 MB)
141 03:44:00.411441 progress 65 % (7 MB)
142 03:44:00.493102 progress 70 % (7 MB)
143 03:44:00.571707 progress 75 % (8 MB)
144 03:44:00.656280 progress 80 % (8 MB)
145 03:44:00.737121 progress 85 % (9 MB)
146 03:44:00.816250 progress 90 % (9 MB)
147 03:44:00.894907 progress 95 % (10 MB)
148 03:44:00.972314 progress 100 % (11 MB)
149 03:44:00.984516 11 MB downloaded in 1.69 s (6.57 MB/s)
150 03:44:00.985116 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:44:00.985944 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:44:00.986213 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 03:44:00.986480 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 03:44:11.421894 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/957596/extract-nfsrootfs-kur3uu4e
156 03:44:11.422536 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 03:44:11.422845 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 03:44:11.423543 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2
159 03:44:11.424231 makedir: /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin
160 03:44:11.424720 makedir: /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/tests
161 03:44:11.425077 makedir: /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/results
162 03:44:11.425475 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-add-keys
163 03:44:11.426156 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-add-sources
164 03:44:11.426820 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-background-process-start
165 03:44:11.427453 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-background-process-stop
166 03:44:11.428142 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-common-functions
167 03:44:11.428750 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-echo-ipv4
168 03:44:11.429420 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-install-packages
169 03:44:11.430072 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-installed-packages
170 03:44:11.430688 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-os-build
171 03:44:11.431394 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-probe-channel
172 03:44:11.432038 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-probe-ip
173 03:44:11.432754 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-target-ip
174 03:44:11.433353 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-target-mac
175 03:44:11.433949 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-target-storage
176 03:44:11.434677 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-test-case
177 03:44:11.435463 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-test-event
178 03:44:11.436141 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-test-feedback
179 03:44:11.436868 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-test-raise
180 03:44:11.437551 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-test-reference
181 03:44:11.438215 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-test-runner
182 03:44:11.438910 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-test-set
183 03:44:11.439644 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-test-shell
184 03:44:11.440411 Updating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-install-packages (oe)
185 03:44:11.441032 Updating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/bin/lava-installed-packages (oe)
186 03:44:11.441564 Creating /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/environment
187 03:44:11.441993 LAVA metadata
188 03:44:11.442323 - LAVA_JOB_ID=957596
189 03:44:11.442585 - LAVA_DISPATCHER_IP=192.168.6.2
190 03:44:11.442996 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 03:44:11.444136 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 03:44:11.444600 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 03:44:11.444844 skipped lava-vland-overlay
194 03:44:11.445099 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 03:44:11.445373 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 03:44:11.445622 skipped lava-multinode-overlay
197 03:44:11.445874 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 03:44:11.446134 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 03:44:11.446423 Loading test definitions
200 03:44:11.446769 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 03:44:11.447077 Using /lava-957596 at stage 0
202 03:44:11.448557 uuid=957596_1.6.2.4.1 testdef=None
203 03:44:11.448984 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 03:44:11.449293 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 03:44:11.451526 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 03:44:11.452584 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 03:44:11.455462 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 03:44:11.456452 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 03:44:11.459609 runner path: /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/0/tests/0_dmesg test_uuid 957596_1.6.2.4.1
212 03:44:11.460911 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 03:44:11.461838 Creating lava-test-runner.conf files
215 03:44:11.462057 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/957596/lava-overlay-vb0_l9w2/lava-957596/0 for stage 0
216 03:44:11.462475 - 0_dmesg
217 03:44:11.462883 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 03:44:11.463194 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 03:44:11.489736 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 03:44:11.490168 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 03:44:11.490434 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 03:44:11.490704 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 03:44:11.490971 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 03:44:12.179336 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 03:44:12.179816 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 03:44:12.180115 extracting modules file /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957596/extract-nfsrootfs-kur3uu4e
227 03:44:13.770524 extracting modules file /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957596/extract-overlay-ramdisk-35y0v74z/ramdisk
228 03:44:15.180693 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 03:44:15.181158 start: 1.6.5 apply-overlay-tftp (timeout 00:09:29) [common]
230 03:44:15.181513 [common] Applying overlay to NFS
231 03:44:15.181733 [common] Applying overlay /var/lib/lava/dispatcher/tmp/957596/compress-overlay-ghkzymvg/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/957596/extract-nfsrootfs-kur3uu4e
232 03:44:15.211944 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 03:44:15.212388 start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
234 03:44:15.212684 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
235 03:44:15.212925 Converting downloaded kernel to a uImage
236 03:44:15.213225 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/kernel/Image /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/kernel/uImage
237 03:44:15.669859 output: Image Name:
238 03:44:15.670288 output: Created: Fri Nov 8 03:44:15 2024
239 03:44:15.670499 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 03:44:15.670703 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 03:44:15.670906 output: Load Address: 01080000
242 03:44:15.671109 output: Entry Point: 01080000
243 03:44:15.671309 output:
244 03:44:15.671646 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 03:44:15.671913 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 03:44:15.672231 start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
247 03:44:15.672488 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 03:44:15.672745 start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
249 03:44:15.673001 Building ramdisk /var/lib/lava/dispatcher/tmp/957596/extract-overlay-ramdisk-35y0v74z/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/957596/extract-overlay-ramdisk-35y0v74z/ramdisk
250 03:44:17.833499 >> 166825 blocks
251 03:44:27.046991 Adding RAMdisk u-boot header.
252 03:44:27.047443 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/957596/extract-overlay-ramdisk-35y0v74z/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/957596/extract-overlay-ramdisk-35y0v74z/ramdisk.cpio.gz.uboot
253 03:44:27.295381 output: Image Name:
254 03:44:27.295864 output: Created: Fri Nov 8 03:44:27 2024
255 03:44:27.296432 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 03:44:27.296930 output: Data Size: 23433019 Bytes = 22883.81 KiB = 22.35 MiB
257 03:44:27.297454 output: Load Address: 00000000
258 03:44:27.297878 output: Entry Point: 00000000
259 03:44:27.298359 output:
260 03:44:27.299453 rename /var/lib/lava/dispatcher/tmp/957596/extract-overlay-ramdisk-35y0v74z/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/ramdisk/ramdisk.cpio.gz.uboot
261 03:44:27.300354 end: 1.6.8 compress-ramdisk (duration 00:00:12) [common]
262 03:44:27.301047 end: 1.6 prepare-tftp-overlay (duration 00:00:26) [common]
263 03:44:27.301660 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:17) [common]
264 03:44:27.302397 No LXC device requested
265 03:44:27.303179 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 03:44:27.303785 start: 1.8 deploy-device-env (timeout 00:09:17) [common]
267 03:44:27.304382 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 03:44:27.304829 Checking files for TFTP limit of 4294967296 bytes.
269 03:44:27.308116 end: 1 tftp-deploy (duration 00:00:43) [common]
270 03:44:27.308796 start: 2 uboot-action (timeout 00:05:00) [common]
271 03:44:27.309395 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 03:44:27.309941 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 03:44:27.310475 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 03:44:27.311131 Using kernel file from prepare-kernel: 957596/tftp-deploy-ev87_fzg/kernel/uImage
275 03:44:27.311947 substitutions:
276 03:44:27.312521 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 03:44:27.313057 - {DTB_ADDR}: 0x01070000
278 03:44:27.313581 - {DTB}: 957596/tftp-deploy-ev87_fzg/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 03:44:27.314045 - {INITRD}: 957596/tftp-deploy-ev87_fzg/ramdisk/ramdisk.cpio.gz.uboot
280 03:44:27.314487 - {KERNEL_ADDR}: 0x01080000
281 03:44:27.314909 - {KERNEL}: 957596/tftp-deploy-ev87_fzg/kernel/uImage
282 03:44:27.315317 - {LAVA_MAC}: None
283 03:44:27.315852 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/957596/extract-nfsrootfs-kur3uu4e
284 03:44:27.316399 - {NFS_SERVER_IP}: 192.168.6.2
285 03:44:27.316907 - {PRESEED_CONFIG}: None
286 03:44:27.317319 - {PRESEED_LOCAL}: None
287 03:44:27.317787 - {RAMDISK_ADDR}: 0x08000000
288 03:44:27.318213 - {RAMDISK}: 957596/tftp-deploy-ev87_fzg/ramdisk/ramdisk.cpio.gz.uboot
289 03:44:27.318606 - {ROOT_PART}: None
290 03:44:27.319002 - {ROOT}: None
291 03:44:27.319483 - {SERVER_IP}: 192.168.6.2
292 03:44:27.319888 - {TEE_ADDR}: 0x83000000
293 03:44:27.320493 - {TEE}: None
294 03:44:27.320968 Parsed boot commands:
295 03:44:27.321405 - setenv autoload no
296 03:44:27.321841 - setenv initrd_high 0xffffffff
297 03:44:27.322239 - setenv fdt_high 0xffffffff
298 03:44:27.322629 - dhcp
299 03:44:27.323038 - setenv serverip 192.168.6.2
300 03:44:27.323524 - tftpboot 0x01080000 957596/tftp-deploy-ev87_fzg/kernel/uImage
301 03:44:27.324011 - tftpboot 0x08000000 957596/tftp-deploy-ev87_fzg/ramdisk/ramdisk.cpio.gz.uboot
302 03:44:27.324492 - tftpboot 0x01070000 957596/tftp-deploy-ev87_fzg/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 03:44:27.324921 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/957596/extract-nfsrootfs-kur3uu4e,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 03:44:27.325410 - bootm 0x01080000 0x08000000 0x01070000
305 03:44:27.326013 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 03:44:27.327707 start: 2.3 connect-device (timeout 00:05:00) [common]
308 03:44:27.328191 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 03:44:27.343729 Setting prompt string to ['lava-test: # ']
310 03:44:27.345426 end: 2.3 connect-device (duration 00:00:00) [common]
311 03:44:27.346376 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 03:44:27.347111 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 03:44:27.347801 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 03:44:27.348991 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 03:44:27.386941 >> OK - accepted request
316 03:44:27.389177 Returned 0 in 0 seconds
317 03:44:27.490488 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 03:44:27.492229 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 03:44:27.492803 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 03:44:27.493325 Setting prompt string to ['Hit any key to stop autoboot']
322 03:44:27.493790 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 03:44:27.495375 Trying 192.168.56.21...
324 03:44:27.495866 Connected to conserv1.
325 03:44:27.496321 Escape character is '^]'.
326 03:44:27.496749
327 03:44:27.497167 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 03:44:27.497604
329 03:44:34.861361 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 03:44:34.861814 bl2_stage_init 0x01
331 03:44:34.862054 bl2_stage_init 0x81
332 03:44:34.866959 hw id: 0x0000 - pwm id 0x01
333 03:44:34.867431 bl2_stage_init 0xc1
334 03:44:34.872500 bl2_stage_init 0x02
335 03:44:34.873175
336 03:44:34.873670 L0:00000000
337 03:44:34.874118 L1:00000703
338 03:44:34.874559 L2:00008067
339 03:44:34.875018 L3:15000000
340 03:44:34.877906 S1:00000000
341 03:44:34.878294 B2:20282000
342 03:44:34.878538 B1:a0f83180
343 03:44:34.879053
344 03:44:34.879520 TE: 69568
345 03:44:34.880098
346 03:44:34.883473 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 03:44:34.884712
348 03:44:34.889068 Board ID = 1
349 03:44:34.889632 Set cpu clk to 24M
350 03:44:34.890093 Set clk81 to 24M
351 03:44:34.892673 Use GP1_pll as DSU clk.
352 03:44:34.893031 DSU clk: 1200 Mhz
353 03:44:34.898096 CPU clk: 1200 MHz
354 03:44:34.898430 Set clk81 to 166.6M
355 03:44:34.903692 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 03:44:34.904023 board id: 1
357 03:44:34.913557 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 03:44:34.923865 fw parse done
359 03:44:34.929019 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 03:44:34.972645 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 03:44:34.983354 PIEI prepare done
362 03:44:34.984050 fastboot data load
363 03:44:34.984553 fastboot data verify
364 03:44:34.988891 verify result: 266
365 03:44:34.994492 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 03:44:34.995039 LPDDR4 probe
367 03:44:34.995510 ddr clk to 1584MHz
368 03:44:35.001932 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 03:44:35.039420
370 03:44:35.040155 dmc_version 0001
371 03:44:35.046263 Check phy result
372 03:44:35.052980 INFO : End of CA training
373 03:44:35.053983 INFO : End of initialization
374 03:44:35.057885 INFO : Training has run successfully!
375 03:44:35.058239 Check phy result
376 03:44:35.063540 INFO : End of initialization
377 03:44:35.063894 INFO : End of read enable training
378 03:44:35.069187 INFO : End of fine write leveling
379 03:44:35.074649 INFO : End of Write leveling coarse delay
380 03:44:35.075142 INFO : Training has run successfully!
381 03:44:35.075594 Check phy result
382 03:44:35.080243 INFO : End of initialization
383 03:44:35.080734 INFO : End of read dq deskew training
384 03:44:35.085794 INFO : End of MPR read delay center optimization
385 03:44:35.091588 INFO : End of write delay center optimization
386 03:44:35.097138 INFO : End of read delay center optimization
387 03:44:35.097700 INFO : End of max read latency training
388 03:44:35.102744 INFO : Training has run successfully!
389 03:44:35.103199 1D training succeed
390 03:44:35.110915 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 03:44:35.158655 Check phy result
392 03:44:35.159081 INFO : End of initialization
393 03:44:35.181049 INFO : End of 2D read delay Voltage center optimization
394 03:44:35.200858 INFO : End of 2D read delay Voltage center optimization
395 03:44:35.252224 INFO : End of 2D write delay Voltage center optimization
396 03:44:35.302168 INFO : End of 2D write delay Voltage center optimization
397 03:44:35.307660 INFO : Training has run successfully!
398 03:44:35.308022
399 03:44:35.308249 channel==0
400 03:44:35.313196 RxClkDly_Margin_A0==69 ps 7
401 03:44:35.313474 TxDqDly_Margin_A0==98 ps 10
402 03:44:35.318789 RxClkDly_Margin_A1==88 ps 9
403 03:44:35.319136 TxDqDly_Margin_A1==98 ps 10
404 03:44:35.319358 TrainedVREFDQ_A0==74
405 03:44:35.324445 TrainedVREFDQ_A1==75
406 03:44:35.324847 VrefDac_Margin_A0==24
407 03:44:35.325082 DeviceVref_Margin_A0==40
408 03:44:35.330116 VrefDac_Margin_A1==23
409 03:44:35.330462 DeviceVref_Margin_A1==39
410 03:44:35.330720
411 03:44:35.330935
412 03:44:35.335658 channel==1
413 03:44:35.336034 RxClkDly_Margin_A0==88 ps 9
414 03:44:35.336256 TxDqDly_Margin_A0==98 ps 10
415 03:44:35.341215 RxClkDly_Margin_A1==88 ps 9
416 03:44:35.341521 TxDqDly_Margin_A1==88 ps 9
417 03:44:35.346857 TrainedVREFDQ_A0==78
418 03:44:35.347188 TrainedVREFDQ_A1==75
419 03:44:35.347400 VrefDac_Margin_A0==22
420 03:44:35.352433 DeviceVref_Margin_A0==36
421 03:44:35.352721 VrefDac_Margin_A1==21
422 03:44:35.358163 DeviceVref_Margin_A1==39
423 03:44:35.358523
424 03:44:35.358741 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 03:44:35.358947
426 03:44:35.391811 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000016 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 03:44:35.392577 2D training succeed
428 03:44:35.397348 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 03:44:35.403033 auto size-- 65535DDR cs0 size: 2048MB
430 03:44:35.403645 DDR cs1 size: 2048MB
431 03:44:35.408593 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 03:44:35.409270 cs0 DataBus test pass
433 03:44:35.414339 cs1 DataBus test pass
434 03:44:35.414991 cs0 AddrBus test pass
435 03:44:35.415473 cs1 AddrBus test pass
436 03:44:35.415926
437 03:44:35.419673 100bdlr_step_size ps== 478
438 03:44:35.420276 result report
439 03:44:35.425406 boot times 0Enable ddr reg access
440 03:44:35.430643 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 03:44:35.444517 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 03:44:36.098930 bl2z: ptr: 05129330, size: 00001e40
443 03:44:36.105763 0.0;M3 CHK:0;cm4_sp_mode 0
444 03:44:36.106302 MVN_1=0x00000000
445 03:44:36.106754 MVN_2=0x00000000
446 03:44:36.117330 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 03:44:36.117860 OPS=0x04
448 03:44:36.118312 ring efuse init
449 03:44:36.122923 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 03:44:36.123436 [0.017318 Inits done]
451 03:44:36.123880 secure task start!
452 03:44:36.129786 high task start!
453 03:44:36.130299 low task start!
454 03:44:36.130743 run into bl31
455 03:44:36.139256 NOTICE: BL31: v1.3(release):4fc40b1
456 03:44:36.146600 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 03:44:36.147139 NOTICE: BL31: G12A normal boot!
458 03:44:36.162466 NOTICE: BL31: BL33 decompress pass
459 03:44:36.168025 ERROR: Error initializing runtime service opteed_fast
460 03:44:37.412913 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 03:44:37.413534 bl2_stage_init 0x01
462 03:44:37.413978 bl2_stage_init 0x81
463 03:44:37.418465 hw id: 0x0000 - pwm id 0x01
464 03:44:37.418965 bl2_stage_init 0xc1
465 03:44:37.424030 bl2_stage_init 0x02
466 03:44:37.424506
467 03:44:37.424938 L0:00000000
468 03:44:37.425358 L1:00000703
469 03:44:37.425777 L2:00008067
470 03:44:37.426185 L3:15000000
471 03:44:37.429650 S1:00000000
472 03:44:37.430130 B2:20282000
473 03:44:37.430551 B1:a0f83180
474 03:44:37.430964
475 03:44:37.431381 TE: 69755
476 03:44:37.431796
477 03:44:37.435184 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 03:44:37.435665
479 03:44:37.440798 Board ID = 1
480 03:44:37.441268 Set cpu clk to 24M
481 03:44:37.441694 Set clk81 to 24M
482 03:44:37.446427 Use GP1_pll as DSU clk.
483 03:44:37.446889 DSU clk: 1200 Mhz
484 03:44:37.447309 CPU clk: 1200 MHz
485 03:44:37.452045 Set clk81 to 166.6M
486 03:44:37.457603 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 03:44:37.458082 board id: 1
488 03:44:37.464373 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 03:44:37.475464 fw parse done
490 03:44:37.481402 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 03:44:37.524104 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 03:44:37.535033 PIEI prepare done
493 03:44:37.535522 fastboot data load
494 03:44:37.535919 fastboot data verify
495 03:44:37.540594 verify result: 266
496 03:44:37.546186 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 03:44:37.546632 LPDDR4 probe
498 03:44:37.547023 ddr clk to 1584MHz
499 03:44:38.911505 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0p SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 03:44:38.912153 bl2_stage_init 0x01
501 03:44:38.912582 bl2_stage_init 0x81
502 03:44:38.917016 hw id: 0x0000 - pwm id 0x01
503 03:44:38.917522 bl2_stage_init 0xc1
504 03:44:38.922611 bl2_stage_init 0x02
505 03:44:38.923076
506 03:44:38.923493 L0:00000000
507 03:44:38.923900 L1:00000703
508 03:44:38.924343 L2:00008067
509 03:44:38.924750 L3:15000000
510 03:44:38.928205 S1:00000000
511 03:44:38.928666 B2:20282000
512 03:44:38.929076 B1:a0f83180
513 03:44:38.929478
514 03:44:38.929886 TE: 69968
515 03:44:38.930288
516 03:44:38.933773 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 03:44:38.934239
518 03:44:38.939359 Board ID = 1
519 03:44:38.939819 Set cpu clk to 24M
520 03:44:38.940266 Set clk81 to 24M
521 03:44:38.945069 Use GP1_pll as DSU clk.
522 03:44:38.945536 DSU clk: 1200 Mhz
523 03:44:38.945948 CPU clk: 1200 MHz
524 03:44:38.950711 Set clk81 to 166.6M
525 03:44:38.956333 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 03:44:38.956799 board id: 1
527 03:44:38.963443 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 03:44:38.974064 fw parse done
529 03:44:38.980027 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 03:44:39.022695 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 03:44:39.033747 PIEI prepare done
532 03:44:39.034311 fastboot data load
533 03:44:39.034730 fastboot data verify
534 03:44:39.039236 verify result: 266
535 03:44:39.044787 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 03:44:39.045251 LPDDR4 probe
537 03:44:39.045663 ddr clk to 1584MHz
538 03:44:39.052895 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 03:44:39.090208
540 03:44:39.090994 dmc_version 0001
541 03:44:39.096730 Check phy result
542 03:44:39.102691 INFO : End of CA training
543 03:44:39.103320 INFO : End of initialization
544 03:44:39.108250 INFO : Training has run successfully!
545 03:44:39.108839 Check phy result
546 03:44:39.113855 INFO : End of initialization
547 03:44:39.114425 INFO : End of read enable training
548 03:44:39.119440 INFO : End of fine write leveling
549 03:44:39.125071 INFO : End of Write leveling coarse delay
550 03:44:39.125656 INFO : Training has run successfully!
551 03:44:39.126199 Check phy result
552 03:44:39.130732 INFO : End of initialization
553 03:44:39.131314 INFO : End of read dq deskew training
554 03:44:39.136218 INFO : End of MPR read delay center optimization
555 03:44:39.141943 INFO : End of write delay center optimization
556 03:44:39.147524 INFO : End of read delay center optimization
557 03:44:39.148118 INFO : End of max read latency training
558 03:44:39.153223 INFO : Training has run successfully!
559 03:44:39.153910 1D training succeed
560 03:44:39.162253 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 03:44:39.209802 Check phy result
562 03:44:39.210450 INFO : End of initialization
563 03:44:39.232294 INFO : End of 2D read delay Voltage center optimization
564 03:44:39.250505 INFO : End of 2D read delay Voltage center optimization
565 03:44:39.303332 INFO : End of 2D write delay Voltage center optimization
566 03:44:39.352417 INFO : End of 2D write delay Voltage center optimization
567 03:44:39.357911 INFO : Training has run successfully!
568 03:44:39.358497
569 03:44:39.359016 channel==0
570 03:44:39.363507 RxClkDly_Margin_A0==78 ps 8
571 03:44:39.364140 TxDqDly_Margin_A0==98 ps 10
572 03:44:39.369084 RxClkDly_Margin_A1==78 ps 8
573 03:44:39.369653 TxDqDly_Margin_A1==98 ps 10
574 03:44:39.370177 TrainedVREFDQ_A0==74
575 03:44:39.374687 TrainedVREFDQ_A1==75
576 03:44:39.375245 VrefDac_Margin_A0==23
577 03:44:39.375755 DeviceVref_Margin_A0==40
578 03:44:39.380316 VrefDac_Margin_A1==22
579 03:44:39.380875 DeviceVref_Margin_A1==39
580 03:44:39.381388
581 03:44:39.381901
582 03:44:39.386560 channel==1
583 03:44:39.387146 RxClkDly_Margin_A0==88 ps 9
584 03:44:39.387655 TxDqDly_Margin_A0==98 ps 10
585 03:44:39.391553 RxClkDly_Margin_A1==78 ps 8
586 03:44:39.392177 TxDqDly_Margin_A1==88 ps 9
587 03:44:39.397142 TrainedVREFDQ_A0==78
588 03:44:39.397757 TrainedVREFDQ_A1==75
589 03:44:39.398280 VrefDac_Margin_A0==23
590 03:44:39.402734 DeviceVref_Margin_A0==36
591 03:44:39.403316 VrefDac_Margin_A1==22
592 03:44:39.408292 DeviceVref_Margin_A1==39
593 03:44:39.408878
594 03:44:39.409403 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 03:44:39.409931
596 03:44:39.441967 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 03:44:39.442622 2D training succeed
598 03:44:39.447612 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 03:44:39.453180 auto size-- 65535DDR cs0 size: 2048MB
600 03:44:39.453792 DDR cs1 size: 2048MB
601 03:44:39.458761 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 03:44:39.459335 cs0 DataBus test pass
603 03:44:39.464384 cs1 DataBus test pass
604 03:44:39.464980 cs0 AddrBus test pass
605 03:44:39.465502 cs1 AddrBus test pass
606 03:44:39.465997
607 03:44:39.469979 100bdlr_step_size ps== 478
608 03:44:39.470574 result report
609 03:44:39.475566 boot times 0Enable ddr reg access
610 03:44:39.480824 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 03:44:39.494650 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 03:44:40.149371 bl2z: ptr: 05129330, size: 00001e40
613 03:44:40.157204 0.0;M3 CHK:0;cm4_sp_mode 0
614 03:44:40.157849 MVN_1=0x00000000
615 03:44:40.158376 MVN_2=0x00000000
616 03:44:40.168654 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 03:44:40.169257 OPS=0x04
618 03:44:40.169788 ring efuse init
619 03:44:40.171694 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 03:44:40.178219 [0.017319 Inits done]
621 03:44:40.178986 secure task start!
622 03:44:40.179518 high task start!
623 03:44:40.180071 low task start!
624 03:44:40.182421 run into bl31
625 03:44:40.191019 NOTICE: BL31: v1.3(release):4fc40b1
626 03:44:40.198840 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 03:44:40.199418 NOTICE: BL31: G12A normal boot!
628 03:44:40.215011 NOTICE: BL31: BL33 decompress pass
629 03:44:40.220125 ERROR: Error initializing runtime service opteed_fast
630 03:44:41.459938 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 03:44:41.460795 bl2_stage_init 0x01
632 03:44:41.461390 bl2_stage_init 0x81
633 03:44:41.465310 hw id: 0x0000 - pwm id 0x01
634 03:44:41.465809 bl2_stage_init 0xc1
635 03:44:41.470995 bl2_stage_init 0x02
636 03:44:41.471535
637 03:44:41.472039 L0:00000000
638 03:44:41.472488 L1:00000703
639 03:44:41.472912 L2:00008067
640 03:44:41.473355 L3:15000000
641 03:44:41.476665 S1:00000000
642 03:44:41.477200 B2:20282000
643 03:44:41.477660 B1:a0f83180
644 03:44:41.478092
645 03:44:41.478518 TE: 67929
646 03:44:41.478968
647 03:44:41.482162 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 03:44:41.482858
649 03:44:41.487775 Board ID = 1
650 03:44:41.488283 Set cpu clk to 24M
651 03:44:41.488720 Set clk81 to 24M
652 03:44:41.491400 Use GP1_pll as DSU clk.
653 03:44:41.491888 DSU clk: 1200 Mhz
654 03:44:41.497246 CPU clk: 1200 MHz
655 03:44:41.498235 Set clk81 to 166.6M
656 03:44:41.502561 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 03:44:41.503120 board id: 1
658 03:44:41.511654 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 03:44:41.522265 fw parse done
660 03:44:41.528282 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 03:44:41.570879 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 03:44:41.581882 PIEI prepare done
663 03:44:41.582408 fastboot data load
664 03:44:41.582835 fastboot data verify
665 03:44:41.587576 verify result: 266
666 03:44:41.593105 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 03:44:41.593700 LPDDR4 probe
668 03:44:41.594169 ddr clk to 1584MHz
669 03:44:41.601237 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 03:44:41.638542
671 03:44:41.639388 dmc_version 0001
672 03:44:41.644130 Check phy result
673 03:44:41.650933 INFO : End of CA training
674 03:44:41.651555 INFO : End of initialization
675 03:44:41.656679 INFO : Training has run successfully!
676 03:44:41.657164 Check phy result
677 03:44:41.662114 INFO : End of initialization
678 03:44:41.662779 INFO : End of read enable training
679 03:44:41.667708 INFO : End of fine write leveling
680 03:44:41.673218 INFO : End of Write leveling coarse delay
681 03:44:41.673710 INFO : Training has run successfully!
682 03:44:41.674129 Check phy result
683 03:44:41.678856 INFO : End of initialization
684 03:44:41.679305 INFO : End of read dq deskew training
685 03:44:41.684454 INFO : End of MPR read delay center optimization
686 03:44:41.690061 INFO : End of write delay center optimization
687 03:44:41.695791 INFO : End of read delay center optimization
688 03:44:41.696482 INFO : End of max read latency training
689 03:44:41.701234 INFO : Training has run successfully!
690 03:44:41.701639 1D training succeed
691 03:44:41.709985 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 03:44:41.757576 Check phy result
693 03:44:41.758303 INFO : End of initialization
694 03:44:41.779611 INFO : End of 2D read delay Voltage center optimization
695 03:44:41.799654 INFO : End of 2D read delay Voltage center optimization
696 03:44:41.851585 INFO : End of 2D write delay Voltage center optimization
697 03:44:41.900730 INFO : End of 2D write delay Voltage center optimization
698 03:44:41.906171 INFO : Training has run successfully!
699 03:44:41.906667
700 03:44:41.907082 channel==0
701 03:44:41.911763 RxClkDly_Margin_A0==78 ps 8
702 03:44:41.912275 TxDqDly_Margin_A0==88 ps 9
703 03:44:41.917404 RxClkDly_Margin_A1==88 ps 9
704 03:44:41.917886 TxDqDly_Margin_A1==98 ps 10
705 03:44:41.918297 TrainedVREFDQ_A0==74
706 03:44:41.922956 TrainedVREFDQ_A1==74
707 03:44:41.923399 VrefDac_Margin_A0==23
708 03:44:41.923798 DeviceVref_Margin_A0==40
709 03:44:41.928503 VrefDac_Margin_A1==23
710 03:44:41.928933 DeviceVref_Margin_A1==40
711 03:44:41.929327
712 03:44:41.929722
713 03:44:41.930118 channel==1
714 03:44:41.934087 RxClkDly_Margin_A0==88 ps 9
715 03:44:41.934520 TxDqDly_Margin_A0==98 ps 10
716 03:44:41.939694 RxClkDly_Margin_A1==78 ps 8
717 03:44:41.940165 TxDqDly_Margin_A1==78 ps 8
718 03:44:41.945280 TrainedVREFDQ_A0==78
719 03:44:41.945795 TrainedVREFDQ_A1==75
720 03:44:41.946331 VrefDac_Margin_A0==22
721 03:44:41.951017 DeviceVref_Margin_A0==36
722 03:44:41.951562 VrefDac_Margin_A1==22
723 03:44:41.956612 DeviceVref_Margin_A1==39
724 03:44:41.957094
725 03:44:41.957496 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 03:44:41.957892
727 03:44:41.990146 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
728 03:44:41.990801 2D training succeed
729 03:44:41.995715 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 03:44:42.001336 auto size-- 65535DDR cs0 size: 2048MB
731 03:44:42.001854 DDR cs1 size: 2048MB
732 03:44:42.006906 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 03:44:42.007373 cs0 DataBus test pass
734 03:44:42.012519 cs1 DataBus test pass
735 03:44:42.013001 cs0 AddrBus test pass
736 03:44:42.013402 cs1 AddrBus test pass
737 03:44:42.013797
738 03:44:42.018114 100bdlr_step_size ps== 478
739 03:44:42.018576 result report
740 03:44:42.023720 boot times 0Enable ddr reg access
741 03:44:42.028864 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 03:44:42.042698 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 03:44:42.697811 bl2z: ptr: 05129330, size: 00001e40
744 03:44:42.704512 0.0;M3 CHK:0;cm4_sp_mode 0
745 03:44:42.705096 MVN_1=0x00000000
746 03:44:42.705539 MVN_2=0x00000000
747 03:44:42.715962 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 03:44:42.716591 OPS=0x04
749 03:44:42.717020 ring efuse init
750 03:44:42.718926 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 03:44:42.724696 [0.017319 Inits done]
752 03:44:42.725222 secure task start!
753 03:44:42.725635 high task start!
754 03:44:42.726031 low task start!
755 03:44:42.727934 run into bl31
756 03:44:42.737571 NOTICE: BL31: v1.3(release):4fc40b1
757 03:44:42.745392 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 03:44:42.745927 NOTICE: BL31: G12A normal boot!
759 03:44:42.760981 NOTICE: BL31: BL33 decompress pass
760 03:44:42.765640 ERROR: Error initializing runtime service opteed_fast
761 03:44:43.561949
762 03:44:43.562562
763 03:44:43.567334 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 03:44:43.567676
765 03:44:43.570821 Model: Libre Computer AML-S905D3-CC Solitude
766 03:44:43.716956 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 03:44:43.732398 DRAM: 2 GiB (effective 3.8 GiB)
768 03:44:43.834261 Core: 406 devices, 33 uclasses, devicetree: separate
769 03:44:43.840119 WDT: Not starting watchdog@f0d0
770 03:44:43.865149 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 03:44:43.877396 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 03:44:43.882407 ** Bad device specification mmc 0 **
773 03:44:43.892472 Card did not respond to voltage select! : -110
774 03:44:43.900134 ** Bad device specification mmc 0 **
775 03:44:43.900496 Couldn't find partition mmc 0
776 03:44:43.908395 Card did not respond to voltage select! : -110
777 03:44:43.913903 ** Bad device specification mmc 0 **
778 03:44:43.914433 Couldn't find partition mmc 0
779 03:44:43.917973 Error: could not access storage.
780 03:44:44.216716 Net: eth0: ethernet@ff3f0000
781 03:44:44.217185 starting USB...
782 03:44:44.461094 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 03:44:44.461494 Starting the controller
784 03:44:44.467122 USB XHCI 1.10
785 03:44:46.021440 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 03:44:46.028912 scanning usb for storage devices... 0 Storage Device(s) found
788 03:44:46.080042 Hit any key to stop autoboot: 1
789 03:44:46.080916 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 03:44:46.081282 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 03:44:46.081563 Setting prompt string to ['=>']
792 03:44:46.081841 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 03:44:46.084977 0
794 03:44:46.085624 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 03:44:46.186430 => setenv autoload no
797 03:44:46.187164 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 03:44:46.190388 setenv autoload no
800 03:44:46.291463 => setenv initrd_high 0xffffffff
801 03:44:46.292190 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 03:44:46.296605 setenv initrd_high 0xffffffff
804 03:44:46.398254 => setenv fdt_high 0xffffffff
805 03:44:46.399025 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 03:44:46.404583 setenv fdt_high 0xffffffff
808 03:44:46.506204 => dhcp
809 03:44:46.506944 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 03:44:46.511159 dhcp
811 03:44:47.467093 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 03:44:47.467528 Speed: 1000, full duplex
813 03:44:47.467751 BOOTP broadcast 1
814 03:44:47.475403 DHCP client bound to address 192.168.6.21 (8 ms)
816 03:44:47.576486 => setenv serverip 192.168.6.2
817 03:44:47.577049 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
818 03:44:47.581523 setenv serverip 192.168.6.2
820 03:44:47.682572 => tftpboot 0x01080000 957596/tftp-deploy-ev87_fzg/kernel/uImage
821 03:44:47.683127 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
822 03:44:47.690469 tftpboot 0x01080000 957596/tftp-deploy-ev87_fzg/kernel/uImage
823 03:44:47.690823 Speed: 1000, full duplex
824 03:44:47.691042 Using ethernet@ff3f0000 device
825 03:44:47.695736 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
826 03:44:47.701531 Filename '957596/tftp-deploy-ev87_fzg/kernel/uImage'.
827 03:44:47.705006 Load address: 0x1080000
828 03:44:50.708685 Loading: *################################################## 43.6 MiB
829 03:44:50.709362 14.5 MiB/s
830 03:44:50.709820 done
831 03:44:50.713113 Bytes transferred = 45713984 (2b98a40 hex)
833 03:44:50.814728 => tftpboot 0x08000000 957596/tftp-deploy-ev87_fzg/ramdisk/ramdisk.cpio.gz.uboot
834 03:44:50.815534 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
835 03:44:50.822323 tftpboot 0x08000000 957596/tftp-deploy-ev87_fzg/ramdisk/ramdisk.cpio.gz.uboot
836 03:44:50.822864 Speed: 1000, full duplex
837 03:44:50.823310 Using ethernet@ff3f0000 device
838 03:44:50.828015 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
839 03:44:50.837602 Filename '957596/tftp-deploy-ev87_fzg/ramdisk/ramdisk.cpio.gz.uboot'.
840 03:44:50.838155 Load address: 0x8000000
841 03:44:52.572053 Loading: *################################################# UDP wrong checksum 00000005 00008dc4
842 03:44:57.573207 T UDP wrong checksum 00000005 00008dc4
843 03:44:59.476681 UDP wrong checksum 000000ff 0000b3ab
844 03:44:59.485166 UDP wrong checksum 000000ff 0000479e
845 03:45:07.574793 T T UDP wrong checksum 00000005 00008dc4
846 03:45:08.381395 UDP wrong checksum 000000ff 0000e4b4
847 03:45:08.384629 UDP wrong checksum 000000ff 00006ca7
848 03:45:27.578367 T T T T UDP wrong checksum 00000005 00008dc4
849 03:45:30.545312 UDP wrong checksum 000000ff 00007b02
850 03:45:30.605379 UDP wrong checksum 000000ff 00000df5
851 03:45:30.627535 UDP wrong checksum 000000ff 00002260
852 03:45:30.917514 UDP wrong checksum 000000ff 0000bd52
853 03:45:31.013378 UDP wrong checksum 000000ff 00004f90
854 03:45:31.063206 UDP wrong checksum 000000ff 0000e982
855 03:45:38.705304 T T UDP wrong checksum 000000ff 0000f4dc
856 03:45:38.771808 UDP wrong checksum 000000ff 000085cf
857 03:45:47.583682 T
858 03:45:47.584396 Retry count exceeded; starting again
860 03:45:47.585922 end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
863 03:45:47.587889 end: 2.4 uboot-commands (duration 00:01:20) [common]
865 03:45:47.589431 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
867 03:45:47.590624 end: 2 uboot-action (duration 00:01:20) [common]
869 03:45:47.592372 Cleaning after the job
870 03:45:47.592994 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/ramdisk
871 03:45:47.594548 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/kernel
872 03:45:47.627065 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/dtb
873 03:45:47.628009 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/nfsrootfs
874 03:45:47.780990 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957596/tftp-deploy-ev87_fzg/modules
875 03:45:47.802789 start: 4.1 power-off (timeout 00:00:30) [common]
876 03:45:47.803470 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
877 03:45:47.834494 >> OK - accepted request
878 03:45:47.836528 Returned 0 in 0 seconds
879 03:45:47.937311 end: 4.1 power-off (duration 00:00:00) [common]
881 03:45:47.938346 start: 4.2 read-feedback (timeout 00:10:00) [common]
882 03:45:47.938997 Listened to connection for namespace 'common' for up to 1s
883 03:45:48.939955 Finalising connection for namespace 'common'
884 03:45:48.940485 Disconnecting from shell: Finalise
885 03:45:48.940794 =>
886 03:45:49.041551 end: 4.2 read-feedback (duration 00:00:01) [common]
887 03:45:49.041993 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/957596
888 03:45:50.936385 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/957596
889 03:45:50.937001 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.