Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:22:45.331741 lava-dispatcher, installed at version: 2024.01
2 04:22:45.332584 start: 0 validate
3 04:22:45.333051 Start time: 2024-11-08 04:22:45.333021+00:00 (UTC)
4 04:22:45.333606 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:22:45.334157 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:22:45.377002 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:22:45.377550 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-574-g603e41d0858f1%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:22:45.409515 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:22:45.410151 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-574-g603e41d0858f1%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 04:22:45.443661 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:22:45.444196 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:22:45.477896 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:22:45.478412 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-574-g603e41d0858f1%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:22:45.519450 validate duration: 0.19
16 04:22:45.520994 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:22:45.521613 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:22:45.522233 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:22:45.523197 Not decompressing ramdisk as can be used compressed.
20 04:22:45.523972 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 04:22:45.524541 saving as /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/ramdisk/initrd.cpio.gz
22 04:22:45.525086 total size: 5628169 (5 MB)
23 04:22:45.569108 progress 0 % (0 MB)
24 04:22:45.576638 progress 5 % (0 MB)
25 04:22:45.584566 progress 10 % (0 MB)
26 04:22:45.591763 progress 15 % (0 MB)
27 04:22:45.599733 progress 20 % (1 MB)
28 04:22:45.605416 progress 25 % (1 MB)
29 04:22:45.609417 progress 30 % (1 MB)
30 04:22:45.613684 progress 35 % (1 MB)
31 04:22:45.617311 progress 40 % (2 MB)
32 04:22:45.621301 progress 45 % (2 MB)
33 04:22:45.625040 progress 50 % (2 MB)
34 04:22:45.629044 progress 55 % (2 MB)
35 04:22:45.633015 progress 60 % (3 MB)
36 04:22:45.636588 progress 65 % (3 MB)
37 04:22:45.640760 progress 70 % (3 MB)
38 04:22:45.644357 progress 75 % (4 MB)
39 04:22:45.648258 progress 80 % (4 MB)
40 04:22:45.651852 progress 85 % (4 MB)
41 04:22:45.656303 progress 90 % (4 MB)
42 04:22:45.660381 progress 95 % (5 MB)
43 04:22:45.663835 progress 100 % (5 MB)
44 04:22:45.664543 5 MB downloaded in 0.14 s (38.49 MB/s)
45 04:22:45.665088 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:22:45.666008 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:22:45.666289 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:22:45.666557 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:22:45.667026 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/kernel/Image
51 04:22:45.667320 saving as /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/kernel/Image
52 04:22:45.667542 total size: 45713920 (43 MB)
53 04:22:45.667753 No compression specified
54 04:22:45.701164 progress 0 % (0 MB)
55 04:22:45.730361 progress 5 % (2 MB)
56 04:22:45.759668 progress 10 % (4 MB)
57 04:22:45.788678 progress 15 % (6 MB)
58 04:22:45.818205 progress 20 % (8 MB)
59 04:22:45.846802 progress 25 % (10 MB)
60 04:22:45.875934 progress 30 % (13 MB)
61 04:22:45.905252 progress 35 % (15 MB)
62 04:22:45.934647 progress 40 % (17 MB)
63 04:22:45.963432 progress 45 % (19 MB)
64 04:22:45.992666 progress 50 % (21 MB)
65 04:22:46.022129 progress 55 % (24 MB)
66 04:22:46.051173 progress 60 % (26 MB)
67 04:22:46.079612 progress 65 % (28 MB)
68 04:22:46.109033 progress 70 % (30 MB)
69 04:22:46.137922 progress 75 % (32 MB)
70 04:22:46.166884 progress 80 % (34 MB)
71 04:22:46.195492 progress 85 % (37 MB)
72 04:22:46.224714 progress 90 % (39 MB)
73 04:22:46.253429 progress 95 % (41 MB)
74 04:22:46.281881 progress 100 % (43 MB)
75 04:22:46.282413 43 MB downloaded in 0.61 s (70.90 MB/s)
76 04:22:46.282891 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:22:46.283708 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:22:46.284006 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:22:46.284284 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:22:46.284751 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 04:22:46.285019 saving as /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/dtb/meson-g12b-a311d-libretech-cc.dtb
83 04:22:46.285229 total size: 54703 (0 MB)
84 04:22:46.285439 No compression specified
85 04:22:46.330928 progress 59 % (0 MB)
86 04:22:46.331828 progress 100 % (0 MB)
87 04:22:46.332447 0 MB downloaded in 0.05 s (1.11 MB/s)
88 04:22:46.332939 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:22:46.333794 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:22:46.334075 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:22:46.334356 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:22:46.334828 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 04:22:46.335081 saving as /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/nfsrootfs/full.rootfs.tar
95 04:22:46.335298 total size: 120894716 (115 MB)
96 04:22:46.335520 Using unxz to decompress xz
97 04:22:46.377441 progress 0 % (0 MB)
98 04:22:47.170913 progress 5 % (5 MB)
99 04:22:48.011264 progress 10 % (11 MB)
100 04:22:48.810684 progress 15 % (17 MB)
101 04:22:49.556977 progress 20 % (23 MB)
102 04:22:50.151258 progress 25 % (28 MB)
103 04:22:50.974164 progress 30 % (34 MB)
104 04:22:51.768794 progress 35 % (40 MB)
105 04:22:52.115048 progress 40 % (46 MB)
106 04:22:52.498275 progress 45 % (51 MB)
107 04:22:53.215254 progress 50 % (57 MB)
108 04:22:54.095794 progress 55 % (63 MB)
109 04:22:54.875631 progress 60 % (69 MB)
110 04:22:55.632748 progress 65 % (74 MB)
111 04:22:56.427818 progress 70 % (80 MB)
112 04:22:57.248690 progress 75 % (86 MB)
113 04:22:58.032450 progress 80 % (92 MB)
114 04:22:58.789506 progress 85 % (98 MB)
115 04:22:59.645723 progress 90 % (103 MB)
116 04:23:00.424457 progress 95 % (109 MB)
117 04:23:01.256038 progress 100 % (115 MB)
118 04:23:01.268506 115 MB downloaded in 14.93 s (7.72 MB/s)
119 04:23:01.269398 end: 1.4.1 http-download (duration 00:00:15) [common]
121 04:23:01.270997 end: 1.4 download-retry (duration 00:00:15) [common]
122 04:23:01.271511 start: 1.5 download-retry (timeout 00:09:44) [common]
123 04:23:01.272067 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 04:23:01.272988 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/modules.tar.xz
125 04:23:01.273462 saving as /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/modules/modules.tar
126 04:23:01.273867 total size: 11610020 (11 MB)
127 04:23:01.274279 Using unxz to decompress xz
128 04:23:01.320571 progress 0 % (0 MB)
129 04:23:01.391814 progress 5 % (0 MB)
130 04:23:01.470222 progress 10 % (1 MB)
131 04:23:01.570255 progress 15 % (1 MB)
132 04:23:01.669329 progress 20 % (2 MB)
133 04:23:01.750390 progress 25 % (2 MB)
134 04:23:01.828328 progress 30 % (3 MB)
135 04:23:01.907416 progress 35 % (3 MB)
136 04:23:01.980155 progress 40 % (4 MB)
137 04:23:02.056036 progress 45 % (5 MB)
138 04:23:02.140581 progress 50 % (5 MB)
139 04:23:02.217730 progress 55 % (6 MB)
140 04:23:02.303002 progress 60 % (6 MB)
141 04:23:02.383734 progress 65 % (7 MB)
142 04:23:02.464721 progress 70 % (7 MB)
143 04:23:02.542650 progress 75 % (8 MB)
144 04:23:02.626576 progress 80 % (8 MB)
145 04:23:02.706572 progress 85 % (9 MB)
146 04:23:02.785425 progress 90 % (9 MB)
147 04:23:02.863293 progress 95 % (10 MB)
148 04:23:02.939923 progress 100 % (11 MB)
149 04:23:02.951308 11 MB downloaded in 1.68 s (6.60 MB/s)
150 04:23:02.951897 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:23:02.953628 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:23:02.954203 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 04:23:02.954776 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 04:23:19.656488 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/957668/extract-nfsrootfs-mm894t4w
156 04:23:19.657098 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 04:23:19.657392 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 04:23:19.658084 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7
159 04:23:19.658559 makedir: /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin
160 04:23:19.658915 makedir: /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/tests
161 04:23:19.659232 makedir: /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/results
162 04:23:19.659567 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-add-keys
163 04:23:19.660127 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-add-sources
164 04:23:19.660655 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-background-process-start
165 04:23:19.661163 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-background-process-stop
166 04:23:19.661701 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-common-functions
167 04:23:19.662228 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-echo-ipv4
168 04:23:19.662776 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-install-packages
169 04:23:19.663264 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-installed-packages
170 04:23:19.663745 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-os-build
171 04:23:19.664269 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-probe-channel
172 04:23:19.664763 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-probe-ip
173 04:23:19.665245 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-target-ip
174 04:23:19.665719 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-target-mac
175 04:23:19.666221 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-target-storage
176 04:23:19.666715 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-test-case
177 04:23:19.667236 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-test-event
178 04:23:19.667740 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-test-feedback
179 04:23:19.668252 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-test-raise
180 04:23:19.668736 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-test-reference
181 04:23:19.669219 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-test-runner
182 04:23:19.669702 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-test-set
183 04:23:19.670175 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-test-shell
184 04:23:19.670662 Updating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-add-keys (debian)
185 04:23:19.671231 Updating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-add-sources (debian)
186 04:23:19.671793 Updating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-install-packages (debian)
187 04:23:19.672336 Updating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-installed-packages (debian)
188 04:23:19.672838 Updating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/bin/lava-os-build (debian)
189 04:23:19.673278 Creating /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/environment
190 04:23:19.673648 LAVA metadata
191 04:23:19.673908 - LAVA_JOB_ID=957668
192 04:23:19.674123 - LAVA_DISPATCHER_IP=192.168.6.2
193 04:23:19.674478 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 04:23:19.675460 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 04:23:19.675784 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 04:23:19.676015 skipped lava-vland-overlay
197 04:23:19.676264 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 04:23:19.676518 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 04:23:19.676736 skipped lava-multinode-overlay
200 04:23:19.676980 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 04:23:19.677228 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 04:23:19.677479 Loading test definitions
203 04:23:19.677757 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 04:23:19.677976 Using /lava-957668 at stage 0
205 04:23:19.679074 uuid=957668_1.6.2.4.1 testdef=None
206 04:23:19.679382 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 04:23:19.679646 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 04:23:19.681243 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 04:23:19.682025 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 04:23:19.683919 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 04:23:19.684763 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 04:23:19.686601 runner path: /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/0/tests/0_timesync-off test_uuid 957668_1.6.2.4.1
215 04:23:19.687204 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 04:23:19.688032 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 04:23:19.688261 Using /lava-957668 at stage 0
219 04:23:19.688614 Fetching tests from https://github.com/kernelci/test-definitions.git
220 04:23:19.688906 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/0/tests/1_kselftest-alsa'
221 04:23:23.157916 Running '/usr/bin/git checkout kernelci.org
222 04:23:23.350188 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 04:23:23.351634 uuid=957668_1.6.2.4.5 testdef=None
224 04:23:23.352018 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 04:23:23.353662 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 04:23:23.359675 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 04:23:23.361449 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 04:23:23.369434 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 04:23:23.371261 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 04:23:23.379033 runner path: /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/0/tests/1_kselftest-alsa test_uuid 957668_1.6.2.4.5
234 04:23:23.379629 BOARD='meson-g12b-a311d-libretech-cc'
235 04:23:23.380113 BRANCH='tip'
236 04:23:23.380551 SKIPFILE='/dev/null'
237 04:23:23.380988 SKIP_INSTALL='True'
238 04:23:23.381418 TESTPROG_URL='http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 04:23:23.381859 TST_CASENAME=''
240 04:23:23.382291 TST_CMDFILES='alsa'
241 04:23:23.383388 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 04:23:23.385146 Creating lava-test-runner.conf files
244 04:23:23.385598 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/957668/lava-overlay-abjp5cc7/lava-957668/0 for stage 0
245 04:23:23.386318 - 0_timesync-off
246 04:23:23.386821 - 1_kselftest-alsa
247 04:23:23.387504 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 04:23:23.388150 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 04:23:46.746332 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 04:23:46.746790 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 04:23:46.747087 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 04:23:46.747398 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 04:23:46.747691 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 04:23:47.371495 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 04:23:47.371962 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 04:23:47.372305 extracting modules file /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957668/extract-nfsrootfs-mm894t4w
257 04:23:48.759099 extracting modules file /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957668/extract-overlay-ramdisk-vho13tkh/ramdisk
258 04:23:50.197222 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 04:23:50.197717 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 04:23:50.197998 [common] Applying overlay to NFS
261 04:23:50.198219 [common] Applying overlay /var/lib/lava/dispatcher/tmp/957668/compress-overlay-_lxzi62w/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/957668/extract-nfsrootfs-mm894t4w
262 04:23:52.916659 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 04:23:52.917141 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 04:23:52.917415 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 04:23:52.917648 Converting downloaded kernel to a uImage
266 04:23:52.917961 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/kernel/Image /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/kernel/uImage
267 04:23:53.393102 output: Image Name:
268 04:23:53.393535 output: Created: Fri Nov 8 04:23:52 2024
269 04:23:53.393750 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 04:23:53.393958 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 04:23:53.394163 output: Load Address: 01080000
272 04:23:53.394365 output: Entry Point: 01080000
273 04:23:53.394564 output:
274 04:23:53.394900 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 04:23:53.395174 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 04:23:53.395446 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 04:23:53.395703 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 04:23:53.395963 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 04:23:53.396271 Building ramdisk /var/lib/lava/dispatcher/tmp/957668/extract-overlay-ramdisk-vho13tkh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/957668/extract-overlay-ramdisk-vho13tkh/ramdisk
280 04:23:55.638073 >> 166825 blocks
281 04:24:03.319744 Adding RAMdisk u-boot header.
282 04:24:03.320503 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/957668/extract-overlay-ramdisk-vho13tkh/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/957668/extract-overlay-ramdisk-vho13tkh/ramdisk.cpio.gz.uboot
283 04:24:03.581992 output: Image Name:
284 04:24:03.582436 output: Created: Fri Nov 8 04:24:03 2024
285 04:24:03.582651 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 04:24:03.582857 output: Data Size: 23433901 Bytes = 22884.67 KiB = 22.35 MiB
287 04:24:03.583061 output: Load Address: 00000000
288 04:24:03.583262 output: Entry Point: 00000000
289 04:24:03.583463 output:
290 04:24:03.584263 rename /var/lib/lava/dispatcher/tmp/957668/extract-overlay-ramdisk-vho13tkh/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/ramdisk/ramdisk.cpio.gz.uboot
291 04:24:03.585076 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 04:24:03.585689 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 04:24:03.586285 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 04:24:03.586809 No LXC device requested
295 04:24:03.587371 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 04:24:03.587940 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 04:24:03.588537 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 04:24:03.588996 Checking files for TFTP limit of 4294967296 bytes.
299 04:24:03.591971 end: 1 tftp-deploy (duration 00:01:18) [common]
300 04:24:03.592703 start: 2 uboot-action (timeout 00:05:00) [common]
301 04:24:03.593289 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 04:24:03.593843 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 04:24:03.594399 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 04:24:03.594993 Using kernel file from prepare-kernel: 957668/tftp-deploy-l6k0qe4c/kernel/uImage
305 04:24:03.595691 substitutions:
306 04:24:03.596195 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 04:24:03.596645 - {DTB_ADDR}: 0x01070000
308 04:24:03.597090 - {DTB}: 957668/tftp-deploy-l6k0qe4c/dtb/meson-g12b-a311d-libretech-cc.dtb
309 04:24:03.597532 - {INITRD}: 957668/tftp-deploy-l6k0qe4c/ramdisk/ramdisk.cpio.gz.uboot
310 04:24:03.597971 - {KERNEL_ADDR}: 0x01080000
311 04:24:03.598406 - {KERNEL}: 957668/tftp-deploy-l6k0qe4c/kernel/uImage
312 04:24:03.598842 - {LAVA_MAC}: None
313 04:24:03.599315 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/957668/extract-nfsrootfs-mm894t4w
314 04:24:03.599754 - {NFS_SERVER_IP}: 192.168.6.2
315 04:24:03.600222 - {PRESEED_CONFIG}: None
316 04:24:03.600655 - {PRESEED_LOCAL}: None
317 04:24:03.601085 - {RAMDISK_ADDR}: 0x08000000
318 04:24:03.601511 - {RAMDISK}: 957668/tftp-deploy-l6k0qe4c/ramdisk/ramdisk.cpio.gz.uboot
319 04:24:03.601937 - {ROOT_PART}: None
320 04:24:03.602368 - {ROOT}: None
321 04:24:03.602791 - {SERVER_IP}: 192.168.6.2
322 04:24:03.603217 - {TEE_ADDR}: 0x83000000
323 04:24:03.603642 - {TEE}: None
324 04:24:03.604093 Parsed boot commands:
325 04:24:03.604513 - setenv autoload no
326 04:24:03.604937 - setenv initrd_high 0xffffffff
327 04:24:03.605360 - setenv fdt_high 0xffffffff
328 04:24:03.605783 - dhcp
329 04:24:03.606209 - setenv serverip 192.168.6.2
330 04:24:03.606638 - tftpboot 0x01080000 957668/tftp-deploy-l6k0qe4c/kernel/uImage
331 04:24:03.607071 - tftpboot 0x08000000 957668/tftp-deploy-l6k0qe4c/ramdisk/ramdisk.cpio.gz.uboot
332 04:24:03.607505 - tftpboot 0x01070000 957668/tftp-deploy-l6k0qe4c/dtb/meson-g12b-a311d-libretech-cc.dtb
333 04:24:03.607938 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/957668/extract-nfsrootfs-mm894t4w,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 04:24:03.608408 - bootm 0x01080000 0x08000000 0x01070000
335 04:24:03.608967 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 04:24:03.610618 start: 2.3 connect-device (timeout 00:05:00) [common]
338 04:24:03.611087 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 04:24:03.626973 Setting prompt string to ['lava-test: # ']
340 04:24:03.628675 end: 2.3 connect-device (duration 00:00:00) [common]
341 04:24:03.629353 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 04:24:03.629967 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 04:24:03.630581 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 04:24:03.631832 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 04:24:03.669751 >> OK - accepted request
346 04:24:03.671812 Returned 0 in 0 seconds
347 04:24:03.773046 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 04:24:03.774902 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 04:24:03.775525 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 04:24:03.776129 Setting prompt string to ['Hit any key to stop autoboot']
352 04:24:03.776643 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 04:24:03.778361 Trying 192.168.56.21...
354 04:24:03.778887 Connected to conserv1.
355 04:24:03.779342 Escape character is '^]'.
356 04:24:03.779804
357 04:24:03.780300 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 04:24:03.780768
359 04:24:14.640910 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 04:24:14.641605 bl2_stage_init 0x01
361 04:24:14.642117 bl2_stage_init 0x81
362 04:24:14.646483 hw id: 0x0000 - pwm id 0x01
363 04:24:14.647069 bl2_stage_init 0xc1
364 04:24:14.647587 bl2_stage_init 0x02
365 04:24:14.648149
366 04:24:14.652049 L0:00000000
367 04:24:14.652564 L1:20000703
368 04:24:14.653028 L2:00008067
369 04:24:14.653479 L3:14000000
370 04:24:14.657611 B2:00402000
371 04:24:14.658100 B1:e0f83180
372 04:24:14.658548
373 04:24:14.658984 TE: 58167
374 04:24:14.659416
375 04:24:14.663210 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 04:24:14.663683
377 04:24:14.664163 Board ID = 1
378 04:24:14.668830 Set A53 clk to 24M
379 04:24:14.669300 Set A73 clk to 24M
380 04:24:14.669733 Set clk81 to 24M
381 04:24:14.674399 A53 clk: 1200 MHz
382 04:24:14.674873 A73 clk: 1200 MHz
383 04:24:14.675309 CLK81: 166.6M
384 04:24:14.675738 smccc: 00012abd
385 04:24:14.679968 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 04:24:14.685594 board id: 1
387 04:24:14.691481 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 04:24:14.702160 fw parse done
389 04:24:14.708113 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 04:24:14.750805 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 04:24:14.761733 PIEI prepare done
392 04:24:14.762214 fastboot data load
393 04:24:14.762657 fastboot data verify
394 04:24:14.767388 verify result: 266
395 04:24:14.772934 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 04:24:14.773463 LPDDR4 probe
397 04:24:14.773922 ddr clk to 1584MHz
398 04:24:14.780938 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 04:24:14.818178
400 04:24:14.818722 dmc_version 0001
401 04:24:14.824888 Check phy result
402 04:24:14.830697 INFO : End of CA training
403 04:24:14.831178 INFO : End of initialization
404 04:24:14.836336 INFO : Training has run successfully!
405 04:24:14.836868 Check phy result
406 04:24:14.841929 INFO : End of initialization
407 04:24:14.842409 INFO : End of read enable training
408 04:24:14.847519 INFO : End of fine write leveling
409 04:24:14.853106 INFO : End of Write leveling coarse delay
410 04:24:14.853601 INFO : Training has run successfully!
411 04:24:14.854057 Check phy result
412 04:24:14.858706 INFO : End of initialization
413 04:24:14.859188 INFO : End of read dq deskew training
414 04:24:14.864378 INFO : End of MPR read delay center optimization
415 04:24:14.869940 INFO : End of write delay center optimization
416 04:24:14.875508 INFO : End of read delay center optimization
417 04:24:14.876029 INFO : End of max read latency training
418 04:24:14.881107 INFO : Training has run successfully!
419 04:24:14.881590 1D training succeed
420 04:24:14.890291 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 04:24:14.937980 Check phy result
422 04:24:14.938540 INFO : End of initialization
423 04:24:14.960462 INFO : End of 2D read delay Voltage center optimization
424 04:24:14.980682 INFO : End of 2D read delay Voltage center optimization
425 04:24:15.032839 INFO : End of 2D write delay Voltage center optimization
426 04:24:15.082113 INFO : End of 2D write delay Voltage center optimization
427 04:24:15.087662 INFO : Training has run successfully!
428 04:24:15.088190
429 04:24:15.088657 channel==0
430 04:24:15.093268 RxClkDly_Margin_A0==88 ps 9
431 04:24:15.093746 TxDqDly_Margin_A0==98 ps 10
432 04:24:15.098877 RxClkDly_Margin_A1==98 ps 10
433 04:24:15.099351 TxDqDly_Margin_A1==98 ps 10
434 04:24:15.099803 TrainedVREFDQ_A0==74
435 04:24:15.104475 TrainedVREFDQ_A1==74
436 04:24:15.104952 VrefDac_Margin_A0==24
437 04:24:15.110064 DeviceVref_Margin_A0==40
438 04:24:15.110537 VrefDac_Margin_A1==25
439 04:24:15.110986 DeviceVref_Margin_A1==40
440 04:24:15.111430
441 04:24:15.111873
442 04:24:15.115647 channel==1
443 04:24:15.116150 RxClkDly_Margin_A0==98 ps 10
444 04:24:15.116604 TxDqDly_Margin_A0==88 ps 9
445 04:24:15.121270 RxClkDly_Margin_A1==98 ps 10
446 04:24:15.121748 TxDqDly_Margin_A1==88 ps 9
447 04:24:15.126890 TrainedVREFDQ_A0==77
448 04:24:15.127361 TrainedVREFDQ_A1==77
449 04:24:15.127812 VrefDac_Margin_A0==22
450 04:24:15.132481 DeviceVref_Margin_A0==37
451 04:24:15.132961 VrefDac_Margin_A1==24
452 04:24:15.138118 DeviceVref_Margin_A1==37
453 04:24:15.138670
454 04:24:15.139132 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 04:24:15.143675
456 04:24:15.171634 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
457 04:24:15.172258 2D training succeed
458 04:24:15.177247 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 04:24:15.182867 auto size-- 65535DDR cs0 size: 2048MB
460 04:24:15.183356 DDR cs1 size: 2048MB
461 04:24:15.188462 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 04:24:15.188942 cs0 DataBus test pass
463 04:24:15.194066 cs1 DataBus test pass
464 04:24:15.194541 cs0 AddrBus test pass
465 04:24:15.194994 cs1 AddrBus test pass
466 04:24:15.195439
467 04:24:15.199670 100bdlr_step_size ps== 420
468 04:24:15.200243 result report
469 04:24:15.205247 boot times 0Enable ddr reg access
470 04:24:15.210703 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 04:24:15.224205 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 04:24:15.797266 0.0;M3 CHK:0;cm4_sp_mode 0
473 04:24:15.797936 MVN_1=0x00000000
474 04:24:15.802661 MVN_2=0x00000000
475 04:24:15.808406 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 04:24:15.808904 OPS=0x10
477 04:24:15.809368 ring efuse init
478 04:24:15.809822 chipver efuse init
479 04:24:15.814001 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 04:24:15.819573 [0.018961 Inits done]
481 04:24:15.820108 secure task start!
482 04:24:15.820572 high task start!
483 04:24:15.824171 low task start!
484 04:24:15.824656 run into bl31
485 04:24:15.830871 NOTICE: BL31: v1.3(release):4fc40b1
486 04:24:15.838617 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 04:24:15.839108 NOTICE: BL31: G12A normal boot!
488 04:24:15.863962 NOTICE: BL31: BL33 decompress pass
489 04:24:15.868639 ERROR: Error initializing runtime service opteed_fast
490 04:24:17.102788
491 04:24:17.103458
492 04:24:17.111116 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 04:24:17.111626
494 04:24:17.112143 Model: Libre Computer AML-A311D-CC Alta
495 04:24:17.319446 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 04:24:17.342837 DRAM: 2 GiB (effective 3.8 GiB)
497 04:24:17.485982 Core: 408 devices, 31 uclasses, devicetree: separate
498 04:24:17.491722 WDT: Not starting watchdog@f0d0
499 04:24:17.523947 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 04:24:17.536477 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 04:24:17.541411 ** Bad device specification mmc 0 **
502 04:24:17.551723 Card did not respond to voltage select! : -110
503 04:24:17.559428 ** Bad device specification mmc 0 **
504 04:24:17.559923 Couldn't find partition mmc 0
505 04:24:17.567768 Card did not respond to voltage select! : -110
506 04:24:17.573308 ** Bad device specification mmc 0 **
507 04:24:17.573814 Couldn't find partition mmc 0
508 04:24:17.578329 Error: could not access storage.
509 04:24:18.841400 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 04:24:18.842056 bl2_stage_init 0x01
511 04:24:18.842539 bl2_stage_init 0x81
512 04:24:18.846914 hw id: 0x0000 - pwm id 0x01
513 04:24:18.847408 bl2_stage_init 0xc1
514 04:24:18.847868 bl2_stage_init 0x02
515 04:24:18.848452
516 04:24:18.852509 L0:00000000
517 04:24:18.852997 L1:20000703
518 04:24:18.853450 L2:00008067
519 04:24:18.853900 L3:14000000
520 04:24:18.855401 B2:00402000
521 04:24:18.855878 B1:e0f83180
522 04:24:18.856371
523 04:24:18.856821 TE: 58159
524 04:24:18.857267
525 04:24:18.866590 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 04:24:18.867086
527 04:24:18.867539 Board ID = 1
528 04:24:18.868023 Set A53 clk to 24M
529 04:24:18.868482 Set A73 clk to 24M
530 04:24:18.872199 Set clk81 to 24M
531 04:24:18.872688 A53 clk: 1200 MHz
532 04:24:18.873136 A73 clk: 1200 MHz
533 04:24:18.877791 CLK81: 166.6M
534 04:24:18.878279 smccc: 00012ab5
535 04:24:18.883400 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 04:24:18.883902 board id: 1
537 04:24:18.892060 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 04:24:18.902865 fw parse done
539 04:24:18.908930 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 04:24:18.951418 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 04:24:18.962202 PIEI prepare done
542 04:24:18.962755 fastboot data load
543 04:24:18.963229 fastboot data verify
544 04:24:18.969744 verify result: 266
545 04:24:18.974105 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 04:24:18.974653 LPDDR4 probe
547 04:24:18.975144 ddr clk to 1584MHz
548 04:24:18.982320 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 04:24:19.018791
550 04:24:19.019419 dmc_version 0001
551 04:24:19.025428 Check phy result
552 04:24:19.031582 INFO : End of CA training
553 04:24:19.032287 INFO : End of initialization
554 04:24:19.037063 INFO : Training has run successfully!
555 04:24:19.037703 Check phy result
556 04:24:19.042523 INFO : End of initialization
557 04:24:19.043056 INFO : End of read enable training
558 04:24:19.048525 INFO : End of fine write leveling
559 04:24:19.055018 INFO : End of Write leveling coarse delay
560 04:24:19.055665 INFO : Training has run successfully!
561 04:24:19.056192 Check phy result
562 04:24:19.059295 INFO : End of initialization
563 04:24:19.059820 INFO : End of read dq deskew training
564 04:24:19.064974 INFO : End of MPR read delay center optimization
565 04:24:19.070440 INFO : End of write delay center optimization
566 04:24:19.076770 INFO : End of read delay center optimization
567 04:24:19.077278 INFO : End of max read latency training
568 04:24:19.082109 INFO : Training has run successfully!
569 04:24:19.082620 1D training succeed
570 04:24:19.090827 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 04:24:19.138569 Check phy result
572 04:24:19.139202 INFO : End of initialization
573 04:24:19.160056 INFO : End of 2D read delay Voltage center optimization
574 04:24:19.180269 INFO : End of 2D read delay Voltage center optimization
575 04:24:19.232160 INFO : End of 2D write delay Voltage center optimization
576 04:24:19.281283 INFO : End of 2D write delay Voltage center optimization
577 04:24:19.286873 INFO : Training has run successfully!
578 04:24:19.287456
579 04:24:19.287930 channel==0
580 04:24:19.292398 RxClkDly_Margin_A0==88 ps 9
581 04:24:19.292915 TxDqDly_Margin_A0==98 ps 10
582 04:24:19.297932 RxClkDly_Margin_A1==88 ps 9
583 04:24:19.298416 TxDqDly_Margin_A1==98 ps 10
584 04:24:19.298842 TrainedVREFDQ_A0==74
585 04:24:19.303530 TrainedVREFDQ_A1==74
586 04:24:19.304038 VrefDac_Margin_A0==25
587 04:24:19.304462 DeviceVref_Margin_A0==40
588 04:24:19.309282 VrefDac_Margin_A1==25
589 04:24:19.309777 DeviceVref_Margin_A1==40
590 04:24:19.310197
591 04:24:19.310630
592 04:24:19.314846 channel==1
593 04:24:19.315349 RxClkDly_Margin_A0==98 ps 10
594 04:24:19.315845 TxDqDly_Margin_A0==98 ps 10
595 04:24:19.320666 RxClkDly_Margin_A1==88 ps 9
596 04:24:19.321207 TxDqDly_Margin_A1==88 ps 9
597 04:24:19.326188 TrainedVREFDQ_A0==77
598 04:24:19.326676 TrainedVREFDQ_A1==77
599 04:24:19.327109 VrefDac_Margin_A0==22
600 04:24:19.331631 DeviceVref_Margin_A0==37
601 04:24:19.332158 VrefDac_Margin_A1==24
602 04:24:19.337162 DeviceVref_Margin_A1==37
603 04:24:19.337650
604 04:24:19.338082 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 04:24:19.338504
606 04:24:19.370894 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 04:24:19.371548 2D training succeed
608 04:24:19.376485 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 04:24:19.382044 auto size-- 65535DDR cs0 size: 2048MB
610 04:24:19.382625 DDR cs1 size: 2048MB
611 04:24:19.387591 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 04:24:19.388159 cs0 DataBus test pass
613 04:24:19.393259 cs1 DataBus test pass
614 04:24:19.393720 cs0 AddrBus test pass
615 04:24:19.394125 cs1 AddrBus test pass
616 04:24:19.394523
617 04:24:19.398852 100bdlr_step_size ps== 420
618 04:24:19.399303 result report
619 04:24:19.404559 boot times 0Enable ddr reg access
620 04:24:19.409864 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 04:24:19.423207 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 04:24:19.995403 0.0;M3 CHK:0;cm4_sp_mode 0
623 04:24:19.996076 MVN_1=0x00000000
624 04:24:20.000768 MVN_2=0x00000000
625 04:24:20.006487 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 04:24:20.006994 OPS=0x10
627 04:24:20.007437 ring efuse init
628 04:24:20.007862 chipver efuse init
629 04:24:20.012102 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 04:24:20.017676 [0.018961 Inits done]
631 04:24:20.018113 secure task start!
632 04:24:20.018505 high task start!
633 04:24:20.022246 low task start!
634 04:24:20.022676 run into bl31
635 04:24:20.028860 NOTICE: BL31: v1.3(release):4fc40b1
636 04:24:20.036710 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 04:24:20.037199 NOTICE: BL31: G12A normal boot!
638 04:24:20.062050 NOTICE: BL31: BL33 decompress pass
639 04:24:20.067686 ERROR: Error initializing runtime service opteed_fast
640 04:24:21.300601
641 04:24:21.301201
642 04:24:21.308964 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 04:24:21.309432
644 04:24:21.309854 Model: Libre Computer AML-A311D-CC Alta
645 04:24:21.517477 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 04:24:21.540920 DRAM: 2 GiB (effective 3.8 GiB)
647 04:24:21.683855 Core: 408 devices, 31 uclasses, devicetree: separate
648 04:24:21.689734 WDT: Not starting watchdog@f0d0
649 04:24:21.721976 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 04:24:21.734423 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 04:24:21.739436 ** Bad device specification mmc 0 **
652 04:24:21.749797 Card did not respond to voltage select! : -110
653 04:24:21.757394 ** Bad device specification mmc 0 **
654 04:24:21.757912 Couldn't find partition mmc 0
655 04:24:21.765764 Card did not respond to voltage select! : -110
656 04:24:21.771268 ** Bad device specification mmc 0 **
657 04:24:21.771790 Couldn't find partition mmc 0
658 04:24:21.776322 Error: could not access storage.
659 04:24:22.118780 Net: eth0: ethernet@ff3f0000
660 04:24:22.119416 starting USB...
661 04:24:22.370623 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 04:24:22.371207 Starting the controller
663 04:24:22.377594 USB XHCI 1.10
664 04:24:24.093349 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
665 04:24:24.094007 bl2_stage_init 0x81
666 04:24:24.098873 hw id: 0x0000 - pwm id 0x01
667 04:24:24.099393 bl2_stage_init 0xc1
668 04:24:24.099858 bl2_stage_init 0x02
669 04:24:24.100372
670 04:24:24.104492 L0:00000000
671 04:24:24.104999 L1:20000703
672 04:24:24.105458 L2:00008067
673 04:24:24.105907 L3:14000000
674 04:24:24.106347 B2:00402000
675 04:24:24.107386 B1:e0f83180
676 04:24:24.107911
677 04:24:24.108428 TE: 58150
678 04:24:24.108892
679 04:24:24.118527 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 04:24:24.119056
681 04:24:24.119523 Board ID = 1
682 04:24:24.119973 Set A53 clk to 24M
683 04:24:24.120461 Set A73 clk to 24M
684 04:24:24.124264 Set clk81 to 24M
685 04:24:24.124775 A53 clk: 1200 MHz
686 04:24:24.125226 A73 clk: 1200 MHz
687 04:24:24.127708 CLK81: 166.6M
688 04:24:24.128246 smccc: 00012aab
689 04:24:24.133327 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 04:24:24.138896 board id: 1
691 04:24:24.144086 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 04:24:24.154455 fw parse done
693 04:24:24.160427 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 04:24:24.202984 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 04:24:24.213985 PIEI prepare done
696 04:24:24.214512 fastboot data load
697 04:24:24.214980 fastboot data verify
698 04:24:24.219649 verify result: 266
699 04:24:24.225231 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 04:24:24.225746 LPDDR4 probe
701 04:24:24.226200 ddr clk to 1584MHz
702 04:24:24.232505 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 04:24:24.270369
704 04:24:24.270880 dmc_version 0001
705 04:24:24.277135 Check phy result
706 04:24:24.282985 INFO : End of CA training
707 04:24:24.283491 INFO : End of initialization
708 04:24:24.288599 INFO : Training has run successfully!
709 04:24:24.289103 Check phy result
710 04:24:24.294221 INFO : End of initialization
711 04:24:24.294729 INFO : End of read enable training
712 04:24:24.297450 INFO : End of fine write leveling
713 04:24:24.302998 INFO : End of Write leveling coarse delay
714 04:24:24.308602 INFO : Training has run successfully!
715 04:24:24.309107 Check phy result
716 04:24:24.309558 INFO : End of initialization
717 04:24:24.314272 INFO : End of read dq deskew training
718 04:24:24.317629 INFO : End of MPR read delay center optimization
719 04:24:24.323110 INFO : End of write delay center optimization
720 04:24:24.328743 INFO : End of read delay center optimization
721 04:24:24.329248 INFO : End of max read latency training
722 04:24:24.334280 INFO : Training has run successfully!
723 04:24:24.334788 1D training succeed
724 04:24:24.342472 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 04:24:24.390085 Check phy result
726 04:24:24.390668 INFO : End of initialization
727 04:24:24.411806 INFO : End of 2D read delay Voltage center optimization
728 04:24:24.432091 INFO : End of 2D read delay Voltage center optimization
729 04:24:24.484123 INFO : End of 2D write delay Voltage center optimization
730 04:24:24.533569 INFO : End of 2D write delay Voltage center optimization
731 04:24:24.539143 INFO : Training has run successfully!
732 04:24:24.539800
733 04:24:24.540330 channel==0
734 04:24:24.545053 RxClkDly_Margin_A0==88 ps 9
735 04:24:24.545729 TxDqDly_Margin_A0==98 ps 10
736 04:24:24.550466 RxClkDly_Margin_A1==88 ps 9
737 04:24:24.551079 TxDqDly_Margin_A1==98 ps 10
738 04:24:24.551546 TrainedVREFDQ_A0==74
739 04:24:24.556297 TrainedVREFDQ_A1==74
740 04:24:24.556961 VrefDac_Margin_A0==25
741 04:24:24.557420 DeviceVref_Margin_A0==40
742 04:24:24.561467 VrefDac_Margin_A1==25
743 04:24:24.562054 DeviceVref_Margin_A1==40
744 04:24:24.562542
745 04:24:24.563016
746 04:24:24.566955 channel==1
747 04:24:24.567493 RxClkDly_Margin_A0==98 ps 10
748 04:24:24.567964 TxDqDly_Margin_A0==98 ps 10
749 04:24:24.572584 RxClkDly_Margin_A1==98 ps 10
750 04:24:24.573287 TxDqDly_Margin_A1==88 ps 9
751 04:24:24.578161 TrainedVREFDQ_A0==77
752 04:24:24.578713 TrainedVREFDQ_A1==77
753 04:24:24.579188 VrefDac_Margin_A0==22
754 04:24:24.583780 DeviceVref_Margin_A0==37
755 04:24:24.584427 VrefDac_Margin_A1==22
756 04:24:24.589689 DeviceVref_Margin_A1==37
757 04:24:24.590241
758 04:24:24.590707 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 04:24:24.594881
760 04:24:24.624101 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
761 04:24:24.624764 2D training succeed
762 04:24:24.628937 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 04:24:24.634798 auto size-- 65535DDR cs0 size: 2048MB
764 04:24:24.635421 DDR cs1 size: 2048MB
765 04:24:24.640139 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 04:24:24.640700 cs0 DataBus test pass
767 04:24:24.645687 cs1 DataBus test pass
768 04:24:24.646283 cs0 AddrBus test pass
769 04:24:24.646690 cs1 AddrBus test pass
770 04:24:24.647066
771 04:24:24.651083 100bdlr_step_size ps== 420
772 04:24:24.651711 result report
773 04:24:24.656655 boot times 0Enable ddr reg access
774 04:24:24.662082 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 04:24:24.675564 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 04:24:25.249175 0.0;M3 CHK:0;cm4_sp_mode 0
777 04:24:25.249861 MVN_1=0x00000000
778 04:24:25.254731 MVN_2=0x00000000
779 04:24:25.260467 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 04:24:25.261026 OPS=0x10
781 04:24:25.261478 ring efuse init
782 04:24:25.261920 chipver efuse init
783 04:24:25.266052 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 04:24:25.271670 [0.018960 Inits done]
785 04:24:25.272245 secure task start!
786 04:24:25.272769 high task start!
787 04:24:25.276247 low task start!
788 04:24:25.276763 run into bl31
789 04:24:25.282794 NOTICE: BL31: v1.3(release):4fc40b1
790 04:24:25.290601 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 04:24:25.291115 NOTICE: BL31: G12A normal boot!
792 04:24:25.315931 NOTICE: BL31: BL33 decompress pass
793 04:24:25.321633 ERROR: Error initializing runtime service opteed_fast
794 04:24:26.554517
795 04:24:26.555174
796 04:24:26.562970 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 04:24:26.563518
798 04:24:26.564016 Model: Libre Computer AML-A311D-CC Alta
799 04:24:26.771338 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 04:24:26.794782 DRAM: 2 GiB (effective 3.8 GiB)
801 04:24:26.937767 Core: 408 devices, 31 uclasses, devicetree: separate
802 04:24:26.943636 WDT: Not starting watchdog@f0d0
803 04:24:26.975889 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 04:24:26.988333 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 04:24:26.993324 ** Bad device specification mmc 0 **
806 04:24:27.003718 Card did not respond to voltage select! : -110
807 04:24:27.011323 ** Bad device specification mmc 0 **
808 04:24:27.011888 Couldn't find partition mmc 0
809 04:24:27.019669 Card did not respond to voltage select! : -110
810 04:24:27.025172 ** Bad device specification mmc 0 **
811 04:24:27.025716 Couldn't find partition mmc 0
812 04:24:27.030232 Error: could not access storage.
813 04:24:27.372750 Net: eth0: ethernet@ff3f0000
814 04:24:27.373371 starting USB...
815 04:24:27.624506 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 04:24:27.625076 Starting the controller
817 04:24:27.631476 USB XHCI 1.10
818 04:24:29.791671 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 04:24:29.792419 bl2_stage_init 0x01
820 04:24:29.792901 bl2_stage_init 0x81
821 04:24:29.797273 hw id: 0x0000 - pwm id 0x01
822 04:24:29.797802 bl2_stage_init 0xc1
823 04:24:29.798265 bl2_stage_init 0x02
824 04:24:29.798719
825 04:24:29.802813 L0:00000000
826 04:24:29.803349 L1:20000703
827 04:24:29.803806 L2:00008067
828 04:24:29.804302 L3:14000000
829 04:24:29.805758 B2:00402000
830 04:24:29.806266 B1:e0f83180
831 04:24:29.806726
832 04:24:29.807176 TE: 58159
833 04:24:29.807623
834 04:24:29.816864 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 04:24:29.817404
836 04:24:29.817863 Board ID = 1
837 04:24:29.818309 Set A53 clk to 24M
838 04:24:29.818751 Set A73 clk to 24M
839 04:24:29.822421 Set clk81 to 24M
840 04:24:29.822934 A53 clk: 1200 MHz
841 04:24:29.823389 A73 clk: 1200 MHz
842 04:24:29.828079 CLK81: 166.6M
843 04:24:29.828592 smccc: 00012ab5
844 04:24:29.833607 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 04:24:29.834138 board id: 1
846 04:24:29.842290 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 04:24:29.852900 fw parse done
848 04:24:29.858862 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 04:24:29.901440 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 04:24:29.912378 PIEI prepare done
851 04:24:29.912907 fastboot data load
852 04:24:29.913367 fastboot data verify
853 04:24:29.918043 verify result: 266
854 04:24:29.923590 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 04:24:29.924164 LPDDR4 probe
856 04:24:29.924625 ddr clk to 1584MHz
857 04:24:29.931576 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 04:24:29.968863
859 04:24:29.969447 dmc_version 0001
860 04:24:29.975549 Check phy result
861 04:24:29.981376 INFO : End of CA training
862 04:24:29.981928 INFO : End of initialization
863 04:24:29.986975 INFO : Training has run successfully!
864 04:24:29.987520 Check phy result
865 04:24:29.992563 INFO : End of initialization
866 04:24:29.993113 INFO : End of read enable training
867 04:24:29.998204 INFO : End of fine write leveling
868 04:24:30.003821 INFO : End of Write leveling coarse delay
869 04:24:30.004442 INFO : Training has run successfully!
870 04:24:30.004902 Check phy result
871 04:24:30.009430 INFO : End of initialization
872 04:24:30.009970 INFO : End of read dq deskew training
873 04:24:30.014965 INFO : End of MPR read delay center optimization
874 04:24:30.020575 INFO : End of write delay center optimization
875 04:24:30.026179 INFO : End of read delay center optimization
876 04:24:30.026738 INFO : End of max read latency training
877 04:24:30.031771 INFO : Training has run successfully!
878 04:24:30.032367 1D training succeed
879 04:24:30.040907 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 04:24:30.088569 Check phy result
881 04:24:30.089152 INFO : End of initialization
882 04:24:30.110311 INFO : End of 2D read delay Voltage center optimization
883 04:24:30.130605 INFO : End of 2D read delay Voltage center optimization
884 04:24:30.182646 INFO : End of 2D write delay Voltage center optimization
885 04:24:30.231970 INFO : End of 2D write delay Voltage center optimization
886 04:24:30.237471 INFO : Training has run successfully!
887 04:24:30.237986
888 04:24:30.238454 channel==0
889 04:24:30.243147 RxClkDly_Margin_A0==88 ps 9
890 04:24:30.243662 TxDqDly_Margin_A0==98 ps 10
891 04:24:30.248658 RxClkDly_Margin_A1==88 ps 9
892 04:24:30.249169 TxDqDly_Margin_A1==98 ps 10
893 04:24:30.249627 TrainedVREFDQ_A0==74
894 04:24:30.254314 TrainedVREFDQ_A1==74
895 04:24:30.254854 VrefDac_Margin_A0==25
896 04:24:30.255296 DeviceVref_Margin_A0==40
897 04:24:30.259925 VrefDac_Margin_A1==25
898 04:24:30.260472 DeviceVref_Margin_A1==40
899 04:24:30.260883
900 04:24:30.261284
901 04:24:30.265450 channel==1
902 04:24:30.265890 RxClkDly_Margin_A0==98 ps 10
903 04:24:30.266288 TxDqDly_Margin_A0==98 ps 10
904 04:24:30.271009 RxClkDly_Margin_A1==98 ps 10
905 04:24:30.271445 TxDqDly_Margin_A1==88 ps 9
906 04:24:30.276536 TrainedVREFDQ_A0==77
907 04:24:30.276989 TrainedVREFDQ_A1==77
908 04:24:30.277388 VrefDac_Margin_A0==22
909 04:24:30.282187 DeviceVref_Margin_A0==37
910 04:24:30.282630 VrefDac_Margin_A1==22
911 04:24:30.287852 DeviceVref_Margin_A1==37
912 04:24:30.288336
913 04:24:30.288741 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 04:24:30.293446
915 04:24:30.321450 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
916 04:24:30.321963 2D training succeed
917 04:24:30.327042 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 04:24:30.332479 auto size-- 65535DDR cs0 size: 2048MB
919 04:24:30.333018 DDR cs1 size: 2048MB
920 04:24:30.338144 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 04:24:30.338603 cs0 DataBus test pass
922 04:24:30.343722 cs1 DataBus test pass
923 04:24:30.344234 cs0 AddrBus test pass
924 04:24:30.344633 cs1 AddrBus test pass
925 04:24:30.345024
926 04:24:30.349296 100bdlr_step_size ps== 420
927 04:24:30.349760 result report
928 04:24:30.354910 boot times 0Enable ddr reg access
929 04:24:30.360346 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 04:24:30.373868 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 04:24:30.947514 0.0;M3 CHK:0;cm4_sp_mode 0
932 04:24:30.947965 MVN_1=0x00000000
933 04:24:30.952983 MVN_2=0x00000000
934 04:24:30.958727 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 04:24:30.959060 OPS=0x10
936 04:24:30.959321 ring efuse init
937 04:24:30.959556 chipver efuse init
938 04:24:30.964309 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 04:24:30.969922 [0.018961 Inits done]
940 04:24:30.970247 secure task start!
941 04:24:30.970503 high task start!
942 04:24:30.974477 low task start!
943 04:24:30.974795 run into bl31
944 04:24:30.981189 NOTICE: BL31: v1.3(release):4fc40b1
945 04:24:30.989077 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 04:24:30.989461 NOTICE: BL31: G12A normal boot!
947 04:24:31.014385 NOTICE: BL31: BL33 decompress pass
948 04:24:31.020047 ERROR: Error initializing runtime service opteed_fast
949 04:24:32.253106
950 04:24:32.253748
951 04:24:32.261353 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 04:24:32.261822
953 04:24:32.262245 Model: Libre Computer AML-A311D-CC Alta
954 04:24:32.469855 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 04:24:32.493288 DRAM: 2 GiB (effective 3.8 GiB)
956 04:24:32.636233 Core: 408 devices, 31 uclasses, devicetree: separate
957 04:24:32.642033 WDT: Not starting watchdog@f0d0
958 04:24:32.674299 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 04:24:32.686768 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 04:24:32.691749 ** Bad device specification mmc 0 **
961 04:24:32.702106 Card did not respond to voltage select! : -110
962 04:24:32.709740 ** Bad device specification mmc 0 **
963 04:24:32.710230 Couldn't find partition mmc 0
964 04:24:32.718072 Card did not respond to voltage select! : -110
965 04:24:32.723592 ** Bad device specification mmc 0 **
966 04:24:32.724093 Couldn't find partition mmc 0
967 04:24:32.728660 Error: could not access storage.
968 04:24:33.071155 Net: eth0: ethernet@ff3f0000
969 04:24:33.071747 starting USB...
970 04:24:33.322865 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 04:24:33.323416 Starting the controller
972 04:24:33.329811 USB XHCI 1.10
973 04:24:34.884079 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 04:24:34.891314 scanning usb for storage devices... 0 Storage Device(s) found
976 04:24:34.942921 Hit any key to stop autoboot: 1
977 04:24:34.943750 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
978 04:24:34.944404 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
979 04:24:34.944895 Setting prompt string to ['=>']
980 04:24:34.945385 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
981 04:24:34.949696 0
982 04:24:34.950552 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 04:24:34.951065 Sending with 10 millisecond of delay
985 04:24:36.085657 => setenv autoload no
986 04:24:36.096486 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 04:24:36.101391 setenv autoload no
988 04:24:36.102120 Sending with 10 millisecond of delay
990 04:24:37.898809 => setenv initrd_high 0xffffffff
991 04:24:37.909603 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
992 04:24:37.910430 setenv initrd_high 0xffffffff
993 04:24:37.911140 Sending with 10 millisecond of delay
995 04:24:39.527179 => setenv fdt_high 0xffffffff
996 04:24:39.537974 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 04:24:39.538797 setenv fdt_high 0xffffffff
998 04:24:39.539517 Sending with 10 millisecond of delay
1000 04:24:39.831334 => dhcp
1001 04:24:39.842059 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
1002 04:24:39.842850 dhcp
1003 04:24:39.843289 Speed: 1000, full duplex
1004 04:24:39.843703 BOOTP broadcast 1
1005 04:24:39.862383 DHCP client bound to address 192.168.6.27 (20 ms)
1006 04:24:39.863128 Sending with 10 millisecond of delay
1008 04:24:41.539559 => setenv serverip 192.168.6.2
1009 04:24:41.551463 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1010 04:24:41.552488 setenv serverip 192.168.6.2
1011 04:24:41.553275 Sending with 10 millisecond of delay
1013 04:24:45.278123 => tftpboot 0x01080000 957668/tftp-deploy-l6k0qe4c/kernel/uImage
1014 04:24:45.288981 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 04:24:45.289867 tftpboot 0x01080000 957668/tftp-deploy-l6k0qe4c/kernel/uImage
1016 04:24:45.290369 Speed: 1000, full duplex
1017 04:24:45.290833 Using ethernet@ff3f0000 device
1018 04:24:45.291624 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 04:24:45.297150 Filename '957668/tftp-deploy-l6k0qe4c/kernel/uImage'.
1020 04:24:45.301061 Load address: 0x1080000
1021 04:24:48.176202 Loading: *################################################## 43.6 MiB
1022 04:24:48.176871 15.2 MiB/s
1023 04:24:48.177355 done
1024 04:24:48.180694 Bytes transferred = 45713984 (2b98a40 hex)
1025 04:24:48.181551 Sending with 10 millisecond of delay
1027 04:24:52.868538 => tftpboot 0x08000000 957668/tftp-deploy-l6k0qe4c/ramdisk/ramdisk.cpio.gz.uboot
1028 04:24:52.879421 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1029 04:24:52.880331 tftpboot 0x08000000 957668/tftp-deploy-l6k0qe4c/ramdisk/ramdisk.cpio.gz.uboot
1030 04:24:52.880833 Speed: 1000, full duplex
1031 04:24:52.881299 Using ethernet@ff3f0000 device
1032 04:24:52.882267 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 04:24:52.893957 Filename '957668/tftp-deploy-l6k0qe4c/ramdisk/ramdisk.cpio.gz.uboot'.
1034 04:24:52.894465 Load address: 0x8000000
1035 04:24:59.377074 Loading: *##################T ############################### UDP wrong checksum 00000005 00004545
1036 04:25:02.863667 UDP wrong checksum 000000ff 0000d109
1037 04:25:02.934406 UDP wrong checksum 000000ff 000061fc
1038 04:25:04.378986 T UDP wrong checksum 00000005 00004545
1039 04:25:14.381087 T T UDP wrong checksum 00000005 00004545
1040 04:25:34.385130 T T T T UDP wrong checksum 00000005 00004545
1041 04:25:49.389266 T T
1042 04:25:49.389955 Retry count exceeded; starting again
1044 04:25:49.391536 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1047 04:25:49.393669 end: 2.4 uboot-commands (duration 00:01:46) [common]
1049 04:25:49.395215 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1051 04:25:49.396360 end: 2 uboot-action (duration 00:01:46) [common]
1053 04:25:49.398025 Cleaning after the job
1054 04:25:49.398615 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/ramdisk
1055 04:25:49.400245 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/kernel
1056 04:25:49.448002 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/dtb
1057 04:25:49.448769 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/nfsrootfs
1058 04:25:49.629375 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957668/tftp-deploy-l6k0qe4c/modules
1059 04:25:49.651283 start: 4.1 power-off (timeout 00:00:30) [common]
1060 04:25:49.651930 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1061 04:25:49.685773 >> OK - accepted request
1062 04:25:49.688305 Returned 0 in 0 seconds
1063 04:25:49.789049 end: 4.1 power-off (duration 00:00:00) [common]
1065 04:25:49.789941 start: 4.2 read-feedback (timeout 00:10:00) [common]
1066 04:25:49.790579 Listened to connection for namespace 'common' for up to 1s
1067 04:25:50.790503 Finalising connection for namespace 'common'
1068 04:25:50.790971 Disconnecting from shell: Finalise
1069 04:25:50.791228 =>
1070 04:25:50.891969 end: 4.2 read-feedback (duration 00:00:01) [common]
1071 04:25:50.892634 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/957668
1072 04:25:53.734094 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/957668
1073 04:25:53.734721 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.