Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:43:46.154108 lava-dispatcher, installed at version: 2024.01
2 04:43:46.154931 start: 0 validate
3 04:43:46.155384 Start time: 2024-11-08 04:43:46.155354+00:00 (UTC)
4 04:43:46.155917 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:43:46.156496 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:43:46.200705 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:43:46.201253 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-574-g603e41d0858f1%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:43:46.228787 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:43:46.229527 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-574-g603e41d0858f1%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:43:46.260596 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:43:46.261160 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:43:46.291688 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:43:46.292190 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-574-g603e41d0858f1%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:43:46.328455 validate duration: 0.17
16 04:43:46.329313 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:43:46.329675 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:43:46.330003 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:43:46.330623 Not decompressing ramdisk as can be used compressed.
20 04:43:46.331102 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 04:43:46.331399 saving as /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/ramdisk/initrd.cpio.gz
22 04:43:46.331701 total size: 5628140 (5 MB)
23 04:43:46.366368 progress 0 % (0 MB)
24 04:43:46.370356 progress 5 % (0 MB)
25 04:43:46.374438 progress 10 % (0 MB)
26 04:43:46.378075 progress 15 % (0 MB)
27 04:43:46.382102 progress 20 % (1 MB)
28 04:43:46.385771 progress 25 % (1 MB)
29 04:43:46.389778 progress 30 % (1 MB)
30 04:43:46.393817 progress 35 % (1 MB)
31 04:43:46.397422 progress 40 % (2 MB)
32 04:43:46.401423 progress 45 % (2 MB)
33 04:43:46.405046 progress 50 % (2 MB)
34 04:43:46.409041 progress 55 % (2 MB)
35 04:43:46.413124 progress 60 % (3 MB)
36 04:43:46.416781 progress 65 % (3 MB)
37 04:43:46.420830 progress 70 % (3 MB)
38 04:43:46.424480 progress 75 % (4 MB)
39 04:43:46.428426 progress 80 % (4 MB)
40 04:43:46.431973 progress 85 % (4 MB)
41 04:43:46.436071 progress 90 % (4 MB)
42 04:43:46.439894 progress 95 % (5 MB)
43 04:43:46.443190 progress 100 % (5 MB)
44 04:43:46.443858 5 MB downloaded in 0.11 s (47.87 MB/s)
45 04:43:46.444463 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:43:46.445388 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:43:46.445706 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:43:46.445998 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:43:46.446479 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/kernel/Image
51 04:43:46.446739 saving as /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/kernel/Image
52 04:43:46.446960 total size: 45713920 (43 MB)
53 04:43:46.447185 No compression specified
54 04:43:46.484209 progress 0 % (0 MB)
55 04:43:46.513269 progress 5 % (2 MB)
56 04:43:46.542929 progress 10 % (4 MB)
57 04:43:46.572484 progress 15 % (6 MB)
58 04:43:46.601699 progress 20 % (8 MB)
59 04:43:46.630969 progress 25 % (10 MB)
60 04:43:46.660073 progress 30 % (13 MB)
61 04:43:46.689647 progress 35 % (15 MB)
62 04:43:46.718822 progress 40 % (17 MB)
63 04:43:46.748166 progress 45 % (19 MB)
64 04:43:46.777569 progress 50 % (21 MB)
65 04:43:46.806991 progress 55 % (24 MB)
66 04:43:46.836685 progress 60 % (26 MB)
67 04:43:46.865268 progress 65 % (28 MB)
68 04:43:46.894402 progress 70 % (30 MB)
69 04:43:46.923561 progress 75 % (32 MB)
70 04:43:46.953314 progress 80 % (34 MB)
71 04:43:46.982074 progress 85 % (37 MB)
72 04:43:47.010889 progress 90 % (39 MB)
73 04:43:47.040425 progress 95 % (41 MB)
74 04:43:47.069116 progress 100 % (43 MB)
75 04:43:47.069640 43 MB downloaded in 0.62 s (70.02 MB/s)
76 04:43:47.070142 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:43:47.071014 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:43:47.071322 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:43:47.071615 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:43:47.072258 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 04:43:47.072571 saving as /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 04:43:47.072801 total size: 53209 (0 MB)
84 04:43:47.073026 No compression specified
85 04:43:47.110271 progress 61 % (0 MB)
86 04:43:47.111129 progress 100 % (0 MB)
87 04:43:47.111692 0 MB downloaded in 0.04 s (1.31 MB/s)
88 04:43:47.112232 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:43:47.113092 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:43:47.113371 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:43:47.113652 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:43:47.114108 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 04:43:47.114365 saving as /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/nfsrootfs/full.rootfs.tar
95 04:43:47.114584 total size: 474398908 (452 MB)
96 04:43:47.114804 Using unxz to decompress xz
97 04:43:47.149070 progress 0 % (0 MB)
98 04:43:48.250932 progress 5 % (22 MB)
99 04:43:49.694934 progress 10 % (45 MB)
100 04:43:50.127353 progress 15 % (67 MB)
101 04:43:50.932871 progress 20 % (90 MB)
102 04:43:51.467757 progress 25 % (113 MB)
103 04:43:51.838488 progress 30 % (135 MB)
104 04:43:52.439748 progress 35 % (158 MB)
105 04:43:53.351254 progress 40 % (181 MB)
106 04:43:54.221630 progress 45 % (203 MB)
107 04:43:54.971825 progress 50 % (226 MB)
108 04:43:55.723487 progress 55 % (248 MB)
109 04:43:56.910370 progress 60 % (271 MB)
110 04:43:58.390008 progress 65 % (294 MB)
111 04:44:00.034683 progress 70 % (316 MB)
112 04:44:03.121749 progress 75 % (339 MB)
113 04:44:05.542049 progress 80 % (361 MB)
114 04:44:08.401377 progress 85 % (384 MB)
115 04:44:11.550138 progress 90 % (407 MB)
116 04:44:14.725363 progress 95 % (429 MB)
117 04:44:17.895315 progress 100 % (452 MB)
118 04:44:17.908213 452 MB downloaded in 30.79 s (14.69 MB/s)
119 04:44:17.909160 end: 1.4.1 http-download (duration 00:00:31) [common]
121 04:44:17.910955 end: 1.4 download-retry (duration 00:00:31) [common]
122 04:44:17.911545 start: 1.5 download-retry (timeout 00:09:28) [common]
123 04:44:17.912172 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 04:44:17.913147 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-574-g603e41d0858f1/arm64/defconfig/gcc-12/modules.tar.xz
125 04:44:17.913667 saving as /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/modules/modules.tar
126 04:44:17.914132 total size: 11610020 (11 MB)
127 04:44:17.914604 Using unxz to decompress xz
128 04:44:17.953605 progress 0 % (0 MB)
129 04:44:18.019658 progress 5 % (0 MB)
130 04:44:18.093196 progress 10 % (1 MB)
131 04:44:18.188770 progress 15 % (1 MB)
132 04:44:18.280450 progress 20 % (2 MB)
133 04:44:18.358852 progress 25 % (2 MB)
134 04:44:18.436740 progress 30 % (3 MB)
135 04:44:18.515285 progress 35 % (3 MB)
136 04:44:18.587886 progress 40 % (4 MB)
137 04:44:18.665064 progress 45 % (5 MB)
138 04:44:18.749941 progress 50 % (5 MB)
139 04:44:18.826459 progress 55 % (6 MB)
140 04:44:18.910716 progress 60 % (6 MB)
141 04:44:18.990544 progress 65 % (7 MB)
142 04:44:19.070466 progress 70 % (7 MB)
143 04:44:19.148630 progress 75 % (8 MB)
144 04:44:19.234195 progress 80 % (8 MB)
145 04:44:19.313467 progress 85 % (9 MB)
146 04:44:19.391318 progress 90 % (9 MB)
147 04:44:19.468783 progress 95 % (10 MB)
148 04:44:19.550213 progress 100 % (11 MB)
149 04:44:19.561615 11 MB downloaded in 1.65 s (6.72 MB/s)
150 04:44:19.562261 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:44:19.563118 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:44:19.563399 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 04:44:19.563675 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 04:44:34.810013 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/957577/extract-nfsrootfs-ziga93c1
156 04:44:34.810636 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 04:44:34.810929 start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
158 04:44:34.811622 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65
159 04:44:34.812101 makedir: /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin
160 04:44:34.812444 makedir: /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/tests
161 04:44:34.812837 makedir: /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/results
162 04:44:34.813178 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-add-keys
163 04:44:34.813702 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-add-sources
164 04:44:34.814210 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-background-process-start
165 04:44:34.814729 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-background-process-stop
166 04:44:34.815292 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-common-functions
167 04:44:34.815802 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-echo-ipv4
168 04:44:34.816329 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-install-packages
169 04:44:34.816836 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-installed-packages
170 04:44:34.817341 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-os-build
171 04:44:34.817870 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-probe-channel
172 04:44:34.818358 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-probe-ip
173 04:44:34.818834 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-target-ip
174 04:44:34.819337 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-target-mac
175 04:44:34.819851 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-target-storage
176 04:44:34.820385 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-test-case
177 04:44:34.820873 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-test-event
178 04:44:34.821373 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-test-feedback
179 04:44:34.821858 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-test-raise
180 04:44:34.822332 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-test-reference
181 04:44:34.822811 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-test-runner
182 04:44:34.823291 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-test-set
183 04:44:34.823793 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-test-shell
184 04:44:34.824331 Updating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-install-packages (oe)
185 04:44:34.824881 Updating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/bin/lava-installed-packages (oe)
186 04:44:34.825334 Creating /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/environment
187 04:44:34.825716 LAVA metadata
188 04:44:34.825976 - LAVA_JOB_ID=957577
189 04:44:34.826191 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:44:34.826556 start: 1.6.2.1 ssh-authorize (timeout 00:09:12) [common]
191 04:44:34.827517 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:44:34.827831 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:12) [common]
193 04:44:34.828068 skipped lava-vland-overlay
194 04:44:34.828319 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:44:34.828576 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:12) [common]
196 04:44:34.828796 skipped lava-multinode-overlay
197 04:44:34.829040 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:44:34.829293 start: 1.6.2.4 test-definition (timeout 00:09:12) [common]
199 04:44:34.829543 Loading test definitions
200 04:44:34.829821 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 04:44:34.830042 Using /lava-957577 at stage 0
202 04:44:34.831248 uuid=957577_1.6.2.4.1 testdef=None
203 04:44:34.831557 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:44:34.831822 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 04:44:34.833593 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:44:34.834391 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 04:44:34.836582 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:44:34.837424 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 04:44:34.839504 runner path: /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 957577_1.6.2.4.1
212 04:44:34.840095 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:44:34.840872 Creating lava-test-runner.conf files
215 04:44:34.841076 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/957577/lava-overlay-kc7x3t65/lava-957577/0 for stage 0
216 04:44:34.841422 - 0_v4l2-decoder-conformance-h264
217 04:44:34.841772 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:44:34.842048 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 04:44:34.864413 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:44:34.864849 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 04:44:34.865112 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:44:34.865381 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:44:34.865648 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 04:44:35.487307 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:44:35.487782 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 04:44:35.488070 extracting modules file /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957577/extract-nfsrootfs-ziga93c1
227 04:44:36.849883 extracting modules file /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957577/extract-overlay-ramdisk-w1cj_nkk/ramdisk
228 04:44:38.235681 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:44:38.236199 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 04:44:38.236478 [common] Applying overlay to NFS
231 04:44:38.236692 [common] Applying overlay /var/lib/lava/dispatcher/tmp/957577/compress-overlay-x92_wg3i/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/957577/extract-nfsrootfs-ziga93c1
232 04:44:38.265390 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:44:38.265751 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 04:44:38.266025 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 04:44:38.266254 Converting downloaded kernel to a uImage
236 04:44:38.266561 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/kernel/Image /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/kernel/uImage
237 04:44:38.756403 output: Image Name:
238 04:44:38.756824 output: Created: Fri Nov 8 04:44:38 2024
239 04:44:38.757054 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:44:38.757271 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 04:44:38.757480 output: Load Address: 01080000
242 04:44:38.757684 output: Entry Point: 01080000
243 04:44:38.757888 output:
244 04:44:38.758231 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 04:44:38.758511 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 04:44:38.758791 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 04:44:38.759060 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:44:38.759331 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 04:44:38.759596 Building ramdisk /var/lib/lava/dispatcher/tmp/957577/extract-overlay-ramdisk-w1cj_nkk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/957577/extract-overlay-ramdisk-w1cj_nkk/ramdisk
250 04:44:40.894570 >> 166825 blocks
251 04:44:48.571033 Adding RAMdisk u-boot header.
252 04:44:48.571485 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/957577/extract-overlay-ramdisk-w1cj_nkk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/957577/extract-overlay-ramdisk-w1cj_nkk/ramdisk.cpio.gz.uboot
253 04:44:48.811585 output: Image Name:
254 04:44:48.812106 output: Created: Fri Nov 8 04:44:48 2024
255 04:44:48.812634 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:44:48.813044 output: Data Size: 23433607 Bytes = 22884.38 KiB = 22.35 MiB
257 04:44:48.813444 output: Load Address: 00000000
258 04:44:48.813839 output: Entry Point: 00000000
259 04:44:48.814234 output:
260 04:44:48.815297 rename /var/lib/lava/dispatcher/tmp/957577/extract-overlay-ramdisk-w1cj_nkk/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/ramdisk/ramdisk.cpio.gz.uboot
261 04:44:48.816048 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:44:48.816604 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 04:44:48.817162 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:58) [common]
264 04:44:48.817629 No LXC device requested
265 04:44:48.818127 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:44:48.818635 start: 1.8 deploy-device-env (timeout 00:08:58) [common]
267 04:44:48.819132 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:44:48.819543 Checking files for TFTP limit of 4294967296 bytes.
269 04:44:48.822221 end: 1 tftp-deploy (duration 00:01:02) [common]
270 04:44:48.822802 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:44:48.823327 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:44:48.823827 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:44:48.824449 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:44:48.824989 Using kernel file from prepare-kernel: 957577/tftp-deploy-qbfl76av/kernel/uImage
275 04:44:48.825619 substitutions:
276 04:44:48.826025 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:44:48.826426 - {DTB_ADDR}: 0x01070000
278 04:44:48.826821 - {DTB}: 957577/tftp-deploy-qbfl76av/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 04:44:48.827219 - {INITRD}: 957577/tftp-deploy-qbfl76av/ramdisk/ramdisk.cpio.gz.uboot
280 04:44:48.827615 - {KERNEL_ADDR}: 0x01080000
281 04:44:48.828027 - {KERNEL}: 957577/tftp-deploy-qbfl76av/kernel/uImage
282 04:44:48.828427 - {LAVA_MAC}: None
283 04:44:48.828854 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/957577/extract-nfsrootfs-ziga93c1
284 04:44:48.829249 - {NFS_SERVER_IP}: 192.168.6.2
285 04:44:48.829642 - {PRESEED_CONFIG}: None
286 04:44:48.830030 - {PRESEED_LOCAL}: None
287 04:44:48.830418 - {RAMDISK_ADDR}: 0x08000000
288 04:44:48.830805 - {RAMDISK}: 957577/tftp-deploy-qbfl76av/ramdisk/ramdisk.cpio.gz.uboot
289 04:44:48.831192 - {ROOT_PART}: None
290 04:44:48.831577 - {ROOT}: None
291 04:44:48.831961 - {SERVER_IP}: 192.168.6.2
292 04:44:48.832377 - {TEE_ADDR}: 0x83000000
293 04:44:48.832766 - {TEE}: None
294 04:44:48.833150 Parsed boot commands:
295 04:44:48.833529 - setenv autoload no
296 04:44:48.833916 - setenv initrd_high 0xffffffff
297 04:44:48.834298 - setenv fdt_high 0xffffffff
298 04:44:48.834679 - dhcp
299 04:44:48.835063 - setenv serverip 192.168.6.2
300 04:44:48.835445 - tftpboot 0x01080000 957577/tftp-deploy-qbfl76av/kernel/uImage
301 04:44:48.835830 - tftpboot 0x08000000 957577/tftp-deploy-qbfl76av/ramdisk/ramdisk.cpio.gz.uboot
302 04:44:48.836245 - tftpboot 0x01070000 957577/tftp-deploy-qbfl76av/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 04:44:48.836637 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/957577/extract-nfsrootfs-ziga93c1,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:44:48.837035 - bootm 0x01080000 0x08000000 0x01070000
305 04:44:48.837520 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:44:48.838995 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:44:48.839413 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 04:44:48.854675 Setting prompt string to ['lava-test: # ']
310 04:44:48.856199 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:44:48.856819 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:44:48.857373 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:44:48.857902 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:44:48.859058 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 04:44:48.897070 >> OK - accepted request
316 04:44:48.899177 Returned 0 in 0 seconds
317 04:44:49.000297 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:44:49.001901 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:44:49.002464 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:44:49.002991 Setting prompt string to ['Hit any key to stop autoboot']
322 04:44:49.003449 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:44:49.005021 Trying 192.168.56.21...
324 04:44:49.005510 Connected to conserv1.
325 04:44:49.005929 Escape character is '^]'.
326 04:44:49.006342
327 04:44:49.006755 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 04:44:49.007159
329 04:44:56.206107 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 04:44:56.206741 bl2_stage_init 0x01
331 04:44:56.207153 bl2_stage_init 0x81
332 04:44:56.211740 hw id: 0x0000 - pwm id 0x01
333 04:44:56.212225 bl2_stage_init 0xc1
334 04:44:56.215256 bl2_stage_init 0x02
335 04:44:56.215683
336 04:44:56.216117 L0:00000000
337 04:44:56.216525 L1:00000703
338 04:44:56.220830 L2:00008067
339 04:44:56.221251 L3:15000000
340 04:44:56.221653 S1:00000000
341 04:44:56.222049 B2:20282000
342 04:44:56.222442 B1:a0f83180
343 04:44:56.222831
344 04:44:56.226421 TE: 71150
345 04:44:56.226844
346 04:44:56.231922 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 04:44:56.232370
348 04:44:56.232763 Board ID = 1
349 04:44:56.233152 Set cpu clk to 24M
350 04:44:56.235465 Set clk81 to 24M
351 04:44:56.235880 Use GP1_pll as DSU clk.
352 04:44:56.241030 DSU clk: 1200 Mhz
353 04:44:56.241453 CPU clk: 1200 MHz
354 04:44:56.241841 Set clk81 to 166.6M
355 04:44:56.246639 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 04:44:56.252138 board id: 1
357 04:44:56.256066 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:44:56.268917 fw parse done
359 04:44:56.274921 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:44:56.318054 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:44:56.329066 PIEI prepare done
362 04:44:56.329484 fastboot data load
363 04:44:56.329877 fastboot data verify
364 04:44:56.334657 verify result: 266
365 04:44:56.340250 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 04:44:56.340702 LPDDR4 probe
367 04:44:56.341106 ddr clk to 1584MHz
368 04:44:56.348345 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:44:56.386002
370 04:44:56.386432 dmc_version 0001
371 04:44:56.393020 Check phy result
372 04:44:56.399003 INFO : End of CA training
373 04:44:56.399422 INFO : End of initialization
374 04:44:56.404664 INFO : Training has run successfully!
375 04:44:56.405087 Check phy result
376 04:44:56.410213 INFO : End of initialization
377 04:44:56.410628 INFO : End of read enable training
378 04:44:56.415873 INFO : End of fine write leveling
379 04:44:56.421441 INFO : End of Write leveling coarse delay
380 04:44:56.421860 INFO : Training has run successfully!
381 04:44:56.422253 Check phy result
382 04:44:56.427024 INFO : End of initialization
383 04:44:56.427436 INFO : End of read dq deskew training
384 04:44:56.432631 INFO : End of MPR read delay center optimization
385 04:44:56.438185 INFO : End of write delay center optimization
386 04:44:56.443794 INFO : End of read delay center optimization
387 04:44:56.444252 INFO : End of max read latency training
388 04:44:56.449549 INFO : Training has run successfully!
389 04:44:56.449965 1D training succeed
390 04:44:56.458670 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:44:56.506956 Check phy result
392 04:44:56.507390 INFO : End of initialization
393 04:44:56.534371 INFO : End of 2D read delay Voltage center optimization
394 04:44:56.558556 INFO : End of 2D read delay Voltage center optimization
395 04:44:56.615227 INFO : End of 2D write delay Voltage center optimization
396 04:44:56.669246 INFO : End of 2D write delay Voltage center optimization
397 04:44:56.674755 INFO : Training has run successfully!
398 04:44:56.675169
399 04:44:56.675577 channel==0
400 04:44:56.680323 RxClkDly_Margin_A0==78 ps 8
401 04:44:56.680734 TxDqDly_Margin_A0==98 ps 10
402 04:44:56.683758 RxClkDly_Margin_A1==88 ps 9
403 04:44:56.684215 TxDqDly_Margin_A1==98 ps 10
404 04:44:56.689256 TrainedVREFDQ_A0==74
405 04:44:56.689671 TrainedVREFDQ_A1==74
406 04:44:56.694881 VrefDac_Margin_A0==23
407 04:44:56.695294 DeviceVref_Margin_A0==40
408 04:44:56.695681 VrefDac_Margin_A1==23
409 04:44:56.700480 DeviceVref_Margin_A1==40
410 04:44:56.700892
411 04:44:56.701283
412 04:44:56.701672 channel==1
413 04:44:56.702058 RxClkDly_Margin_A0==78 ps 8
414 04:44:56.705964 TxDqDly_Margin_A0==98 ps 10
415 04:44:56.706376 RxClkDly_Margin_A1==78 ps 8
416 04:44:56.711729 TxDqDly_Margin_A1==88 ps 9
417 04:44:56.712168 TrainedVREFDQ_A0==78
418 04:44:56.712558 TrainedVREFDQ_A1==78
419 04:44:56.717256 VrefDac_Margin_A0==22
420 04:44:56.717669 DeviceVref_Margin_A0==36
421 04:44:56.722788 VrefDac_Margin_A1==22
422 04:44:56.723196 DeviceVref_Margin_A1==36
423 04:44:56.723580
424 04:44:56.728462 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:44:56.728880
426 04:44:56.756438 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 04:44:56.762058 2D training succeed
428 04:44:56.767524 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:44:56.767944 auto size-- 65535DDR cs0 size: 2048MB
430 04:44:56.773090 DDR cs1 size: 2048MB
431 04:44:56.773506 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:44:56.778672 cs0 DataBus test pass
433 04:44:56.779082 cs1 DataBus test pass
434 04:44:56.779472 cs0 AddrBus test pass
435 04:44:56.784314 cs1 AddrBus test pass
436 04:44:56.784724
437 04:44:56.785110 100bdlr_step_size ps== 471
438 04:44:56.785498 result report
439 04:44:56.789891 boot times 0Enable ddr reg access
440 04:44:56.797539 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:44:56.811377 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 04:44:57.470812 bl2z: ptr: 05129330, size: 00001e40
443 04:44:57.477233 0.0;M3 CHK:0;cm4_sp_mode 0
444 04:44:57.477667 MVN_1=0x00000000
445 04:44:57.478059 MVN_2=0x00000000
446 04:44:57.489030 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 04:44:57.489450 OPS=0x04
448 04:44:57.489842 ring efuse init
449 04:44:57.491823 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 04:44:57.497732 [0.017354 Inits done]
451 04:44:57.498153 secure task start!
452 04:44:57.498540 high task start!
453 04:44:57.498923 low task start!
454 04:44:57.502010 run into bl31
455 04:44:57.510631 NOTICE: BL31: v1.3(release):4fc40b1
456 04:44:57.518430 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 04:44:57.518870 NOTICE: BL31: G12A normal boot!
458 04:44:57.534129 NOTICE: BL31: BL33 decompress pass
459 04:44:57.539833 ERROR: Error initializing runtime service opteed_fast
460 04:44:58.757410 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 04:44:58.758055 bl2_stage_init 0x01
462 04:44:58.758529 bl2_stage_init 0x81
463 04:44:58.762831 hw id: 0x0000 - pwm id 0x01
464 04:44:58.763350 bl2_stage_init 0xc1
465 04:44:58.768386 bl2_stage_init 0x02
466 04:44:58.768895
467 04:44:58.769325 L0:00000000
468 04:44:58.769736 L1:00000703
469 04:44:58.770148 L2:00008067
470 04:44:58.770550 L3:15000000
471 04:44:58.774011 S1:00000000
472 04:44:58.774482 B2:20282000
473 04:44:58.774888 B1:a0f83180
474 04:44:58.775291
475 04:44:58.775692 TE: 70865
476 04:44:58.776133
477 04:44:58.779577 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 04:44:58.780060
479 04:44:58.785180 Board ID = 1
480 04:44:58.785651 Set cpu clk to 24M
481 04:44:58.786067 Set clk81 to 24M
482 04:44:58.790789 Use GP1_pll as DSU clk.
483 04:44:58.791264 DSU clk: 1200 Mhz
484 04:44:58.791681 CPU clk: 1200 MHz
485 04:44:58.796378 Set clk81 to 166.6M
486 04:44:58.801991 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 04:44:58.802468 board id: 1
488 04:44:58.809136 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 04:44:58.820082 fw parse done
490 04:44:58.826122 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 04:44:58.869166 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 04:44:58.880265 PIEI prepare done
493 04:44:58.880775 fastboot data load
494 04:44:58.881192 fastboot data verify
495 04:44:58.885921 verify result: 266
496 04:44:58.893236 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 04:44:58.893763 LPDDR4 probe
498 04:44:58.894193 ddr clk to 1584MHz
499 04:45:00.253389 Load ddrfw SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 04:45:00.253962 bl2_stage_init 0x01
501 04:45:00.254387 bl2_stage_init 0x81
502 04:45:00.258960 hw id: 0x0000 - pwm id 0x01
503 04:45:00.259426 bl2_stage_init 0xc1
504 04:45:00.264585 bl2_stage_init 0x02
505 04:45:00.265076
506 04:45:00.265467 L0:00000000
507 04:45:00.265851 L1:00000703
508 04:45:00.266230 L2:00008067
509 04:45:00.266611 L3:15000000
510 04:45:00.270207 S1:00000000
511 04:45:00.270629 B2:20282000
512 04:45:00.271015 B1:a0f83180
513 04:45:00.271393
514 04:45:00.271777 TE: 68681
515 04:45:00.272216
516 04:45:00.275743 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 04:45:00.276198
518 04:45:00.281327 Board ID = 1
519 04:45:00.281738 Set cpu clk to 24M
520 04:45:00.282121 Set clk81 to 24M
521 04:45:00.286909 Use GP1_pll as DSU clk.
522 04:45:00.287323 DSU clk: 1200 Mhz
523 04:45:00.287704 CPU clk: 1200 MHz
524 04:45:00.292526 Set clk81 to 166.6M
525 04:45:00.298127 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 04:45:00.298539 board id: 1
527 04:45:00.305326 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 04:45:00.316240 fw parse done
529 04:45:00.322197 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 04:45:00.365345 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 04:45:00.376461 PIEI prepare done
532 04:45:00.376880 fastboot data load
533 04:45:00.377272 fastboot data verify
534 04:45:00.382043 verify result: 266
535 04:45:00.387617 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 04:45:00.388076 LPDDR4 probe
537 04:45:00.388467 ddr clk to 1584MHz
538 04:45:00.395596 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 04:45:00.433361
540 04:45:00.433851 dmc_version 0001
541 04:45:00.440364 Check phy result
542 04:45:00.446357 INFO : End of CA training
543 04:45:00.446803 INFO : End of initialization
544 04:45:00.451937 INFO : Training has run successfully!
545 04:45:00.452400 Check phy result
546 04:45:00.457551 INFO : End of initialization
547 04:45:00.457982 INFO : End of read enable training
548 04:45:00.463148 INFO : End of fine write leveling
549 04:45:00.468746 INFO : End of Write leveling coarse delay
550 04:45:00.469172 INFO : Training has run successfully!
551 04:45:00.469579 Check phy result
552 04:45:00.474347 INFO : End of initialization
553 04:45:00.474776 INFO : End of read dq deskew training
554 04:45:00.479929 INFO : End of MPR read delay center optimization
555 04:45:00.485520 INFO : End of write delay center optimization
556 04:45:00.491235 INFO : End of read delay center optimization
557 04:45:00.491659 INFO : End of max read latency training
558 04:45:00.496750 INFO : Training has run successfully!
559 04:45:00.497178 1D training succeed
560 04:45:00.505901 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 04:45:00.554295 Check phy result
562 04:45:00.554768 INFO : End of initialization
563 04:45:00.581617 INFO : End of 2D read delay Voltage center optimization
564 04:45:00.605611 INFO : End of 2D read delay Voltage center optimization
565 04:45:00.662320 INFO : End of 2D write delay Voltage center optimization
566 04:45:00.716294 INFO : End of 2D write delay Voltage center optimization
567 04:45:00.721871 INFO : Training has run successfully!
568 04:45:00.722293
569 04:45:00.722700 channel==0
570 04:45:00.727471 RxClkDly_Margin_A0==78 ps 8
571 04:45:00.727893 TxDqDly_Margin_A0==98 ps 10
572 04:45:00.733072 RxClkDly_Margin_A1==78 ps 8
573 04:45:00.733499 TxDqDly_Margin_A1==88 ps 9
574 04:45:00.733904 TrainedVREFDQ_A0==74
575 04:45:00.738666 TrainedVREFDQ_A1==75
576 04:45:00.739090 VrefDac_Margin_A0==24
577 04:45:00.739492 DeviceVref_Margin_A0==40
578 04:45:00.744270 VrefDac_Margin_A1==23
579 04:45:00.744694 DeviceVref_Margin_A1==39
580 04:45:00.745093
581 04:45:00.745495
582 04:45:00.745890 channel==1
583 04:45:00.749857 RxClkDly_Margin_A0==78 ps 8
584 04:45:00.750275 TxDqDly_Margin_A0==98 ps 10
585 04:45:00.755439 RxClkDly_Margin_A1==78 ps 8
586 04:45:00.755863 TxDqDly_Margin_A1==88 ps 9
587 04:45:00.761060 TrainedVREFDQ_A0==78
588 04:45:00.761507 TrainedVREFDQ_A1==75
589 04:45:00.761920 VrefDac_Margin_A0==22
590 04:45:00.766669 DeviceVref_Margin_A0==36
591 04:45:00.767098 VrefDac_Margin_A1==22
592 04:45:00.772264 DeviceVref_Margin_A1==39
593 04:45:00.772690
594 04:45:00.773092 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 04:45:00.773493
596 04:45:00.805866 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
597 04:45:00.806328 2D training succeed
598 04:45:00.811443 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 04:45:00.817074 auto size-- 65535DDR cs0 size: 2048MB
600 04:45:00.817506 DDR cs1 size: 2048MB
601 04:45:00.822661 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 04:45:00.823087 cs0 DataBus test pass
603 04:45:00.828261 cs1 DataBus test pass
604 04:45:00.828691 cs0 AddrBus test pass
605 04:45:00.829089 cs1 AddrBus test pass
606 04:45:00.829481
607 04:45:00.833864 100bdlr_step_size ps== 471
608 04:45:00.834300 result report
609 04:45:00.839462 boot times 0Enable ddr reg access
610 04:45:00.844641 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 04:45:00.858492 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 04:45:01.517654 bl2z: ptr: 05129330, size: 00001e40
613 04:45:01.527370 0.0;M3 CHK:0;cm4_sp_mode 0
614 04:45:01.527845 MVN_1=0x00000000
615 04:45:01.528340 MVN_2=0x00000000
616 04:45:01.538821 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 04:45:01.539284 OPS=0x04
618 04:45:01.539696 ring efuse init
619 04:45:01.544441 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 04:45:01.544902 [0.017354 Inits done]
621 04:45:01.545304 secure task start!
622 04:45:01.552026 high task start!
623 04:45:01.552479 low task start!
624 04:45:01.552883 run into bl31
625 04:45:01.560576 NOTICE: BL31: v1.3(release):4fc40b1
626 04:45:01.568391 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 04:45:01.568835 NOTICE: BL31: G12A normal boot!
628 04:45:01.584023 NOTICE: BL31: BL33 decompress pass
629 04:45:01.589571 ERROR: Error initializing runtime service opteed_fast
630 04:45:02.955887 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 04:45:02.956531 bl2_stage_init 0x01
632 04:45:02.956948 bl2_stage_init 0x81
633 04:45:02.961447 hw id: 0x0000 - pwm id 0x01
634 04:45:02.961938 bl2_stage_init 0xc1
635 04:45:02.966135 bl2_stage_init 0x02
636 04:45:02.966588
637 04:45:02.966999 L0:00000000
638 04:45:02.967392 L1:00000703
639 04:45:02.967783 L2:00008067
640 04:45:02.971619 L3:15000000
641 04:45:02.972082 S1:00000000
642 04:45:02.972486 B2:20282000
643 04:45:02.972876 B1:a0f83180
644 04:45:02.973263
645 04:45:02.973654 TE: 69200
646 04:45:02.974044
647 04:45:02.982933 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 04:45:02.983427
649 04:45:02.983834 Board ID = 1
650 04:45:02.984262 Set cpu clk to 24M
651 04:45:02.984658 Set clk81 to 24M
652 04:45:02.986221 Use GP1_pll as DSU clk.
653 04:45:02.986655 DSU clk: 1200 Mhz
654 04:45:02.992025 CPU clk: 1200 MHz
655 04:45:02.992505 Set clk81 to 166.6M
656 04:45:02.997380 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 04:45:02.997837 board id: 1
658 04:45:03.006555 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 04:45:03.018355 fw parse done
660 04:45:03.024293 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 04:45:03.066903 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 04:45:03.077838 PIEI prepare done
663 04:45:03.078287 fastboot data load
664 04:45:03.078698 fastboot data verify
665 04:45:03.083372 verify result: 266
666 04:45:03.088977 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 04:45:03.089422 LPDDR4 probe
668 04:45:03.089824 ddr clk to 1584MHz
669 04:45:03.096969 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 04:45:03.134269
671 04:45:03.134729 dmc_version 0001
672 04:45:03.140888 Check phy result
673 04:45:03.146777 INFO : End of CA training
674 04:45:03.147214 INFO : End of initialization
675 04:45:03.152387 INFO : Training has run successfully!
676 04:45:03.152817 Check phy result
677 04:45:03.158019 INFO : End of initialization
678 04:45:03.158446 INFO : End of read enable training
679 04:45:03.163663 INFO : End of fine write leveling
680 04:45:03.169211 INFO : End of Write leveling coarse delay
681 04:45:03.169654 INFO : Training has run successfully!
682 04:45:03.170058 Check phy result
683 04:45:03.174825 INFO : End of initialization
684 04:45:03.175263 INFO : End of read dq deskew training
685 04:45:03.180409 INFO : End of MPR read delay center optimization
686 04:45:03.185986 INFO : End of write delay center optimization
687 04:45:03.191611 INFO : End of read delay center optimization
688 04:45:03.192086 INFO : End of max read latency training
689 04:45:03.197202 INFO : Training has run successfully!
690 04:45:03.197643 1D training succeed
691 04:45:03.206385 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 04:45:03.254161 Check phy result
693 04:45:03.254621 INFO : End of initialization
694 04:45:03.276526 INFO : End of 2D read delay Voltage center optimization
695 04:45:03.295695 INFO : End of 2D read delay Voltage center optimization
696 04:45:03.347483 INFO : End of 2D write delay Voltage center optimization
697 04:45:03.396792 INFO : End of 2D write delay Voltage center optimization
698 04:45:03.402270 INFO : Training has run successfully!
699 04:45:03.402697
700 04:45:03.403106 channel==0
701 04:45:03.407844 RxClkDly_Margin_A0==78 ps 8
702 04:45:03.408313 TxDqDly_Margin_A0==88 ps 9
703 04:45:03.413582 RxClkDly_Margin_A1==88 ps 9
704 04:45:03.414046 TxDqDly_Margin_A1==88 ps 9
705 04:45:03.414459 TrainedVREFDQ_A0==74
706 04:45:03.419074 TrainedVREFDQ_A1==74
707 04:45:03.419516 VrefDac_Margin_A0==24
708 04:45:03.419918 DeviceVref_Margin_A0==40
709 04:45:03.424736 VrefDac_Margin_A1==22
710 04:45:03.425161 DeviceVref_Margin_A1==40
711 04:45:03.425562
712 04:45:03.425960
713 04:45:03.426355 channel==1
714 04:45:03.430260 RxClkDly_Margin_A0==88 ps 9
715 04:45:03.430685 TxDqDly_Margin_A0==98 ps 10
716 04:45:03.435866 RxClkDly_Margin_A1==78 ps 8
717 04:45:03.436322 TxDqDly_Margin_A1==88 ps 9
718 04:45:03.441395 TrainedVREFDQ_A0==78
719 04:45:03.441819 TrainedVREFDQ_A1==75
720 04:45:03.442222 VrefDac_Margin_A0==22
721 04:45:03.447059 DeviceVref_Margin_A0==36
722 04:45:03.447479 VrefDac_Margin_A1==22
723 04:45:03.447877 DeviceVref_Margin_A1==39
724 04:45:03.452732
725 04:45:03.453156 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 04:45:03.453555
727 04:45:03.486225 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
728 04:45:03.486680 2D training succeed
729 04:45:03.491953 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 04:45:03.497285 auto size-- 65535DDR cs0 size: 2048MB
731 04:45:03.497709 DDR cs1 size: 2048MB
732 04:45:03.502921 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 04:45:03.503356 cs0 DataBus test pass
734 04:45:03.508565 cs1 DataBus test pass
735 04:45:03.509002 cs0 AddrBus test pass
736 04:45:03.509403 cs1 AddrBus test pass
737 04:45:03.509799
738 04:45:03.514074 100bdlr_step_size ps== 478
739 04:45:03.514511 result report
740 04:45:03.519672 boot times 0Enable ddr reg access
741 04:45:03.524770 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 04:45:03.538636 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 04:45:04.193735 bl2z: ptr: 05129330, size: 00001e40
744 04:45:04.201762 0.0;M3 CHK:0;cm4_sp_mode 0
745 04:45:04.202338 MVN_1=0x00000000
746 04:45:04.202754 MVN_2=0x00000000
747 04:45:04.214480 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 04:45:04.214970 OPS=0x04
749 04:45:04.215309 ring efuse init
750 04:45:04.218949 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 04:45:04.219483 [0.017318 Inits done]
752 04:45:04.219900 secure task start!
753 04:45:04.228274 high task start!
754 04:45:04.228787 low task start!
755 04:45:04.229126 run into bl31
756 04:45:04.235518 NOTICE: BL31: v1.3(release):4fc40b1
757 04:45:04.243255 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 04:45:04.243796 NOTICE: BL31: G12A normal boot!
759 04:45:04.258731 NOTICE: BL31: BL33 decompress pass
760 04:45:04.264365 ERROR: Error initializing runtime service opteed_fast
761 04:45:05.059896
762 04:45:05.060524
763 04:45:05.065179 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 04:45:05.065632
765 04:45:05.068752 Model: Libre Computer AML-S905D3-CC Solitude
766 04:45:05.215687 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 04:45:05.231046 DRAM: 2 GiB (effective 3.8 GiB)
768 04:45:05.332059 Core: 406 devices, 33 uclasses, devicetree: separate
769 04:45:05.337933 WDT: Not starting watchdog@f0d0
770 04:45:05.363054 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 04:45:05.375263 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 04:45:05.380202 ** Bad device specification mmc 0 **
773 04:45:05.390271 Card did not respond to voltage select! : -110
774 04:45:05.397924 ** Bad device specification mmc 0 **
775 04:45:05.398388 Couldn't find partition mmc 0
776 04:45:05.406235 Card did not respond to voltage select! : -110
777 04:45:05.411750 ** Bad device specification mmc 0 **
778 04:45:05.412233 Couldn't find partition mmc 0
779 04:45:05.416866 Error: could not access storage.
780 04:45:05.713338 Net: eth0: ethernet@ff3f0000
781 04:45:05.713932 starting USB...
782 04:45:05.958007 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 04:45:05.958516 Starting the controller
784 04:45:05.964895 USB XHCI 1.10
785 04:45:07.521403 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 04:45:07.529674 scanning usb for storage devices... 0 Storage Device(s) found
788 04:45:07.581140 Hit any key to stop autoboot: 1
789 04:45:07.581996 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 04:45:07.582605 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 04:45:07.583087 Setting prompt string to ['=>']
792 04:45:07.583580 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 04:45:07.595677 0
794 04:45:07.596597 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 04:45:07.697791 => setenv autoload no
797 04:45:07.698401 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 04:45:07.703175 setenv autoload no
800 04:45:07.804619 => setenv initrd_high 0xffffffff
801 04:45:07.805211 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 04:45:07.809550 setenv initrd_high 0xffffffff
804 04:45:07.910914 => setenv fdt_high 0xffffffff
805 04:45:07.911520 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 04:45:07.915770 setenv fdt_high 0xffffffff
808 04:45:08.017195 => dhcp
809 04:45:08.017789 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 04:45:08.021772 dhcp
811 04:45:08.527414 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 04:45:08.527972 Speed: 1000, full duplex
813 04:45:08.528457 BOOTP broadcast 1
814 04:45:08.776016 BOOTP broadcast 2
815 04:45:08.787753 DHCP client bound to address 192.168.6.21 (259 ms)
817 04:45:08.889153 => setenv serverip 192.168.6.2
818 04:45:08.889762 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
819 04:45:08.894232 setenv serverip 192.168.6.2
821 04:45:08.995589 => tftpboot 0x01080000 957577/tftp-deploy-qbfl76av/kernel/uImage
822 04:45:08.996204 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
823 04:45:09.002742 tftpboot 0x01080000 957577/tftp-deploy-qbfl76av/kernel/uImage
824 04:45:09.003189 Speed: 1000, full duplex
825 04:45:09.003595 Using ethernet@ff3f0000 device
826 04:45:09.008419 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
827 04:45:09.013813 Filename '957577/tftp-deploy-qbfl76av/kernel/uImage'.
828 04:45:09.017804 Load address: 0x1080000
829 04:45:11.850163 Loading: *################################################## 43.6 MiB
830 04:45:11.850763 15.4 MiB/s
831 04:45:11.851198 done
832 04:45:11.854656 Bytes transferred = 45713984 (2b98a40 hex)
834 04:45:11.956137 => tftpboot 0x08000000 957577/tftp-deploy-qbfl76av/ramdisk/ramdisk.cpio.gz.uboot
835 04:45:11.956777 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
836 04:45:11.963450 tftpboot 0x08000000 957577/tftp-deploy-qbfl76av/ramdisk/ramdisk.cpio.gz.uboot
837 04:45:11.963882 Speed: 1000, full duplex
838 04:45:11.964320 Using ethernet@ff3f0000 device
839 04:45:11.969053 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
840 04:45:11.978969 Filename '957577/tftp-deploy-qbfl76av/ramdisk/ramdisk.cpio.gz.uboot'.
841 04:45:11.979428 Load address: 0x8000000
842 04:45:13.385777 Loading: *################################################# UDP wrong checksum 00000005 00007fd6
843 04:45:18.386964 T UDP wrong checksum 00000005 00007fd6
844 04:45:28.388936 T T UDP wrong checksum 00000005 00007fd6
845 04:45:48.392429 T T T UDP wrong checksum 00000005 00007fd6
846 04:46:08.397682 T T T T
847 04:46:08.398350 Retry count exceeded; starting again
849 04:46:08.399886 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
852 04:46:08.402040 end: 2.4 uboot-commands (duration 00:01:20) [common]
854 04:46:08.403565 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
856 04:46:08.404794 end: 2 uboot-action (duration 00:01:20) [common]
858 04:46:08.406456 Cleaning after the job
859 04:46:08.407048 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/ramdisk
860 04:46:08.408473 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/kernel
861 04:46:08.458208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/dtb
862 04:46:08.458964 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/nfsrootfs
863 04:46:08.780346 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957577/tftp-deploy-qbfl76av/modules
864 04:46:08.802416 start: 4.1 power-off (timeout 00:00:30) [common]
865 04:46:08.803084 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
866 04:46:08.836785 >> OK - accepted request
867 04:46:08.838502 Returned 0 in 0 seconds
868 04:46:08.939194 end: 4.1 power-off (duration 00:00:00) [common]
870 04:46:08.940117 start: 4.2 read-feedback (timeout 00:10:00) [common]
871 04:46:08.940769 Listened to connection for namespace 'common' for up to 1s
872 04:46:09.941214 Finalising connection for namespace 'common'
873 04:46:09.941704 Disconnecting from shell: Finalise
874 04:46:09.941987 =>
875 04:46:10.042789 end: 4.2 read-feedback (duration 00:00:01) [common]
876 04:46:10.043482 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/957577
877 04:46:12.562657 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/957577
878 04:46:12.563293 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.