Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:14:16.998148 lava-dispatcher, installed at version: 2024.01
2 19:14:16.998934 start: 0 validate
3 19:14:16.999414 Start time: 2024-11-09 19:14:16.999384+00:00 (UTC)
4 19:14:16.999951 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:14:17.000512 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 19:14:17.037359 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:14:17.038141 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:14:18.076519 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:14:18.077158 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 19:14:26.183629 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:14:26.184187 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 19:14:26.217754 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 19:14:26.218526 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 19:14:27.266845 validate duration: 10.27
16 19:14:27.268320 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 19:14:27.268928 start: 1.1 download-retry (timeout 00:10:00) [common]
18 19:14:27.269514 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 19:14:27.270458 Not decompressing ramdisk as can be used compressed.
20 19:14:27.271195 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 19:14:27.271698 saving as /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/ramdisk/initrd.cpio.gz
22 19:14:27.272228 total size: 5628169 (5 MB)
23 19:14:27.316905 progress 0 % (0 MB)
24 19:14:27.324670 progress 5 % (0 MB)
25 19:14:27.332378 progress 10 % (0 MB)
26 19:14:27.339064 progress 15 % (0 MB)
27 19:14:27.346520 progress 20 % (1 MB)
28 19:14:27.353223 progress 25 % (1 MB)
29 19:14:27.358446 progress 30 % (1 MB)
30 19:14:27.362361 progress 35 % (1 MB)
31 19:14:27.365860 progress 40 % (2 MB)
32 19:14:27.369701 progress 45 % (2 MB)
33 19:14:27.373270 progress 50 % (2 MB)
34 19:14:27.377187 progress 55 % (2 MB)
35 19:14:27.381059 progress 60 % (3 MB)
36 19:14:27.384588 progress 65 % (3 MB)
37 19:14:27.388483 progress 70 % (3 MB)
38 19:14:27.391956 progress 75 % (4 MB)
39 19:14:27.395744 progress 80 % (4 MB)
40 19:14:27.398999 progress 85 % (4 MB)
41 19:14:27.402647 progress 90 % (4 MB)
42 19:14:27.406214 progress 95 % (5 MB)
43 19:14:27.409467 progress 100 % (5 MB)
44 19:14:27.410115 5 MB downloaded in 0.14 s (38.93 MB/s)
45 19:14:27.410648 end: 1.1.1 http-download (duration 00:00:00) [common]
47 19:14:27.411535 end: 1.1 download-retry (duration 00:00:00) [common]
48 19:14:27.411825 start: 1.2 download-retry (timeout 00:10:00) [common]
49 19:14:27.412130 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 19:14:27.412608 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/kernel/Image
51 19:14:27.412856 saving as /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/kernel/Image
52 19:14:27.413062 total size: 45713920 (43 MB)
53 19:14:27.413271 No compression specified
54 19:14:27.500190 progress 0 % (0 MB)
55 19:14:27.530910 progress 5 % (2 MB)
56 19:14:27.558350 progress 10 % (4 MB)
57 19:14:27.586042 progress 15 % (6 MB)
58 19:14:27.613916 progress 20 % (8 MB)
59 19:14:27.641233 progress 25 % (10 MB)
60 19:14:27.668377 progress 30 % (13 MB)
61 19:14:27.695488 progress 35 % (15 MB)
62 19:14:27.722759 progress 40 % (17 MB)
63 19:14:27.750308 progress 45 % (19 MB)
64 19:14:27.778001 progress 50 % (21 MB)
65 19:14:27.805602 progress 55 % (24 MB)
66 19:14:27.832972 progress 60 % (26 MB)
67 19:14:27.860160 progress 65 % (28 MB)
68 19:14:27.887656 progress 70 % (30 MB)
69 19:14:27.916548 progress 75 % (32 MB)
70 19:14:27.943879 progress 80 % (34 MB)
71 19:14:27.970881 progress 85 % (37 MB)
72 19:14:27.998020 progress 90 % (39 MB)
73 19:14:28.025547 progress 95 % (41 MB)
74 19:14:28.053183 progress 100 % (43 MB)
75 19:14:28.053755 43 MB downloaded in 0.64 s (68.05 MB/s)
76 19:14:28.054276 end: 1.2.1 http-download (duration 00:00:01) [common]
78 19:14:28.055194 end: 1.2 download-retry (duration 00:00:01) [common]
79 19:14:28.055521 start: 1.3 download-retry (timeout 00:09:59) [common]
80 19:14:28.055835 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 19:14:28.056455 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 19:14:28.056773 saving as /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/dtb/meson-g12b-a311d-libretech-cc.dtb
83 19:14:28.057014 total size: 54703 (0 MB)
84 19:14:28.057256 No compression specified
85 19:14:28.102900 progress 59 % (0 MB)
86 19:14:28.103720 progress 100 % (0 MB)
87 19:14:28.104296 0 MB downloaded in 0.05 s (1.10 MB/s)
88 19:14:28.104762 end: 1.3.1 http-download (duration 00:00:00) [common]
90 19:14:28.105568 end: 1.3 download-retry (duration 00:00:00) [common]
91 19:14:28.105823 start: 1.4 download-retry (timeout 00:09:59) [common]
92 19:14:28.106080 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 19:14:28.106534 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 19:14:28.106763 saving as /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/nfsrootfs/full.rootfs.tar
95 19:14:28.106965 total size: 120894716 (115 MB)
96 19:14:28.107171 Using unxz to decompress xz
97 19:14:28.150084 progress 0 % (0 MB)
98 19:14:28.948298 progress 5 % (5 MB)
99 19:14:29.801679 progress 10 % (11 MB)
100 19:14:30.622004 progress 15 % (17 MB)
101 19:14:31.375152 progress 20 % (23 MB)
102 19:14:31.970789 progress 25 % (28 MB)
103 19:14:32.800576 progress 30 % (34 MB)
104 19:14:33.621153 progress 35 % (40 MB)
105 19:14:34.007178 progress 40 % (46 MB)
106 19:14:34.412870 progress 45 % (51 MB)
107 19:14:35.187315 progress 50 % (57 MB)
108 19:14:36.145141 progress 55 % (63 MB)
109 19:14:36.984633 progress 60 % (69 MB)
110 19:14:37.776719 progress 65 % (74 MB)
111 19:14:38.574970 progress 70 % (80 MB)
112 19:14:39.420093 progress 75 % (86 MB)
113 19:14:40.207290 progress 80 % (92 MB)
114 19:14:40.971373 progress 85 % (98 MB)
115 19:14:41.833402 progress 90 % (103 MB)
116 19:14:42.620838 progress 95 % (109 MB)
117 19:14:43.461500 progress 100 % (115 MB)
118 19:14:43.474071 115 MB downloaded in 15.37 s (7.50 MB/s)
119 19:14:43.474680 end: 1.4.1 http-download (duration 00:00:15) [common]
121 19:14:43.475499 end: 1.4 download-retry (duration 00:00:15) [common]
122 19:14:43.475762 start: 1.5 download-retry (timeout 00:09:44) [common]
123 19:14:43.476149 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 19:14:43.477100 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/modules.tar.xz
125 19:14:43.477605 saving as /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/modules/modules.tar
126 19:14:43.478048 total size: 11612124 (11 MB)
127 19:14:43.478503 Using unxz to decompress xz
128 19:14:43.522645 progress 0 % (0 MB)
129 19:14:43.590668 progress 5 % (0 MB)
130 19:14:43.668465 progress 10 % (1 MB)
131 19:14:43.768971 progress 15 % (1 MB)
132 19:14:43.862138 progress 20 % (2 MB)
133 19:14:43.942272 progress 25 % (2 MB)
134 19:14:44.018840 progress 30 % (3 MB)
135 19:14:44.098673 progress 35 % (3 MB)
136 19:14:44.172299 progress 40 % (4 MB)
137 19:14:44.250493 progress 45 % (5 MB)
138 19:14:44.337481 progress 50 % (5 MB)
139 19:14:44.416149 progress 55 % (6 MB)
140 19:14:44.503929 progress 60 % (6 MB)
141 19:14:44.587073 progress 65 % (7 MB)
142 19:14:44.671799 progress 70 % (7 MB)
143 19:14:44.753918 progress 75 % (8 MB)
144 19:14:44.839227 progress 80 % (8 MB)
145 19:14:44.920481 progress 85 % (9 MB)
146 19:14:44.999880 progress 90 % (9 MB)
147 19:14:45.078588 progress 95 % (10 MB)
148 19:14:45.156765 progress 100 % (11 MB)
149 19:14:45.169123 11 MB downloaded in 1.69 s (6.55 MB/s)
150 19:14:45.169773 end: 1.5.1 http-download (duration 00:00:02) [common]
152 19:14:45.170642 end: 1.5 download-retry (duration 00:00:02) [common]
153 19:14:45.170930 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 19:14:45.171211 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 19:15:04.256548 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/967895/extract-nfsrootfs-obtbh8h8
156 19:15:04.257108 end: 1.6.1 extract-nfsrootfs (duration 00:00:19) [common]
157 19:15:04.257392 start: 1.6.2 lava-overlay (timeout 00:09:23) [common]
158 19:15:04.258007 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu
159 19:15:04.258448 makedir: /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin
160 19:15:04.258781 makedir: /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/tests
161 19:15:04.259100 makedir: /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/results
162 19:15:04.259444 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-add-keys
163 19:15:04.260011 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-add-sources
164 19:15:04.260584 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-background-process-start
165 19:15:04.261109 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-background-process-stop
166 19:15:04.261653 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-common-functions
167 19:15:04.262161 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-echo-ipv4
168 19:15:04.262660 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-install-packages
169 19:15:04.263154 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-installed-packages
170 19:15:04.263650 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-os-build
171 19:15:04.264190 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-probe-channel
172 19:15:04.264718 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-probe-ip
173 19:15:04.265214 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-target-ip
174 19:15:04.265704 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-target-mac
175 19:15:04.266199 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-target-storage
176 19:15:04.266702 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-test-case
177 19:15:04.267224 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-test-event
178 19:15:04.267729 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-test-feedback
179 19:15:04.268275 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-test-raise
180 19:15:04.268774 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-test-reference
181 19:15:04.269265 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-test-runner
182 19:15:04.269759 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-test-set
183 19:15:04.270273 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-test-shell
184 19:15:04.270810 Updating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-add-keys (debian)
185 19:15:04.271394 Updating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-add-sources (debian)
186 19:15:04.271953 Updating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-install-packages (debian)
187 19:15:04.272550 Updating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-installed-packages (debian)
188 19:15:04.273072 Updating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/bin/lava-os-build (debian)
189 19:15:04.273539 Creating /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/environment
190 19:15:04.273933 LAVA metadata
191 19:15:04.274197 - LAVA_JOB_ID=967895
192 19:15:04.274410 - LAVA_DISPATCHER_IP=192.168.6.2
193 19:15:04.274791 start: 1.6.2.1 ssh-authorize (timeout 00:09:23) [common]
194 19:15:04.275817 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 19:15:04.276186 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:23) [common]
196 19:15:04.276401 skipped lava-vland-overlay
197 19:15:04.276639 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 19:15:04.276893 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:23) [common]
199 19:15:04.277110 skipped lava-multinode-overlay
200 19:15:04.277349 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 19:15:04.277596 start: 1.6.2.4 test-definition (timeout 00:09:23) [common]
202 19:15:04.277843 Loading test definitions
203 19:15:04.278117 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:23) [common]
204 19:15:04.278333 Using /lava-967895 at stage 0
205 19:15:04.279711 uuid=967895_1.6.2.4.1 testdef=None
206 19:15:04.280054 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 19:15:04.280327 start: 1.6.2.4.2 test-overlay (timeout 00:09:23) [common]
208 19:15:04.281954 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 19:15:04.282746 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:23) [common]
211 19:15:04.284773 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 19:15:04.285615 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:23) [common]
214 19:15:04.287522 runner path: /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/0/tests/0_timesync-off test_uuid 967895_1.6.2.4.1
215 19:15:04.288157 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 19:15:04.288975 start: 1.6.2.4.5 git-repo-action (timeout 00:09:23) [common]
218 19:15:04.289207 Using /lava-967895 at stage 0
219 19:15:04.289571 Fetching tests from https://github.com/kernelci/test-definitions.git
220 19:15:04.289862 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/0/tests/1_kselftest-rtc'
221 19:15:08.074127 Running '/usr/bin/git checkout kernelci.org
222 19:15:08.185647 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 19:15:08.187163 uuid=967895_1.6.2.4.5 testdef=None
224 19:15:08.187585 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 19:15:08.188531 start: 1.6.2.4.6 test-overlay (timeout 00:09:19) [common]
227 19:15:08.191717 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 19:15:08.192677 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:19) [common]
230 19:15:08.196669 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 19:15:08.197623 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:19) [common]
233 19:15:08.201604 runner path: /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/0/tests/1_kselftest-rtc test_uuid 967895_1.6.2.4.5
234 19:15:08.201934 BOARD='meson-g12b-a311d-libretech-cc'
235 19:15:08.202158 BRANCH='tip'
236 19:15:08.202384 SKIPFILE='/dev/null'
237 19:15:08.202644 SKIP_INSTALL='True'
238 19:15:08.202857 TESTPROG_URL='http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 19:15:08.203089 TST_CASENAME=''
240 19:15:08.203315 TST_CMDFILES='rtc'
241 19:15:08.203961 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 19:15:08.204856 Creating lava-test-runner.conf files
244 19:15:08.205101 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/967895/lava-overlay-_973d8cu/lava-967895/0 for stage 0
245 19:15:08.205542 - 0_timesync-off
246 19:15:08.205827 - 1_kselftest-rtc
247 19:15:08.206232 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 19:15:08.206550 start: 1.6.2.5 compress-overlay (timeout 00:09:19) [common]
249 19:15:31.434553 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 19:15:31.435008 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:56) [common]
251 19:15:31.435303 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 19:15:31.435614 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 19:15:31.435910 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:56) [common]
254 19:15:32.155850 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 19:15:32.156366 start: 1.6.4 extract-modules (timeout 00:08:55) [common]
256 19:15:32.156639 extracting modules file /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/modules/modules.tar to /var/lib/lava/dispatcher/tmp/967895/extract-nfsrootfs-obtbh8h8
257 19:15:33.522225 extracting modules file /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/modules/modules.tar to /var/lib/lava/dispatcher/tmp/967895/extract-overlay-ramdisk-emsicgmm/ramdisk
258 19:15:34.944897 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 19:15:34.945375 start: 1.6.5 apply-overlay-tftp (timeout 00:08:52) [common]
260 19:15:34.945668 [common] Applying overlay to NFS
261 19:15:34.945893 [common] Applying overlay /var/lib/lava/dispatcher/tmp/967895/compress-overlay-zv32aykl/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/967895/extract-nfsrootfs-obtbh8h8
262 19:15:37.733975 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 19:15:37.734430 start: 1.6.6 prepare-kernel (timeout 00:08:50) [common]
264 19:15:37.734735 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:50) [common]
265 19:15:37.734998 Converting downloaded kernel to a uImage
266 19:15:37.735330 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/kernel/Image /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/kernel/uImage
267 19:15:38.238948 output: Image Name:
268 19:15:38.239363 output: Created: Sat Nov 9 19:15:37 2024
269 19:15:38.239573 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 19:15:38.239776 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 19:15:38.239976 output: Load Address: 01080000
272 19:15:38.240212 output: Entry Point: 01080000
273 19:15:38.240411 output:
274 19:15:38.240742 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 19:15:38.241010 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 19:15:38.241278 start: 1.6.7 configure-preseed-file (timeout 00:08:49) [common]
277 19:15:38.241530 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 19:15:38.241786 start: 1.6.8 compress-ramdisk (timeout 00:08:49) [common]
279 19:15:38.242052 Building ramdisk /var/lib/lava/dispatcher/tmp/967895/extract-overlay-ramdisk-emsicgmm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/967895/extract-overlay-ramdisk-emsicgmm/ramdisk
280 19:15:40.510906 >> 166827 blocks
281 19:15:48.214889 Adding RAMdisk u-boot header.
282 19:15:48.215319 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/967895/extract-overlay-ramdisk-emsicgmm/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/967895/extract-overlay-ramdisk-emsicgmm/ramdisk.cpio.gz.uboot
283 19:15:48.450811 output: Image Name:
284 19:15:48.451210 output: Created: Sat Nov 9 19:15:48 2024
285 19:15:48.451419 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 19:15:48.451624 output: Data Size: 23436249 Bytes = 22886.96 KiB = 22.35 MiB
287 19:15:48.451825 output: Load Address: 00000000
288 19:15:48.452138 output: Entry Point: 00000000
289 19:15:48.452545 output:
290 19:15:48.453513 rename /var/lib/lava/dispatcher/tmp/967895/extract-overlay-ramdisk-emsicgmm/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/ramdisk/ramdisk.cpio.gz.uboot
291 19:15:48.454214 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 19:15:48.454748 end: 1.6 prepare-tftp-overlay (duration 00:01:03) [common]
293 19:15:48.455265 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:39) [common]
294 19:15:48.455709 No LXC device requested
295 19:15:48.456242 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 19:15:48.456749 start: 1.8 deploy-device-env (timeout 00:08:39) [common]
297 19:15:48.457238 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 19:15:48.457643 Checking files for TFTP limit of 4294967296 bytes.
299 19:15:48.460334 end: 1 tftp-deploy (duration 00:01:21) [common]
300 19:15:48.460906 start: 2 uboot-action (timeout 00:05:00) [common]
301 19:15:48.461421 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 19:15:48.461909 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 19:15:48.462404 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 19:15:48.462919 Using kernel file from prepare-kernel: 967895/tftp-deploy-d8v6cw97/kernel/uImage
305 19:15:48.463533 substitutions:
306 19:15:48.463936 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 19:15:48.464367 - {DTB_ADDR}: 0x01070000
308 19:15:48.464765 - {DTB}: 967895/tftp-deploy-d8v6cw97/dtb/meson-g12b-a311d-libretech-cc.dtb
309 19:15:48.465165 - {INITRD}: 967895/tftp-deploy-d8v6cw97/ramdisk/ramdisk.cpio.gz.uboot
310 19:15:48.465558 - {KERNEL_ADDR}: 0x01080000
311 19:15:48.465944 - {KERNEL}: 967895/tftp-deploy-d8v6cw97/kernel/uImage
312 19:15:48.466336 - {LAVA_MAC}: None
313 19:15:48.466759 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/967895/extract-nfsrootfs-obtbh8h8
314 19:15:48.467155 - {NFS_SERVER_IP}: 192.168.6.2
315 19:15:48.467538 - {PRESEED_CONFIG}: None
316 19:15:48.467922 - {PRESEED_LOCAL}: None
317 19:15:48.468357 - {RAMDISK_ADDR}: 0x08000000
318 19:15:48.468745 - {RAMDISK}: 967895/tftp-deploy-d8v6cw97/ramdisk/ramdisk.cpio.gz.uboot
319 19:15:48.469132 - {ROOT_PART}: None
320 19:15:48.469516 - {ROOT}: None
321 19:15:48.469901 - {SERVER_IP}: 192.168.6.2
322 19:15:48.470282 - {TEE_ADDR}: 0x83000000
323 19:15:48.470664 - {TEE}: None
324 19:15:48.471050 Parsed boot commands:
325 19:15:48.471426 - setenv autoload no
326 19:15:48.471807 - setenv initrd_high 0xffffffff
327 19:15:48.472228 - setenv fdt_high 0xffffffff
328 19:15:48.472609 - dhcp
329 19:15:48.472987 - setenv serverip 192.168.6.2
330 19:15:48.473369 - tftpboot 0x01080000 967895/tftp-deploy-d8v6cw97/kernel/uImage
331 19:15:48.473755 - tftpboot 0x08000000 967895/tftp-deploy-d8v6cw97/ramdisk/ramdisk.cpio.gz.uboot
332 19:15:48.474140 - tftpboot 0x01070000 967895/tftp-deploy-d8v6cw97/dtb/meson-g12b-a311d-libretech-cc.dtb
333 19:15:48.474526 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/967895/extract-nfsrootfs-obtbh8h8,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 19:15:48.474924 - bootm 0x01080000 0x08000000 0x01070000
335 19:15:48.475413 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 19:15:48.476910 start: 2.3 connect-device (timeout 00:05:00) [common]
338 19:15:48.477325 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 19:15:48.492103 Setting prompt string to ['lava-test: # ']
340 19:15:48.493604 end: 2.3 connect-device (duration 00:00:00) [common]
341 19:15:48.494208 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 19:15:48.494765 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 19:15:48.495291 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 19:15:48.496459 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 19:15:48.532628 >> OK - accepted request
346 19:15:48.534649 Returned 0 in 0 seconds
347 19:15:48.635611 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 19:15:48.637306 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 19:15:48.637853 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 19:15:48.638356 Setting prompt string to ['Hit any key to stop autoboot']
352 19:15:48.638805 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 19:15:48.640381 Trying 192.168.56.21...
354 19:15:48.640850 Connected to conserv1.
355 19:15:48.641248 Escape character is '^]'.
356 19:15:48.641656
357 19:15:48.642065 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 19:15:48.642477
359 19:16:00.520846 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
360 19:16:00.521492 bl2_stage_init 0x81
361 19:16:00.526800 hw id: 0x0000 - pwm id 0x01
362 19:16:00.527355 bl2_stage_init 0xc1
363 19:16:00.527765 bl2_stage_init 0x02
364 19:16:00.528235
365 19:16:00.531973 L0:00000000
366 19:16:00.532503 L1:20000703
367 19:16:00.532931 L2:00008067
368 19:16:00.533349 L3:14000000
369 19:16:00.533758 B2:00402000
370 19:16:00.537435 B1:e0f83180
371 19:16:00.537926
372 19:16:00.538320 TE: 58150
373 19:16:00.538711
374 19:16:00.543483 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
375 19:16:00.543974
376 19:16:00.544472 Board ID = 1
377 19:16:00.548684 Set A53 clk to 24M
378 19:16:00.549198 Set A73 clk to 24M
379 19:16:00.549590 Set clk81 to 24M
380 19:16:00.554431 A53 clk: 1200 MHz
381 19:16:00.554897 A73 clk: 1200 MHz
382 19:16:00.555289 CLK81: 166.6M
383 19:16:00.555675 smccc: 00012aab
384 19:16:00.559908 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
385 19:16:00.565514 board id: 1
386 19:16:00.570967 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
387 19:16:00.581919 fw parse done
388 19:16:00.587238 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
389 19:16:00.629886 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
390 19:16:00.641345 PIEI prepare done
391 19:16:00.641862 fastboot data load
392 19:16:00.642256 fastboot data verify
393 19:16:00.646947 verify result: 266
394 19:16:00.652610 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
395 19:16:00.653075 LPDDR4 probe
396 19:16:00.653462 ddr clk to 1584MHz
397 19:16:00.659633 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
398 19:16:00.697894
399 19:16:00.698570 dmc_version 0001
400 19:16:00.704072 Check phy result
401 19:16:00.710474 INFO : End of CA training
402 19:16:00.711087 INFO : End of initialization
403 19:16:00.716213 INFO : Training has run successfully!
404 19:16:00.716828 Check phy result
405 19:16:00.721572 INFO : End of initialization
406 19:16:00.722144 INFO : End of read enable training
407 19:16:00.727158 INFO : End of fine write leveling
408 19:16:00.732751 INFO : End of Write leveling coarse delay
409 19:16:00.733256 INFO : Training has run successfully!
410 19:16:00.733702 Check phy result
411 19:16:00.738384 INFO : End of initialization
412 19:16:00.738873 INFO : End of read dq deskew training
413 19:16:00.744028 INFO : End of MPR read delay center optimization
414 19:16:00.749550 INFO : End of write delay center optimization
415 19:16:00.755107 INFO : End of read delay center optimization
416 19:16:00.755631 INFO : End of max read latency training
417 19:16:00.760766 INFO : Training has run successfully!
418 19:16:00.761263 1D training succeed
419 19:16:00.769076 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
420 19:16:00.817359 Check phy result
421 19:16:00.817992 INFO : End of initialization
422 19:16:00.838828 INFO : End of 2D read delay Voltage center optimization
423 19:16:00.858532 INFO : End of 2D read delay Voltage center optimization
424 19:16:00.910633 INFO : End of 2D write delay Voltage center optimization
425 19:16:00.960589 INFO : End of 2D write delay Voltage center optimization
426 19:16:00.966089 INFO : Training has run successfully!
427 19:16:00.966688
428 19:16:00.967204 channel==0
429 19:16:00.971617 RxClkDly_Margin_A0==88 ps 9
430 19:16:00.972206 TxDqDly_Margin_A0==98 ps 10
431 19:16:00.977221 RxClkDly_Margin_A1==88 ps 9
432 19:16:00.977774 TxDqDly_Margin_A1==98 ps 10
433 19:16:00.978235 TrainedVREFDQ_A0==74
434 19:16:00.982831 TrainedVREFDQ_A1==74
435 19:16:00.983361 VrefDac_Margin_A0==24
436 19:16:00.983797 DeviceVref_Margin_A0==40
437 19:16:00.988406 VrefDac_Margin_A1==25
438 19:16:00.989066 DeviceVref_Margin_A1==40
439 19:16:00.989616
440 19:16:00.990100
441 19:16:00.994021 channel==1
442 19:16:00.994590 RxClkDly_Margin_A0==98 ps 10
443 19:16:00.995030 TxDqDly_Margin_A0==98 ps 10
444 19:16:00.999524 RxClkDly_Margin_A1==98 ps 10
445 19:16:01.000020 TxDqDly_Margin_A1==98 ps 10
446 19:16:01.005179 TrainedVREFDQ_A0==77
447 19:16:01.005655 TrainedVREFDQ_A1==77
448 19:16:01.006093 VrefDac_Margin_A0==23
449 19:16:01.010943 DeviceVref_Margin_A0==37
450 19:16:01.011573 VrefDac_Margin_A1==24
451 19:16:01.016408 DeviceVref_Margin_A1==37
452 19:16:01.016984
453 19:16:01.017464 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
454 19:16:01.022079
455 19:16:01.050042 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
456 19:16:01.050705 2D training succeed
457 19:16:01.055582 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
458 19:16:01.061209 auto size-- 65535DDR cs0 size: 2048MB
459 19:16:01.061787 DDR cs1 size: 2048MB
460 19:16:01.066757 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
461 19:16:01.067291 cs0 DataBus test pass
462 19:16:01.072367 cs1 DataBus test pass
463 19:16:01.072919 cs0 AddrBus test pass
464 19:16:01.073364 cs1 AddrBus test pass
465 19:16:01.073823
466 19:16:01.078026 100bdlr_step_size ps== 420
467 19:16:01.078686 result report
468 19:16:01.083584 boot times 0Enable ddr reg access
469 19:16:01.088589 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
470 19:16:01.101536 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
471 19:16:01.674556 0.0;M3 CHK:0;cm4_sp_mode 0
472 19:16:01.675247 MVN_1=0x00000000
473 19:16:01.680046 MVN_2=0x00000000
474 19:16:01.685845 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
475 19:16:01.686439 OPS=0x10
476 19:16:01.686922 ring efuse init
477 19:16:01.687382 chipver efuse init
478 19:16:01.693980 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
479 19:16:01.694573 [0.018961 Inits done]
480 19:16:01.701561 secure task start!
481 19:16:01.702129 high task start!
482 19:16:01.702570 low task start!
483 19:16:01.703033 run into bl31
484 19:16:01.708201 NOTICE: BL31: v1.3(release):4fc40b1
485 19:16:01.715347 NOTICE: BL31: Built : 15:58:17, May 22 2019
486 19:16:01.715859 NOTICE: BL31: G12A normal boot!
487 19:16:01.741840 NOTICE: BL31: BL33 decompress pass
488 19:16:01.746494 ERROR: Error initializing runtime service opteed_fast
489 19:16:02.980410
490 19:16:02.980835
491 19:16:02.988228 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
492 19:16:02.988531
493 19:16:02.988755 Model: Libre Computer AML-A311D-CC Alta
494 19:16:03.196589 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
495 19:16:03.220625 DRAM: 2 GiB (effective 3.8 GiB)
496 19:16:03.363774 Core: 408 devices, 31 uclasses, devicetree: separate
497 19:16:03.369050 WDT: Not starting watchdog@f0d0
498 19:16:03.401750 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
499 19:16:03.414163 Loading Environment from FAT... Card did not respond to voltage select! : -110
500 19:16:03.419151 ** Bad device specification mmc 0 **
501 19:16:03.429497 Card did not respond to voltage select! : -110
502 19:16:03.437118 ** Bad device specification mmc 0 **
503 19:16:03.437619 Couldn't find partition mmc 0
504 19:16:03.445599 Card did not respond to voltage select! : -110
505 19:16:03.450986 ** Bad device specification mmc 0 **
506 19:16:03.451522 Couldn't find partition mmc 0
507 19:16:03.456051 Error: could not access storage.
508 19:16:04.721016 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
509 19:16:04.721426 bl2_stage_init 0x01
510 19:16:04.721649 bl2_stage_init 0x81
511 19:16:04.726551 hw id: 0x0000 - pwm id 0x01
512 19:16:04.726854 bl2_stage_init 0xc1
513 19:16:04.727075 bl2_stage_init 0x02
514 19:16:04.727294
515 19:16:04.732150 L0:00000000
516 19:16:04.732477 L1:20000703
517 19:16:04.732693 L2:00008067
518 19:16:04.732905 L3:14000000
519 19:16:04.734934 B2:00402000
520 19:16:04.735200 B1:e0f83180
521 19:16:04.735417
522 19:16:04.735626 TE: 58124
523 19:16:04.735837
524 19:16:04.746125 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
525 19:16:04.746525
526 19:16:04.746750 Board ID = 1
527 19:16:04.746965 Set A53 clk to 24M
528 19:16:04.747169 Set A73 clk to 24M
529 19:16:04.751785 Set clk81 to 24M
530 19:16:04.752102 A53 clk: 1200 MHz
531 19:16:04.752323 A73 clk: 1200 MHz
532 19:16:04.757300 CLK81: 166.6M
533 19:16:04.757579 smccc: 00012a92
534 19:16:04.762915 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
535 19:16:04.763205 board id: 1
536 19:16:04.768563 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
537 19:16:04.782336 fw parse done
538 19:16:04.787419 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 19:16:04.830105 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
540 19:16:04.841938 PIEI prepare done
541 19:16:04.842651 fastboot data load
542 19:16:04.843428 fastboot data verify
543 19:16:04.847588 verify result: 266
544 19:16:04.853102 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
545 19:16:04.853798 LPDDR4 probe
546 19:16:04.854372 ddr clk to 1584MHz
547 19:16:04.860526 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
548 19:16:04.898345
549 19:16:04.899104 dmc_version 0001
550 19:16:04.905091 Check phy result
551 19:16:04.910940 INFO : End of CA training
552 19:16:04.911618 INFO : End of initialization
553 19:16:04.916448 INFO : Training has run successfully!
554 19:16:04.917104 Check phy result
555 19:16:04.922051 INFO : End of initialization
556 19:16:04.922708 INFO : End of read enable training
557 19:16:04.927785 INFO : End of fine write leveling
558 19:16:04.933230 INFO : End of Write leveling coarse delay
559 19:16:04.933837 INFO : Training has run successfully!
560 19:16:04.934370 Check phy result
561 19:16:04.938901 INFO : End of initialization
562 19:16:04.939473 INFO : End of read dq deskew training
563 19:16:04.944414 INFO : End of MPR read delay center optimization
564 19:16:04.950009 INFO : End of write delay center optimization
565 19:16:04.955636 INFO : End of read delay center optimization
566 19:16:04.956246 INFO : End of max read latency training
567 19:16:04.961203 INFO : Training has run successfully!
568 19:16:04.961807 1D training succeed
569 19:16:04.970476 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
570 19:16:05.018158 Check phy result
571 19:16:05.018905 INFO : End of initialization
572 19:16:05.040552 INFO : End of 2D read delay Voltage center optimization
573 19:16:05.060659 INFO : End of 2D read delay Voltage center optimization
574 19:16:05.112514 INFO : End of 2D write delay Voltage center optimization
575 19:16:05.161843 INFO : End of 2D write delay Voltage center optimization
576 19:16:05.167219 INFO : Training has run successfully!
577 19:16:05.167826
578 19:16:05.168424 channel==0
579 19:16:05.172906 RxClkDly_Margin_A0==88 ps 9
580 19:16:05.173492 TxDqDly_Margin_A0==98 ps 10
581 19:16:05.178420 RxClkDly_Margin_A1==88 ps 9
582 19:16:05.179004 TxDqDly_Margin_A1==98 ps 10
583 19:16:05.179548 TrainedVREFDQ_A0==74
584 19:16:05.184076 TrainedVREFDQ_A1==74
585 19:16:05.184664 VrefDac_Margin_A0==25
586 19:16:05.185205 DeviceVref_Margin_A0==40
587 19:16:05.189677 VrefDac_Margin_A1==25
588 19:16:05.190265 DeviceVref_Margin_A1==40
589 19:16:05.190804
590 19:16:05.191320
591 19:16:05.195200 channel==1
592 19:16:05.195771 RxClkDly_Margin_A0==98 ps 10
593 19:16:05.196357 TxDqDly_Margin_A0==98 ps 10
594 19:16:05.201103 RxClkDly_Margin_A1==98 ps 10
595 19:16:05.201686 TxDqDly_Margin_A1==98 ps 10
596 19:16:05.206444 TrainedVREFDQ_A0==77
597 19:16:05.207012 TrainedVREFDQ_A1==77
598 19:16:05.207549 VrefDac_Margin_A0==24
599 19:16:05.212060 DeviceVref_Margin_A0==37
600 19:16:05.212637 VrefDac_Margin_A1==22
601 19:16:05.217680 DeviceVref_Margin_A1==37
602 19:16:05.218258
603 19:16:05.218790 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
604 19:16:05.223217
605 19:16:05.251230 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000019 00000018 0000001a 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
606 19:16:05.252497 2D training succeed
607 19:16:05.257294 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
608 19:16:05.262497 auto size-- 65535DDR cs0 size: 2048MB
609 19:16:05.263169 DDR cs1 size: 2048MB
610 19:16:05.268027 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
611 19:16:05.268680 cs0 DataBus test pass
612 19:16:05.273691 cs1 DataBus test pass
613 19:16:05.274334 cs0 AddrBus test pass
614 19:16:05.274879 cs1 AddrBus test pass
615 19:16:05.275399
616 19:16:05.279191 100bdlr_step_size ps== 420
617 19:16:05.279820 result report
618 19:16:05.284897 boot times 0Enable ddr reg access
619 19:16:05.290328 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
620 19:16:05.303754 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
621 19:16:05.876165 0.0;M3 CHK:0;cm4_sp_mode 0
622 19:16:05.877042 MVN_1=0x00000000
623 19:16:05.881504 MVN_2=0x00000000
624 19:16:05.887297 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
625 19:16:05.888052 OPS=0x10
626 19:16:05.888617 ring efuse init
627 19:16:05.889130 chipver efuse init
628 19:16:05.895480 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
629 19:16:05.896104 [0.018961 Inits done]
630 19:16:05.896619 secure task start!
631 19:16:05.903017 high task start!
632 19:16:05.903600 low task start!
633 19:16:05.904146 run into bl31
634 19:16:05.909625 NOTICE: BL31: v1.3(release):4fc40b1
635 19:16:05.917517 NOTICE: BL31: Built : 15:58:17, May 22 2019
636 19:16:05.918109 NOTICE: BL31: G12A normal boot!
637 19:16:05.942833 NOTICE: BL31: BL33 decompress pass
638 19:16:05.948522 ERROR: Error initializing runtime service opteed_fast
639 19:16:07.181522
640 19:16:07.182339
641 19:16:07.189809 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
642 19:16:07.190503
643 19:16:07.191079 Model: Libre Computer AML-A311D-CC Alta
644 19:16:07.398314 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
645 19:16:07.421774 DRAM: 2 GiB (effective 3.8 GiB)
646 19:16:07.564677 Core: 408 devices, 31 uclasses, devicetree: separate
647 19:16:07.570411 WDT: Not starting watchdog@f0d0
648 19:16:07.602796 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
649 19:16:07.615195 Loading Environment from FAT... Card did not respond to voltage select! : -110
650 19:16:07.620233 ** Bad device specification mmc 0 **
651 19:16:07.630511 Card did not respond to voltage select! : -110
652 19:16:07.638183 ** Bad device specification mmc 0 **
653 19:16:07.638715 Couldn't find partition mmc 0
654 19:16:07.646432 Card did not respond to voltage select! : -110
655 19:16:07.652063 ** Bad device specification mmc 0 **
656 19:16:07.652619 Couldn't find partition mmc 0
657 19:16:07.657152 Error: could not access storage.
658 19:16:08.000741 Net: eth0: ethernet@ff3f0000
659 19:16:08.001378 starting USB...
660 19:16:08.252716 Bus usb@ff500000: Register 3000140 NbrPorts 3
661 19:16:08.253332 Starting the controller
662 19:16:08.259449 USB XHCI 1.10
663 19:16:09.970391 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
664 19:16:09.971418 bl2_stage_init 0x81
665 19:16:09.975505 hw id: 0x0000 - pwm id 0x01
666 19:16:09.976105 bl2_stage_init 0xc1
667 19:16:09.976581 bl2_stage_init 0x02
668 19:16:09.977027
669 19:16:09.981041 L0:00000000
670 19:16:09.981579 L1:20000703
671 19:16:09.982037 L2:00008067
672 19:16:09.982477 L3:14000000
673 19:16:09.982919 B2:00402000
674 19:16:09.984067 B1:e0f83180
675 19:16:09.984584
676 19:16:09.985035 TE: 58150
677 19:16:09.985483
678 19:16:09.994876 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
679 19:16:09.995490
680 19:16:09.995959 Board ID = 1
681 19:16:09.996452 Set A53 clk to 24M
682 19:16:09.996899 Set A73 clk to 24M
683 19:16:10.000488 Set clk81 to 24M
684 19:16:10.001031 A53 clk: 1200 MHz
685 19:16:10.001483 A73 clk: 1200 MHz
686 19:16:10.006038 CLK81: 166.6M
687 19:16:10.006603 smccc: 00012aab
688 19:16:10.011646 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
689 19:16:10.012362 board id: 1
690 19:16:10.019654 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
691 19:16:10.031156 fw parse done
692 19:16:10.037049 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
693 19:16:10.079251 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
694 19:16:10.090810 PIEI prepare done
695 19:16:10.091440 fastboot data load
696 19:16:10.091888 fastboot data verify
697 19:16:10.096256 verify result: 266
698 19:16:10.101840 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
699 19:16:10.102387 LPDDR4 probe
700 19:16:10.102819 ddr clk to 1584MHz
701 19:16:10.109358 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
702 19:16:10.146668
703 19:16:10.147243 dmc_version 0001
704 19:16:10.152973 Check phy result
705 19:16:10.159665 INFO : End of CA training
706 19:16:10.160196 INFO : End of initialization
707 19:16:10.165195 INFO : Training has run successfully!
708 19:16:10.165682 Check phy result
709 19:16:10.170875 INFO : End of initialization
710 19:16:10.171383 INFO : End of read enable training
711 19:16:10.174135 INFO : End of fine write leveling
712 19:16:10.179751 INFO : End of Write leveling coarse delay
713 19:16:10.185224 INFO : Training has run successfully!
714 19:16:10.185694 Check phy result
715 19:16:10.186106 INFO : End of initialization
716 19:16:10.190861 INFO : End of read dq deskew training
717 19:16:10.196408 INFO : End of MPR read delay center optimization
718 19:16:10.196887 INFO : End of write delay center optimization
719 19:16:10.202009 INFO : End of read delay center optimization
720 19:16:10.207692 INFO : End of max read latency training
721 19:16:10.208203 INFO : Training has run successfully!
722 19:16:10.213277 1D training succeed
723 19:16:10.218720 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
724 19:16:10.265929 Check phy result
725 19:16:10.266459 INFO : End of initialization
726 19:16:10.289384 INFO : End of 2D read delay Voltage center optimization
727 19:16:10.308696 INFO : End of 2D read delay Voltage center optimization
728 19:16:10.361425 INFO : End of 2D write delay Voltage center optimization
729 19:16:10.410669 INFO : End of 2D write delay Voltage center optimization
730 19:16:10.416202 INFO : Training has run successfully!
731 19:16:10.416711
732 19:16:10.417122 channel==0
733 19:16:10.422021 RxClkDly_Margin_A0==88 ps 9
734 19:16:10.422487 TxDqDly_Margin_A0==98 ps 10
735 19:16:10.425310 RxClkDly_Margin_A1==88 ps 9
736 19:16:10.425766 TxDqDly_Margin_A1==98 ps 10
737 19:16:10.430734 TrainedVREFDQ_A0==74
738 19:16:10.431192 TrainedVREFDQ_A1==74
739 19:16:10.436252 VrefDac_Margin_A0==25
740 19:16:10.436716 DeviceVref_Margin_A0==40
741 19:16:10.437114 VrefDac_Margin_A1==24
742 19:16:10.441785 DeviceVref_Margin_A1==40
743 19:16:10.442278
744 19:16:10.442674
745 19:16:10.443065 channel==1
746 19:16:10.443453 RxClkDly_Margin_A0==88 ps 9
747 19:16:10.445819 TxDqDly_Margin_A0==98 ps 10
748 19:16:10.451200 RxClkDly_Margin_A1==98 ps 10
749 19:16:10.451642 TxDqDly_Margin_A1==98 ps 10
750 19:16:10.452085 TrainedVREFDQ_A0==77
751 19:16:10.456843 TrainedVREFDQ_A1==77
752 19:16:10.457303 VrefDac_Margin_A0==23
753 19:16:10.462506 DeviceVref_Margin_A0==37
754 19:16:10.462987 VrefDac_Margin_A1==23
755 19:16:10.463399 DeviceVref_Margin_A1==37
756 19:16:10.463873
757 19:16:10.467956 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
758 19:16:10.468461
759 19:16:10.501537 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
760 19:16:10.502080 2D training succeed
761 19:16:10.507113 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
762 19:16:10.512722 auto size-- 65535DDR cs0 size: 2048MB
763 19:16:10.513215 DDR cs1 size: 2048MB
764 19:16:10.518324 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
765 19:16:10.518787 cs0 DataBus test pass
766 19:16:10.519192 cs1 DataBus test pass
767 19:16:10.523903 cs0 AddrBus test pass
768 19:16:10.524408 cs1 AddrBus test pass
769 19:16:10.524809
770 19:16:10.529505 100bdlr_step_size ps== 432
771 19:16:10.529998 result report
772 19:16:10.530391 boot times 0Enable ddr reg access
773 19:16:10.538232 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
774 19:16:10.552297 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
775 19:16:11.124550 0.0;M3 CHK:0;cm4_sp_mode 0
776 19:16:11.125185 MVN_1=0x00000000
777 19:16:11.130001 MVN_2=0x00000000
778 19:16:11.135734 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
779 19:16:11.136290 OPS=0x10
780 19:16:11.136691 ring efuse init
781 19:16:11.137080 chipver efuse init
782 19:16:11.141292 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
783 19:16:11.146921 [0.018961 Inits done]
784 19:16:11.147389 secure task start!
785 19:16:11.147790 high task start!
786 19:16:11.151263 low task start!
787 19:16:11.151716 run into bl31
788 19:16:11.158184 NOTICE: BL31: v1.3(release):4fc40b1
789 19:16:11.165379 NOTICE: BL31: Built : 15:58:17, May 22 2019
790 19:16:11.165709 NOTICE: BL31: G12A normal boot!
791 19:16:11.191363 NOTICE: BL31: BL33 decompress pass
792 19:16:11.196743 ERROR: Error initializing runtime service opteed_fast
793 19:16:12.430049
794 19:16:12.430704
795 19:16:12.438027 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
796 19:16:12.438577
797 19:16:12.439029 Model: Libre Computer AML-A311D-CC Alta
798 19:16:12.645932 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
799 19:16:12.670101 DRAM: 2 GiB (effective 3.8 GiB)
800 19:16:12.813385 Core: 408 devices, 31 uclasses, devicetree: separate
801 19:16:12.818561 WDT: Not starting watchdog@f0d0
802 19:16:12.851383 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
803 19:16:12.863780 Loading Environment from FAT... Card did not respond to voltage select! : -110
804 19:16:12.867968 ** Bad device specification mmc 0 **
805 19:16:12.879103 Card did not respond to voltage select! : -110
806 19:16:12.885830 ** Bad device specification mmc 0 **
807 19:16:12.886770 Couldn't find partition mmc 0
808 19:16:12.895273 Card did not respond to voltage select! : -110
809 19:16:12.900570 ** Bad device specification mmc 0 **
810 19:16:12.901002 Couldn't find partition mmc 0
811 19:16:12.904895 Error: could not access storage.
812 19:16:13.248598 Net: eth0: ethernet@ff3f0000
813 19:16:13.249220 starting USB...
814 19:16:13.501059 Bus usb@ff500000: Register 3000140 NbrPorts 3
815 19:16:13.501700 Starting the controller
816 19:16:13.507387 USB XHCI 1.10
817 19:16:15.670097 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
818 19:16:15.670978 bl2_stage_init 0x01
819 19:16:15.671567 bl2_stage_init 0x81
820 19:16:15.675418 hw id: 0x0000 - pwm id 0x01
821 19:16:15.676076 bl2_stage_init 0xc1
822 19:16:15.676625 bl2_stage_init 0x02
823 19:16:15.677145
824 19:16:15.680984 L0:00000000
825 19:16:15.681567 L1:20000703
826 19:16:15.682091 L2:00008067
827 19:16:15.682627 L3:14000000
828 19:16:15.686548 B2:00402000
829 19:16:15.687121 B1:e0f83180
830 19:16:15.687653
831 19:16:15.688231 TE: 58159
832 19:16:15.688752
833 19:16:15.692245 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
834 19:16:15.692835
835 19:16:15.693370 Board ID = 1
836 19:16:15.697848 Set A53 clk to 24M
837 19:16:15.698429 Set A73 clk to 24M
838 19:16:15.698947 Set clk81 to 24M
839 19:16:15.703490 A53 clk: 1200 MHz
840 19:16:15.704069 A73 clk: 1200 MHz
841 19:16:15.704610 CLK81: 166.6M
842 19:16:15.705122 smccc: 00012ab5
843 19:16:15.708996 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
844 19:16:15.714596 board id: 1
845 19:16:15.720666 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
846 19:16:15.731110 fw parse done
847 19:16:15.736993 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
848 19:16:15.779700 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
849 19:16:15.790708 PIEI prepare done
850 19:16:15.791230 fastboot data load
851 19:16:15.791654 fastboot data verify
852 19:16:15.796288 verify result: 266
853 19:16:15.801863 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
854 19:16:15.802322 LPDDR4 probe
855 19:16:15.802732 ddr clk to 1584MHz
856 19:16:15.809793 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
857 19:16:15.847093
858 19:16:15.847589 dmc_version 0001
859 19:16:15.853693 Check phy result
860 19:16:15.859610 INFO : End of CA training
861 19:16:15.860087 INFO : End of initialization
862 19:16:15.865248 INFO : Training has run successfully!
863 19:16:15.865724 Check phy result
864 19:16:15.870835 INFO : End of initialization
865 19:16:15.871307 INFO : End of read enable training
866 19:16:15.876510 INFO : End of fine write leveling
867 19:16:15.882075 INFO : End of Write leveling coarse delay
868 19:16:15.882521 INFO : Training has run successfully!
869 19:16:15.882922 Check phy result
870 19:16:15.887619 INFO : End of initialization
871 19:16:15.888101 INFO : End of read dq deskew training
872 19:16:15.893247 INFO : End of MPR read delay center optimization
873 19:16:15.898845 INFO : End of write delay center optimization
874 19:16:15.904430 INFO : End of read delay center optimization
875 19:16:15.904879 INFO : End of max read latency training
876 19:16:15.909936 INFO : Training has run successfully!
877 19:16:15.910391 1D training succeed
878 19:16:15.919247 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
879 19:16:15.966864 Check phy result
880 19:16:15.967368 INFO : End of initialization
881 19:16:15.989355 INFO : End of 2D read delay Voltage center optimization
882 19:16:16.009609 INFO : End of 2D read delay Voltage center optimization
883 19:16:16.062007 INFO : End of 2D write delay Voltage center optimization
884 19:16:16.111276 INFO : End of 2D write delay Voltage center optimization
885 19:16:16.116673 INFO : Training has run successfully!
886 19:16:16.117200
887 19:16:16.117616 channel==0
888 19:16:16.122263 RxClkDly_Margin_A0==88 ps 9
889 19:16:16.122747 TxDqDly_Margin_A0==98 ps 10
890 19:16:16.127897 RxClkDly_Margin_A1==88 ps 9
891 19:16:16.128453 TxDqDly_Margin_A1==98 ps 10
892 19:16:16.128878 TrainedVREFDQ_A0==74
893 19:16:16.133607 TrainedVREFDQ_A1==74
894 19:16:16.134156 VrefDac_Margin_A0==25
895 19:16:16.134565 DeviceVref_Margin_A0==40
896 19:16:16.139110 VrefDac_Margin_A1==25
897 19:16:16.139669 DeviceVref_Margin_A1==40
898 19:16:16.140100
899 19:16:16.140496
900 19:16:16.144663 channel==1
901 19:16:16.145119 RxClkDly_Margin_A0==98 ps 10
902 19:16:16.145508 TxDqDly_Margin_A0==98 ps 10
903 19:16:16.150279 RxClkDly_Margin_A1==98 ps 10
904 19:16:16.150735 TxDqDly_Margin_A1==88 ps 9
905 19:16:16.155890 TrainedVREFDQ_A0==77
906 19:16:16.156383 TrainedVREFDQ_A1==77
907 19:16:16.156780 VrefDac_Margin_A0==22
908 19:16:16.161426 DeviceVref_Margin_A0==37
909 19:16:16.161864 VrefDac_Margin_A1==22
910 19:16:16.166957 DeviceVref_Margin_A1==37
911 19:16:16.167395
912 19:16:16.167783 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
913 19:16:16.172551
914 19:16:16.200553 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
915 19:16:16.201033 2D training succeed
916 19:16:16.206194 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
917 19:16:16.211773 auto size-- 65535DDR cs0 size: 2048MB
918 19:16:16.212241 DDR cs1 size: 2048MB
919 19:16:16.217435 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
920 19:16:16.217858 cs0 DataBus test pass
921 19:16:16.222956 cs1 DataBus test pass
922 19:16:16.223381 cs0 AddrBus test pass
923 19:16:16.223765 cs1 AddrBus test pass
924 19:16:16.224187
925 19:16:16.228585 100bdlr_step_size ps== 420
926 19:16:16.229016 result report
927 19:16:16.234164 boot times 0Enable ddr reg access
928 19:16:16.239599 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
929 19:16:16.253075 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
930 19:16:16.826708 0.0;M3 CHK:0;cm4_sp_mode 0
931 19:16:16.827311 MVN_1=0x00000000
932 19:16:16.832148 MVN_2=0x00000000
933 19:16:16.837901 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
934 19:16:16.838355 OPS=0x10
935 19:16:16.838762 ring efuse init
936 19:16:16.839157 chipver efuse init
937 19:16:16.843530 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
938 19:16:16.849103 [0.018961 Inits done]
939 19:16:16.849549 secure task start!
940 19:16:16.849949 high task start!
941 19:16:16.852799 low task start!
942 19:16:16.853237 run into bl31
943 19:16:16.860504 NOTICE: BL31: v1.3(release):4fc40b1
944 19:16:16.867249 NOTICE: BL31: Built : 15:58:17, May 22 2019
945 19:16:16.867736 NOTICE: BL31: G12A normal boot!
946 19:16:16.893555 NOTICE: BL31: BL33 decompress pass
947 19:16:16.898233 ERROR: Error initializing runtime service opteed_fast
948 19:16:18.132134
949 19:16:18.133014
950 19:16:18.139607 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
951 19:16:18.140203
952 19:16:18.140691 Model: Libre Computer AML-A311D-CC Alta
953 19:16:18.348119 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
954 19:16:18.372393 DRAM: 2 GiB (effective 3.8 GiB)
955 19:16:18.515415 Core: 408 devices, 31 uclasses, devicetree: separate
956 19:16:18.521287 WDT: Not starting watchdog@f0d0
957 19:16:18.553499 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
958 19:16:18.565896 Loading Environment from FAT... Card did not respond to voltage select! : -110
959 19:16:18.570966 ** Bad device specification mmc 0 **
960 19:16:18.581262 Card did not respond to voltage select! : -110
961 19:16:18.588929 ** Bad device specification mmc 0 **
962 19:16:18.589463 Couldn't find partition mmc 0
963 19:16:18.597243 Card did not respond to voltage select! : -110
964 19:16:18.602864 ** Bad device specification mmc 0 **
965 19:16:18.603396 Couldn't find partition mmc 0
966 19:16:18.607919 Error: could not access storage.
967 19:16:18.950667 Net: eth0: ethernet@ff3f0000
968 19:16:18.951305 starting USB...
969 19:16:19.202386 Bus usb@ff500000: Register 3000140 NbrPorts 3
970 19:16:19.202829 Starting the controller
971 19:16:19.209326 USB XHCI 1.10
972 19:16:20.763968 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
973 19:16:20.772133 scanning usb for storage devices... 0 Storage Device(s) found
975 19:16:20.823491 Hit any key to stop autoboot: 1
976 19:16:20.824346 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
977 19:16:20.824843 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
978 19:16:20.825245 Setting prompt string to ['=>']
979 19:16:20.825648 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
980 19:16:20.829573 0
981 19:16:20.830256 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
982 19:16:20.830563 Sending with 10 millisecond of delay
984 19:16:21.965259 => setenv autoload no
985 19:16:21.976144 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
986 19:16:21.981572 setenv autoload no
987 19:16:21.982350 Sending with 10 millisecond of delay
989 19:16:23.779785 => setenv initrd_high 0xffffffff
990 19:16:23.790660 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
991 19:16:23.791576 setenv initrd_high 0xffffffff
992 19:16:23.792383 Sending with 10 millisecond of delay
994 19:16:25.409355 => setenv fdt_high 0xffffffff
995 19:16:25.420188 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
996 19:16:25.421152 setenv fdt_high 0xffffffff
997 19:16:25.421915 Sending with 10 millisecond of delay
999 19:16:25.713913 => dhcp
1000 19:16:25.724745 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1001 19:16:25.725623 dhcp
1002 19:16:25.726096 Speed: 1000, full duplex
1003 19:16:25.726532 BOOTP broadcast 1
1004 19:16:25.902847 DHCP client bound to address 192.168.6.27 (177 ms)
1005 19:16:25.904308 Sending with 10 millisecond of delay
1007 19:16:27.584657 => setenv serverip 192.168.6.2
1008 19:16:27.595674 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1009 19:16:27.596951 setenv serverip 192.168.6.2
1010 19:16:27.597825 Sending with 10 millisecond of delay
1012 19:16:31.324111 => tftpboot 0x01080000 967895/tftp-deploy-d8v6cw97/kernel/uImage
1013 19:16:31.334872 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1014 19:16:31.335654 tftpboot 0x01080000 967895/tftp-deploy-d8v6cw97/kernel/uImage
1015 19:16:31.336162 Speed: 1000, full duplex
1016 19:16:31.336580 Using ethernet@ff3f0000 device
1017 19:16:31.337713 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1018 19:16:31.343245 Filename '967895/tftp-deploy-d8v6cw97/kernel/uImage'.
1019 19:16:31.347064 Load address: 0x1080000
1020 19:16:33.673925 Loading: *####################################### UDP wrong checksum 000000ff 0000cc26
1021 19:16:33.686240 UDP wrong checksum 000000ff 00006219
1022 19:16:34.327579 ########### 43.6 MiB
1023 19:16:34.328272 14.6 MiB/s
1024 19:16:34.328752 done
1025 19:16:34.332142 Bytes transferred = 45713984 (2b98a40 hex)
1026 19:16:34.332984 Sending with 10 millisecond of delay
1028 19:16:39.022143 => tftpboot 0x08000000 967895/tftp-deploy-d8v6cw97/ramdisk/ramdisk.cpio.gz.uboot
1029 19:16:39.033033 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
1030 19:16:39.034008 tftpboot 0x08000000 967895/tftp-deploy-d8v6cw97/ramdisk/ramdisk.cpio.gz.uboot
1031 19:16:39.034484 Speed: 1000, full duplex
1032 19:16:39.034927 Using ethernet@ff3f0000 device
1033 19:16:39.035782 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 19:16:39.044418 Filename '967895/tftp-deploy-d8v6cw97/ramdisk/ramdisk.cpio.gz.uboot'.
1035 19:16:39.044823 Load address: 0x8000000
1036 19:16:45.468923 Loading: *#############T ######################### UDP wrong checksum 000000ff 0000199e
1037 19:16:45.511810 ## UDP wrong checksum 000000ff 0000a590
1038 19:16:45.803669 ######### UDP wrong checksum 00000005 00006ccc
1039 19:16:50.804939 T UDP wrong checksum 00000005 00006ccc
1040 19:17:00.807253 T T UDP wrong checksum 00000005 00006ccc
1041 19:17:06.086214 T UDP wrong checksum 000000ff 0000145a
1042 19:17:06.120710 UDP wrong checksum 000000ff 0000af4c
1043 19:17:11.968261 T UDP wrong checksum 000000ff 0000f874
1044 19:17:11.971287 UDP wrong checksum 000000ff 00008367
1045 19:17:20.811122 T T UDP wrong checksum 00000005 00006ccc
1046 19:17:35.815319 T T
1047 19:17:35.816030 Retry count exceeded; starting again
1049 19:17:35.817639 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1052 19:17:35.819716 end: 2.4 uboot-commands (duration 00:01:47) [common]
1054 19:17:35.822243 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1056 19:17:35.823353 end: 2 uboot-action (duration 00:01:47) [common]
1058 19:17:35.825057 Cleaning after the job
1059 19:17:35.825648 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/ramdisk
1060 19:17:35.826872 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/kernel
1061 19:17:35.871462 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/dtb
1062 19:17:35.872495 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/nfsrootfs
1063 19:17:35.909604 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967895/tftp-deploy-d8v6cw97/modules
1064 19:17:35.917156 start: 4.1 power-off (timeout 00:00:30) [common]
1065 19:17:35.917792 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1066 19:17:35.951761 >> OK - accepted request
1067 19:17:35.953962 Returned 0 in 0 seconds
1068 19:17:36.054774 end: 4.1 power-off (duration 00:00:00) [common]
1070 19:17:36.055766 start: 4.2 read-feedback (timeout 00:10:00) [common]
1071 19:17:36.056452 Listened to connection for namespace 'common' for up to 1s
1072 19:17:37.056665 Finalising connection for namespace 'common'
1073 19:17:37.057162 Disconnecting from shell: Finalise
1074 19:17:37.057473 =>
1075 19:17:37.158831 end: 4.2 read-feedback (duration 00:00:01) [common]
1076 19:17:37.159565 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/967895
1077 19:17:40.159908 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/967895
1078 19:17:40.160562 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.