Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:34:56.998949 lava-dispatcher, installed at version: 2024.01
2 19:34:56.999906 start: 0 validate
3 19:34:57.000514 Start time: 2024-11-09 19:34:57.000483+00:00 (UTC)
4 19:34:57.001198 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:34:57.001835 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 19:34:57.046091 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:34:57.046692 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:34:57.079425 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:34:57.080096 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 19:34:57.111509 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:34:57.112042 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 19:34:57.143126 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 19:34:57.143620 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 19:34:57.184949 validate duration: 0.18
16 19:34:57.186355 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 19:34:57.186839 start: 1.1 download-retry (timeout 00:10:00) [common]
18 19:34:57.187480 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 19:34:57.188475 Not decompressing ramdisk as can be used compressed.
20 19:34:57.189232 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 19:34:57.189781 saving as /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/ramdisk/initrd.cpio.gz
22 19:34:57.190328 total size: 5628140 (5 MB)
23 19:34:57.230861 progress 0 % (0 MB)
24 19:34:57.238911 progress 5 % (0 MB)
25 19:34:57.247136 progress 10 % (0 MB)
26 19:34:57.254474 progress 15 % (0 MB)
27 19:34:57.260137 progress 20 % (1 MB)
28 19:34:57.264986 progress 25 % (1 MB)
29 19:34:57.269384 progress 30 % (1 MB)
30 19:34:57.273898 progress 35 % (1 MB)
31 19:34:57.277692 progress 40 % (2 MB)
32 19:34:57.281923 progress 45 % (2 MB)
33 19:34:57.285901 progress 50 % (2 MB)
34 19:34:57.290308 progress 55 % (2 MB)
35 19:34:57.294756 progress 60 % (3 MB)
36 19:34:57.298567 progress 65 % (3 MB)
37 19:34:57.302707 progress 70 % (3 MB)
38 19:34:57.306544 progress 75 % (4 MB)
39 19:34:57.310906 progress 80 % (4 MB)
40 19:34:57.314567 progress 85 % (4 MB)
41 19:34:57.318662 progress 90 % (4 MB)
42 19:34:57.322740 progress 95 % (5 MB)
43 19:34:57.326124 progress 100 % (5 MB)
44 19:34:57.326781 5 MB downloaded in 0.14 s (39.33 MB/s)
45 19:34:57.327339 end: 1.1.1 http-download (duration 00:00:00) [common]
47 19:34:57.328244 end: 1.1 download-retry (duration 00:00:00) [common]
48 19:34:57.328536 start: 1.2 download-retry (timeout 00:10:00) [common]
49 19:34:57.328813 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 19:34:57.329277 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/kernel/Image
51 19:34:57.329517 saving as /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/kernel/Image
52 19:34:57.329726 total size: 45713920 (43 MB)
53 19:34:57.329936 No compression specified
54 19:34:57.361774 progress 0 % (0 MB)
55 19:34:57.397797 progress 5 % (2 MB)
56 19:34:57.432663 progress 10 % (4 MB)
57 19:34:57.463378 progress 15 % (6 MB)
58 19:34:57.493135 progress 20 % (8 MB)
59 19:34:57.521514 progress 25 % (10 MB)
60 19:34:57.552473 progress 30 % (13 MB)
61 19:34:57.582221 progress 35 % (15 MB)
62 19:34:57.612179 progress 40 % (17 MB)
63 19:34:57.641357 progress 45 % (19 MB)
64 19:34:57.670637 progress 50 % (21 MB)
65 19:34:57.700128 progress 55 % (24 MB)
66 19:34:57.729377 progress 60 % (26 MB)
67 19:34:57.759273 progress 65 % (28 MB)
68 19:34:57.789467 progress 70 % (30 MB)
69 19:34:57.818383 progress 75 % (32 MB)
70 19:34:57.848271 progress 80 % (34 MB)
71 19:34:57.877269 progress 85 % (37 MB)
72 19:34:57.907045 progress 90 % (39 MB)
73 19:34:57.937318 progress 95 % (41 MB)
74 19:34:57.966374 progress 100 % (43 MB)
75 19:34:57.966942 43 MB downloaded in 0.64 s (68.42 MB/s)
76 19:34:57.967448 end: 1.2.1 http-download (duration 00:00:01) [common]
78 19:34:57.968406 end: 1.2 download-retry (duration 00:00:01) [common]
79 19:34:57.968746 start: 1.3 download-retry (timeout 00:09:59) [common]
80 19:34:57.969049 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 19:34:57.969533 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 19:34:57.969820 saving as /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/dtb/meson-g12b-a311d-libretech-cc.dtb
83 19:34:57.970071 total size: 54703 (0 MB)
84 19:34:57.970321 No compression specified
85 19:34:58.010732 progress 59 % (0 MB)
86 19:34:58.011627 progress 100 % (0 MB)
87 19:34:58.012253 0 MB downloaded in 0.04 s (1.24 MB/s)
88 19:34:58.012803 end: 1.3.1 http-download (duration 00:00:00) [common]
90 19:34:58.013733 end: 1.3 download-retry (duration 00:00:00) [common]
91 19:34:58.014183 start: 1.4 download-retry (timeout 00:09:59) [common]
92 19:34:58.014526 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 19:34:58.015040 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 19:34:58.015325 saving as /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/nfsrootfs/full.rootfs.tar
95 19:34:58.015573 total size: 474398908 (452 MB)
96 19:34:58.015821 Using unxz to decompress xz
97 19:34:58.049206 progress 0 % (0 MB)
98 19:34:59.158425 progress 5 % (22 MB)
99 19:35:00.626052 progress 10 % (45 MB)
100 19:35:01.081562 progress 15 % (67 MB)
101 19:35:01.910813 progress 20 % (90 MB)
102 19:35:02.447303 progress 25 % (113 MB)
103 19:35:02.802076 progress 30 % (135 MB)
104 19:35:03.426394 progress 35 % (158 MB)
105 19:35:04.325854 progress 40 % (181 MB)
106 19:35:05.066130 progress 45 % (203 MB)
107 19:35:05.832508 progress 50 % (226 MB)
108 19:35:06.503761 progress 55 % (248 MB)
109 19:35:07.818584 progress 60 % (271 MB)
110 19:35:09.311041 progress 65 % (294 MB)
111 19:35:10.991231 progress 70 % (316 MB)
112 19:35:14.098311 progress 75 % (339 MB)
113 19:35:16.532885 progress 80 % (361 MB)
114 19:35:19.454109 progress 85 % (384 MB)
115 19:35:22.660707 progress 90 % (407 MB)
116 19:35:25.886331 progress 95 % (429 MB)
117 19:35:29.279025 progress 100 % (452 MB)
118 19:35:29.292823 452 MB downloaded in 31.28 s (14.46 MB/s)
119 19:35:29.293798 end: 1.4.1 http-download (duration 00:00:31) [common]
121 19:35:29.295558 end: 1.4 download-retry (duration 00:00:31) [common]
122 19:35:29.296172 start: 1.5 download-retry (timeout 00:09:28) [common]
123 19:35:29.296746 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 19:35:29.297763 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/modules.tar.xz
125 19:35:29.298277 saving as /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/modules/modules.tar
126 19:35:29.298727 total size: 11612124 (11 MB)
127 19:35:29.299184 Using unxz to decompress xz
128 19:35:29.340209 progress 0 % (0 MB)
129 19:35:29.407078 progress 5 % (0 MB)
130 19:35:29.481365 progress 10 % (1 MB)
131 19:35:29.577981 progress 15 % (1 MB)
132 19:35:29.670608 progress 20 % (2 MB)
133 19:35:29.750081 progress 25 % (2 MB)
134 19:35:29.825173 progress 30 % (3 MB)
135 19:35:29.903364 progress 35 % (3 MB)
136 19:35:29.975718 progress 40 % (4 MB)
137 19:35:30.051895 progress 45 % (5 MB)
138 19:35:30.136200 progress 50 % (5 MB)
139 19:35:30.213345 progress 55 % (6 MB)
140 19:35:30.297922 progress 60 % (6 MB)
141 19:35:30.378540 progress 65 % (7 MB)
142 19:35:30.459528 progress 70 % (7 MB)
143 19:35:30.539583 progress 75 % (8 MB)
144 19:35:30.624998 progress 80 % (8 MB)
145 19:35:30.706785 progress 85 % (9 MB)
146 19:35:30.786623 progress 90 % (9 MB)
147 19:35:30.865905 progress 95 % (10 MB)
148 19:35:30.944241 progress 100 % (11 MB)
149 19:35:30.956207 11 MB downloaded in 1.66 s (6.68 MB/s)
150 19:35:30.957205 end: 1.5.1 http-download (duration 00:00:02) [common]
152 19:35:30.958784 end: 1.5 download-retry (duration 00:00:02) [common]
153 19:35:30.959303 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 19:35:30.959816 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 19:35:46.481552 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/967929/extract-nfsrootfs-_fmgeir3
156 19:35:46.482163 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 19:35:46.482449 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 19:35:46.483202 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh
159 19:35:46.483648 makedir: /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin
160 19:35:46.483974 makedir: /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/tests
161 19:35:46.484334 makedir: /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/results
162 19:35:46.484668 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-add-keys
163 19:35:46.485188 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-add-sources
164 19:35:46.485686 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-background-process-start
165 19:35:46.486193 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-background-process-stop
166 19:35:46.486706 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-common-functions
167 19:35:46.487201 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-echo-ipv4
168 19:35:46.487678 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-install-packages
169 19:35:46.488191 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-installed-packages
170 19:35:46.488716 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-os-build
171 19:35:46.489270 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-probe-channel
172 19:35:46.489761 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-probe-ip
173 19:35:46.490231 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-target-ip
174 19:35:46.490695 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-target-mac
175 19:35:46.491164 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-target-storage
176 19:35:46.491641 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-test-case
177 19:35:46.492141 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-test-event
178 19:35:46.492638 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-test-feedback
179 19:35:46.493153 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-test-raise
180 19:35:46.493627 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-test-reference
181 19:35:46.494095 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-test-runner
182 19:35:46.494567 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-test-set
183 19:35:46.495027 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-test-shell
184 19:35:46.495499 Updating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-install-packages (oe)
185 19:35:46.496085 Updating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/bin/lava-installed-packages (oe)
186 19:35:46.496559 Creating /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/environment
187 19:35:46.496927 LAVA metadata
188 19:35:46.497184 - LAVA_JOB_ID=967929
189 19:35:46.497399 - LAVA_DISPATCHER_IP=192.168.6.2
190 19:35:46.497762 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 19:35:46.498786 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 19:35:46.499112 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 19:35:46.499322 skipped lava-vland-overlay
194 19:35:46.499563 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 19:35:46.499816 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 19:35:46.500085 skipped lava-multinode-overlay
197 19:35:46.500338 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 19:35:46.500591 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 19:35:46.500842 Loading test definitions
200 19:35:46.501119 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 19:35:46.501334 Using /lava-967929 at stage 0
202 19:35:46.502530 uuid=967929_1.6.2.4.1 testdef=None
203 19:35:46.502853 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 19:35:46.503115 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 19:35:46.504869 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 19:35:46.505659 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 19:35:46.507798 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 19:35:46.508654 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 19:35:46.510713 runner path: /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 967929_1.6.2.4.1
212 19:35:46.511282 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 19:35:46.512069 Creating lava-test-runner.conf files
215 19:35:46.512273 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/967929/lava-overlay-bqo8nxbh/lava-967929/0 for stage 0
216 19:35:46.512608 - 0_v4l2-decoder-conformance-h264
217 19:35:46.512950 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 19:35:46.513222 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 19:35:46.534726 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 19:35:46.535144 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 19:35:46.535403 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 19:35:46.535668 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 19:35:46.535931 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 19:35:47.239313 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 19:35:47.239779 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 19:35:47.240054 extracting modules file /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/967929/extract-nfsrootfs-_fmgeir3
227 19:35:48.619747 extracting modules file /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/967929/extract-overlay-ramdisk-25gght2q/ramdisk
228 19:35:50.028735 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 19:35:50.029210 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 19:35:50.029487 [common] Applying overlay to NFS
231 19:35:50.029699 [common] Applying overlay /var/lib/lava/dispatcher/tmp/967929/compress-overlay-73afx5yv/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/967929/extract-nfsrootfs-_fmgeir3
232 19:35:50.058608 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 19:35:50.059016 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 19:35:50.059290 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 19:35:50.059517 Converting downloaded kernel to a uImage
236 19:35:50.059825 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/kernel/Image /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/kernel/uImage
237 19:35:50.532619 output: Image Name:
238 19:35:50.533040 output: Created: Sat Nov 9 19:35:50 2024
239 19:35:50.533248 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 19:35:50.533452 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 19:35:50.533653 output: Load Address: 01080000
242 19:35:50.533851 output: Entry Point: 01080000
243 19:35:50.534048 output:
244 19:35:50.534383 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 19:35:50.534651 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 19:35:50.534921 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 19:35:50.535176 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 19:35:50.535435 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 19:35:50.535691 Building ramdisk /var/lib/lava/dispatcher/tmp/967929/extract-overlay-ramdisk-25gght2q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/967929/extract-overlay-ramdisk-25gght2q/ramdisk
250 19:35:52.716224 >> 166827 blocks
251 19:36:00.870902 Adding RAMdisk u-boot header.
252 19:36:00.871364 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/967929/extract-overlay-ramdisk-25gght2q/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/967929/extract-overlay-ramdisk-25gght2q/ramdisk.cpio.gz.uboot
253 19:36:01.120994 output: Image Name:
254 19:36:01.121421 output: Created: Sat Nov 9 19:36:00 2024
255 19:36:01.121673 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 19:36:01.121912 output: Data Size: 23436687 Bytes = 22887.39 KiB = 22.35 MiB
257 19:36:01.122144 output: Load Address: 00000000
258 19:36:01.122373 output: Entry Point: 00000000
259 19:36:01.122599 output:
260 19:36:01.123211 rename /var/lib/lava/dispatcher/tmp/967929/extract-overlay-ramdisk-25gght2q/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/ramdisk/ramdisk.cpio.gz.uboot
261 19:36:01.123650 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 19:36:01.124025 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 19:36:01.124362 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 19:36:01.124653 No LXC device requested
265 19:36:01.125032 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 19:36:01.125363 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 19:36:01.125666 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 19:36:01.125918 Checking files for TFTP limit of 4294967296 bytes.
269 19:36:01.127445 end: 1 tftp-deploy (duration 00:01:04) [common]
270 19:36:01.127791 start: 2 uboot-action (timeout 00:05:00) [common]
271 19:36:01.128137 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 19:36:01.128442 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 19:36:01.128750 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 19:36:01.129064 Using kernel file from prepare-kernel: 967929/tftp-deploy-p7x7bi4p/kernel/uImage
275 19:36:01.129429 substitutions:
276 19:36:01.129672 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 19:36:01.129904 - {DTB_ADDR}: 0x01070000
278 19:36:01.130133 - {DTB}: 967929/tftp-deploy-p7x7bi4p/dtb/meson-g12b-a311d-libretech-cc.dtb
279 19:36:01.130365 - {INITRD}: 967929/tftp-deploy-p7x7bi4p/ramdisk/ramdisk.cpio.gz.uboot
280 19:36:01.130592 - {KERNEL_ADDR}: 0x01080000
281 19:36:01.130816 - {KERNEL}: 967929/tftp-deploy-p7x7bi4p/kernel/uImage
282 19:36:01.131042 - {LAVA_MAC}: None
283 19:36:01.131292 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/967929/extract-nfsrootfs-_fmgeir3
284 19:36:01.131525 - {NFS_SERVER_IP}: 192.168.6.2
285 19:36:01.131746 - {PRESEED_CONFIG}: None
286 19:36:01.131975 - {PRESEED_LOCAL}: None
287 19:36:01.132226 - {RAMDISK_ADDR}: 0x08000000
288 19:36:01.132450 - {RAMDISK}: 967929/tftp-deploy-p7x7bi4p/ramdisk/ramdisk.cpio.gz.uboot
289 19:36:01.132675 - {ROOT_PART}: None
290 19:36:01.132900 - {ROOT}: None
291 19:36:01.133120 - {SERVER_IP}: 192.168.6.2
292 19:36:01.133344 - {TEE_ADDR}: 0x83000000
293 19:36:01.133563 - {TEE}: None
294 19:36:01.133785 Parsed boot commands:
295 19:36:01.134001 - setenv autoload no
296 19:36:01.134220 - setenv initrd_high 0xffffffff
297 19:36:01.134441 - setenv fdt_high 0xffffffff
298 19:36:01.134662 - dhcp
299 19:36:01.134880 - setenv serverip 192.168.6.2
300 19:36:01.135098 - tftpboot 0x01080000 967929/tftp-deploy-p7x7bi4p/kernel/uImage
301 19:36:01.135320 - tftpboot 0x08000000 967929/tftp-deploy-p7x7bi4p/ramdisk/ramdisk.cpio.gz.uboot
302 19:36:01.135540 - tftpboot 0x01070000 967929/tftp-deploy-p7x7bi4p/dtb/meson-g12b-a311d-libretech-cc.dtb
303 19:36:01.135760 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/967929/extract-nfsrootfs-_fmgeir3,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 19:36:01.136006 - bootm 0x01080000 0x08000000 0x01070000
305 19:36:01.136306 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 19:36:01.137170 start: 2.3 connect-device (timeout 00:05:00) [common]
308 19:36:01.137430 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 19:36:01.149788 Setting prompt string to ['lava-test: # ']
310 19:36:01.150720 end: 2.3 connect-device (duration 00:00:00) [common]
311 19:36:01.151111 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 19:36:01.151455 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 19:36:01.151787 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 19:36:01.152503 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 19:36:01.187224 >> OK - accepted request
316 19:36:01.189391 Returned 0 in 0 seconds
317 19:36:01.290196 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 19:36:01.291269 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 19:36:01.291645 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 19:36:01.292009 Setting prompt string to ['Hit any key to stop autoboot']
322 19:36:01.292315 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 19:36:01.293307 Trying 192.168.56.21...
324 19:36:01.293600 Connected to conserv1.
325 19:36:01.293856 Escape character is '^]'.
326 19:36:01.294105
327 19:36:01.294353 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 19:36:01.294599
329 19:36:12.677776 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 19:36:12.678459 bl2_stage_init 0x01
331 19:36:12.678910 bl2_stage_init 0x81
332 19:36:12.687688 hw id: 0x0000 - pwm id 0x01
333 19:36:12.688332 bl2_stage_init 0xc1
334 19:36:12.688798 bl2_stage_init 0x02
335 19:36:12.689233
336 19:36:12.690023 L0:00000000
337 19:36:12.690491 L1:20000703
338 19:36:12.690927 L2:00008067
339 19:36:12.691355 L3:14000000
340 19:36:12.694483 B2:00402000
341 19:36:12.694958 B1:e0f83180
342 19:36:12.695390
343 19:36:12.695829 TE: 58124
344 19:36:12.696297
345 19:36:12.700018 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 19:36:12.700499
347 19:36:12.700936 Board ID = 1
348 19:36:12.705579 Set A53 clk to 24M
349 19:36:12.706046 Set A73 clk to 24M
350 19:36:12.706480 Set clk81 to 24M
351 19:36:12.711178 A53 clk: 1200 MHz
352 19:36:12.711640 A73 clk: 1200 MHz
353 19:36:12.712107 CLK81: 166.6M
354 19:36:12.712535 smccc: 00012a92
355 19:36:12.716816 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 19:36:12.722472 board id: 1
357 19:36:12.728302 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 19:36:12.738983 fw parse done
359 19:36:12.744933 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 19:36:12.787585 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 19:36:12.798523 PIEI prepare done
362 19:36:12.799043 fastboot data load
363 19:36:12.799484 fastboot data verify
364 19:36:12.804163 verify result: 266
365 19:36:12.809869 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 19:36:12.810372 LPDDR4 probe
367 19:36:12.810811 ddr clk to 1584MHz
368 19:36:12.817796 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 19:36:12.854954
370 19:36:12.855490 dmc_version 0001
371 19:36:12.861671 Check phy result
372 19:36:12.867615 INFO : End of CA training
373 19:36:12.868175 INFO : End of initialization
374 19:36:12.873104 INFO : Training has run successfully!
375 19:36:12.873605 Check phy result
376 19:36:12.878734 INFO : End of initialization
377 19:36:12.879253 INFO : End of read enable training
378 19:36:12.884297 INFO : End of fine write leveling
379 19:36:12.889933 INFO : End of Write leveling coarse delay
380 19:36:12.890477 INFO : Training has run successfully!
381 19:36:12.890942 Check phy result
382 19:36:12.895591 INFO : End of initialization
383 19:36:12.896145 INFO : End of read dq deskew training
384 19:36:12.901133 INFO : End of MPR read delay center optimization
385 19:36:12.906710 INFO : End of write delay center optimization
386 19:36:12.912343 INFO : End of read delay center optimization
387 19:36:12.912895 INFO : End of max read latency training
388 19:36:12.917995 INFO : Training has run successfully!
389 19:36:12.918513 1D training succeed
390 19:36:12.927119 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 19:36:12.974757 Check phy result
392 19:36:12.975309 INFO : End of initialization
393 19:36:12.997321 INFO : End of 2D read delay Voltage center optimization
394 19:36:13.017627 INFO : End of 2D read delay Voltage center optimization
395 19:36:13.069645 INFO : End of 2D write delay Voltage center optimization
396 19:36:13.118997 INFO : End of 2D write delay Voltage center optimization
397 19:36:13.124550 INFO : Training has run successfully!
398 19:36:13.125099
399 19:36:13.125567 channel==0
400 19:36:13.130107 RxClkDly_Margin_A0==88 ps 9
401 19:36:13.130653 TxDqDly_Margin_A0==98 ps 10
402 19:36:13.133475 RxClkDly_Margin_A1==88 ps 9
403 19:36:13.134227 TxDqDly_Margin_A1==98 ps 10
404 19:36:13.139043 TrainedVREFDQ_A0==74
405 19:36:13.139585 TrainedVREFDQ_A1==74
406 19:36:13.144554 VrefDac_Margin_A0==24
407 19:36:13.145112 DeviceVref_Margin_A0==40
408 19:36:13.145580 VrefDac_Margin_A1==24
409 19:36:13.150150 DeviceVref_Margin_A1==40
410 19:36:13.150702
411 19:36:13.151164
412 19:36:13.151619 channel==1
413 19:36:13.152107 RxClkDly_Margin_A0==98 ps 10
414 19:36:13.153528 TxDqDly_Margin_A0==98 ps 10
415 19:36:13.159104 RxClkDly_Margin_A1==98 ps 10
416 19:36:13.159650 TxDqDly_Margin_A1==88 ps 9
417 19:36:13.164799 TrainedVREFDQ_A0==77
418 19:36:13.165345 TrainedVREFDQ_A1==77
419 19:36:13.166070 VrefDac_Margin_A0==22
420 19:36:13.170313 DeviceVref_Margin_A0==37
421 19:36:13.170853 VrefDac_Margin_A1==22
422 19:36:13.171311 DeviceVref_Margin_A1==37
423 19:36:13.171760
424 19:36:13.179127 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 19:36:13.179690
426 19:36:13.207119 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 19:36:13.207764 2D training succeed
428 19:36:13.218324 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 19:36:13.218874 auto size-- 65535DDR cs0 size: 2048MB
430 19:36:13.223973 DDR cs1 size: 2048MB
431 19:36:13.224540 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 19:36:13.229589 cs0 DataBus test pass
433 19:36:13.230128 cs1 DataBus test pass
434 19:36:13.230588 cs0 AddrBus test pass
435 19:36:13.235172 cs1 AddrBus test pass
436 19:36:13.235714
437 19:36:13.236225 100bdlr_step_size ps== 420
438 19:36:13.236694 result report
439 19:36:13.240842 boot times 0Enable ddr reg access
440 19:36:13.247618 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 19:36:13.261051 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 19:36:13.834050 0.0;M3 CHK:0;cm4_sp_mode 0
443 19:36:13.834722 MVN_1=0x00000000
444 19:36:13.839474 MVN_2=0x00000000
445 19:36:13.845245 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 19:36:13.845763 OPS=0x10
447 19:36:13.846224 ring efuse init
448 19:36:13.846678 chipver efuse init
449 19:36:13.850858 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 19:36:13.856453 [0.018961 Inits done]
451 19:36:13.856951 secure task start!
452 19:36:13.857406 high task start!
453 19:36:13.861030 low task start!
454 19:36:13.861528 run into bl31
455 19:36:13.867785 NOTICE: BL31: v1.3(release):4fc40b1
456 19:36:13.875491 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 19:36:13.876041 NOTICE: BL31: G12A normal boot!
458 19:36:13.900837 NOTICE: BL31: BL33 decompress pass
459 19:36:13.906487 ERROR: Error initializing runtime service opteed_fast
460 19:36:15.139322
461 19:36:15.139960
462 19:36:15.147740 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 19:36:15.148285
464 19:36:15.148752 Model: Libre Computer AML-A311D-CC Alta
465 19:36:15.355200 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 19:36:15.378587 DRAM: 2 GiB (effective 3.8 GiB)
467 19:36:15.522651 Core: 408 devices, 31 uclasses, devicetree: separate
468 19:36:15.528391 WDT: Not starting watchdog@f0d0
469 19:36:15.560721 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 19:36:15.573312 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 19:36:15.578123 ** Bad device specification mmc 0 **
472 19:36:15.588409 Card did not respond to voltage select! : -110
473 19:36:15.596134 ** Bad device specification mmc 0 **
474 19:36:15.596384 Couldn't find partition mmc 0
475 19:36:15.604495 Card did not respond to voltage select! : -110
476 19:36:15.610106 ** Bad device specification mmc 0 **
477 19:36:15.610601 Couldn't find partition mmc 0
478 19:36:15.615085 Error: could not access storage.
479 19:36:16.878431 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 19:36:16.878859 bl2_stage_init 0x01
481 19:36:16.879100 bl2_stage_init 0x81
482 19:36:16.884012 hw id: 0x0000 - pwm id 0x01
483 19:36:16.884445 bl2_stage_init 0xc1
484 19:36:16.884798 bl2_stage_init 0x02
485 19:36:16.885145
486 19:36:16.889574 L0:00000000
487 19:36:16.889868 L1:20000703
488 19:36:16.890097 L2:00008067
489 19:36:16.890317 L3:14000000
490 19:36:16.892557 B2:00402000
491 19:36:16.892888 B1:e0f83180
492 19:36:16.893114
493 19:36:16.893335 TE: 58124
494 19:36:16.893569
495 19:36:16.903655 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 19:36:16.904280
497 19:36:16.904798 Board ID = 1
498 19:36:16.905275 Set A53 clk to 24M
499 19:36:16.905757 Set A73 clk to 24M
500 19:36:16.909303 Set clk81 to 24M
501 19:36:16.909842 A53 clk: 1200 MHz
502 19:36:16.910309 A73 clk: 1200 MHz
503 19:36:16.914929 CLK81: 166.6M
504 19:36:16.915551 smccc: 00012a92
505 19:36:16.920494 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 19:36:16.921100 board id: 1
507 19:36:16.929322 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 19:36:16.939654 fw parse done
509 19:36:16.945622 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 19:36:16.988254 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 19:36:16.999175 PIEI prepare done
512 19:36:16.999716 fastboot data load
513 19:36:17.000062 fastboot data verify
514 19:36:17.004794 verify result: 266
515 19:36:17.010491 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 19:36:17.010880 LPDDR4 probe
517 19:36:17.011138 ddr clk to 1584MHz
518 19:36:17.018486 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 19:36:17.055735
520 19:36:17.056635 dmc_version 0001
521 19:36:17.062499 Check phy result
522 19:36:17.068182 INFO : End of CA training
523 19:36:17.068667 INFO : End of initialization
524 19:36:17.073747 INFO : Training has run successfully!
525 19:36:17.074212 Check phy result
526 19:36:17.079343 INFO : End of initialization
527 19:36:17.079810 INFO : End of read enable training
528 19:36:17.085038 INFO : End of fine write leveling
529 19:36:17.090644 INFO : End of Write leveling coarse delay
530 19:36:17.091258 INFO : Training has run successfully!
531 19:36:17.091725 Check phy result
532 19:36:17.096198 INFO : End of initialization
533 19:36:17.096761 INFO : End of read dq deskew training
534 19:36:17.101713 INFO : End of MPR read delay center optimization
535 19:36:17.107308 INFO : End of write delay center optimization
536 19:36:17.112969 INFO : End of read delay center optimization
537 19:36:17.113468 INFO : End of max read latency training
538 19:36:17.118545 INFO : Training has run successfully!
539 19:36:17.119001 1D training succeed
540 19:36:17.127682 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 19:36:17.175624 Check phy result
542 19:36:17.176294 INFO : End of initialization
543 19:36:17.197182 INFO : End of 2D read delay Voltage center optimization
544 19:36:17.217656 INFO : End of 2D read delay Voltage center optimization
545 19:36:17.269545 INFO : End of 2D write delay Voltage center optimization
546 19:36:17.318858 INFO : End of 2D write delay Voltage center optimization
547 19:36:17.324279 INFO : Training has run successfully!
548 19:36:17.324559
549 19:36:17.324785 channel==0
550 19:36:17.329952 RxClkDly_Margin_A0==88 ps 9
551 19:36:17.330495 TxDqDly_Margin_A0==98 ps 10
552 19:36:17.333199 RxClkDly_Margin_A1==88 ps 9
553 19:36:17.333685 TxDqDly_Margin_A1==98 ps 10
554 19:36:17.338722 TrainedVREFDQ_A0==74
555 19:36:17.339193 TrainedVREFDQ_A1==75
556 19:36:17.344365 VrefDac_Margin_A0==25
557 19:36:17.344847 DeviceVref_Margin_A0==40
558 19:36:17.345260 VrefDac_Margin_A1==25
559 19:36:17.350078 DeviceVref_Margin_A1==39
560 19:36:17.350425
561 19:36:17.350660
562 19:36:17.350877 channel==1
563 19:36:17.351090 RxClkDly_Margin_A0==98 ps 10
564 19:36:17.353332 TxDqDly_Margin_A0==88 ps 9
565 19:36:17.358850 RxClkDly_Margin_A1==88 ps 9
566 19:36:17.359157 TxDqDly_Margin_A1==88 ps 9
567 19:36:17.359393 TrainedVREFDQ_A0==76
568 19:36:17.364493 TrainedVREFDQ_A1==77
569 19:36:17.364831 VrefDac_Margin_A0==22
570 19:36:17.370076 DeviceVref_Margin_A0==38
571 19:36:17.370553 VrefDac_Margin_A1==24
572 19:36:17.370960 DeviceVref_Margin_A1==37
573 19:36:17.371358
574 19:36:17.375655 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 19:36:17.376148
576 19:36:17.409423 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 19:36:17.410004 2D training succeed
578 19:36:17.415370 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 19:36:17.420606 auto size-- 65535DDR cs0 size: 2048MB
580 19:36:17.421143 DDR cs1 size: 2048MB
581 19:36:17.426235 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 19:36:17.426837 cs0 DataBus test pass
583 19:36:17.427313 cs1 DataBus test pass
584 19:36:17.431801 cs0 AddrBus test pass
585 19:36:17.432400 cs1 AddrBus test pass
586 19:36:17.432876
587 19:36:17.437469 100bdlr_step_size ps== 420
588 19:36:17.438074 result report
589 19:36:17.438556 boot times 0Enable ddr reg access
590 19:36:17.447218 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 19:36:17.460782 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 19:36:18.034367 0.0;M3 CHK:0;cm4_sp_mode 0
593 19:36:18.035032 MVN_1=0x00000000
594 19:36:18.039824 MVN_2=0x00000000
595 19:36:18.045603 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 19:36:18.046197 OPS=0x10
597 19:36:18.046675 ring efuse init
598 19:36:18.047131 chipver efuse init
599 19:36:18.051128 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 19:36:18.056713 [0.018961 Inits done]
601 19:36:18.057246 secure task start!
602 19:36:18.057685 high task start!
603 19:36:18.061321 low task start!
604 19:36:18.061867 run into bl31
605 19:36:18.067921 NOTICE: BL31: v1.3(release):4fc40b1
606 19:36:18.075746 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 19:36:18.076290 NOTICE: BL31: G12A normal boot!
608 19:36:18.101235 NOTICE: BL31: BL33 decompress pass
609 19:36:18.106872 ERROR: Error initializing runtime service opteed_fast
610 19:36:19.339771
611 19:36:19.340476
612 19:36:19.348084 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 19:36:19.348597
614 19:36:19.349061 Model: Libre Computer AML-A311D-CC Alta
615 19:36:19.556557 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 19:36:19.579937 DRAM: 2 GiB (effective 3.8 GiB)
617 19:36:19.722911 Core: 408 devices, 31 uclasses, devicetree: separate
618 19:36:19.728751 WDT: Not starting watchdog@f0d0
619 19:36:19.761156 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 19:36:19.773471 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 19:36:19.778435 ** Bad device specification mmc 0 **
622 19:36:19.788810 Card did not respond to voltage select! : -110
623 19:36:19.796466 ** Bad device specification mmc 0 **
624 19:36:19.796950 Couldn't find partition mmc 0
625 19:36:19.804770 Card did not respond to voltage select! : -110
626 19:36:19.810315 ** Bad device specification mmc 0 **
627 19:36:19.810804 Couldn't find partition mmc 0
628 19:36:19.815330 Error: could not access storage.
629 19:36:20.157873 Net: eth0: ethernet@ff3f0000
630 19:36:20.158519 starting USB...
631 19:36:20.409760 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 19:36:20.410359 Starting the controller
633 19:36:20.416630 USB XHCI 1.10
634 19:36:22.130253 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 19:36:22.130899 bl2_stage_init 0x01
636 19:36:22.131323 bl2_stage_init 0x81
637 19:36:22.135835 hw id: 0x0000 - pwm id 0x01
638 19:36:22.136370 bl2_stage_init 0xc1
639 19:36:22.136792 bl2_stage_init 0x02
640 19:36:22.137199
641 19:36:22.141459 L0:00000000
642 19:36:22.141942 L1:20000703
643 19:36:22.142351 L2:00008067
644 19:36:22.142752 L3:14000000
645 19:36:22.147068 B2:00402000
646 19:36:22.147545 B1:e0f83180
647 19:36:22.147950
648 19:36:22.148392 TE: 58167
649 19:36:22.148793
650 19:36:22.152629 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 19:36:22.153113
652 19:36:22.153525 Board ID = 1
653 19:36:22.158220 Set A53 clk to 24M
654 19:36:22.158704 Set A73 clk to 24M
655 19:36:22.159109 Set clk81 to 24M
656 19:36:22.163872 A53 clk: 1200 MHz
657 19:36:22.164383 A73 clk: 1200 MHz
658 19:36:22.164792 CLK81: 166.6M
659 19:36:22.165194 smccc: 00012abe
660 19:36:22.169425 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 19:36:22.175057 board id: 1
662 19:36:22.180106 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 19:36:22.191499 fw parse done
664 19:36:22.197446 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 19:36:22.240167 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 19:36:22.251065 PIEI prepare done
667 19:36:22.251563 fastboot data load
668 19:36:22.252017 fastboot data verify
669 19:36:22.256716 verify result: 266
670 19:36:22.262226 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 19:36:22.262707 LPDDR4 probe
672 19:36:22.263120 ddr clk to 1584MHz
673 19:36:22.270292 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 19:36:22.307584
675 19:36:22.308197 dmc_version 0001
676 19:36:22.314198 Check phy result
677 19:36:22.320213 INFO : End of CA training
678 19:36:22.320692 INFO : End of initialization
679 19:36:22.325626 INFO : Training has run successfully!
680 19:36:22.326095 Check phy result
681 19:36:22.331275 INFO : End of initialization
682 19:36:22.331749 INFO : End of read enable training
683 19:36:22.334499 INFO : End of fine write leveling
684 19:36:22.340147 INFO : End of Write leveling coarse delay
685 19:36:22.345666 INFO : Training has run successfully!
686 19:36:22.346142 Check phy result
687 19:36:22.346551 INFO : End of initialization
688 19:36:22.351353 INFO : End of read dq deskew training
689 19:36:22.354678 INFO : End of MPR read delay center optimization
690 19:36:22.360220 INFO : End of write delay center optimization
691 19:36:22.365798 INFO : End of read delay center optimization
692 19:36:22.366263 INFO : End of max read latency training
693 19:36:22.371395 INFO : Training has run successfully!
694 19:36:22.371862 1D training succeed
695 19:36:22.379711 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 19:36:22.427337 Check phy result
697 19:36:22.427932 INFO : End of initialization
698 19:36:22.449773 INFO : End of 2D read delay Voltage center optimization
699 19:36:22.470022 INFO : End of 2D read delay Voltage center optimization
700 19:36:22.521006 INFO : End of 2D write delay Voltage center optimization
701 19:36:22.571372 INFO : End of 2D write delay Voltage center optimization
702 19:36:22.576932 INFO : Training has run successfully!
703 19:36:22.577418
704 19:36:22.577832 channel==0
705 19:36:22.582603 RxClkDly_Margin_A0==88 ps 9
706 19:36:22.583113 TxDqDly_Margin_A0==98 ps 10
707 19:36:22.588131 RxClkDly_Margin_A1==88 ps 9
708 19:36:22.588610 TxDqDly_Margin_A1==98 ps 10
709 19:36:22.589023 TrainedVREFDQ_A0==74
710 19:36:22.593640 TrainedVREFDQ_A1==75
711 19:36:22.594124 VrefDac_Margin_A0==24
712 19:36:22.594542 DeviceVref_Margin_A0==40
713 19:36:22.599319 VrefDac_Margin_A1==25
714 19:36:22.599803 DeviceVref_Margin_A1==39
715 19:36:22.600268
716 19:36:22.600682
717 19:36:22.604953 channel==1
718 19:36:22.605432 RxClkDly_Margin_A0==98 ps 10
719 19:36:22.605839 TxDqDly_Margin_A0==88 ps 9
720 19:36:22.610485 RxClkDly_Margin_A1==88 ps 9
721 19:36:22.610961 TxDqDly_Margin_A1==88 ps 9
722 19:36:22.616085 TrainedVREFDQ_A0==76
723 19:36:22.616556 TrainedVREFDQ_A1==77
724 19:36:22.616966 VrefDac_Margin_A0==22
725 19:36:22.621670 DeviceVref_Margin_A0==38
726 19:36:22.622140 VrefDac_Margin_A1==24
727 19:36:22.627285 DeviceVref_Margin_A1==37
728 19:36:22.627791
729 19:36:22.628242 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 19:36:22.628646
731 19:36:22.660926 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
732 19:36:22.661496 2D training succeed
733 19:36:22.666480 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 19:36:22.672182 auto size-- 65535DDR cs0 size: 2048MB
735 19:36:22.672679 DDR cs1 size: 2048MB
736 19:36:22.677677 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 19:36:22.678152 cs0 DataBus test pass
738 19:36:22.683304 cs1 DataBus test pass
739 19:36:22.683766 cs0 AddrBus test pass
740 19:36:22.684206 cs1 AddrBus test pass
741 19:36:22.684606
742 19:36:22.688932 100bdlr_step_size ps== 420
743 19:36:22.689409 result report
744 19:36:22.694487 boot times 0Enable ddr reg access
745 19:36:22.699793 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 19:36:22.713294 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 19:36:23.286965 0.0;M3 CHK:0;cm4_sp_mode 0
748 19:36:23.287605 MVN_1=0x00000000
749 19:36:23.292401 MVN_2=0x00000000
750 19:36:23.298129 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 19:36:23.298612 OPS=0x10
752 19:36:23.299009 ring efuse init
753 19:36:23.299394 chipver efuse init
754 19:36:23.306451 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 19:36:23.306938 [0.018960 Inits done]
756 19:36:23.307333 secure task start!
757 19:36:23.313937 high task start!
758 19:36:23.314397 low task start!
759 19:36:23.314784 run into bl31
760 19:36:23.320582 NOTICE: BL31: v1.3(release):4fc40b1
761 19:36:23.328430 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 19:36:23.328895 NOTICE: BL31: G12A normal boot!
763 19:36:23.353788 NOTICE: BL31: BL33 decompress pass
764 19:36:23.359527 ERROR: Error initializing runtime service opteed_fast
765 19:36:24.592336
766 19:36:24.592800
767 19:36:24.600780 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 19:36:24.601166
769 19:36:24.601397 Model: Libre Computer AML-A311D-CC Alta
770 19:36:24.809258 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 19:36:24.835234 DRAM: 2 GiB (effective 3.8 GiB)
772 19:36:24.975665 Core: 408 devices, 31 uclasses, devicetree: separate
773 19:36:24.981494 WDT: Not starting watchdog@f0d0
774 19:36:25.013829 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 19:36:25.026403 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 19:36:25.031248 ** Bad device specification mmc 0 **
777 19:36:25.041532 Card did not respond to voltage select! : -110
778 19:36:25.049193 ** Bad device specification mmc 0 **
779 19:36:25.049605 Couldn't find partition mmc 0
780 19:36:25.057599 Card did not respond to voltage select! : -110
781 19:36:25.063165 ** Bad device specification mmc 0 **
782 19:36:25.064156 Couldn't find partition mmc 0
783 19:36:25.068292 Error: could not access storage.
784 19:36:25.410765 Net: eth0: ethernet@ff3f0000
785 19:36:25.411335 starting USB...
786 19:36:25.662420 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 19:36:25.662871 Starting the controller
788 19:36:25.669307 USB XHCI 1.10
789 19:36:27.828686 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
790 19:36:27.829298 bl2_stage_init 0x81
791 19:36:27.834261 hw id: 0x0000 - pwm id 0x01
792 19:36:27.834561 bl2_stage_init 0xc1
793 19:36:27.834788 bl2_stage_init 0x02
794 19:36:27.834999
795 19:36:27.839882 L0:00000000
796 19:36:27.840207 L1:20000703
797 19:36:27.840420 L2:00008067
798 19:36:27.840637 L3:14000000
799 19:36:27.840842 B2:00402000
800 19:36:27.845422 B1:e0f83180
801 19:36:27.845811
802 19:36:27.846139 TE: 58150
803 19:36:27.846453
804 19:36:27.851094 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 19:36:27.851530
806 19:36:27.851769 Board ID = 1
807 19:36:27.856741 Set A53 clk to 24M
808 19:36:27.857155 Set A73 clk to 24M
809 19:36:27.857388 Set clk81 to 24M
810 19:36:27.862225 A53 clk: 1200 MHz
811 19:36:27.862525 A73 clk: 1200 MHz
812 19:36:27.862735 CLK81: 166.6M
813 19:36:27.862940 smccc: 00012aab
814 19:36:27.867760 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 19:36:27.873356 board id: 1
816 19:36:27.879182 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 19:36:27.889843 fw parse done
818 19:36:27.895794 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 19:36:27.938423 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 19:36:27.949327 PIEI prepare done
821 19:36:27.949656 fastboot data load
822 19:36:27.949867 fastboot data verify
823 19:36:27.955055 verify result: 266
824 19:36:27.960576 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 19:36:27.960875 LPDDR4 probe
826 19:36:27.961086 ddr clk to 1584MHz
827 19:36:27.968664 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 19:36:28.006003
829 19:36:28.006394 dmc_version 0001
830 19:36:28.012541 Check phy result
831 19:36:28.018449 INFO : End of CA training
832 19:36:28.018935 INFO : End of initialization
833 19:36:28.024010 INFO : Training has run successfully!
834 19:36:28.024347 Check phy result
835 19:36:28.029814 INFO : End of initialization
836 19:36:28.030284 INFO : End of read enable training
837 19:36:28.035263 INFO : End of fine write leveling
838 19:36:28.040893 INFO : End of Write leveling coarse delay
839 19:36:28.041209 INFO : Training has run successfully!
840 19:36:28.041428 Check phy result
841 19:36:28.046487 INFO : End of initialization
842 19:36:28.046814 INFO : End of read dq deskew training
843 19:36:28.052146 INFO : End of MPR read delay center optimization
844 19:36:28.057575 INFO : End of write delay center optimization
845 19:36:28.063190 INFO : End of read delay center optimization
846 19:36:28.063727 INFO : End of max read latency training
847 19:36:28.068875 INFO : Training has run successfully!
848 19:36:28.069396 1D training succeed
849 19:36:28.077999 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 19:36:28.125680 Check phy result
851 19:36:28.126347 INFO : End of initialization
852 19:36:28.147494 INFO : End of 2D read delay Voltage center optimization
853 19:36:28.166928 INFO : End of 2D read delay Voltage center optimization
854 19:36:28.219090 INFO : End of 2D write delay Voltage center optimization
855 19:36:28.268394 INFO : End of 2D write delay Voltage center optimization
856 19:36:28.273929 INFO : Training has run successfully!
857 19:36:28.274488
858 19:36:28.274962 channel==0
859 19:36:28.279441 RxClkDly_Margin_A0==88 ps 9
860 19:36:28.279973 TxDqDly_Margin_A0==98 ps 10
861 19:36:28.282708 RxClkDly_Margin_A1==88 ps 9
862 19:36:28.283222 TxDqDly_Margin_A1==88 ps 9
863 19:36:28.288259 TrainedVREFDQ_A0==74
864 19:36:28.288815 TrainedVREFDQ_A1==74
865 19:36:28.289316 VrefDac_Margin_A0==25
866 19:36:28.293890 DeviceVref_Margin_A0==40
867 19:36:28.294494 VrefDac_Margin_A1==25
868 19:36:28.299469 DeviceVref_Margin_A1==40
869 19:36:28.300134
870 19:36:28.300615
871 19:36:28.301049 channel==1
872 19:36:28.301473 RxClkDly_Margin_A0==98 ps 10
873 19:36:28.303036 TxDqDly_Margin_A0==98 ps 10
874 19:36:28.308586 RxClkDly_Margin_A1==98 ps 10
875 19:36:28.309102 TxDqDly_Margin_A1==88 ps 9
876 19:36:28.309542 TrainedVREFDQ_A0==77
877 19:36:28.314180 TrainedVREFDQ_A1==77
878 19:36:28.314691 VrefDac_Margin_A0==23
879 19:36:28.319863 DeviceVref_Margin_A0==37
880 19:36:28.320398 VrefDac_Margin_A1==23
881 19:36:28.320836 DeviceVref_Margin_A1==37
882 19:36:28.321262
883 19:36:28.328862 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 19:36:28.329376
885 19:36:28.356922 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000019 00000019 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000018 dram_vref_reg_value 0x 0000005f
886 19:36:28.357604 2D training succeed
887 19:36:28.362414 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 19:36:28.368075 auto size-- 65535DDR cs0 size: 2048MB
889 19:36:28.368598 DDR cs1 size: 2048MB
890 19:36:28.373683 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 19:36:28.374182 cs0 DataBus test pass
892 19:36:28.379338 cs1 DataBus test pass
893 19:36:28.379834 cs0 AddrBus test pass
894 19:36:28.384891 cs1 AddrBus test pass
895 19:36:28.385385
896 19:36:28.385825 100bdlr_step_size ps== 420
897 19:36:28.386268 result report
898 19:36:28.390416 boot times 0Enable ddr reg access
899 19:36:28.396790 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 19:36:28.410181 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 19:36:28.983967 0.0;M3 CHK:0;cm4_sp_mode 0
902 19:36:28.984662 MVN_1=0x00000000
903 19:36:28.989435 MVN_2=0x00000000
904 19:36:28.995145 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 19:36:28.995661 OPS=0x10
906 19:36:28.996165 ring efuse init
907 19:36:28.996623 chipver efuse init
908 19:36:29.000629 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 19:36:29.006417 [0.018961 Inits done]
910 19:36:29.006930 secure task start!
911 19:36:29.007389 high task start!
912 19:36:29.009933 low task start!
913 19:36:29.010460 run into bl31
914 19:36:29.017618 NOTICE: BL31: v1.3(release):4fc40b1
915 19:36:29.024451 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 19:36:29.025048 NOTICE: BL31: G12A normal boot!
917 19:36:29.050653 NOTICE: BL31: BL33 decompress pass
918 19:36:29.056254 ERROR: Error initializing runtime service opteed_fast
919 19:36:30.289228
920 19:36:30.289892
921 19:36:30.297588 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 19:36:30.298154
923 19:36:30.298628 Model: Libre Computer AML-A311D-CC Alta
924 19:36:30.506019 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 19:36:30.529354 DRAM: 2 GiB (effective 3.8 GiB)
926 19:36:30.672434 Core: 408 devices, 31 uclasses, devicetree: separate
927 19:36:30.678310 WDT: Not starting watchdog@f0d0
928 19:36:30.710583 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 19:36:30.722983 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 19:36:30.727970 ** Bad device specification mmc 0 **
931 19:36:30.738336 Card did not respond to voltage select! : -110
932 19:36:30.745986 ** Bad device specification mmc 0 **
933 19:36:30.746492 Couldn't find partition mmc 0
934 19:36:30.754312 Card did not respond to voltage select! : -110
935 19:36:30.759887 ** Bad device specification mmc 0 **
936 19:36:30.760416 Couldn't find partition mmc 0
937 19:36:30.763930 Error: could not access storage.
938 19:36:31.106452 Net: eth0: ethernet@ff3f0000
939 19:36:31.107073 starting USB...
940 19:36:31.359089 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 19:36:31.359712 Starting the controller
942 19:36:31.365204 USB XHCI 1.10
943 19:36:32.920120 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 19:36:32.928537 scanning usb for storage devices... 0 Storage Device(s) found
946 19:36:32.980171 Hit any key to stop autoboot: 1
947 19:36:32.981102 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 19:36:32.981784 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 19:36:32.982282 Setting prompt string to ['=>']
950 19:36:32.982780 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 19:36:32.996095 0
952 19:36:32.997106 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 19:36:32.997626 Sending with 10 millisecond of delay
955 19:36:34.133238 => setenv autoload no
956 19:36:34.144105 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 19:36:34.149441 setenv autoload no
958 19:36:34.150218 Sending with 10 millisecond of delay
960 19:36:35.947588 => setenv initrd_high 0xffffffff
961 19:36:35.958481 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 19:36:35.959407 setenv initrd_high 0xffffffff
963 19:36:35.960175 Sending with 10 millisecond of delay
965 19:36:37.577085 => setenv fdt_high 0xffffffff
966 19:36:37.587935 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 19:36:37.588841 setenv fdt_high 0xffffffff
968 19:36:37.589599 Sending with 10 millisecond of delay
970 19:36:37.881505 => dhcp
971 19:36:37.892318 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 19:36:37.893189 dhcp
973 19:36:37.893674 Speed: 1000, full duplex
974 19:36:37.894127 BOOTP broadcast 1
975 19:36:37.902630 DHCP client bound to address 192.168.6.27 (11 ms)
976 19:36:37.903378 Sending with 10 millisecond of delay
978 19:36:39.580314 => setenv serverip 192.168.6.2
979 19:36:39.591190 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
980 19:36:39.592185 setenv serverip 192.168.6.2
981 19:36:39.592932 Sending with 10 millisecond of delay
983 19:36:43.318602 => tftpboot 0x01080000 967929/tftp-deploy-p7x7bi4p/kernel/uImage
984 19:36:43.329503 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 19:36:43.330510 tftpboot 0x01080000 967929/tftp-deploy-p7x7bi4p/kernel/uImage
986 19:36:43.331042 Speed: 1000, full duplex
987 19:36:43.331526 Using ethernet@ff3f0000 device
988 19:36:43.332387 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 19:36:43.337812 Filename '967929/tftp-deploy-p7x7bi4p/kernel/uImage'.
990 19:36:43.341689 Load address: 0x1080000
991 19:36:46.362597 Loading: *################################################## 43.6 MiB
992 19:36:46.363036 14.4 MiB/s
993 19:36:46.363291 done
994 19:36:46.366175 Bytes transferred = 45713984 (2b98a40 hex)
995 19:36:46.366787 Sending with 10 millisecond of delay
997 19:36:51.063217 => tftpboot 0x08000000 967929/tftp-deploy-p7x7bi4p/ramdisk/ramdisk.cpio.gz.uboot
998 19:36:51.074167 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
999 19:36:51.075027 tftpboot 0x08000000 967929/tftp-deploy-p7x7bi4p/ramdisk/ramdisk.cpio.gz.uboot
1000 19:36:51.075297 Speed: 1000, full duplex
1001 19:36:51.075521 Using ethernet@ff3f0000 device
1002 19:36:51.077099 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 19:36:51.085821 Filename '967929/tftp-deploy-p7x7bi4p/ramdisk/ramdisk.cpio.gz.uboot'.
1004 19:36:51.086419 Load address: 0x8000000
1005 19:36:58.248519 Loading: *################T ################################# UDP wrong checksum 00000005 000029ac
1006 19:37:03.249098 T UDP wrong checksum 00000005 000029ac
1007 19:37:08.415813 T UDP wrong checksum 000000ff 0000238c
1008 19:37:08.457271 UDP wrong checksum 000000ff 0000bd7e
1009 19:37:13.252388 T UDP wrong checksum 00000005 000029ac
1010 19:37:33.256133 T T T T UDP wrong checksum 00000005 000029ac
1011 19:37:48.259750 T T
1012 19:37:48.260408 Retry count exceeded; starting again
1014 19:37:48.261847 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1017 19:37:48.263746 end: 2.4 uboot-commands (duration 00:01:47) [common]
1019 19:37:48.265171 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1021 19:37:48.266232 end: 2 uboot-action (duration 00:01:47) [common]
1023 19:37:48.267743 Cleaning after the job
1024 19:37:48.268330 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/ramdisk
1025 19:37:48.269567 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/kernel
1026 19:37:48.276803 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/dtb
1027 19:37:48.277882 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/nfsrootfs
1028 19:37:48.342205 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967929/tftp-deploy-p7x7bi4p/modules
1029 19:37:48.349423 start: 4.1 power-off (timeout 00:00:30) [common]
1030 19:37:48.350010 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1031 19:37:48.389145 >> OK - accepted request
1032 19:37:48.391047 Returned 0 in 0 seconds
1033 19:37:48.491843 end: 4.1 power-off (duration 00:00:00) [common]
1035 19:37:48.492882 start: 4.2 read-feedback (timeout 00:10:00) [common]
1036 19:37:48.493553 Listened to connection for namespace 'common' for up to 1s
1037 19:37:49.494570 Finalising connection for namespace 'common'
1038 19:37:49.495331 Disconnecting from shell: Finalise
1039 19:37:49.495849 =>
1040 19:37:49.596957 end: 4.2 read-feedback (duration 00:00:01) [common]
1041 19:37:49.597713 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/967929
1042 19:37:52.002821 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/967929
1043 19:37:52.003425 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.