Boot log: meson-sm1-s905d3-libretech-cc

    1 19:41:37.250589  lava-dispatcher, installed at version: 2024.01
    2 19:41:37.251398  start: 0 validate
    3 19:41:37.251875  Start time: 2024-11-09 19:41:37.251845+00:00 (UTC)
    4 19:41:37.252482  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 19:41:37.253007  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 19:41:37.293121  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 19:41:37.293693  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 19:41:37.322918  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 19:41:37.323679  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 19:41:37.354723  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 19:41:37.355203  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 19:41:37.386197  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 19:41:37.386686  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 19:41:37.425173  validate duration: 0.17
   16 19:41:37.426026  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 19:41:37.426376  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 19:41:37.426687  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 19:41:37.427294  Not decompressing ramdisk as can be used compressed.
   20 19:41:37.427774  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
   21 19:41:37.428085  saving as /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/ramdisk/initrd.cpio.gz
   22 19:41:37.428385  total size: 5628140 (5 MB)
   23 19:41:37.464856  progress   0 % (0 MB)
   24 19:41:37.472319  progress   5 % (0 MB)
   25 19:41:37.479964  progress  10 % (0 MB)
   26 19:41:37.486818  progress  15 % (0 MB)
   27 19:41:37.493298  progress  20 % (1 MB)
   28 19:41:37.496901  progress  25 % (1 MB)
   29 19:41:37.500867  progress  30 % (1 MB)
   30 19:41:37.505019  progress  35 % (1 MB)
   31 19:41:37.508613  progress  40 % (2 MB)
   32 19:41:37.512569  progress  45 % (2 MB)
   33 19:41:37.516166  progress  50 % (2 MB)
   34 19:41:37.520161  progress  55 % (2 MB)
   35 19:41:37.524106  progress  60 % (3 MB)
   36 19:41:37.527618  progress  65 % (3 MB)
   37 19:41:37.531752  progress  70 % (3 MB)
   38 19:41:37.535331  progress  75 % (4 MB)
   39 19:41:37.539279  progress  80 % (4 MB)
   40 19:41:37.542854  progress  85 % (4 MB)
   41 19:41:37.546822  progress  90 % (4 MB)
   42 19:41:37.550589  progress  95 % (5 MB)
   43 19:41:37.553864  progress 100 % (5 MB)
   44 19:41:37.554541  5 MB downloaded in 0.13 s (42.55 MB/s)
   45 19:41:37.555118  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 19:41:37.556067  end: 1.1 download-retry (duration 00:00:00) [common]
   48 19:41:37.556392  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 19:41:37.556679  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 19:41:37.557172  downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/kernel/Image
   51 19:41:37.557433  saving as /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/kernel/Image
   52 19:41:37.557651  total size: 45713920 (43 MB)
   53 19:41:37.557869  No compression specified
   54 19:41:37.591494  progress   0 % (0 MB)
   55 19:41:37.619717  progress   5 % (2 MB)
   56 19:41:37.647222  progress  10 % (4 MB)
   57 19:41:37.674743  progress  15 % (6 MB)
   58 19:41:37.702177  progress  20 % (8 MB)
   59 19:41:37.729627  progress  25 % (10 MB)
   60 19:41:37.756951  progress  30 % (13 MB)
   61 19:41:37.784570  progress  35 % (15 MB)
   62 19:41:37.812217  progress  40 % (17 MB)
   63 19:41:37.839750  progress  45 % (19 MB)
   64 19:41:37.867712  progress  50 % (21 MB)
   65 19:41:37.895546  progress  55 % (24 MB)
   66 19:41:37.923835  progress  60 % (26 MB)
   67 19:41:37.951327  progress  65 % (28 MB)
   68 19:41:37.979173  progress  70 % (30 MB)
   69 19:41:38.007074  progress  75 % (32 MB)
   70 19:41:38.035276  progress  80 % (34 MB)
   71 19:41:38.062758  progress  85 % (37 MB)
   72 19:41:38.090490  progress  90 % (39 MB)
   73 19:41:38.118263  progress  95 % (41 MB)
   74 19:41:38.145883  progress 100 % (43 MB)
   75 19:41:38.146410  43 MB downloaded in 0.59 s (74.05 MB/s)
   76 19:41:38.146906  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 19:41:38.147765  end: 1.2 download-retry (duration 00:00:01) [common]
   79 19:41:38.148089  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 19:41:38.148385  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 19:41:38.148875  downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 19:41:38.149160  saving as /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 19:41:38.149380  total size: 53209 (0 MB)
   84 19:41:38.149595  No compression specified
   85 19:41:38.188781  progress  61 % (0 MB)
   86 19:41:38.189631  progress 100 % (0 MB)
   87 19:41:38.190202  0 MB downloaded in 0.04 s (1.24 MB/s)
   88 19:41:38.190704  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 19:41:38.191545  end: 1.3 download-retry (duration 00:00:00) [common]
   91 19:41:38.191827  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 19:41:38.192137  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 19:41:38.192607  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
   94 19:41:38.192859  saving as /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/nfsrootfs/full.rootfs.tar
   95 19:41:38.193076  total size: 474398908 (452 MB)
   96 19:41:38.193295  Using unxz to decompress xz
   97 19:41:38.227002  progress   0 % (0 MB)
   98 19:41:39.329254  progress   5 % (22 MB)
   99 19:41:40.769081  progress  10 % (45 MB)
  100 19:41:41.205934  progress  15 % (67 MB)
  101 19:41:41.990730  progress  20 % (90 MB)
  102 19:41:42.531568  progress  25 % (113 MB)
  103 19:41:42.887019  progress  30 % (135 MB)
  104 19:41:43.491212  progress  35 % (158 MB)
  105 19:41:44.423398  progress  40 % (181 MB)
  106 19:41:45.294108  progress  45 % (203 MB)
  107 19:41:46.049034  progress  50 % (226 MB)
  108 19:41:46.846457  progress  55 % (248 MB)
  109 19:41:48.066674  progress  60 % (271 MB)
  110 19:41:49.559388  progress  65 % (294 MB)
  111 19:41:51.135802  progress  70 % (316 MB)
  112 19:41:54.202411  progress  75 % (339 MB)
  113 19:41:56.625887  progress  80 % (361 MB)
  114 19:41:59.570980  progress  85 % (384 MB)
  115 19:42:02.743253  progress  90 % (407 MB)
  116 19:42:05.957150  progress  95 % (429 MB)
  117 19:42:09.200604  progress 100 % (452 MB)
  118 19:42:09.213640  452 MB downloaded in 31.02 s (14.58 MB/s)
  119 19:42:09.214627  end: 1.4.1 http-download (duration 00:00:31) [common]
  121 19:42:09.216550  end: 1.4 download-retry (duration 00:00:31) [common]
  122 19:42:09.217178  start: 1.5 download-retry (timeout 00:09:28) [common]
  123 19:42:09.217870  start: 1.5.1 http-download (timeout 00:09:28) [common]
  124 19:42:09.218761  downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/modules.tar.xz
  125 19:42:09.219253  saving as /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/modules/modules.tar
  126 19:42:09.219699  total size: 11612124 (11 MB)
  127 19:42:09.220197  Using unxz to decompress xz
  128 19:42:09.265876  progress   0 % (0 MB)
  129 19:42:09.331586  progress   5 % (0 MB)
  130 19:42:09.408427  progress  10 % (1 MB)
  131 19:42:09.507257  progress  15 % (1 MB)
  132 19:42:09.607443  progress  20 % (2 MB)
  133 19:42:09.689455  progress  25 % (2 MB)
  134 19:42:09.767324  progress  30 % (3 MB)
  135 19:42:09.848511  progress  35 % (3 MB)
  136 19:42:09.923941  progress  40 % (4 MB)
  137 19:42:10.003195  progress  45 % (5 MB)
  138 19:42:10.089453  progress  50 % (5 MB)
  139 19:42:10.171748  progress  55 % (6 MB)
  140 19:42:10.260149  progress  60 % (6 MB)
  141 19:42:10.340437  progress  65 % (7 MB)
  142 19:42:10.420550  progress  70 % (7 MB)
  143 19:42:10.499914  progress  75 % (8 MB)
  144 19:42:10.583441  progress  80 % (8 MB)
  145 19:42:10.662945  progress  85 % (9 MB)
  146 19:42:10.741513  progress  90 % (9 MB)
  147 19:42:10.818838  progress  95 % (10 MB)
  148 19:42:10.895883  progress 100 % (11 MB)
  149 19:42:10.907740  11 MB downloaded in 1.69 s (6.56 MB/s)
  150 19:42:10.908865  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 19:42:10.910950  end: 1.5 download-retry (duration 00:00:02) [common]
  153 19:42:10.911611  start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
  154 19:42:10.912324  start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
  155 19:42:26.947425  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/967933/extract-nfsrootfs-pr_ubedd
  156 19:42:26.948057  end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
  157 19:42:26.948393  start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
  158 19:42:26.949126  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i
  159 19:42:26.949621  makedir: /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin
  160 19:42:26.950023  makedir: /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/tests
  161 19:42:26.950422  makedir: /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/results
  162 19:42:26.950837  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-add-keys
  163 19:42:26.951454  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-add-sources
  164 19:42:26.952080  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-background-process-start
  165 19:42:26.952624  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-background-process-stop
  166 19:42:26.953154  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-common-functions
  167 19:42:26.953648  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-echo-ipv4
  168 19:42:26.954125  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-install-packages
  169 19:42:26.954611  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-installed-packages
  170 19:42:26.955088  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-os-build
  171 19:42:26.955580  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-probe-channel
  172 19:42:26.956104  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-probe-ip
  173 19:42:26.956606  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-target-ip
  174 19:42:26.957083  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-target-mac
  175 19:42:26.957562  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-target-storage
  176 19:42:26.958060  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-test-case
  177 19:42:26.958542  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-test-event
  178 19:42:26.959016  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-test-feedback
  179 19:42:26.959517  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-test-raise
  180 19:42:26.960033  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-test-reference
  181 19:42:26.960533  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-test-runner
  182 19:42:26.961019  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-test-set
  183 19:42:26.961496  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-test-shell
  184 19:42:26.962014  Updating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-install-packages (oe)
  185 19:42:26.962589  Updating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/bin/lava-installed-packages (oe)
  186 19:42:26.963073  Creating /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/environment
  187 19:42:26.963456  LAVA metadata
  188 19:42:26.963716  - LAVA_JOB_ID=967933
  189 19:42:26.963932  - LAVA_DISPATCHER_IP=192.168.6.2
  190 19:42:26.964358  start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
  191 19:42:26.965341  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 19:42:26.965659  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
  193 19:42:26.965867  skipped lava-vland-overlay
  194 19:42:26.966107  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 19:42:26.966365  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
  196 19:42:26.966584  skipped lava-multinode-overlay
  197 19:42:26.966825  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 19:42:26.967077  start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
  199 19:42:26.967329  Loading test definitions
  200 19:42:26.967605  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
  201 19:42:26.967828  Using /lava-967933 at stage 0
  202 19:42:26.969065  uuid=967933_1.6.2.4.1 testdef=None
  203 19:42:26.969390  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 19:42:26.969655  start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
  205 19:42:26.971422  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 19:42:26.972262  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
  208 19:42:26.974560  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 19:42:26.975478  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
  211 19:42:26.977737  runner path: /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 967933_1.6.2.4.1
  212 19:42:26.978342  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 19:42:26.979111  Creating lava-test-runner.conf files
  215 19:42:26.979313  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/967933/lava-overlay-zokrwg5i/lava-967933/0 for stage 0
  216 19:42:26.979647  - 0_v4l2-decoder-conformance-h264
  217 19:42:26.980014  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 19:42:26.980309  start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
  219 19:42:27.002856  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 19:42:27.003282  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
  221 19:42:27.003543  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 19:42:27.003812  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 19:42:27.004119  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
  224 19:42:27.623438  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 19:42:27.623913  start: 1.6.4 extract-modules (timeout 00:09:10) [common]
  226 19:42:27.624208  extracting modules file /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/967933/extract-nfsrootfs-pr_ubedd
  227 19:42:28.998158  extracting modules file /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/967933/extract-overlay-ramdisk-rsqnwfp6/ramdisk
  228 19:42:30.391510  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 19:42:30.392019  start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
  230 19:42:30.392300  [common] Applying overlay to NFS
  231 19:42:30.392514  [common] Applying overlay /var/lib/lava/dispatcher/tmp/967933/compress-overlay-0uxp34xa/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/967933/extract-nfsrootfs-pr_ubedd
  232 19:42:30.421767  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 19:42:30.422205  start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
  234 19:42:30.422505  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
  235 19:42:30.422737  Converting downloaded kernel to a uImage
  236 19:42:30.423039  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/kernel/Image /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/kernel/uImage
  237 19:42:30.869931  output: Image Name:   
  238 19:42:30.870355  output: Created:      Sat Nov  9 19:42:30 2024
  239 19:42:30.870565  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 19:42:30.870771  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  241 19:42:30.870973  output: Load Address: 01080000
  242 19:42:30.871171  output: Entry Point:  01080000
  243 19:42:30.871369  output: 
  244 19:42:30.871707  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  245 19:42:30.871974  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  246 19:42:30.872291  start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
  247 19:42:30.872552  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 19:42:30.872814  start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
  249 19:42:30.873071  Building ramdisk /var/lib/lava/dispatcher/tmp/967933/extract-overlay-ramdisk-rsqnwfp6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/967933/extract-overlay-ramdisk-rsqnwfp6/ramdisk
  250 19:42:33.016395  >> 166827 blocks

  251 19:42:40.728716  Adding RAMdisk u-boot header.
  252 19:42:40.729136  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/967933/extract-overlay-ramdisk-rsqnwfp6/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/967933/extract-overlay-ramdisk-rsqnwfp6/ramdisk.cpio.gz.uboot
  253 19:42:40.976689  output: Image Name:   
  254 19:42:40.977103  output: Created:      Sat Nov  9 19:42:40 2024
  255 19:42:40.977572  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 19:42:40.978037  output: Data Size:    23437729 Bytes = 22888.41 KiB = 22.35 MiB
  257 19:42:40.978488  output: Load Address: 00000000
  258 19:42:40.978929  output: Entry Point:  00000000
  259 19:42:40.979370  output: 
  260 19:42:40.980499  rename /var/lib/lava/dispatcher/tmp/967933/extract-overlay-ramdisk-rsqnwfp6/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/ramdisk/ramdisk.cpio.gz.uboot
  261 19:42:40.981302  end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
  262 19:42:40.981920  end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
  263 19:42:40.982514  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
  264 19:42:40.983052  No LXC device requested
  265 19:42:40.983627  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 19:42:40.984261  start: 1.8 deploy-device-env (timeout 00:08:56) [common]
  267 19:42:40.984835  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 19:42:40.985300  Checking files for TFTP limit of 4294967296 bytes.
  269 19:42:40.988275  end: 1 tftp-deploy (duration 00:01:04) [common]
  270 19:42:40.988938  start: 2 uboot-action (timeout 00:05:00) [common]
  271 19:42:40.989531  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 19:42:40.990095  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 19:42:40.990660  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 19:42:40.991254  Using kernel file from prepare-kernel: 967933/tftp-deploy-1eeqvlnf/kernel/uImage
  275 19:42:40.991963  substitutions:
  276 19:42:40.992474  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 19:42:40.992933  - {DTB_ADDR}: 0x01070000
  278 19:42:40.993382  - {DTB}: 967933/tftp-deploy-1eeqvlnf/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 19:42:40.993830  - {INITRD}: 967933/tftp-deploy-1eeqvlnf/ramdisk/ramdisk.cpio.gz.uboot
  280 19:42:40.994276  - {KERNEL_ADDR}: 0x01080000
  281 19:42:40.994717  - {KERNEL}: 967933/tftp-deploy-1eeqvlnf/kernel/uImage
  282 19:42:40.995159  - {LAVA_MAC}: None
  283 19:42:40.995644  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/967933/extract-nfsrootfs-pr_ubedd
  284 19:42:40.996124  - {NFS_SERVER_IP}: 192.168.6.2
  285 19:42:40.996570  - {PRESEED_CONFIG}: None
  286 19:42:40.997011  - {PRESEED_LOCAL}: None
  287 19:42:40.997449  - {RAMDISK_ADDR}: 0x08000000
  288 19:42:40.997885  - {RAMDISK}: 967933/tftp-deploy-1eeqvlnf/ramdisk/ramdisk.cpio.gz.uboot
  289 19:42:40.998319  - {ROOT_PART}: None
  290 19:42:40.998755  - {ROOT}: None
  291 19:42:40.999189  - {SERVER_IP}: 192.168.6.2
  292 19:42:40.999624  - {TEE_ADDR}: 0x83000000
  293 19:42:41.000102  - {TEE}: None
  294 19:42:41.000608  Parsed boot commands:
  295 19:42:41.001081  - setenv autoload no
  296 19:42:41.001524  - setenv initrd_high 0xffffffff
  297 19:42:41.001959  - setenv fdt_high 0xffffffff
  298 19:42:41.002392  - dhcp
  299 19:42:41.002824  - setenv serverip 192.168.6.2
  300 19:42:41.003256  - tftpboot 0x01080000 967933/tftp-deploy-1eeqvlnf/kernel/uImage
  301 19:42:41.003691  - tftpboot 0x08000000 967933/tftp-deploy-1eeqvlnf/ramdisk/ramdisk.cpio.gz.uboot
  302 19:42:41.004156  - tftpboot 0x01070000 967933/tftp-deploy-1eeqvlnf/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 19:42:41.004597  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/967933/extract-nfsrootfs-pr_ubedd,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 19:42:41.005044  - bootm 0x01080000 0x08000000 0x01070000
  305 19:42:41.005701  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 19:42:41.007790  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 19:42:41.008378  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 19:42:41.024537  Setting prompt string to ['lava-test: # ']
  310 19:42:41.026229  end: 2.3 connect-device (duration 00:00:00) [common]
  311 19:42:41.026928  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 19:42:41.027585  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 19:42:41.028253  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 19:42:41.029513  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 19:42:41.064699  >> OK - accepted request

  316 19:42:41.066870  Returned 0 in 0 seconds
  317 19:42:41.168150  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 19:42:41.170020  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 19:42:41.170668  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 19:42:41.171329  Setting prompt string to ['Hit any key to stop autoboot']
  322 19:42:41.171867  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 19:42:41.173648  Trying 192.168.56.21...
  324 19:42:41.174182  Connected to conserv1.
  325 19:42:41.174672  Escape character is '^]'.
  326 19:42:41.175148  
  327 19:42:41.175622  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  328 19:42:41.176120  
  329 19:42:48.715962  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 19:42:48.716699  bl2_stage_init 0x01
  331 19:42:48.717178  bl2_stage_init 0x81
  332 19:42:48.721514  hw id: 0x0000 - pwm id 0x01
  333 19:42:48.722021  bl2_stage_init 0xc1
  334 19:42:48.727084  bl2_stage_init 0x02
  335 19:42:48.727575  
  336 19:42:48.728075  L0:00000000
  337 19:42:48.728545  L1:00000703
  338 19:42:48.728992  L2:00008067
  339 19:42:48.729434  L3:15000000
  340 19:42:48.732677  S1:00000000
  341 19:42:48.733170  B2:20282000
  342 19:42:48.733632  B1:a0f83180
  343 19:42:48.734078  
  344 19:42:48.734525  TE: 69771
  345 19:42:48.734967  
  346 19:42:48.738289  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 19:42:48.738770  
  348 19:42:48.743874  Board ID = 1
  349 19:42:48.744384  Set cpu clk to 24M
  350 19:42:48.744839  Set clk81 to 24M
  351 19:42:48.749389  Use GP1_pll as DSU clk.
  352 19:42:48.749871  DSU clk: 1200 Mhz
  353 19:42:48.750319  CPU clk: 1200 MHz
  354 19:42:48.754980  Set clk81 to 166.6M
  355 19:42:48.760568  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 19:42:48.761049  board id: 1
  357 19:42:48.767831  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 19:42:48.778670  fw parse done
  359 19:42:48.784660  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 19:42:48.827799  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 19:42:48.838993  PIEI prepare done
  362 19:42:48.839475  fastboot data load
  363 19:42:48.839925  fastboot data verify
  364 19:42:48.844534  verify result: 266
  365 19:42:48.850192  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 19:42:48.850663  LPDDR4 probe
  367 19:42:48.851109  ddr clk to 1584MHz
  368 19:42:48.858155  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 19:42:48.895837  
  370 19:42:48.896372  dmc_version 0001
  371 19:42:48.902897  Check phy result
  372 19:42:48.908831  INFO : End of CA training
  373 19:42:48.909305  INFO : End of initialization
  374 19:42:48.914444  INFO : Training has run successfully!
  375 19:42:48.914914  Check phy result
  376 19:42:48.920081  INFO : End of initialization
  377 19:42:48.920558  INFO : End of read enable training
  378 19:42:48.925631  INFO : End of fine write leveling
  379 19:42:48.931275  INFO : End of Write leveling coarse delay
  380 19:42:48.931746  INFO : Training has run successfully!
  381 19:42:48.932238  Check phy result
  382 19:42:48.936847  INFO : End of initialization
  383 19:42:48.937318  INFO : End of read dq deskew training
  384 19:42:48.942447  INFO : End of MPR read delay center optimization
  385 19:42:48.948109  INFO : End of write delay center optimization
  386 19:42:48.953690  INFO : End of read delay center optimization
  387 19:42:48.954169  INFO : End of max read latency training
  388 19:42:48.959283  INFO : Training has run successfully!
  389 19:42:48.959752  1D training succeed
  390 19:42:48.968451  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 19:42:49.016791  Check phy result
  392 19:42:49.017375  INFO : End of initialization
  393 19:42:49.043166  INFO : End of 2D read delay Voltage center optimization
  394 19:42:49.068481  INFO : End of 2D read delay Voltage center optimization
  395 19:42:49.124948  INFO : End of 2D write delay Voltage center optimization
  396 19:42:49.179021  INFO : End of 2D write delay Voltage center optimization
  397 19:42:49.184537  INFO : Training has run successfully!
  398 19:42:49.185025  
  399 19:42:49.185484  channel==0
  400 19:42:49.190174  RxClkDly_Margin_A0==78 ps 8
  401 19:42:49.190649  TxDqDly_Margin_A0==98 ps 10
  402 19:42:49.193504  RxClkDly_Margin_A1==88 ps 9
  403 19:42:49.193978  TxDqDly_Margin_A1==98 ps 10
  404 19:42:49.199029  TrainedVREFDQ_A0==74
  405 19:42:49.199509  TrainedVREFDQ_A1==74
  406 19:42:49.199961  VrefDac_Margin_A0==23
  407 19:42:49.204554  DeviceVref_Margin_A0==40
  408 19:42:49.205033  VrefDac_Margin_A1==22
  409 19:42:49.210316  DeviceVref_Margin_A1==40
  410 19:42:49.210790  
  411 19:42:49.211238  
  412 19:42:49.211683  channel==1
  413 19:42:49.212208  RxClkDly_Margin_A0==78 ps 8
  414 19:42:49.213696  TxDqDly_Margin_A0==98 ps 10
  415 19:42:49.219372  RxClkDly_Margin_A1==78 ps 8
  416 19:42:49.219854  TxDqDly_Margin_A1==88 ps 9
  417 19:42:49.220344  TrainedVREFDQ_A0==75
  418 19:42:49.224861  TrainedVREFDQ_A1==77
  419 19:42:49.225337  VrefDac_Margin_A0==22
  420 19:42:49.230488  DeviceVref_Margin_A0==39
  421 19:42:49.230973  VrefDac_Margin_A1==20
  422 19:42:49.231419  DeviceVref_Margin_A1==37
  423 19:42:49.231861  
  424 19:42:49.239486   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 19:42:49.240007  
  426 19:42:49.267463  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
  427 19:42:49.268110  2D training succeed
  428 19:42:49.273060  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 19:42:49.278531  auto size-- 65535DDR cs0 size: 2048MB
  430 19:42:49.279027  DDR cs1 size: 2048MB
  431 19:42:49.284232  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 19:42:49.284719  cs0 DataBus test pass
  433 19:42:49.289740  cs1 DataBus test pass
  434 19:42:49.290221  cs0 AddrBus test pass
  435 19:42:49.295337  cs1 AddrBus test pass
  436 19:42:49.295809  
  437 19:42:49.296294  100bdlr_step_size ps== 471
  438 19:42:49.296751  result report
  439 19:42:49.300963  boot times 0Enable ddr reg access
  440 19:42:49.307259  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 19:42:49.321162  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 19:42:49.980042  bl2z: ptr: 05129330, size: 00001e40
  443 19:42:49.988258  0.0;M3 CHK:0;cm4_sp_mode 0
  444 19:42:49.988773  MVN_1=0x00000000
  445 19:42:49.989235  MVN_2=0x00000000
  446 19:42:49.999652  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 19:42:50.000192  OPS=0x04
  448 19:42:50.000682  ring efuse init
  449 19:42:50.005293  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 19:42:50.005788  [0.017354 Inits done]
  451 19:42:50.006237  secure task start!
  452 19:42:50.013184  high task start!
  453 19:42:50.013661  low task start!
  454 19:42:50.014116  run into bl31
  455 19:42:50.021749  NOTICE:  BL31: v1.3(release):4fc40b1
  456 19:42:50.029560  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 19:42:50.030073  NOTICE:  BL31: G12A normal boot!
  458 19:42:50.045127  NOTICE:  BL31: BL33 decompress pass
  459 19:42:50.050816  ERROR:   Error initializing runtime service opteed_fast
  460 19:42:52.764972  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 19:42:52.765660  bl2_stage_init 0x01
  462 19:42:52.766142  bl2_stage_init 0x81
  463 19:42:52.770647  hw id: 0x0000 - pwm id 0x01
  464 19:42:52.771165  bl2_stage_init 0xc1
  465 19:42:52.776233  bl2_stage_init 0x02
  466 19:42:52.776802  
  467 19:42:52.777247  L0:00000000
  468 19:42:52.777680  L1:00000703
  469 19:42:52.778118  L2:00008067
  470 19:42:52.778548  L3:15000000
  471 19:42:52.781713  S1:00000000
  472 19:42:52.782184  B2:20282000
  473 19:42:52.782616  B1:a0f83180
  474 19:42:52.783044  
  475 19:42:52.783475  TE: 68980
  476 19:42:52.783901  
  477 19:42:52.787291  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 19:42:52.787760  
  479 19:42:52.792870  Board ID = 1
  480 19:42:52.793333  Set cpu clk to 24M
  481 19:42:52.793765  Set clk81 to 24M
  482 19:42:52.798488  Use GP1_pll as DSU clk.
  483 19:42:52.798956  DSU clk: 1200 Mhz
  484 19:42:52.799386  CPU clk: 1200 MHz
  485 19:42:52.804101  Set clk81 to 166.6M
  486 19:42:52.809700  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 19:42:52.810164  board id: 1
  488 19:42:52.816858  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 19:42:52.827822  fw parse done
  490 19:42:52.833768  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 19:42:52.876929  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 19:42:52.888082  PIEI prepare done
  493 19:42:52.888559  fastboot data load
  494 19:42:52.888995  fastboot data verify
  495 19:42:52.893706  verify result: 266
  496 19:42:52.899269  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 19:42:52.899740  LPDDR4 probe
  498 19:42:52.900214  ddr clk to 1584MHz
  499 19:42:52.907202  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 19:42:52.944977  
  501 19:42:52.945443  dmc_version 0001
  502 19:42:52.951976  Check phy result
  503 19:42:52.958109  INFO : End of CA training
  504 19:42:52.958582  INFO : End of initialization
  505 19:42:52.963594  INFO : Training has run successfully!
  506 19:42:52.964099  Check phy result
  507 19:42:52.969189  INFO : End of initialization
  508 19:42:52.969662  INFO : End of read enable training
  509 19:42:52.974796  INFO : End of fine write leveling
  510 19:42:52.980391  INFO : End of Write leveling coarse delay
  511 19:42:52.980870  INFO : Training has run successfully!
  512 19:42:52.981321  Check phy result
  513 19:42:52.985957  INFO : End of initialization
  514 19:42:52.986427  INFO : End of read dq deskew training
  515 19:42:52.991561  INFO : End of MPR read delay center optimization
  516 19:42:52.997181  INFO : End of write delay center optimization
  517 19:42:53.002797  INFO : End of read delay center optimization
  518 19:42:53.003312  INFO : End of max read latency training
  519 19:42:53.008392  INFO : Training has run successfully!
  520 19:42:53.008887  1D training succeed
  521 19:42:53.017579  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 19:42:53.065912  Check phy result
  523 19:42:53.066418  INFO : End of initialization
  524 19:42:53.093198  INFO : End of 2D read delay Voltage center optimization
  525 19:42:53.117384  INFO : End of 2D read delay Voltage center optimization
  526 19:42:53.174013  INFO : End of 2D write delay Voltage center optimization
  527 19:42:53.227948  INFO : End of 2D write delay Voltage center optimization
  528 19:42:53.233500  INFO : Training has run successfully!
  529 19:42:53.233979  
  530 19:42:53.234436  channel==0
  531 19:42:53.239135  RxClkDly_Margin_A0==78 ps 8
  532 19:42:53.239609  TxDqDly_Margin_A0==98 ps 10
  533 19:42:53.244751  RxClkDly_Margin_A1==88 ps 9
  534 19:42:53.245222  TxDqDly_Margin_A1==98 ps 10
  535 19:42:53.245672  TrainedVREFDQ_A0==74
  536 19:42:53.250292  TrainedVREFDQ_A1==75
  537 19:42:53.250760  VrefDac_Margin_A0==23
  538 19:42:53.251209  DeviceVref_Margin_A0==40
  539 19:42:53.255907  VrefDac_Margin_A1==23
  540 19:42:53.256410  DeviceVref_Margin_A1==39
  541 19:42:53.256859  
  542 19:42:53.257307  
  543 19:42:53.261501  channel==1
  544 19:42:53.261973  RxClkDly_Margin_A0==78 ps 8
  545 19:42:53.262421  TxDqDly_Margin_A0==98 ps 10
  546 19:42:53.267094  RxClkDly_Margin_A1==78 ps 8
  547 19:42:53.267566  TxDqDly_Margin_A1==88 ps 9
  548 19:42:53.272785  TrainedVREFDQ_A0==78
  549 19:42:53.273287  TrainedVREFDQ_A1==75
  550 19:42:53.273737  VrefDac_Margin_A0==22
  551 19:42:53.278305  DeviceVref_Margin_A0==36
  552 19:42:53.278775  VrefDac_Margin_A1==22
  553 19:42:53.283921  DeviceVref_Margin_A1==39
  554 19:42:53.284432  
  555 19:42:53.284888   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 19:42:53.285331  
  557 19:42:53.317520  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  558 19:42:53.318043  2D training succeed
  559 19:42:53.323101  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 19:42:53.328802  auto size-- 65535DDR cs0 size: 2048MB
  561 19:42:53.329299  DDR cs1 size: 2048MB
  562 19:42:53.334331  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 19:42:53.334824  cs0 DataBus test pass
  564 19:42:53.339907  cs1 DataBus test pass
  565 19:42:53.340425  cs0 AddrBus test pass
  566 19:42:53.340875  cs1 AddrBus test pass
  567 19:42:53.341316  
  568 19:42:53.345525  100bdlr_step_size ps== 471
  569 19:42:53.346010  result report
  570 19:42:53.351109  boot times 0Enable ddr reg access
  571 19:42:53.356386  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 19:42:53.370183  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 19:42:54.029098  bl2z: ptr: 05129330, size: 00001e40
  574 19:42:54.037073  0.0;M3 CHK:0;cm4_sp_mode 0
  575 19:42:54.037598  MVN_1=0x00000000
  576 19:42:54.038058  MVN_2=0x00000000
  577 19:42:54.048567  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 19:42:54.049058  OPS=0x04
  579 19:42:54.049515  ring efuse init
  580 19:42:54.051458  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 19:42:54.057960  [0.017354 Inits done]
  582 19:42:54.058460  secure task start!
  583 19:42:54.058916  high task start!
  584 19:42:54.059363  low task start!
  585 19:42:54.062209  run into bl31
  586 19:42:54.070890  NOTICE:  BL31: v1.3(release):4fc40b1
  587 19:42:54.078643  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 19:42:54.079136  NOTICE:  BL31: G12A normal boot!
  589 19:42:54.094230  NOTICE:  BL31: BL33 decompress pass
  590 19:42:54.099936  ERROR:   Error initializing runtime service opteed_fast
  591 19:42:55.465963  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 19:42:55.466627  bl2_stage_init 0x01
  593 19:42:55.467094  bl2_stage_init 0x81
  594 19:42:55.471540  hw id: 0x0000 - pwm id 0x01
  595 19:42:55.472112  bl2_stage_init 0xc1
  596 19:42:55.477152  bl2_stage_init 0x02
  597 19:42:55.477631  
  598 19:42:55.478086  L0:00000000
  599 19:42:55.478533  L1:00000703
  600 19:42:55.478977  L2:00008067
  601 19:42:55.479418  L3:15000000
  602 19:42:55.480203  S1:00000000
  603 19:42:55.484154  B2:20282000
  604 19:42:55.484637  B1:a0f83180
  605 19:42:55.485087  
  606 19:42:55.485533  TE: 68196
  607 19:42:55.485978  
  608 19:42:55.489767  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 19:42:55.490254  
  610 19:42:55.490707  Board ID = 1
  611 19:42:55.495341  Set cpu clk to 24M
  612 19:42:55.495812  Set clk81 to 24M
  613 19:42:55.496534  Use GP1_pll as DSU clk.
  614 19:42:55.500907  DSU clk: 1200 Mhz
  615 19:42:55.501237  CPU clk: 1200 MHz
  616 19:42:55.501466  Set clk81 to 166.6M
  617 19:42:55.506550  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 19:42:55.512131  board id: 1
  619 19:42:55.517919  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 19:42:55.528560  fw parse done
  621 19:42:55.534584  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 19:42:55.577110  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 19:42:55.588024  PIEI prepare done
  624 19:42:55.588273  fastboot data load
  625 19:42:55.588490  fastboot data verify
  626 19:42:55.593552  verify result: 266
  627 19:42:55.599183  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 19:42:55.599413  LPDDR4 probe
  629 19:42:55.599624  ddr clk to 1584MHz
  630 19:42:55.607126  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 19:42:55.644400  
  632 19:42:55.644891  dmc_version 0001
  633 19:42:55.651142  Check phy result
  634 19:42:55.657051  INFO : End of CA training
  635 19:42:55.657524  INFO : End of initialization
  636 19:42:55.662691  INFO : Training has run successfully!
  637 19:42:55.663164  Check phy result
  638 19:42:55.668221  INFO : End of initialization
  639 19:42:55.668697  INFO : End of read enable training
  640 19:42:55.673852  INFO : End of fine write leveling
  641 19:42:55.679394  INFO : End of Write leveling coarse delay
  642 19:42:55.679864  INFO : Training has run successfully!
  643 19:42:55.680357  Check phy result
  644 19:42:55.685088  INFO : End of initialization
  645 19:42:55.685562  INFO : End of read dq deskew training
  646 19:42:55.690605  INFO : End of MPR read delay center optimization
  647 19:42:55.696224  INFO : End of write delay center optimization
  648 19:42:55.701825  INFO : End of read delay center optimization
  649 19:42:55.702295  INFO : End of max read latency training
  650 19:42:55.707396  INFO : Training has run successfully!
  651 19:42:55.707871  1D training succeed
  652 19:42:55.716679  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 19:42:55.764285  Check phy result
  654 19:42:55.764772  INFO : End of initialization
  655 19:42:55.786685  INFO : End of 2D read delay Voltage center optimization
  656 19:42:55.805709  INFO : End of 2D read delay Voltage center optimization
  657 19:42:55.857617  INFO : End of 2D write delay Voltage center optimization
  658 19:42:55.906779  INFO : End of 2D write delay Voltage center optimization
  659 19:42:55.912336  INFO : Training has run successfully!
  660 19:42:55.912808  
  661 19:42:55.913259  channel==0
  662 19:42:55.917983  RxClkDly_Margin_A0==88 ps 9
  663 19:42:55.918453  TxDqDly_Margin_A0==98 ps 10
  664 19:42:55.923490  RxClkDly_Margin_A1==88 ps 9
  665 19:42:55.923963  TxDqDly_Margin_A1==88 ps 9
  666 19:42:55.924474  TrainedVREFDQ_A0==75
  667 19:42:55.929113  TrainedVREFDQ_A1==74
  668 19:42:55.929586  VrefDac_Margin_A0==23
  669 19:42:55.930033  DeviceVref_Margin_A0==39
  670 19:42:55.934728  VrefDac_Margin_A1==23
  671 19:42:55.935196  DeviceVref_Margin_A1==40
  672 19:42:55.935644  
  673 19:42:55.936124  
  674 19:42:55.936569  channel==1
  675 19:42:55.940353  RxClkDly_Margin_A0==88 ps 9
  676 19:42:55.940825  TxDqDly_Margin_A0==98 ps 10
  677 19:42:55.945950  RxClkDly_Margin_A1==78 ps 8
  678 19:42:55.946424  TxDqDly_Margin_A1==88 ps 9
  679 19:42:55.951620  TrainedVREFDQ_A0==78
  680 19:42:55.952151  TrainedVREFDQ_A1==78
  681 19:42:55.952609  VrefDac_Margin_A0==22
  682 19:42:55.957074  DeviceVref_Margin_A0==36
  683 19:42:55.957549  VrefDac_Margin_A1==22
  684 19:42:55.962781  DeviceVref_Margin_A1==36
  685 19:42:55.963261  
  686 19:42:55.963713   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 19:42:55.964197  
  688 19:42:55.996332  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  689 19:42:55.996848  2D training succeed
  690 19:42:56.001992  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 19:42:56.007503  auto size-- 65535DDR cs0 size: 2048MB
  692 19:42:56.008011  DDR cs1 size: 2048MB
  693 19:42:56.013110  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 19:42:56.013605  cs0 DataBus test pass
  695 19:42:56.018731  cs1 DataBus test pass
  696 19:42:56.019214  cs0 AddrBus test pass
  697 19:42:56.019662  cs1 AddrBus test pass
  698 19:42:56.020142  
  699 19:42:56.024313  100bdlr_step_size ps== 478
  700 19:42:56.024803  result report
  701 19:42:56.029891  boot times 0Enable ddr reg access
  702 19:42:56.035198  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 19:42:56.048939  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 19:42:56.704040  bl2z: ptr: 05129330, size: 00001e40
  705 19:42:56.709476  0.0;M3 CHK:0;cm4_sp_mode 0
  706 19:42:56.710025  MVN_1=0x00000000
  707 19:42:56.710510  MVN_2=0x00000000
  708 19:42:56.721036  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 19:42:56.721646  OPS=0x04
  710 19:42:56.722149  ring efuse init
  711 19:42:56.726645  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 19:42:56.727181  [0.017320 Inits done]
  713 19:42:56.727666  secure task start!
  714 19:42:56.734157  high task start!
  715 19:42:56.734679  low task start!
  716 19:42:56.735162  run into bl31
  717 19:42:56.742704  NOTICE:  BL31: v1.3(release):4fc40b1
  718 19:42:56.750506  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 19:42:56.751024  NOTICE:  BL31: G12A normal boot!
  720 19:42:56.766196  NOTICE:  BL31: BL33 decompress pass
  721 19:42:56.771790  ERROR:   Error initializing runtime service opteed_fast
  722 19:42:57.567161  
  723 19:42:57.567811  
  724 19:42:57.572590  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 19:42:57.573096  
  726 19:42:57.576081  Model: Libre Computer AML-S905D3-CC Solitude
  727 19:42:57.723097  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 19:42:57.738479  DRAM:  2 GiB (effective 3.8 GiB)
  729 19:42:57.839435  Core:  406 devices, 33 uclasses, devicetree: separate
  730 19:42:57.845370  WDT:   Not starting watchdog@f0d0
  731 19:42:57.870416  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 19:42:57.882603  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 19:42:57.887583  ** Bad device specification mmc 0 **
  734 19:42:57.897620  Card did not respond to voltage select! : -110
  735 19:42:57.905314  ** Bad device specification mmc 0 **
  736 19:42:57.905785  Couldn't find partition mmc 0
  737 19:42:57.913608  Card did not respond to voltage select! : -110
  738 19:42:57.919181  ** Bad device specification mmc 0 **
  739 19:42:57.919658  Couldn't find partition mmc 0
  740 19:42:57.924270  Error: could not access storage.
  741 19:42:58.220638  Net:   eth0: ethernet@ff3f0000
  742 19:42:58.221250  starting USB...
  743 19:42:58.465329  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 19:42:58.465936  Starting the controller
  745 19:42:58.472335  USB XHCI 1.10
  746 19:43:00.028837  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 19:43:00.037122         scanning usb for storage devices... 0 Storage Device(s) found
  749 19:43:00.088688  Hit any key to stop autoboot:  1 
  750 19:43:00.089745  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  751 19:43:00.090369  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  752 19:43:00.090864  Setting prompt string to ['=>']
  753 19:43:00.091345  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  754 19:43:00.103826   0 
  755 19:43:00.105440  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 19:43:00.207525  => setenv autoload no
  758 19:43:00.208402  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  759 19:43:00.215392  setenv autoload no
  761 19:43:00.316930  => setenv initrd_high 0xffffffff
  762 19:43:00.318075  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  763 19:43:00.322267  setenv initrd_high 0xffffffff
  765 19:43:00.423786  => setenv fdt_high 0xffffffff
  766 19:43:00.424832  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  767 19:43:00.429099  setenv fdt_high 0xffffffff
  769 19:43:00.530713  => dhcp
  770 19:43:00.531693  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  771 19:43:00.535666  dhcp
  772 19:43:01.342402  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  773 19:43:01.343060  Speed: 1000, full duplex
  774 19:43:01.343542  BOOTP broadcast 1
  775 19:43:01.589814  BOOTP broadcast 2
  776 19:43:01.617353  DHCP client bound to address 192.168.6.21 (275 ms)
  778 19:43:01.718945  => setenv serverip 192.168.6.2
  779 19:43:01.719909  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  780 19:43:01.724337  setenv serverip 192.168.6.2
  782 19:43:01.826083  => tftpboot 0x01080000 967933/tftp-deploy-1eeqvlnf/kernel/uImage
  783 19:43:01.827010  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  784 19:43:01.833668  tftpboot 0x01080000 967933/tftp-deploy-1eeqvlnf/kernel/uImage
  785 19:43:01.834155  Speed: 1000, full duplex
  786 19:43:01.834573  Using ethernet@ff3f0000 device
  787 19:43:01.839169  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  788 19:43:01.844753  Filename '967933/tftp-deploy-1eeqvlnf/kernel/uImage'.
  789 19:43:01.848535  Load address: 0x1080000
  790 19:43:04.784959  Loading: *##################################################  43.6 MiB
  791 19:43:04.786020  	 14.8 MiB/s
  792 19:43:04.786859  done
  793 19:43:04.789484  Bytes transferred = 45713984 (2b98a40 hex)
  795 19:43:04.891832  => tftpboot 0x08000000 967933/tftp-deploy-1eeqvlnf/ramdisk/ramdisk.cpio.gz.uboot
  796 19:43:04.892612  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
  797 19:43:04.899472  tftpboot 0x08000000 967933/tftp-deploy-1eeqvlnf/ramdisk/ramdisk.cpio.gz.uboot
  798 19:43:04.899949  Speed: 1000, full duplex
  799 19:43:04.900389  Using ethernet@ff3f0000 device
  800 19:43:04.905100  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  801 19:43:04.915064  Filename '967933/tftp-deploy-1eeqvlnf/ramdisk/ramdisk.cpio.gz.uboot'.
  802 19:43:04.915840  Load address: 0x8000000
  803 19:43:06.353933  Loading: *################################################# UDP wrong checksum 00000005 0000176c
  804 19:43:11.355383  T  UDP wrong checksum 00000005 0000176c
  805 19:43:21.357369  T T  UDP wrong checksum 00000005 0000176c
  806 19:43:41.358456  T T T  UDP wrong checksum 00000005 0000176c
  807 19:44:01.366306  T T T T 
  808 19:44:01.366900  Retry count exceeded; starting again
  810 19:44:01.368382  end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
  813 19:44:01.370247  end: 2.4 uboot-commands (duration 00:01:20) [common]
  815 19:44:01.371637  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  817 19:44:01.372728  end: 2 uboot-action (duration 00:01:20) [common]
  819 19:44:01.374242  Cleaning after the job
  820 19:44:01.374779  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/ramdisk
  821 19:44:01.376094  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/kernel
  822 19:44:01.403213  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/dtb
  823 19:44:01.404547  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/nfsrootfs
  824 19:44:01.510450  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967933/tftp-deploy-1eeqvlnf/modules
  825 19:44:01.518166  start: 4.1 power-off (timeout 00:00:30) [common]
  826 19:44:01.518789  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  827 19:44:01.553296  >> OK - accepted request

  828 19:44:01.555375  Returned 0 in 0 seconds
  829 19:44:01.656142  end: 4.1 power-off (duration 00:00:00) [common]
  831 19:44:01.657123  start: 4.2 read-feedback (timeout 00:10:00) [common]
  832 19:44:01.657751  Listened to connection for namespace 'common' for up to 1s
  833 19:44:02.658686  Finalising connection for namespace 'common'
  834 19:44:02.659174  Disconnecting from shell: Finalise
  835 19:44:02.659460  => 
  836 19:44:02.760219  end: 4.2 read-feedback (duration 00:00:01) [common]
  837 19:44:02.760785  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/967933
  838 19:44:05.390788  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/967933
  839 19:44:05.391578  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.