Boot log: meson-sm1-s905d3-libretech-cc

    1 19:44:37.304954  lava-dispatcher, installed at version: 2024.01
    2 19:44:37.305789  start: 0 validate
    3 19:44:37.306274  Start time: 2024-11-09 19:44:37.306244+00:00 (UTC)
    4 19:44:37.306822  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 19:44:37.307344  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 19:44:37.348444  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 19:44:37.349017  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 19:44:37.379808  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 19:44:37.380502  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 19:44:37.410251  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 19:44:37.411051  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 19:44:37.444217  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 19:44:37.444772  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-679-gc8994e7b0f32%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 19:44:37.482115  validate duration: 0.18
   16 19:44:37.482953  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 19:44:37.483277  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 19:44:37.483563  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 19:44:37.484198  Not decompressing ramdisk as can be used compressed.
   20 19:44:37.484673  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
   21 19:44:37.484956  saving as /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/ramdisk/initrd.cpio.gz
   22 19:44:37.485224  total size: 5628140 (5 MB)
   23 19:44:37.525488  progress   0 % (0 MB)
   24 19:44:37.533053  progress   5 % (0 MB)
   25 19:44:37.538711  progress  10 % (0 MB)
   26 19:44:37.542441  progress  15 % (0 MB)
   27 19:44:37.546596  progress  20 % (1 MB)
   28 19:44:37.550345  progress  25 % (1 MB)
   29 19:44:37.554522  progress  30 % (1 MB)
   30 19:44:37.558692  progress  35 % (1 MB)
   31 19:44:37.562491  progress  40 % (2 MB)
   32 19:44:37.566526  progress  45 % (2 MB)
   33 19:44:37.570248  progress  50 % (2 MB)
   34 19:44:37.574452  progress  55 % (2 MB)
   35 19:44:37.578514  progress  60 % (3 MB)
   36 19:44:37.582253  progress  65 % (3 MB)
   37 19:44:37.586401  progress  70 % (3 MB)
   38 19:44:37.590237  progress  75 % (4 MB)
   39 19:44:37.594311  progress  80 % (4 MB)
   40 19:44:37.597934  progress  85 % (4 MB)
   41 19:44:37.601905  progress  90 % (4 MB)
   42 19:44:37.605921  progress  95 % (5 MB)
   43 19:44:37.609311  progress 100 % (5 MB)
   44 19:44:37.609972  5 MB downloaded in 0.12 s (43.03 MB/s)
   45 19:44:37.610529  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 19:44:37.611436  end: 1.1 download-retry (duration 00:00:00) [common]
   48 19:44:37.611743  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 19:44:37.612045  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 19:44:37.612535  downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/kernel/Image
   51 19:44:37.612796  saving as /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/kernel/Image
   52 19:44:37.613015  total size: 45713920 (43 MB)
   53 19:44:37.613269  No compression specified
   54 19:44:37.649747  progress   0 % (0 MB)
   55 19:44:37.679826  progress   5 % (2 MB)
   56 19:44:37.709613  progress  10 % (4 MB)
   57 19:44:37.740656  progress  15 % (6 MB)
   58 19:44:37.769166  progress  20 % (8 MB)
   59 19:44:37.797426  progress  25 % (10 MB)
   60 19:44:37.826276  progress  30 % (13 MB)
   61 19:44:37.855580  progress  35 % (15 MB)
   62 19:44:37.884457  progress  40 % (17 MB)
   63 19:44:37.912929  progress  45 % (19 MB)
   64 19:44:37.942565  progress  50 % (21 MB)
   65 19:44:37.971875  progress  55 % (24 MB)
   66 19:44:38.001346  progress  60 % (26 MB)
   67 19:44:38.030173  progress  65 % (28 MB)
   68 19:44:38.059968  progress  70 % (30 MB)
   69 19:44:38.089451  progress  75 % (32 MB)
   70 19:44:38.118925  progress  80 % (34 MB)
   71 19:44:38.150453  progress  85 % (37 MB)
   72 19:44:38.179960  progress  90 % (39 MB)
   73 19:44:38.209729  progress  95 % (41 MB)
   74 19:44:38.238299  progress 100 % (43 MB)
   75 19:44:38.238894  43 MB downloaded in 0.63 s (69.66 MB/s)
   76 19:44:38.239398  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 19:44:38.240292  end: 1.2 download-retry (duration 00:00:01) [common]
   79 19:44:38.240579  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 19:44:38.240846  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 19:44:38.241323  downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 19:44:38.241612  saving as /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 19:44:38.241824  total size: 53209 (0 MB)
   84 19:44:38.242038  No compression specified
   85 19:44:38.284408  progress  61 % (0 MB)
   86 19:44:38.285333  progress 100 % (0 MB)
   87 19:44:38.285906  0 MB downloaded in 0.04 s (1.15 MB/s)
   88 19:44:38.286402  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 19:44:38.287239  end: 1.3 download-retry (duration 00:00:00) [common]
   91 19:44:38.287508  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 19:44:38.287781  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 19:44:38.288350  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
   94 19:44:38.288650  saving as /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/nfsrootfs/full.rootfs.tar
   95 19:44:38.288861  total size: 474398908 (452 MB)
   96 19:44:38.289076  Using unxz to decompress xz
   97 19:44:38.330748  progress   0 % (0 MB)
   98 19:44:39.438134  progress   5 % (22 MB)
   99 19:44:40.881521  progress  10 % (45 MB)
  100 19:44:41.321304  progress  15 % (67 MB)
  101 19:44:42.176882  progress  20 % (90 MB)
  102 19:44:42.724272  progress  25 % (113 MB)
  103 19:44:43.090655  progress  30 % (135 MB)
  104 19:44:43.702780  progress  35 % (158 MB)
  105 19:44:44.645490  progress  40 % (181 MB)
  106 19:44:45.526134  progress  45 % (203 MB)
  107 19:44:46.275319  progress  50 % (226 MB)
  108 19:44:47.057434  progress  55 % (248 MB)
  109 19:44:48.262206  progress  60 % (271 MB)
  110 19:44:49.767907  progress  65 % (294 MB)
  111 19:44:51.433573  progress  70 % (316 MB)
  112 19:44:54.517960  progress  75 % (339 MB)
  113 19:44:56.959731  progress  80 % (361 MB)
  114 19:44:59.947679  progress  85 % (384 MB)
  115 19:45:03.082278  progress  90 % (407 MB)
  116 19:45:06.303867  progress  95 % (429 MB)
  117 19:45:09.629765  progress 100 % (452 MB)
  118 19:45:09.644273  452 MB downloaded in 31.36 s (14.43 MB/s)
  119 19:45:09.645235  end: 1.4.1 http-download (duration 00:00:31) [common]
  121 19:45:09.647035  end: 1.4 download-retry (duration 00:00:31) [common]
  122 19:45:09.647623  start: 1.5 download-retry (timeout 00:09:28) [common]
  123 19:45:09.648239  start: 1.5.1 http-download (timeout 00:09:28) [common]
  124 19:45:09.649119  downloading http://storage.kernelci.org/tip/master/v6.12-rc6-679-gc8994e7b0f32/arm64/defconfig/gcc-12/modules.tar.xz
  125 19:45:09.649629  saving as /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/modules/modules.tar
  126 19:45:09.650091  total size: 11612124 (11 MB)
  127 19:45:09.650563  Using unxz to decompress xz
  128 19:45:09.696941  progress   0 % (0 MB)
  129 19:45:09.763229  progress   5 % (0 MB)
  130 19:45:09.836753  progress  10 % (1 MB)
  131 19:45:09.931887  progress  15 % (1 MB)
  132 19:45:10.023463  progress  20 % (2 MB)
  133 19:45:10.102556  progress  25 % (2 MB)
  134 19:45:10.178168  progress  30 % (3 MB)
  135 19:45:10.256246  progress  35 % (3 MB)
  136 19:45:10.328304  progress  40 % (4 MB)
  137 19:45:10.404122  progress  45 % (5 MB)
  138 19:45:10.490707  progress  50 % (5 MB)
  139 19:45:10.568740  progress  55 % (6 MB)
  140 19:45:10.653842  progress  60 % (6 MB)
  141 19:45:10.735292  progress  65 % (7 MB)
  142 19:45:10.815512  progress  70 % (7 MB)
  143 19:45:10.893926  progress  75 % (8 MB)
  144 19:45:10.977187  progress  80 % (8 MB)
  145 19:45:11.057054  progress  85 % (9 MB)
  146 19:45:11.135255  progress  90 % (9 MB)
  147 19:45:11.212551  progress  95 % (10 MB)
  148 19:45:11.289338  progress 100 % (11 MB)
  149 19:45:11.300973  11 MB downloaded in 1.65 s (6.71 MB/s)
  150 19:45:11.301547  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 19:45:11.302373  end: 1.5 download-retry (duration 00:00:02) [common]
  153 19:45:11.302642  start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
  154 19:45:11.302907  start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
  155 19:45:26.766187  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/967945/extract-nfsrootfs-5s_w46kc
  156 19:45:26.766754  end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
  157 19:45:26.767044  start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
  158 19:45:26.767679  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w
  159 19:45:26.768139  makedir: /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin
  160 19:45:26.768470  makedir: /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/tests
  161 19:45:26.768779  makedir: /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/results
  162 19:45:26.769106  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-add-keys
  163 19:45:26.769631  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-add-sources
  164 19:45:26.770131  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-background-process-start
  165 19:45:26.770621  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-background-process-stop
  166 19:45:26.771139  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-common-functions
  167 19:45:26.771633  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-echo-ipv4
  168 19:45:26.772246  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-install-packages
  169 19:45:26.772802  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-installed-packages
  170 19:45:26.773296  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-os-build
  171 19:45:26.773771  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-probe-channel
  172 19:45:26.774234  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-probe-ip
  173 19:45:26.774697  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-target-ip
  174 19:45:26.775162  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-target-mac
  175 19:45:26.775635  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-target-storage
  176 19:45:26.776163  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-test-case
  177 19:45:26.776667  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-test-event
  178 19:45:26.777137  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-test-feedback
  179 19:45:26.777600  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-test-raise
  180 19:45:26.778063  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-test-reference
  181 19:45:26.778535  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-test-runner
  182 19:45:26.779006  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-test-set
  183 19:45:26.779467  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-test-shell
  184 19:45:26.779959  Updating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-install-packages (oe)
  185 19:45:26.780532  Updating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/bin/lava-installed-packages (oe)
  186 19:45:26.780973  Creating /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/environment
  187 19:45:26.781339  LAVA metadata
  188 19:45:26.781596  - LAVA_JOB_ID=967945
  189 19:45:26.781810  - LAVA_DISPATCHER_IP=192.168.6.2
  190 19:45:26.782165  start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
  191 19:45:26.783108  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 19:45:26.783413  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
  193 19:45:26.783622  skipped lava-vland-overlay
  194 19:45:26.783862  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 19:45:26.784139  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
  196 19:45:26.784355  skipped lava-multinode-overlay
  197 19:45:26.784593  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 19:45:26.784841  start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
  199 19:45:26.785088  Loading test definitions
  200 19:45:26.785361  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
  201 19:45:26.785578  Using /lava-967945 at stage 0
  202 19:45:26.786698  uuid=967945_1.6.2.4.1 testdef=None
  203 19:45:26.786998  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 19:45:26.787258  start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
  205 19:45:26.789000  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 19:45:26.789788  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
  208 19:45:26.791949  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 19:45:26.792832  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
  211 19:45:26.794892  runner path: /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 967945_1.6.2.4.1
  212 19:45:26.795439  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 19:45:26.796257  Creating lava-test-runner.conf files
  215 19:45:26.796477  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/967945/lava-overlay-8_pa8i5w/lava-967945/0 for stage 0
  216 19:45:26.796834  - 0_v4l2-decoder-conformance-h265
  217 19:45:26.797187  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 19:45:26.797464  start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
  219 19:45:26.818710  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 19:45:26.819057  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
  221 19:45:26.819318  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 19:45:26.819579  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 19:45:26.819840  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
  224 19:45:27.437897  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 19:45:27.438338  start: 1.6.4 extract-modules (timeout 00:09:10) [common]
  226 19:45:27.438587  extracting modules file /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/967945/extract-nfsrootfs-5s_w46kc
  227 19:45:28.799895  extracting modules file /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/967945/extract-overlay-ramdisk-j1b5kyn0/ramdisk
  228 19:45:30.193007  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 19:45:30.193455  start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
  230 19:45:30.193734  [common] Applying overlay to NFS
  231 19:45:30.193947  [common] Applying overlay /var/lib/lava/dispatcher/tmp/967945/compress-overlay-cx6dvm08/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/967945/extract-nfsrootfs-5s_w46kc
  232 19:45:30.222934  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 19:45:30.223296  start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
  234 19:45:30.223564  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
  235 19:45:30.223791  Converting downloaded kernel to a uImage
  236 19:45:30.224122  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/kernel/Image /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/kernel/uImage
  237 19:45:30.714736  output: Image Name:   
  238 19:45:30.715156  output: Created:      Sat Nov  9 19:45:30 2024
  239 19:45:30.715373  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 19:45:30.715579  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  241 19:45:30.715781  output: Load Address: 01080000
  242 19:45:30.716015  output: Entry Point:  01080000
  243 19:45:30.716225  output: 
  244 19:45:30.716568  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  245 19:45:30.716851  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  246 19:45:30.717122  start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
  247 19:45:30.717377  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 19:45:30.717637  start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
  249 19:45:30.717894  Building ramdisk /var/lib/lava/dispatcher/tmp/967945/extract-overlay-ramdisk-j1b5kyn0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/967945/extract-overlay-ramdisk-j1b5kyn0/ramdisk
  250 19:45:33.270192  >> 166827 blocks

  251 19:45:41.115882  Adding RAMdisk u-boot header.
  252 19:45:41.116596  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/967945/extract-overlay-ramdisk-j1b5kyn0/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/967945/extract-overlay-ramdisk-j1b5kyn0/ramdisk.cpio.gz.uboot
  253 19:45:41.380628  output: Image Name:   
  254 19:45:41.381056  output: Created:      Sat Nov  9 19:45:41 2024
  255 19:45:41.381270  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 19:45:41.381479  output: Data Size:    23436267 Bytes = 22886.98 KiB = 22.35 MiB
  257 19:45:41.381681  output: Load Address: 00000000
  258 19:45:41.381880  output: Entry Point:  00000000
  259 19:45:41.382080  output: 
  260 19:45:41.382673  rename /var/lib/lava/dispatcher/tmp/967945/extract-overlay-ramdisk-j1b5kyn0/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/ramdisk/ramdisk.cpio.gz.uboot
  261 19:45:41.383103  end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
  262 19:45:41.383393  end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
  263 19:45:41.383668  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
  264 19:45:41.383910  No LXC device requested
  265 19:45:41.384419  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 19:45:41.384991  start: 1.8 deploy-device-env (timeout 00:08:56) [common]
  267 19:45:41.385543  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 19:45:41.386001  Checking files for TFTP limit of 4294967296 bytes.
  269 19:45:41.388946  end: 1 tftp-deploy (duration 00:01:04) [common]
  270 19:45:41.389572  start: 2 uboot-action (timeout 00:05:00) [common]
  271 19:45:41.390145  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 19:45:41.390690  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 19:45:41.391245  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 19:45:41.391820  Using kernel file from prepare-kernel: 967945/tftp-deploy-hwpbezv0/kernel/uImage
  275 19:45:41.392557  substitutions:
  276 19:45:41.393011  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 19:45:41.393459  - {DTB_ADDR}: 0x01070000
  278 19:45:41.393901  - {DTB}: 967945/tftp-deploy-hwpbezv0/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 19:45:41.394344  - {INITRD}: 967945/tftp-deploy-hwpbezv0/ramdisk/ramdisk.cpio.gz.uboot
  280 19:45:41.394780  - {KERNEL_ADDR}: 0x01080000
  281 19:45:41.395217  - {KERNEL}: 967945/tftp-deploy-hwpbezv0/kernel/uImage
  282 19:45:41.395651  - {LAVA_MAC}: None
  283 19:45:41.396158  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/967945/extract-nfsrootfs-5s_w46kc
  284 19:45:41.396603  - {NFS_SERVER_IP}: 192.168.6.2
  285 19:45:41.397038  - {PRESEED_CONFIG}: None
  286 19:45:41.397468  - {PRESEED_LOCAL}: None
  287 19:45:41.397899  - {RAMDISK_ADDR}: 0x08000000
  288 19:45:41.398324  - {RAMDISK}: 967945/tftp-deploy-hwpbezv0/ramdisk/ramdisk.cpio.gz.uboot
  289 19:45:41.398752  - {ROOT_PART}: None
  290 19:45:41.399181  - {ROOT}: None
  291 19:45:41.399607  - {SERVER_IP}: 192.168.6.2
  292 19:45:41.400064  - {TEE_ADDR}: 0x83000000
  293 19:45:41.400499  - {TEE}: None
  294 19:45:41.400930  Parsed boot commands:
  295 19:45:41.401349  - setenv autoload no
  296 19:45:41.401778  - setenv initrd_high 0xffffffff
  297 19:45:41.402207  - setenv fdt_high 0xffffffff
  298 19:45:41.402635  - dhcp
  299 19:45:41.403065  - setenv serverip 192.168.6.2
  300 19:45:41.403499  - tftpboot 0x01080000 967945/tftp-deploy-hwpbezv0/kernel/uImage
  301 19:45:41.403937  - tftpboot 0x08000000 967945/tftp-deploy-hwpbezv0/ramdisk/ramdisk.cpio.gz.uboot
  302 19:45:41.404399  - tftpboot 0x01070000 967945/tftp-deploy-hwpbezv0/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 19:45:41.404837  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/967945/extract-nfsrootfs-5s_w46kc,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 19:45:41.405284  - bootm 0x01080000 0x08000000 0x01070000
  305 19:45:41.405835  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 19:45:41.407471  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 19:45:41.407936  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 19:45:41.423542  Setting prompt string to ['lava-test: # ']
  310 19:45:41.425206  end: 2.3 connect-device (duration 00:00:00) [common]
  311 19:45:41.425866  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 19:45:41.426459  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 19:45:41.427025  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 19:45:41.428261  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 19:45:41.466047  >> OK - accepted request

  316 19:45:41.468327  Returned 0 in 0 seconds
  317 19:45:41.569454  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 19:45:41.570444  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 19:45:41.570742  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 19:45:41.571022  Setting prompt string to ['Hit any key to stop autoboot']
  322 19:45:41.571269  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 19:45:41.572229  Trying 192.168.56.21...
  324 19:45:41.572493  Connected to conserv1.
  325 19:45:41.572710  Escape character is '^]'.
  326 19:45:41.572921  
  327 19:45:41.573134  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  328 19:45:41.573348  
  329 19:45:48.716080  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 19:45:48.716770  bl2_stage_init 0x01
  331 19:45:48.717231  bl2_stage_init 0x81
  332 19:45:48.721417  hw id: 0x0000 - pwm id 0x01
  333 19:45:48.721898  bl2_stage_init 0xc1
  334 19:45:48.727046  bl2_stage_init 0x02
  335 19:45:48.727529  
  336 19:45:48.728011  L0:00000000
  337 19:45:48.728458  L1:00000703
  338 19:45:48.728893  L2:00008067
  339 19:45:48.729324  L3:15000000
  340 19:45:48.732597  S1:00000000
  341 19:45:48.733065  B2:20282000
  342 19:45:48.733502  B1:a0f83180
  343 19:45:48.733937  
  344 19:45:48.734372  TE: 68515
  345 19:45:48.734804  
  346 19:45:48.738221  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 19:45:48.738697  
  348 19:45:48.743916  Board ID = 1
  349 19:45:48.744426  Set cpu clk to 24M
  350 19:45:48.744871  Set clk81 to 24M
  351 19:45:48.749465  Use GP1_pll as DSU clk.
  352 19:45:48.749931  DSU clk: 1200 Mhz
  353 19:45:48.750367  CPU clk: 1200 MHz
  354 19:45:48.755040  Set clk81 to 166.6M
  355 19:45:48.760654  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 19:45:48.761120  board id: 1
  357 19:45:48.767831  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 19:45:48.778858  fw parse done
  359 19:45:48.784791  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 19:45:48.827800  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 19:45:48.838948  PIEI prepare done
  362 19:45:48.839434  fastboot data load
  363 19:45:48.839871  fastboot data verify
  364 19:45:48.844563  verify result: 266
  365 19:45:48.850048  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 19:45:48.850511  LPDDR4 probe
  367 19:45:48.850944  ddr clk to 1584MHz
  368 19:45:48.858030  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 19:45:48.895771  
  370 19:45:48.896282  dmc_version 0001
  371 19:45:48.902906  Check phy result
  372 19:45:48.908894  INFO : End of CA training
  373 19:45:48.909352  INFO : End of initialization
  374 19:45:48.914460  INFO : Training has run successfully!
  375 19:45:48.914917  Check phy result
  376 19:45:48.920164  INFO : End of initialization
  377 19:45:48.920624  INFO : End of read enable training
  378 19:45:48.925639  INFO : End of fine write leveling
  379 19:45:48.931266  INFO : End of Write leveling coarse delay
  380 19:45:48.931730  INFO : Training has run successfully!
  381 19:45:48.932228  Check phy result
  382 19:45:48.936721  INFO : End of initialization
  383 19:45:48.937202  INFO : End of read dq deskew training
  384 19:45:48.942475  INFO : End of MPR read delay center optimization
  385 19:45:48.948069  INFO : End of write delay center optimization
  386 19:45:48.953622  INFO : End of read delay center optimization
  387 19:45:48.954082  INFO : End of max read latency training
  388 19:45:48.959224  INFO : Training has run successfully!
  389 19:45:48.959678  1D training succeed
  390 19:45:48.968422  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 19:45:49.015918  Check phy result
  392 19:45:49.016538  INFO : End of initialization
  393 19:45:49.044136  INFO : End of 2D read delay Voltage center optimization
  394 19:45:49.068246  INFO : End of 2D read delay Voltage center optimization
  395 19:45:49.124954  INFO : End of 2D write delay Voltage center optimization
  396 19:45:49.178850  INFO : End of 2D write delay Voltage center optimization
  397 19:45:49.184449  INFO : Training has run successfully!
  398 19:45:49.184919  
  399 19:45:49.185363  channel==0
  400 19:45:49.190066  RxClkDly_Margin_A0==69 ps 7
  401 19:45:49.190527  TxDqDly_Margin_A0==88 ps 9
  402 19:45:49.193322  RxClkDly_Margin_A1==78 ps 8
  403 19:45:49.193778  TxDqDly_Margin_A1==98 ps 10
  404 19:45:49.199037  TrainedVREFDQ_A0==74
  405 19:45:49.199504  TrainedVREFDQ_A1==75
  406 19:45:49.199945  VrefDac_Margin_A0==24
  407 19:45:49.204610  DeviceVref_Margin_A0==40
  408 19:45:49.205088  VrefDac_Margin_A1==23
  409 19:45:49.210191  DeviceVref_Margin_A1==39
  410 19:45:49.210647  
  411 19:45:49.211083  
  412 19:45:49.211517  channel==1
  413 19:45:49.211951  RxClkDly_Margin_A0==78 ps 8
  414 19:45:49.213611  TxDqDly_Margin_A0==88 ps 9
  415 19:45:49.219112  RxClkDly_Margin_A1==88 ps 9
  416 19:45:49.219566  TxDqDly_Margin_A1==88 ps 9
  417 19:45:49.220031  TrainedVREFDQ_A0==75
  418 19:45:49.224650  TrainedVREFDQ_A1==75
  419 19:45:49.225106  VrefDac_Margin_A0==22
  420 19:45:49.230270  DeviceVref_Margin_A0==39
  421 19:45:49.230723  VrefDac_Margin_A1==22
  422 19:45:49.231155  DeviceVref_Margin_A1==39
  423 19:45:49.231583  
  424 19:45:49.235883   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 19:45:49.236368  
  426 19:45:49.269373  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  427 19:45:49.269933  2D training succeed
  428 19:45:49.275043  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 19:45:49.280681  auto size-- 65535DDR cs0 size: 2048MB
  430 19:45:49.281140  DDR cs1 size: 2048MB
  431 19:45:49.286344  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 19:45:49.286809  cs0 DataBus test pass
  433 19:45:49.287244  cs1 DataBus test pass
  434 19:45:49.291754  cs0 AddrBus test pass
  435 19:45:49.292249  cs1 AddrBus test pass
  436 19:45:49.292685  
  437 19:45:49.297414  100bdlr_step_size ps== 471
  438 19:45:49.297882  result report
  439 19:45:49.298313  boot times 0Enable ddr reg access
  440 19:45:49.307084  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 19:45:49.321009  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 19:45:49.978373  bl2z: ptr: 05129330, size: 00001e40
  443 19:45:49.988772  0.0;M3 CHK:0;cm4_sp_mode 0
  444 19:45:49.989289  MVN_1=0x00000000
  445 19:45:49.989748  MVN_2=0x00000000
  446 19:45:50.000283  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 19:45:50.000830  OPS=0x04
  448 19:45:50.001307  ring efuse init
  449 19:45:50.005907  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 19:45:50.006401  [0.017354 Inits done]
  451 19:45:50.006849  secure task start!
  452 19:45:50.013351  high task start!
  453 19:45:50.013836  low task start!
  454 19:45:50.014291  run into bl31
  455 19:45:50.021964  NOTICE:  BL31: v1.3(release):4fc40b1
  456 19:45:50.029779  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 19:45:50.030272  NOTICE:  BL31: G12A normal boot!
  458 19:45:50.045409  NOTICE:  BL31: BL33 decompress pass
  459 19:45:50.050145  ERROR:   Error initializing runtime service opteed_fast
  460 19:45:52.766948  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 19:45:52.767639  bl2_stage_init 0x01
  462 19:45:52.768199  bl2_stage_init 0x81
  463 19:45:52.772517  hw id: 0x0000 - pwm id 0x01
  464 19:45:52.773025  bl2_stage_init 0xc1
  465 19:45:52.778169  bl2_stage_init 0x02
  466 19:45:52.778715  
  467 19:45:52.779156  L0:00000000
  468 19:45:52.779586  L1:00000703
  469 19:45:52.780057  L2:00008067
  470 19:45:52.780501  L3:15000000
  471 19:45:52.783692  S1:00000000
  472 19:45:52.784191  B2:20282000
  473 19:45:52.784620  B1:a0f83180
  474 19:45:52.785042  
  475 19:45:52.785465  TE: 69837
  476 19:45:52.785888  
  477 19:45:52.789287  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 19:45:52.789745  
  479 19:45:52.795017  Board ID = 1
  480 19:45:52.795467  Set cpu clk to 24M
  481 19:45:52.795892  Set clk81 to 24M
  482 19:45:52.800546  Use GP1_pll as DSU clk.
  483 19:45:52.801002  DSU clk: 1200 Mhz
  484 19:45:52.801428  CPU clk: 1200 MHz
  485 19:45:52.806117  Set clk81 to 166.6M
  486 19:45:52.811680  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 19:45:52.812168  board id: 1
  488 19:45:52.818858  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 19:45:52.829855  fw parse done
  490 19:45:52.835804  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 19:45:52.878858  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 19:45:52.890021  PIEI prepare done
  493 19:45:52.890472  fastboot data load
  494 19:45:52.890901  fastboot data verify
  495 19:45:52.895691  verify result: 266
  496 19:45:52.901213  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 19:45:52.901670  LPDDR4 probe
  498 19:45:52.902096  ddr clk to 1584MHz
  499 19:45:52.909188  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 19:45:52.946953  
  501 19:45:52.947406  dmc_version 0001
  502 19:45:52.953993  Check phy result
  503 19:45:52.960037  INFO : End of CA training
  504 19:45:52.960509  INFO : End of initialization
  505 19:45:52.965560  INFO : Training has run successfully!
  506 19:45:52.966032  Check phy result
  507 19:45:52.971176  INFO : End of initialization
  508 19:45:52.971636  INFO : End of read enable training
  509 19:45:52.976760  INFO : End of fine write leveling
  510 19:45:52.982352  INFO : End of Write leveling coarse delay
  511 19:45:52.982819  INFO : Training has run successfully!
  512 19:45:52.983262  Check phy result
  513 19:45:52.987957  INFO : End of initialization
  514 19:45:52.988458  INFO : End of read dq deskew training
  515 19:45:52.993544  INFO : End of MPR read delay center optimization
  516 19:45:52.999170  INFO : End of write delay center optimization
  517 19:45:53.004779  INFO : End of read delay center optimization
  518 19:45:53.005277  INFO : End of max read latency training
  519 19:45:53.010346  INFO : Training has run successfully!
  520 19:45:53.010813  1D training succeed
  521 19:45:53.019575  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 19:45:53.067856  Check phy result
  523 19:45:53.068390  INFO : End of initialization
  524 19:45:53.095197  INFO : End of 2D read delay Voltage center optimization
  525 19:45:53.119375  INFO : End of 2D read delay Voltage center optimization
  526 19:45:53.176074  INFO : End of 2D write delay Voltage center optimization
  527 19:45:53.230039  INFO : End of 2D write delay Voltage center optimization
  528 19:45:53.235604  INFO : Training has run successfully!
  529 19:45:53.236106  
  530 19:45:53.236555  channel==0
  531 19:45:53.241163  RxClkDly_Margin_A0==88 ps 9
  532 19:45:53.241624  TxDqDly_Margin_A0==88 ps 9
  533 19:45:53.246788  RxClkDly_Margin_A1==69 ps 7
  534 19:45:53.247249  TxDqDly_Margin_A1==98 ps 10
  535 19:45:53.247692  TrainedVREFDQ_A0==74
  536 19:45:53.252387  TrainedVREFDQ_A1==74
  537 19:45:53.252851  VrefDac_Margin_A0==22
  538 19:45:53.253292  DeviceVref_Margin_A0==40
  539 19:45:53.257986  VrefDac_Margin_A1==23
  540 19:45:53.258449  DeviceVref_Margin_A1==40
  541 19:45:53.258889  
  542 19:45:53.259326  
  543 19:45:53.259760  channel==1
  544 19:45:53.263749  RxClkDly_Margin_A0==78 ps 8
  545 19:45:53.264243  TxDqDly_Margin_A0==98 ps 10
  546 19:45:53.269231  RxClkDly_Margin_A1==78 ps 8
  547 19:45:53.269697  TxDqDly_Margin_A1==88 ps 9
  548 19:45:53.274808  TrainedVREFDQ_A0==75
  549 19:45:53.275287  TrainedVREFDQ_A1==75
  550 19:45:53.275732  VrefDac_Margin_A0==22
  551 19:45:53.280445  DeviceVref_Margin_A0==39
  552 19:45:53.280929  VrefDac_Margin_A1==22
  553 19:45:53.286030  DeviceVref_Margin_A1==38
  554 19:45:53.286504  
  555 19:45:53.286952   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 19:45:53.287393  
  557 19:45:53.319621  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  558 19:45:53.320169  2D training succeed
  559 19:45:53.325176  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 19:45:53.330764  auto size-- 65535DDR cs0 size: 2048MB
  561 19:45:53.331246  DDR cs1 size: 2048MB
  562 19:45:53.336400  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 19:45:53.336862  cs0 DataBus test pass
  564 19:45:53.342059  cs1 DataBus test pass
  565 19:45:53.342562  cs0 AddrBus test pass
  566 19:45:53.343013  cs1 AddrBus test pass
  567 19:45:53.343454  
  568 19:45:53.347787  100bdlr_step_size ps== 471
  569 19:45:53.348302  result report
  570 19:45:53.353234  boot times 0Enable ddr reg access
  571 19:45:53.358469  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 19:45:53.372279  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 19:45:54.031674  bl2z: ptr: 05129330, size: 00001e40
  574 19:45:54.039342  0.0;M3 CHK:0;cm4_sp_mode 0
  575 19:45:54.039858  MVN_1=0x00000000
  576 19:45:54.040347  MVN_2=0x00000000
  577 19:45:54.050853  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 19:45:54.051352  OPS=0x04
  579 19:45:54.051799  ring efuse init
  580 19:45:54.053861  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 19:45:54.059541  [0.017354 Inits done]
  582 19:45:54.060070  secure task start!
  583 19:45:54.060533  high task start!
  584 19:45:54.060976  low task start!
  585 19:45:54.063884  run into bl31
  586 19:45:54.072452  NOTICE:  BL31: v1.3(release):4fc40b1
  587 19:45:54.080237  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 19:45:54.080722  NOTICE:  BL31: G12A normal boot!
  589 19:45:54.095827  NOTICE:  BL31: BL33 decompress pass
  590 19:45:54.101522  ERROR:   Error initializing runtime service opteed_fast
  591 19:45:55.468970  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 19:45:55.469648  bl2_stage_init 0x01
  593 19:45:55.470126  bl2_stage_init 0x81
  594 19:45:55.474519  hw id: 0x0000 - pwm id 0x01
  595 19:45:55.475078  bl2_stage_init 0xc1
  596 19:45:55.478978  bl2_stage_init 0x02
  597 19:45:55.479524  
  598 19:45:55.480088  L0:00000000
  599 19:45:55.480568  L1:00000703
  600 19:45:55.481021  L2:00008067
  601 19:45:55.484545  L3:15000000
  602 19:45:55.485072  S1:00000000
  603 19:45:55.485526  B2:20282000
  604 19:45:55.485969  B1:a0f83180
  605 19:45:55.486408  
  606 19:45:55.486923  TE: 69874
  607 19:45:55.487377  
  608 19:45:55.496059  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 19:45:55.496425  
  610 19:45:55.496768  Board ID = 1
  611 19:45:55.497218  Set cpu clk to 24M
  612 19:45:55.497915  Set clk81 to 24M
  613 19:45:55.501341  Use GP1_pll as DSU clk.
  614 19:45:55.501706  DSU clk: 1200 Mhz
  615 19:45:55.502150  CPU clk: 1200 MHz
  616 19:45:55.506871  Set clk81 to 166.6M
  617 19:45:55.512506  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 19:45:55.512860  board id: 1
  619 19:45:55.520682  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 19:45:55.531579  fw parse done
  621 19:45:55.537724  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 19:45:55.580665  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 19:45:55.591972  PIEI prepare done
  624 19:45:55.592486  fastboot data load
  625 19:45:55.592777  fastboot data verify
  626 19:45:55.597446  verify result: 266
  627 19:45:55.603196  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 19:45:55.603627  LPDDR4 probe
  629 19:45:55.603879  ddr clk to 1584MHz
  630 19:45:55.611050  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 19:45:55.648801  
  632 19:45:55.649231  dmc_version 0001
  633 19:45:55.655736  Check phy result
  634 19:45:55.661650  INFO : End of CA training
  635 19:45:55.662089  INFO : End of initialization
  636 19:45:55.667257  INFO : Training has run successfully!
  637 19:45:55.667667  Check phy result
  638 19:45:55.672859  INFO : End of initialization
  639 19:45:55.673260  INFO : End of read enable training
  640 19:45:55.678629  INFO : End of fine write leveling
  641 19:45:55.684168  INFO : End of Write leveling coarse delay
  642 19:45:55.684595  INFO : Training has run successfully!
  643 19:45:55.684868  Check phy result
  644 19:45:55.689605  INFO : End of initialization
  645 19:45:55.689990  INFO : End of read dq deskew training
  646 19:45:55.695246  INFO : End of MPR read delay center optimization
  647 19:45:55.701011  INFO : End of write delay center optimization
  648 19:45:55.706775  INFO : End of read delay center optimization
  649 19:45:55.707411  INFO : End of max read latency training
  650 19:45:55.712315  INFO : Training has run successfully!
  651 19:45:55.712892  1D training succeed
  652 19:45:55.721411  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 19:45:55.769686  Check phy result
  654 19:45:55.770290  INFO : End of initialization
  655 19:45:55.797084  INFO : End of 2D read delay Voltage center optimization
  656 19:45:55.821277  INFO : End of 2D read delay Voltage center optimization
  657 19:45:55.877917  INFO : End of 2D write delay Voltage center optimization
  658 19:45:55.932044  INFO : End of 2D write delay Voltage center optimization
  659 19:45:55.937390  INFO : Training has run successfully!
  660 19:45:55.937878  
  661 19:45:55.938284  channel==0
  662 19:45:55.943055  RxClkDly_Margin_A0==78 ps 8
  663 19:45:55.943526  TxDqDly_Margin_A0==98 ps 10
  664 19:45:55.946355  RxClkDly_Margin_A1==88 ps 9
  665 19:45:55.946829  TxDqDly_Margin_A1==98 ps 10
  666 19:45:55.952025  TrainedVREFDQ_A0==74
  667 19:45:55.952513  TrainedVREFDQ_A1==75
  668 19:45:55.957508  VrefDac_Margin_A0==24
  669 19:45:55.957987  DeviceVref_Margin_A0==40
  670 19:45:55.958388  VrefDac_Margin_A1==23
  671 19:45:55.963082  DeviceVref_Margin_A1==39
  672 19:45:55.963574  
  673 19:45:55.963973  
  674 19:45:55.964403  channel==1
  675 19:45:55.964789  RxClkDly_Margin_A0==88 ps 9
  676 19:45:55.966498  TxDqDly_Margin_A0==98 ps 10
  677 19:45:55.972057  RxClkDly_Margin_A1==88 ps 9
  678 19:45:55.972548  TxDqDly_Margin_A1==78 ps 8
  679 19:45:55.972984  TrainedVREFDQ_A0==78
  680 19:45:55.977886  TrainedVREFDQ_A1==75
  681 19:45:55.978381  VrefDac_Margin_A0==22
  682 19:45:55.983399  DeviceVref_Margin_A0==36
  683 19:45:55.983890  VrefDac_Margin_A1==22
  684 19:45:55.984392  DeviceVref_Margin_A1==39
  685 19:45:55.984820  
  686 19:45:55.992549   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 19:45:55.993170  
  688 19:45:56.020298  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  689 19:45:56.020906  2D training succeed
  690 19:45:56.031390  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 19:45:56.031882  auto size-- 65535DDR cs0 size: 2048MB
  692 19:45:56.032351  DDR cs1 size: 2048MB
  693 19:45:56.037034  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 19:45:56.037517  cs0 DataBus test pass
  695 19:45:56.042487  cs1 DataBus test pass
  696 19:45:56.042959  cs0 AddrBus test pass
  697 19:45:56.048233  cs1 AddrBus test pass
  698 19:45:56.048713  
  699 19:45:56.049118  100bdlr_step_size ps== 471
  700 19:45:56.049614  result report
  701 19:45:56.053791  boot times 0Enable ddr reg access
  702 19:45:56.060280  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 19:45:56.073991  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 19:45:56.733711  bl2z: ptr: 05129330, size: 00001e40
  705 19:45:56.743060  0.0;M3 CHK:0;cm4_sp_mode 0
  706 19:45:56.743574  MVN_1=0x00000000
  707 19:45:56.744023  MVN_2=0x00000000
  708 19:45:56.754471  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 19:45:56.755005  OPS=0x04
  710 19:45:56.755415  ring efuse init
  711 19:45:56.757412  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 19:45:56.763291  [0.017354 Inits done]
  713 19:45:56.763797  secure task start!
  714 19:45:56.764242  high task start!
  715 19:45:56.764634  low task start!
  716 19:45:56.767589  run into bl31
  717 19:45:56.776258  NOTICE:  BL31: v1.3(release):4fc40b1
  718 19:45:56.784088  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 19:45:56.784593  NOTICE:  BL31: G12A normal boot!
  720 19:45:56.799613  NOTICE:  BL31: BL33 decompress pass
  721 19:45:56.805350  ERROR:   Error initializing runtime service opteed_fast
  722 19:45:57.600817  
  723 19:45:57.601324  
  724 19:45:57.606155  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 19:45:57.606624  
  726 19:45:57.609686  Model: Libre Computer AML-S905D3-CC Solitude
  727 19:45:57.757211  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 19:45:57.772360  DRAM:  2 GiB (effective 3.8 GiB)
  729 19:45:57.873197  Core:  406 devices, 33 uclasses, devicetree: separate
  730 19:45:57.879051  WDT:   Not starting watchdog@f0d0
  731 19:45:57.904186  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 19:45:57.916500  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 19:45:57.921224  ** Bad device specification mmc 0 **
  734 19:45:57.931404  Card did not respond to voltage select! : -110
  735 19:45:57.938965  ** Bad device specification mmc 0 **
  736 19:45:57.939518  Couldn't find partition mmc 0
  737 19:45:57.947354  Card did not respond to voltage select! : -110
  738 19:45:57.952748  ** Bad device specification mmc 0 **
  739 19:45:57.953286  Couldn't find partition mmc 0
  740 19:45:57.957818  Error: could not access storage.
  741 19:45:58.254359  Net:   eth0: ethernet@ff3f0000
  742 19:45:58.255009  starting USB...
  743 19:45:58.498970  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 19:45:58.499637  Starting the controller
  745 19:45:58.505886  USB XHCI 1.10
  746 19:46:00.059971  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 19:46:00.068242         scanning usb for storage devices... 0 Storage Device(s) found
  749 19:46:00.119877  Hit any key to stop autoboot:  1 
  750 19:46:00.120788  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  751 19:46:00.121399  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  752 19:46:00.121896  Setting prompt string to ['=>']
  753 19:46:00.122396  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  754 19:46:00.134323   0 
  755 19:46:00.135268  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 19:46:00.236610  => setenv autoload no
  758 19:46:00.237393  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  759 19:46:00.242462  setenv autoload no
  761 19:46:00.344108  => setenv initrd_high 0xffffffff
  762 19:46:00.344948  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  763 19:46:00.349155  setenv initrd_high 0xffffffff
  765 19:46:00.450764  => setenv fdt_high 0xffffffff
  766 19:46:00.451599  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  767 19:46:00.455856  setenv fdt_high 0xffffffff
  769 19:46:00.557497  => dhcp
  770 19:46:00.558311  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  771 19:46:00.562312  dhcp
  772 19:46:01.518453  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  773 19:46:01.519106  Speed: 1000, full duplex
  774 19:46:01.519553  BOOTP broadcast 1
  775 19:46:01.541414  DHCP client bound to address 192.168.6.21 (22 ms)
  777 19:46:01.643123  => setenv serverip 192.168.6.2
  778 19:46:01.643948  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  779 19:46:01.648581  setenv serverip 192.168.6.2
  781 19:46:01.750182  => tftpboot 0x01080000 967945/tftp-deploy-hwpbezv0/kernel/uImage
  782 19:46:01.750957  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  783 19:46:01.757643  tftpboot 0x01080000 967945/tftp-deploy-hwpbezv0/kernel/uImage
  784 19:46:01.758165  Speed: 1000, full duplex
  785 19:46:01.758606  Using ethernet@ff3f0000 device
  786 19:46:01.763245  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  787 19:46:01.768639  Filename '967945/tftp-deploy-hwpbezv0/kernel/uImage'.
  788 19:46:01.772667  Load address: 0x1080000
  789 19:46:04.698051  Loading: *##################################################  43.6 MiB
  790 19:46:04.698717  	 14.9 MiB/s
  791 19:46:04.699166  done
  792 19:46:04.702344  Bytes transferred = 45713984 (2b98a40 hex)
  794 19:46:04.803881  => tftpboot 0x08000000 967945/tftp-deploy-hwpbezv0/ramdisk/ramdisk.cpio.gz.uboot
  795 19:46:04.804705  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
  796 19:46:04.811638  tftpboot 0x08000000 967945/tftp-deploy-hwpbezv0/ramdisk/ramdisk.cpio.gz.uboot
  797 19:46:04.812192  Speed: 1000, full duplex
  798 19:46:04.812631  Using ethernet@ff3f0000 device
  799 19:46:04.817079  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  800 19:46:04.826893  Filename '967945/tftp-deploy-hwpbezv0/ramdisk/ramdisk.cpio.gz.uboot'.
  801 19:46:04.827380  Load address: 0x8000000
  802 19:46:06.270798  Loading: *################################################# UDP wrong checksum 00000005 00004aee
  803 19:46:11.272661  T  UDP wrong checksum 00000005 00004aee
  804 19:46:21.273796  T T  UDP wrong checksum 00000005 00004aee
  805 19:46:32.167577  T T  UDP wrong checksum 000000ff 0000b29a
  806 19:46:32.210708   UDP wrong checksum 000000ff 0000388d
  807 19:46:41.276492  T  UDP wrong checksum 00000005 00004aee
  808 19:47:01.283408  T T T T 
  809 19:47:01.284071  Retry count exceeded; starting again
  811 19:47:01.285468  end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
  814 19:47:01.287303  end: 2.4 uboot-commands (duration 00:01:20) [common]
  816 19:47:01.288741  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  818 19:47:01.289741  end: 2 uboot-action (duration 00:01:20) [common]
  820 19:47:01.291220  Cleaning after the job
  821 19:47:01.291718  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/ramdisk
  822 19:47:01.292971  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/kernel
  823 19:47:01.339020  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/dtb
  824 19:47:01.339838  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/nfsrootfs
  825 19:47:01.671271  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/967945/tftp-deploy-hwpbezv0/modules
  826 19:47:01.694724  start: 4.1 power-off (timeout 00:00:30) [common]
  827 19:47:01.695393  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  828 19:47:01.728305  >> OK - accepted request

  829 19:47:01.730172  Returned 0 in 0 seconds
  830 19:47:01.831101  end: 4.1 power-off (duration 00:00:00) [common]
  832 19:47:01.832231  start: 4.2 read-feedback (timeout 00:10:00) [common]
  833 19:47:01.833182  Listened to connection for namespace 'common' for up to 1s
  834 19:47:02.832916  Finalising connection for namespace 'common'
  835 19:47:02.833416  Disconnecting from shell: Finalise
  836 19:47:02.833701  => 
  837 19:47:02.934514  end: 4.2 read-feedback (duration 00:00:01) [common]
  838 19:47:02.935266  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/967945
  839 19:47:05.609921  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/967945
  840 19:47:05.610570  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.