Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 13:36:18.543176 lava-dispatcher, installed at version: 2024.01
2 13:36:18.544549 start: 0 validate
3 13:36:18.545119 Start time: 2024-11-10 13:36:18.545085+00:00 (UTC)
4 13:36:18.545692 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 13:36:18.546294 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 13:36:18.583616 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 13:36:18.584218 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 13:36:18.612509 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 13:36:18.613145 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 13:36:18.647793 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 13:36:18.648382 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 13:36:18.680010 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 13:36:18.680522 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 13:36:18.719156 validate duration: 0.17
16 13:36:18.720045 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 13:36:18.720383 start: 1.1 download-retry (timeout 00:10:00) [common]
18 13:36:18.720697 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 13:36:18.721288 Not decompressing ramdisk as can be used compressed.
20 13:36:18.721737 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 13:36:18.722014 saving as /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/ramdisk/initrd.cpio.gz
22 13:36:18.722283 total size: 5628182 (5 MB)
23 13:36:18.763234 progress 0 % (0 MB)
24 13:36:18.771430 progress 5 % (0 MB)
25 13:36:18.780564 progress 10 % (0 MB)
26 13:36:18.788217 progress 15 % (0 MB)
27 13:36:18.792571 progress 20 % (1 MB)
28 13:36:18.796228 progress 25 % (1 MB)
29 13:36:18.800312 progress 30 % (1 MB)
30 13:36:18.804399 progress 35 % (1 MB)
31 13:36:18.808139 progress 40 % (2 MB)
32 13:36:18.812184 progress 45 % (2 MB)
33 13:36:18.815794 progress 50 % (2 MB)
34 13:36:18.819921 progress 55 % (2 MB)
35 13:36:18.824076 progress 60 % (3 MB)
36 13:36:18.827669 progress 65 % (3 MB)
37 13:36:18.831705 progress 70 % (3 MB)
38 13:36:18.835377 progress 75 % (4 MB)
39 13:36:18.839480 progress 80 % (4 MB)
40 13:36:18.843112 progress 85 % (4 MB)
41 13:36:18.847170 progress 90 % (4 MB)
42 13:36:18.851149 progress 95 % (5 MB)
43 13:36:18.854434 progress 100 % (5 MB)
44 13:36:18.855076 5 MB downloaded in 0.13 s (40.43 MB/s)
45 13:36:18.855639 end: 1.1.1 http-download (duration 00:00:00) [common]
47 13:36:18.856555 end: 1.1 download-retry (duration 00:00:00) [common]
48 13:36:18.856849 start: 1.2 download-retry (timeout 00:10:00) [common]
49 13:36:18.857119 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 13:36:18.857598 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/kernel/Image
51 13:36:18.857840 saving as /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/kernel/Image
52 13:36:18.858048 total size: 45713920 (43 MB)
53 13:36:18.858255 No compression specified
54 13:36:18.893675 progress 0 % (0 MB)
55 13:36:18.922362 progress 5 % (2 MB)
56 13:36:18.951973 progress 10 % (4 MB)
57 13:36:18.980107 progress 15 % (6 MB)
58 13:36:19.008347 progress 20 % (8 MB)
59 13:36:19.039292 progress 25 % (10 MB)
60 13:36:19.070948 progress 30 % (13 MB)
61 13:36:19.101672 progress 35 % (15 MB)
62 13:36:19.131346 progress 40 % (17 MB)
63 13:36:19.159373 progress 45 % (19 MB)
64 13:36:19.187761 progress 50 % (21 MB)
65 13:36:19.216001 progress 55 % (24 MB)
66 13:36:19.244103 progress 60 % (26 MB)
67 13:36:19.271822 progress 65 % (28 MB)
68 13:36:19.300149 progress 70 % (30 MB)
69 13:36:19.328376 progress 75 % (32 MB)
70 13:36:19.356426 progress 80 % (34 MB)
71 13:36:19.384284 progress 85 % (37 MB)
72 13:36:19.412364 progress 90 % (39 MB)
73 13:36:19.440335 progress 95 % (41 MB)
74 13:36:19.467875 progress 100 % (43 MB)
75 13:36:19.468488 43 MB downloaded in 0.61 s (71.42 MB/s)
76 13:36:19.468977 end: 1.2.1 http-download (duration 00:00:01) [common]
78 13:36:19.469804 end: 1.2 download-retry (duration 00:00:01) [common]
79 13:36:19.470082 start: 1.3 download-retry (timeout 00:09:59) [common]
80 13:36:19.470348 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 13:36:19.470914 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 13:36:19.471199 saving as /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/dtb/meson-g12b-a311d-libretech-cc.dtb
83 13:36:19.471407 total size: 54703 (0 MB)
84 13:36:19.471615 No compression specified
85 13:36:19.516685 progress 59 % (0 MB)
86 13:36:19.517548 progress 100 % (0 MB)
87 13:36:19.518099 0 MB downloaded in 0.05 s (1.12 MB/s)
88 13:36:19.518618 end: 1.3.1 http-download (duration 00:00:00) [common]
90 13:36:19.519433 end: 1.3 download-retry (duration 00:00:00) [common]
91 13:36:19.519697 start: 1.4 download-retry (timeout 00:09:59) [common]
92 13:36:19.519961 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 13:36:19.520467 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 13:36:19.520712 saving as /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/nfsrootfs/full.rootfs.tar
95 13:36:19.520914 total size: 107552908 (102 MB)
96 13:36:19.521124 Using unxz to decompress xz
97 13:36:19.561858 progress 0 % (0 MB)
98 13:36:20.203315 progress 5 % (5 MB)
99 13:36:20.933526 progress 10 % (10 MB)
100 13:36:21.655750 progress 15 % (15 MB)
101 13:36:22.417329 progress 20 % (20 MB)
102 13:36:22.987405 progress 25 % (25 MB)
103 13:36:23.604325 progress 30 % (30 MB)
104 13:36:24.380948 progress 35 % (35 MB)
105 13:36:24.731550 progress 40 % (41 MB)
106 13:36:25.159712 progress 45 % (46 MB)
107 13:36:25.849596 progress 50 % (51 MB)
108 13:36:26.533767 progress 55 % (56 MB)
109 13:36:27.287860 progress 60 % (61 MB)
110 13:36:28.042657 progress 65 % (66 MB)
111 13:36:28.772648 progress 70 % (71 MB)
112 13:36:29.543102 progress 75 % (76 MB)
113 13:36:30.225353 progress 80 % (82 MB)
114 13:36:30.932843 progress 85 % (87 MB)
115 13:36:31.673822 progress 90 % (92 MB)
116 13:36:32.384590 progress 95 % (97 MB)
117 13:36:33.134062 progress 100 % (102 MB)
118 13:36:33.146152 102 MB downloaded in 13.63 s (7.53 MB/s)
119 13:36:33.147036 end: 1.4.1 http-download (duration 00:00:14) [common]
121 13:36:33.148979 end: 1.4 download-retry (duration 00:00:14) [common]
122 13:36:33.149578 start: 1.5 download-retry (timeout 00:09:46) [common]
123 13:36:33.150165 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 13:36:33.151169 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/modules.tar.xz
125 13:36:33.151728 saving as /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/modules/modules.tar
126 13:36:33.152236 total size: 11611892 (11 MB)
127 13:36:33.152721 Using unxz to decompress xz
128 13:36:33.200692 progress 0 % (0 MB)
129 13:36:33.269431 progress 5 % (0 MB)
130 13:36:33.344753 progress 10 % (1 MB)
131 13:36:33.443080 progress 15 % (1 MB)
132 13:36:33.536634 progress 20 % (2 MB)
133 13:36:33.616919 progress 25 % (2 MB)
134 13:36:33.695629 progress 30 % (3 MB)
135 13:36:33.775238 progress 35 % (3 MB)
136 13:36:33.848829 progress 40 % (4 MB)
137 13:36:33.926057 progress 45 % (5 MB)
138 13:36:34.012837 progress 50 % (5 MB)
139 13:36:34.090905 progress 55 % (6 MB)
140 13:36:34.178955 progress 60 % (6 MB)
141 13:36:34.260254 progress 65 % (7 MB)
142 13:36:34.344082 progress 70 % (7 MB)
143 13:36:34.423484 progress 75 % (8 MB)
144 13:36:34.510533 progress 80 % (8 MB)
145 13:36:34.615551 progress 85 % (9 MB)
146 13:36:34.709440 progress 90 % (9 MB)
147 13:36:34.791779 progress 95 % (10 MB)
148 13:36:34.869866 progress 100 % (11 MB)
149 13:36:34.881805 11 MB downloaded in 1.73 s (6.40 MB/s)
150 13:36:34.882798 end: 1.5.1 http-download (duration 00:00:02) [common]
152 13:36:34.884633 end: 1.5 download-retry (duration 00:00:02) [common]
153 13:36:34.885215 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 13:36:34.885787 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 13:36:45.092847 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/970706/extract-nfsrootfs-etd50y39
156 13:36:45.093486 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 13:36:45.093786 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 13:36:45.094492 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6
159 13:36:45.095531 makedir: /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin
160 13:36:45.095924 makedir: /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/tests
161 13:36:45.096319 makedir: /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/results
162 13:36:45.096690 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-add-keys
163 13:36:45.097270 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-add-sources
164 13:36:45.097839 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-background-process-start
165 13:36:45.098398 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-background-process-stop
166 13:36:45.099013 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-common-functions
167 13:36:45.099561 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-echo-ipv4
168 13:36:45.100133 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-install-packages
169 13:36:45.100707 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-installed-packages
170 13:36:45.101231 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-os-build
171 13:36:45.101758 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-probe-channel
172 13:36:45.102280 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-probe-ip
173 13:36:45.102798 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-target-ip
174 13:36:45.103349 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-target-mac
175 13:36:45.103962 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-target-storage
176 13:36:45.104651 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-test-case
177 13:36:45.105179 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-test-event
178 13:36:45.105694 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-test-feedback
179 13:36:45.106209 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-test-raise
180 13:36:45.106709 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-test-reference
181 13:36:45.107205 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-test-runner
182 13:36:45.107696 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-test-set
183 13:36:45.108239 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-test-shell
184 13:36:45.108831 Updating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-install-packages (oe)
185 13:36:45.109410 Updating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/bin/lava-installed-packages (oe)
186 13:36:45.109873 Creating /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/environment
187 13:36:45.110304 LAVA metadata
188 13:36:45.110601 - LAVA_JOB_ID=970706
189 13:36:45.110824 - LAVA_DISPATCHER_IP=192.168.6.2
190 13:36:45.111230 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 13:36:45.112354 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 13:36:45.112716 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 13:36:45.112937 skipped lava-vland-overlay
194 13:36:45.113190 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 13:36:45.113455 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 13:36:45.113687 skipped lava-multinode-overlay
197 13:36:45.113937 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 13:36:45.114195 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 13:36:45.114465 Loading test definitions
200 13:36:45.114766 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 13:36:45.114999 Using /lava-970706 at stage 0
202 13:36:45.116317 uuid=970706_1.6.2.4.1 testdef=None
203 13:36:45.116676 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 13:36:45.116956 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 13:36:45.118848 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 13:36:45.119685 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 13:36:45.122390 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 13:36:45.123316 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 13:36:45.125795 runner path: /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/0/tests/0_dmesg test_uuid 970706_1.6.2.4.1
212 13:36:45.126477 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 13:36:45.127279 Creating lava-test-runner.conf files
215 13:36:45.127487 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/970706/lava-overlay-qqj2z3g6/lava-970706/0 for stage 0
216 13:36:45.127871 - 0_dmesg
217 13:36:45.128330 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 13:36:45.128634 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 13:36:45.151281 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 13:36:45.151703 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 13:36:45.151966 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 13:36:45.152271 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 13:36:45.152540 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 13:36:45.797705 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 13:36:45.798184 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 13:36:45.798438 extracting modules file /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970706/extract-nfsrootfs-etd50y39
227 13:36:47.470866 extracting modules file /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970706/extract-overlay-ramdisk-71z5yn12/ramdisk
228 13:36:49.207382 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 13:36:49.207944 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 13:36:49.208316 [common] Applying overlay to NFS
231 13:36:49.208575 [common] Applying overlay /var/lib/lava/dispatcher/tmp/970706/compress-overlay-bdvyqe9k/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/970706/extract-nfsrootfs-etd50y39
232 13:36:49.244736 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 13:36:49.245227 start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
234 13:36:49.245559 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
235 13:36:49.245841 Converting downloaded kernel to a uImage
236 13:36:49.246210 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/kernel/Image /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/kernel/uImage
237 13:36:49.704088 output: Image Name:
238 13:36:49.704504 output: Created: Sun Nov 10 13:36:49 2024
239 13:36:49.704713 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 13:36:49.704917 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 13:36:49.705118 output: Load Address: 01080000
242 13:36:49.705319 output: Entry Point: 01080000
243 13:36:49.705516 output:
244 13:36:49.705847 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 13:36:49.706112 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 13:36:49.706380 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 13:36:49.706633 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 13:36:49.706888 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 13:36:49.707143 Building ramdisk /var/lib/lava/dispatcher/tmp/970706/extract-overlay-ramdisk-71z5yn12/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/970706/extract-overlay-ramdisk-71z5yn12/ramdisk
250 13:36:51.877379 >> 166827 blocks
251 13:36:59.586840 Adding RAMdisk u-boot header.
252 13:36:59.587538 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/970706/extract-overlay-ramdisk-71z5yn12/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/970706/extract-overlay-ramdisk-71z5yn12/ramdisk.cpio.gz.uboot
253 13:36:59.849419 output: Image Name:
254 13:36:59.849862 output: Created: Sun Nov 10 13:36:59 2024
255 13:36:59.850079 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 13:36:59.850286 output: Data Size: 23434327 Bytes = 22885.08 KiB = 22.35 MiB
257 13:36:59.850488 output: Load Address: 00000000
258 13:36:59.850687 output: Entry Point: 00000000
259 13:36:59.850885 output:
260 13:36:59.851505 rename /var/lib/lava/dispatcher/tmp/970706/extract-overlay-ramdisk-71z5yn12/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/ramdisk/ramdisk.cpio.gz.uboot
261 13:36:59.851960 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 13:36:59.852592 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 13:36:59.853144 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 13:36:59.853604 No LXC device requested
265 13:36:59.854109 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 13:36:59.854618 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 13:36:59.855107 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 13:36:59.855515 Checking files for TFTP limit of 4294967296 bytes.
269 13:36:59.858268 end: 1 tftp-deploy (duration 00:00:41) [common]
270 13:36:59.858890 start: 2 uboot-action (timeout 00:05:00) [common]
271 13:36:59.859415 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 13:36:59.859910 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 13:36:59.860452 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 13:36:59.860987 Using kernel file from prepare-kernel: 970706/tftp-deploy-8j9swgu2/kernel/uImage
275 13:36:59.861621 substitutions:
276 13:36:59.862028 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 13:36:59.862432 - {DTB_ADDR}: 0x01070000
278 13:36:59.862827 - {DTB}: 970706/tftp-deploy-8j9swgu2/dtb/meson-g12b-a311d-libretech-cc.dtb
279 13:36:59.863223 - {INITRD}: 970706/tftp-deploy-8j9swgu2/ramdisk/ramdisk.cpio.gz.uboot
280 13:36:59.863613 - {KERNEL_ADDR}: 0x01080000
281 13:36:59.864041 - {KERNEL}: 970706/tftp-deploy-8j9swgu2/kernel/uImage
282 13:36:59.864448 - {LAVA_MAC}: None
283 13:36:59.864886 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/970706/extract-nfsrootfs-etd50y39
284 13:36:59.865283 - {NFS_SERVER_IP}: 192.168.6.2
285 13:36:59.865673 - {PRESEED_CONFIG}: None
286 13:36:59.866058 - {PRESEED_LOCAL}: None
287 13:36:59.866443 - {RAMDISK_ADDR}: 0x08000000
288 13:36:59.866826 - {RAMDISK}: 970706/tftp-deploy-8j9swgu2/ramdisk/ramdisk.cpio.gz.uboot
289 13:36:59.867214 - {ROOT_PART}: None
290 13:36:59.867605 - {ROOT}: None
291 13:36:59.868024 - {SERVER_IP}: 192.168.6.2
292 13:36:59.868422 - {TEE_ADDR}: 0x83000000
293 13:36:59.868811 - {TEE}: None
294 13:36:59.869195 Parsed boot commands:
295 13:36:59.869570 - setenv autoload no
296 13:36:59.869952 - setenv initrd_high 0xffffffff
297 13:36:59.870336 - setenv fdt_high 0xffffffff
298 13:36:59.870716 - dhcp
299 13:36:59.871114 - setenv serverip 192.168.6.2
300 13:36:59.871500 - tftpboot 0x01080000 970706/tftp-deploy-8j9swgu2/kernel/uImage
301 13:36:59.871881 - tftpboot 0x08000000 970706/tftp-deploy-8j9swgu2/ramdisk/ramdisk.cpio.gz.uboot
302 13:36:59.872300 - tftpboot 0x01070000 970706/tftp-deploy-8j9swgu2/dtb/meson-g12b-a311d-libretech-cc.dtb
303 13:36:59.872687 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/970706/extract-nfsrootfs-etd50y39,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 13:36:59.873084 - bootm 0x01080000 0x08000000 0x01070000
305 13:36:59.873604 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 13:36:59.875085 start: 2.3 connect-device (timeout 00:05:00) [common]
308 13:36:59.875501 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 13:36:59.891348 Setting prompt string to ['lava-test: # ']
310 13:36:59.893061 end: 2.3 connect-device (duration 00:00:00) [common]
311 13:36:59.893656 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 13:36:59.894210 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 13:36:59.894719 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 13:36:59.895854 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 13:36:59.951286 >> OK - accepted request
316 13:36:59.953747 Returned 0 in 0 seconds
317 13:37:00.054971 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 13:37:00.056753 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 13:37:00.057343 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 13:37:00.059295 Setting prompt string to ['Hit any key to stop autoboot']
322 13:37:00.059781 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 13:37:00.061516 Trying 192.168.56.21...
324 13:37:00.062019 Connected to conserv1.
325 13:37:00.062437 Escape character is '^]'.
326 13:37:00.062865
327 13:37:00.063294 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 13:37:00.063730
329 13:37:10.822434 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 13:37:10.823037 bl2_stage_init 0x01
331 13:37:10.823471 bl2_stage_init 0x81
332 13:37:10.828126 hw id: 0x0000 - pwm id 0x01
333 13:37:10.828627 bl2_stage_init 0xc1
334 13:37:10.829025 bl2_stage_init 0x02
335 13:37:10.829413
336 13:37:10.833599 L0:00000000
337 13:37:10.834033 L1:20000703
338 13:37:10.834438 L2:00008067
339 13:37:10.834822 L3:14000000
340 13:37:10.839188 B2:00402000
341 13:37:10.839624 B1:e0f83180
342 13:37:10.840050
343 13:37:10.840445 TE: 58124
344 13:37:10.840835
345 13:37:10.844811 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 13:37:10.845244
347 13:37:10.845639 Board ID = 1
348 13:37:10.850252 Set A53 clk to 24M
349 13:37:10.850673 Set A73 clk to 24M
350 13:37:10.851059 Set clk81 to 24M
351 13:37:10.855791 A53 clk: 1200 MHz
352 13:37:10.856237 A73 clk: 1200 MHz
353 13:37:10.856627 CLK81: 166.6M
354 13:37:10.857008 smccc: 00012a92
355 13:37:10.861425 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 13:37:10.867044 board id: 1
357 13:37:10.872205 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 13:37:10.883620 fw parse done
359 13:37:10.888688 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 13:37:10.931233 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 13:37:10.943083 PIEI prepare done
362 13:37:10.943541 fastboot data load
363 13:37:10.943935 fastboot data verify
364 13:37:10.948606 verify result: 266
365 13:37:10.954238 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 13:37:10.954669 LPDDR4 probe
367 13:37:10.955056 ddr clk to 1584MHz
368 13:37:10.962288 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 13:37:10.999592
370 13:37:11.000093 dmc_version 0001
371 13:37:11.006206 Check phy result
372 13:37:11.012083 INFO : End of CA training
373 13:37:11.012543 INFO : End of initialization
374 13:37:11.017623 INFO : Training has run successfully!
375 13:37:11.018076 Check phy result
376 13:37:11.023131 INFO : End of initialization
377 13:37:11.023560 INFO : End of read enable training
378 13:37:11.026449 INFO : End of fine write leveling
379 13:37:11.031957 INFO : End of Write leveling coarse delay
380 13:37:11.037576 INFO : Training has run successfully!
381 13:37:11.038016 Check phy result
382 13:37:11.038410 INFO : End of initialization
383 13:37:11.043163 INFO : End of read dq deskew training
384 13:37:11.046547 INFO : End of MPR read delay center optimization
385 13:37:11.052151 INFO : End of write delay center optimization
386 13:37:11.057748 INFO : End of read delay center optimization
387 13:37:11.058193 INFO : End of max read latency training
388 13:37:11.063498 INFO : Training has run successfully!
389 13:37:11.064075 1D training succeed
390 13:37:11.071627 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 13:37:11.119226 Check phy result
392 13:37:11.119739 INFO : End of initialization
393 13:37:11.141829 INFO : End of 2D read delay Voltage center optimization
394 13:37:11.162175 INFO : End of 2D read delay Voltage center optimization
395 13:37:11.214141 INFO : End of 2D write delay Voltage center optimization
396 13:37:11.263592 INFO : End of 2D write delay Voltage center optimization
397 13:37:11.269047 INFO : Training has run successfully!
398 13:37:11.269504
399 13:37:11.269907 channel==0
400 13:37:11.274565 RxClkDly_Margin_A0==88 ps 9
401 13:37:11.274997 TxDqDly_Margin_A0==98 ps 10
402 13:37:11.277903 RxClkDly_Margin_A1==88 ps 9
403 13:37:11.278329 TxDqDly_Margin_A1==98 ps 10
404 13:37:11.283585 TrainedVREFDQ_A0==74
405 13:37:11.284158 TrainedVREFDQ_A1==74
406 13:37:11.289084 VrefDac_Margin_A0==25
407 13:37:11.289424 DeviceVref_Margin_A0==40
408 13:37:11.289660 VrefDac_Margin_A1==25
409 13:37:11.294670 DeviceVref_Margin_A1==40
410 13:37:11.295026
411 13:37:11.295290
412 13:37:11.295544 channel==1
413 13:37:11.295779 RxClkDly_Margin_A0==88 ps 9
414 13:37:11.298111 TxDqDly_Margin_A0==88 ps 9
415 13:37:11.303676 RxClkDly_Margin_A1==88 ps 9
416 13:37:11.304028 TxDqDly_Margin_A1==98 ps 10
417 13:37:11.304459 TrainedVREFDQ_A0==75
418 13:37:11.309325 TrainedVREFDQ_A1==77
419 13:37:11.309655 VrefDac_Margin_A0==22
420 13:37:11.314959 DeviceVref_Margin_A0==38
421 13:37:11.315283 VrefDac_Margin_A1==24
422 13:37:11.315541 DeviceVref_Margin_A1==37
423 13:37:11.315778
424 13:37:11.323937 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 13:37:11.324296
426 13:37:11.351895 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 13:37:11.352327 2D training succeed
428 13:37:11.357603 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 13:37:11.363057 auto size-- 65535DDR cs0 size: 2048MB
430 13:37:11.363389 DDR cs1 size: 2048MB
431 13:37:11.368619 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 13:37:11.368969 cs0 DataBus test pass
433 13:37:11.374215 cs1 DataBus test pass
434 13:37:11.374557 cs0 AddrBus test pass
435 13:37:11.379815 cs1 AddrBus test pass
436 13:37:11.380198
437 13:37:11.380459 100bdlr_step_size ps== 420
438 13:37:11.380713 result report
439 13:37:11.385464 boot times 0Enable ddr reg access
440 13:37:11.391764 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 13:37:11.405228 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 13:37:11.978963 0.0;M3 CHK:0;cm4_sp_mode 0
443 13:37:11.979365 MVN_1=0x00000000
444 13:37:11.984497 MVN_2=0x00000000
445 13:37:11.990208 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 13:37:11.990532 OPS=0x10
447 13:37:11.990786 ring efuse init
448 13:37:11.991038 chipver efuse init
449 13:37:11.995801 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 13:37:12.001484 [0.018961 Inits done]
451 13:37:12.001811 secure task start!
452 13:37:12.002060 high task start!
453 13:37:12.005951 low task start!
454 13:37:12.006272 run into bl31
455 13:37:12.012555 NOTICE: BL31: v1.3(release):4fc40b1
456 13:37:12.020409 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 13:37:12.020783 NOTICE: BL31: G12A normal boot!
458 13:37:12.045763 NOTICE: BL31: BL33 decompress pass
459 13:37:12.051625 ERROR: Error initializing runtime service opteed_fast
460 13:37:13.284471
461 13:37:13.285114
462 13:37:13.292855 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 13:37:13.293378
464 13:37:13.293804 Model: Libre Computer AML-A311D-CC Alta
465 13:37:13.501247 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 13:37:13.524468 DRAM: 2 GiB (effective 3.8 GiB)
467 13:37:13.667554 Core: 408 devices, 31 uclasses, devicetree: separate
468 13:37:13.673447 WDT: Not starting watchdog@f0d0
469 13:37:13.705787 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 13:37:13.718092 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 13:37:13.723088 ** Bad device specification mmc 0 **
472 13:37:13.733558 Card did not respond to voltage select! : -110
473 13:37:13.741095 ** Bad device specification mmc 0 **
474 13:37:13.741623 Couldn't find partition mmc 0
475 13:37:13.749647 Card did not respond to voltage select! : -110
476 13:37:13.755004 ** Bad device specification mmc 0 **
477 13:37:13.755589 Couldn't find partition mmc 0
478 13:37:13.760175 Error: could not access storage.
479 13:37:15.022932 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 13:37:15.023554 bl2_stage_init 0x01
481 13:37:15.024030 bl2_stage_init 0x81
482 13:37:15.028355 hw id: 0x0000 - pwm id 0x01
483 13:37:15.028826 bl2_stage_init 0xc1
484 13:37:15.029244 bl2_stage_init 0x02
485 13:37:15.029654
486 13:37:15.034055 L0:00000000
487 13:37:15.034512 L1:20000703
488 13:37:15.034924 L2:00008067
489 13:37:15.035323 L3:14000000
490 13:37:15.036853 B2:00402000
491 13:37:15.037288 B1:e0f83180
492 13:37:15.037690
493 13:37:15.038095 TE: 58124
494 13:37:15.038496
495 13:37:15.048060 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 13:37:15.048517
497 13:37:15.048927 Board ID = 1
498 13:37:15.049325 Set A53 clk to 24M
499 13:37:15.049721 Set A73 clk to 24M
500 13:37:15.053640 Set clk81 to 24M
501 13:37:15.054087 A53 clk: 1200 MHz
502 13:37:15.054492 A73 clk: 1200 MHz
503 13:37:15.059236 CLK81: 166.6M
504 13:37:15.059676 smccc: 00012a92
505 13:37:15.064866 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 13:37:15.065321 board id: 1
507 13:37:15.073452 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 13:37:15.084093 fw parse done
509 13:37:15.090045 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 13:37:15.132720 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 13:37:15.143596 PIEI prepare done
512 13:37:15.144085 fastboot data load
513 13:37:15.144504 fastboot data verify
514 13:37:15.149231 verify result: 266
515 13:37:15.154914 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 13:37:15.155353 LPDDR4 probe
517 13:37:15.155758 ddr clk to 1584MHz
518 13:37:15.162844 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 13:37:15.200264
520 13:37:15.200849 dmc_version 0001
521 13:37:15.206771 Check phy result
522 13:37:15.212690 INFO : End of CA training
523 13:37:15.213138 INFO : End of initialization
524 13:37:15.218319 INFO : Training has run successfully!
525 13:37:15.218769 Check phy result
526 13:37:15.223918 INFO : End of initialization
527 13:37:15.224405 INFO : End of read enable training
528 13:37:15.229574 INFO : End of fine write leveling
529 13:37:15.235060 INFO : End of Write leveling coarse delay
530 13:37:15.235518 INFO : Training has run successfully!
531 13:37:15.235929 Check phy result
532 13:37:15.240676 INFO : End of initialization
533 13:37:15.241115 INFO : End of read dq deskew training
534 13:37:15.246239 INFO : End of MPR read delay center optimization
535 13:37:15.251920 INFO : End of write delay center optimization
536 13:37:15.257421 INFO : End of read delay center optimization
537 13:37:15.257869 INFO : End of max read latency training
538 13:37:15.262987 INFO : Training has run successfully!
539 13:37:15.263431 1D training succeed
540 13:37:15.272049 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 13:37:15.319834 Check phy result
542 13:37:15.320449 INFO : End of initialization
543 13:37:15.341538 INFO : End of 2D read delay Voltage center optimization
544 13:37:15.361038 INFO : End of 2D read delay Voltage center optimization
545 13:37:15.413901 INFO : End of 2D write delay Voltage center optimization
546 13:37:15.463229 INFO : End of 2D write delay Voltage center optimization
547 13:37:15.468759 INFO : Training has run successfully!
548 13:37:15.469217
549 13:37:15.469643 channel==0
550 13:37:15.474356 RxClkDly_Margin_A0==78 ps 8
551 13:37:15.474789 TxDqDly_Margin_A0==98 ps 10
552 13:37:15.479962 RxClkDly_Margin_A1==88 ps 9
553 13:37:15.480423 TxDqDly_Margin_A1==98 ps 10
554 13:37:15.480841 TrainedVREFDQ_A0==74
555 13:37:15.485582 TrainedVREFDQ_A1==74
556 13:37:15.486028 VrefDac_Margin_A0==25
557 13:37:15.486434 DeviceVref_Margin_A0==40
558 13:37:15.491163 VrefDac_Margin_A1==24
559 13:37:15.491589 DeviceVref_Margin_A1==40
560 13:37:15.492016
561 13:37:15.492422
562 13:37:15.496772 channel==1
563 13:37:15.497200 RxClkDly_Margin_A0==98 ps 10
564 13:37:15.497602 TxDqDly_Margin_A0==88 ps 9
565 13:37:15.502355 RxClkDly_Margin_A1==98 ps 10
566 13:37:15.502821 TxDqDly_Margin_A1==88 ps 9
567 13:37:15.508073 TrainedVREFDQ_A0==77
568 13:37:15.508532 TrainedVREFDQ_A1==77
569 13:37:15.508941 VrefDac_Margin_A0==22
570 13:37:15.513540 DeviceVref_Margin_A0==37
571 13:37:15.513971 VrefDac_Margin_A1==22
572 13:37:15.519130 DeviceVref_Margin_A1==37
573 13:37:15.519561
574 13:37:15.519963 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 13:37:15.520401
576 13:37:15.552920 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 13:37:15.553438 2D training succeed
578 13:37:15.558316 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 13:37:15.563964 auto size-- 65535DDR cs0 size: 2048MB
580 13:37:15.564454 DDR cs1 size: 2048MB
581 13:37:15.569605 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 13:37:15.570063 cs0 DataBus test pass
583 13:37:15.575137 cs1 DataBus test pass
584 13:37:15.575577 cs0 AddrBus test pass
585 13:37:15.576009 cs1 AddrBus test pass
586 13:37:15.576419
587 13:37:15.580769 100bdlr_step_size ps== 420
588 13:37:15.581221 result report
589 13:37:15.586348 boot times 0Enable ddr reg access
590 13:37:15.591681 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 13:37:15.604871 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 13:37:16.179055 0.0;M3 CHK:0;cm4_sp_mode 0
593 13:37:16.179713 MVN_1=0x00000000
594 13:37:16.184478 MVN_2=0x00000000
595 13:37:16.190248 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 13:37:16.190784 OPS=0x10
597 13:37:16.191194 ring efuse init
598 13:37:16.191588 chipver efuse init
599 13:37:16.195841 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 13:37:16.201371 [0.018961 Inits done]
601 13:37:16.201885 secure task start!
602 13:37:16.202289 high task start!
603 13:37:16.205977 low task start!
604 13:37:16.206480 run into bl31
605 13:37:16.212685 NOTICE: BL31: v1.3(release):4fc40b1
606 13:37:16.220443 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 13:37:16.220800 NOTICE: BL31: G12A normal boot!
608 13:37:16.245838 NOTICE: BL31: BL33 decompress pass
609 13:37:16.250721 ERROR: Error initializing runtime service opteed_fast
610 13:37:17.484989
611 13:37:17.485634
612 13:37:17.492953 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 13:37:17.493424
614 13:37:17.493846 Model: Libre Computer AML-A311D-CC Alta
615 13:37:17.701306 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 13:37:17.724668 DRAM: 2 GiB (effective 3.8 GiB)
617 13:37:17.867816 Core: 408 devices, 31 uclasses, devicetree: separate
618 13:37:17.873552 WDT: Not starting watchdog@f0d0
619 13:37:17.905832 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 13:37:17.918436 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 13:37:17.923285 ** Bad device specification mmc 0 **
622 13:37:17.933587 Card did not respond to voltage select! : -110
623 13:37:17.941248 ** Bad device specification mmc 0 **
624 13:37:17.941742 Couldn't find partition mmc 0
625 13:37:17.949571 Card did not respond to voltage select! : -110
626 13:37:17.955204 ** Bad device specification mmc 0 **
627 13:37:17.955710 Couldn't find partition mmc 0
628 13:37:17.960171 Error: could not access storage.
629 13:37:18.302965 Net: eth0: ethernet@ff3f0000
630 13:37:18.308217 starting USB...
631 13:37:18.555855 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 13:37:18.556483 Starting the controller
633 13:37:18.562588 USB XHCI 1.10
634 13:37:20.271503 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 13:37:20.272220 bl2_stage_init 0x01
636 13:37:20.272653 bl2_stage_init 0x81
637 13:37:20.277125 hw id: 0x0000 - pwm id 0x01
638 13:37:20.277597 bl2_stage_init 0xc1
639 13:37:20.278009 bl2_stage_init 0x02
640 13:37:20.278417
641 13:37:20.282876 L0:00000000
642 13:37:20.283336 L1:20000703
643 13:37:20.283745 L2:00008067
644 13:37:20.284186 L3:14000000
645 13:37:20.288276 B2:00402000
646 13:37:20.288730 B1:e0f83180
647 13:37:20.289176
648 13:37:20.289618 TE: 58159
649 13:37:20.290028
650 13:37:20.294099 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 13:37:20.294572
652 13:37:20.294980 Board ID = 1
653 13:37:20.299447 Set A53 clk to 24M
654 13:37:20.299902 Set A73 clk to 24M
655 13:37:20.300347 Set clk81 to 24M
656 13:37:20.305065 A53 clk: 1200 MHz
657 13:37:20.305516 A73 clk: 1200 MHz
658 13:37:20.305922 CLK81: 166.6M
659 13:37:20.306316 smccc: 00012ab5
660 13:37:20.310704 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 13:37:20.316272 board id: 1
662 13:37:20.322144 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 13:37:20.332787 fw parse done
664 13:37:20.338795 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 13:37:20.381413 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 13:37:20.392280 PIEI prepare done
667 13:37:20.392749 fastboot data load
668 13:37:20.393159 fastboot data verify
669 13:37:20.397961 verify result: 266
670 13:37:20.403506 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 13:37:20.403960 LPDDR4 probe
672 13:37:20.404416 ddr clk to 1584MHz
673 13:37:20.411544 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 13:37:20.448871
675 13:37:20.449352 dmc_version 0001
676 13:37:20.455392 Check phy result
677 13:37:20.461281 INFO : End of CA training
678 13:37:20.461725 INFO : End of initialization
679 13:37:20.466875 INFO : Training has run successfully!
680 13:37:20.467319 Check phy result
681 13:37:20.472485 INFO : End of initialization
682 13:37:20.472946 INFO : End of read enable training
683 13:37:20.475787 INFO : End of fine write leveling
684 13:37:20.481331 INFO : End of Write leveling coarse delay
685 13:37:20.487052 INFO : Training has run successfully!
686 13:37:20.487504 Check phy result
687 13:37:20.487904 INFO : End of initialization
688 13:37:20.492507 INFO : End of read dq deskew training
689 13:37:20.498118 INFO : End of MPR read delay center optimization
690 13:37:20.498566 INFO : End of write delay center optimization
691 13:37:20.503772 INFO : End of read delay center optimization
692 13:37:20.509351 INFO : End of max read latency training
693 13:37:20.509803 INFO : Training has run successfully!
694 13:37:20.514955 1D training succeed
695 13:37:20.520875 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 13:37:20.568542 Check phy result
697 13:37:20.569086 INFO : End of initialization
698 13:37:20.590154 INFO : End of 2D read delay Voltage center optimization
699 13:37:20.610231 INFO : End of 2D read delay Voltage center optimization
700 13:37:20.661167 INFO : End of 2D write delay Voltage center optimization
701 13:37:20.711474 INFO : End of 2D write delay Voltage center optimization
702 13:37:20.717071 INFO : Training has run successfully!
703 13:37:20.717528
704 13:37:20.717939 channel==0
705 13:37:20.722610 RxClkDly_Margin_A0==88 ps 9
706 13:37:20.723056 TxDqDly_Margin_A0==98 ps 10
707 13:37:20.725952 RxClkDly_Margin_A1==88 ps 9
708 13:37:20.726392 TxDqDly_Margin_A1==88 ps 9
709 13:37:20.731576 TrainedVREFDQ_A0==74
710 13:37:20.732071 TrainedVREFDQ_A1==74
711 13:37:20.732484 VrefDac_Margin_A0==25
712 13:37:20.737157 DeviceVref_Margin_A0==40
713 13:37:20.737599 VrefDac_Margin_A1==25
714 13:37:20.742956 DeviceVref_Margin_A1==40
715 13:37:20.743398
716 13:37:20.743807
717 13:37:20.744243 channel==1
718 13:37:20.744639 RxClkDly_Margin_A0==98 ps 10
719 13:37:20.746223 TxDqDly_Margin_A0==88 ps 9
720 13:37:20.751869 RxClkDly_Margin_A1==88 ps 9
721 13:37:20.752345 TxDqDly_Margin_A1==88 ps 9
722 13:37:20.752754 TrainedVREFDQ_A0==77
723 13:37:20.757262 TrainedVREFDQ_A1==77
724 13:37:20.757704 VrefDac_Margin_A0==22
725 13:37:20.762947 DeviceVref_Margin_A0==37
726 13:37:20.763383 VrefDac_Margin_A1==24
727 13:37:20.763783 DeviceVref_Margin_A1==37
728 13:37:20.764214
729 13:37:20.768477 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 13:37:20.768914
731 13:37:20.802028 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 13:37:20.802513 2D training succeed
733 13:37:20.807783 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 13:37:20.813250 auto size-- 65535DDR cs0 size: 2048MB
735 13:37:20.813687 DDR cs1 size: 2048MB
736 13:37:20.818888 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 13:37:20.819335 cs0 DataBus test pass
738 13:37:20.819736 cs1 DataBus test pass
739 13:37:20.824451 cs0 AddrBus test pass
740 13:37:20.824895 cs1 AddrBus test pass
741 13:37:20.825292
742 13:37:20.830072 100bdlr_step_size ps== 420
743 13:37:20.830548 result report
744 13:37:20.830952 boot times 0Enable ddr reg access
745 13:37:20.839668 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 13:37:20.853149 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 13:37:21.425447 0.0;M3 CHK:0;cm4_sp_mode 0
748 13:37:21.425888 MVN_1=0x00000000
749 13:37:21.430601 MVN_2=0x00000000
750 13:37:21.436876 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 13:37:21.437327 OPS=0x10
752 13:37:21.437756 ring efuse init
753 13:37:21.438152 chipver efuse init
754 13:37:21.441984 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 13:37:21.447658 [0.018961 Inits done]
756 13:37:21.448134 secure task start!
757 13:37:21.448531 high task start!
758 13:37:21.452262 low task start!
759 13:37:21.452689 run into bl31
760 13:37:21.458968 NOTICE: BL31: v1.3(release):4fc40b1
761 13:37:21.466647 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 13:37:21.467088 NOTICE: BL31: G12A normal boot!
763 13:37:21.491890 NOTICE: BL31: BL33 decompress pass
764 13:37:21.497652 ERROR: Error initializing runtime service opteed_fast
765 13:37:22.730491
766 13:37:22.730932
767 13:37:22.738813 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 13:37:22.739238
769 13:37:22.739585 Model: Libre Computer AML-A311D-CC Alta
770 13:37:22.946557 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 13:37:22.970692 DRAM: 2 GiB (effective 3.8 GiB)
772 13:37:23.113956 Core: 408 devices, 31 uclasses, devicetree: separate
773 13:37:23.119626 WDT: Not starting watchdog@f0d0
774 13:37:23.151819 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 13:37:23.164464 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 13:37:23.169349 ** Bad device specification mmc 0 **
777 13:37:23.179571 Card did not respond to voltage select! : -110
778 13:37:23.187259 ** Bad device specification mmc 0 **
779 13:37:23.187669 Couldn't find partition mmc 0
780 13:37:23.195566 Card did not respond to voltage select! : -110
781 13:37:23.201019 ** Bad device specification mmc 0 **
782 13:37:23.201305 Couldn't find partition mmc 0
783 13:37:23.205256 Error: could not access storage.
784 13:37:23.549790 Net: eth0: ethernet@ff3f0000
785 13:37:23.550430 starting USB...
786 13:37:23.801479 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 13:37:23.801903 Starting the controller
788 13:37:23.808583 USB XHCI 1.10
789 13:37:25.971502 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 13:37:25.972125 bl2_stage_init 0x01
791 13:37:25.972555 bl2_stage_init 0x81
792 13:37:25.977062 hw id: 0x0000 - pwm id 0x01
793 13:37:25.977514 bl2_stage_init 0xc1
794 13:37:25.977926 bl2_stage_init 0x02
795 13:37:25.978333
796 13:37:25.982633 L0:00000000
797 13:37:25.983077 L1:20000703
798 13:37:25.983492 L2:00008067
799 13:37:25.983894 L3:14000000
800 13:37:25.988225 B2:00402000
801 13:37:25.988664 B1:e0f83180
802 13:37:25.989072
803 13:37:25.989480 TE: 58124
804 13:37:25.989884
805 13:37:25.993852 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 13:37:25.994301
807 13:37:25.994709 Board ID = 1
808 13:37:25.999458 Set A53 clk to 24M
809 13:37:25.999731 Set A73 clk to 24M
810 13:37:26.000165 Set clk81 to 24M
811 13:37:26.005138 A53 clk: 1200 MHz
812 13:37:26.005585 A73 clk: 1200 MHz
813 13:37:26.005989 CLK81: 166.6M
814 13:37:26.006385 smccc: 00012a92
815 13:37:26.010616 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 13:37:26.016226 board id: 1
817 13:37:26.022150 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 13:37:26.032733 fw parse done
819 13:37:26.037737 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 13:37:26.081424 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 13:37:26.092211 PIEI prepare done
822 13:37:26.092674 fastboot data load
823 13:37:26.093088 fastboot data verify
824 13:37:26.097928 verify result: 266
825 13:37:26.103462 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 13:37:26.103908 LPDDR4 probe
827 13:37:26.104354 ddr clk to 1584MHz
828 13:37:26.111847 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 13:37:26.148767
830 13:37:26.149301 dmc_version 0001
831 13:37:26.155417 Check phy result
832 13:37:26.161259 INFO : End of CA training
833 13:37:26.161708 INFO : End of initialization
834 13:37:26.166892 INFO : Training has run successfully!
835 13:37:26.167329 Check phy result
836 13:37:26.172494 INFO : End of initialization
837 13:37:26.172932 INFO : End of read enable training
838 13:37:26.178057 INFO : End of fine write leveling
839 13:37:26.183656 INFO : End of Write leveling coarse delay
840 13:37:26.184133 INFO : Training has run successfully!
841 13:37:26.184548 Check phy result
842 13:37:26.189288 INFO : End of initialization
843 13:37:26.189773 INFO : End of read dq deskew training
844 13:37:26.194889 INFO : End of MPR read delay center optimization
845 13:37:26.200464 INFO : End of write delay center optimization
846 13:37:26.206116 INFO : End of read delay center optimization
847 13:37:26.206556 INFO : End of max read latency training
848 13:37:26.211662 INFO : Training has run successfully!
849 13:37:26.212135 1D training succeed
850 13:37:26.220880 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 13:37:26.268455 Check phy result
852 13:37:26.268939 INFO : End of initialization
853 13:37:26.290088 INFO : End of 2D read delay Voltage center optimization
854 13:37:26.310223 INFO : End of 2D read delay Voltage center optimization
855 13:37:26.362157 INFO : End of 2D write delay Voltage center optimization
856 13:37:26.411519 INFO : End of 2D write delay Voltage center optimization
857 13:37:26.416998 INFO : Training has run successfully!
858 13:37:26.417490
859 13:37:26.417913 channel==0
860 13:37:26.422585 RxClkDly_Margin_A0==88 ps 9
861 13:37:26.423038 TxDqDly_Margin_A0==98 ps 10
862 13:37:26.428237 RxClkDly_Margin_A1==88 ps 9
863 13:37:26.428690 TxDqDly_Margin_A1==88 ps 9
864 13:37:26.429113 TrainedVREFDQ_A0==74
865 13:37:26.433792 TrainedVREFDQ_A1==74
866 13:37:26.434290 VrefDac_Margin_A0==25
867 13:37:26.434704 DeviceVref_Margin_A0==40
868 13:37:26.439373 VrefDac_Margin_A1==25
869 13:37:26.439862 DeviceVref_Margin_A1==40
870 13:37:26.440288
871 13:37:26.440676
872 13:37:26.441060 channel==1
873 13:37:26.444969 RxClkDly_Margin_A0==98 ps 10
874 13:37:26.445411 TxDqDly_Margin_A0==98 ps 10
875 13:37:26.450615 RxClkDly_Margin_A1==88 ps 9
876 13:37:26.451042 TxDqDly_Margin_A1==88 ps 9
877 13:37:26.456084 TrainedVREFDQ_A0==76
878 13:37:26.456524 TrainedVREFDQ_A1==77
879 13:37:26.456915 VrefDac_Margin_A0==22
880 13:37:26.461788 DeviceVref_Margin_A0==38
881 13:37:26.462213 VrefDac_Margin_A1==24
882 13:37:26.467364 DeviceVref_Margin_A1==37
883 13:37:26.467796
884 13:37:26.468230 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 13:37:26.468619
886 13:37:26.500983 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
887 13:37:26.501527 2D training succeed
888 13:37:26.506674 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 13:37:26.512056 auto size-- 65535DDR cs0 size: 2048MB
890 13:37:26.512495 DDR cs1 size: 2048MB
891 13:37:26.517625 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 13:37:26.518101 cs0 DataBus test pass
893 13:37:26.523261 cs1 DataBus test pass
894 13:37:26.523702 cs0 AddrBus test pass
895 13:37:26.524122 cs1 AddrBus test pass
896 13:37:26.524512
897 13:37:26.528834 100bdlr_step_size ps== 420
898 13:37:26.529278 result report
899 13:37:26.534497 boot times 0Enable ddr reg access
900 13:37:26.539687 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 13:37:26.553165 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 13:37:27.125265 0.0;M3 CHK:0;cm4_sp_mode 0
903 13:37:27.125928 MVN_1=0x00000000
904 13:37:27.130654 MVN_2=0x00000000
905 13:37:27.136514 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 13:37:27.137009 OPS=0x10
907 13:37:27.137428 ring efuse init
908 13:37:27.137835 chipver efuse init
909 13:37:27.144576 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 13:37:27.145075 [0.018961 Inits done]
911 13:37:27.152138 secure task start!
912 13:37:27.152587 high task start!
913 13:37:27.152995 low task start!
914 13:37:27.153389 run into bl31
915 13:37:27.158816 NOTICE: BL31: v1.3(release):4fc40b1
916 13:37:27.166621 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 13:37:27.167087 NOTICE: BL31: G12A normal boot!
918 13:37:27.191977 NOTICE: BL31: BL33 decompress pass
919 13:37:27.197174 ERROR: Error initializing runtime service opteed_fast
920 13:37:28.430561
921 13:37:28.431001
922 13:37:28.438903 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 13:37:28.439210
924 13:37:28.439433 Model: Libre Computer AML-A311D-CC Alta
925 13:37:28.646503 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 13:37:28.670758 DRAM: 2 GiB (effective 3.8 GiB)
927 13:37:28.813770 Core: 408 devices, 31 uclasses, devicetree: separate
928 13:37:28.819555 WDT: Not starting watchdog@f0d0
929 13:37:28.851797 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 13:37:28.864286 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 13:37:28.869265 ** Bad device specification mmc 0 **
932 13:37:28.879702 Card did not respond to voltage select! : -110
933 13:37:28.886256 ** Bad device specification mmc 0 **
934 13:37:28.886518 Couldn't find partition mmc 0
935 13:37:28.895716 Card did not respond to voltage select! : -110
936 13:37:28.901089 ** Bad device specification mmc 0 **
937 13:37:28.901533 Couldn't find partition mmc 0
938 13:37:28.906182 Error: could not access storage.
939 13:37:29.247736 Net: eth0: ethernet@ff3f0000
940 13:37:29.248172 starting USB...
941 13:37:29.500512 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 13:37:29.501136 Starting the controller
943 13:37:29.507468 USB XHCI 1.10
944 13:37:31.062635 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 13:37:31.070810 scanning usb for storage devices... 0 Storage Device(s) found
947 13:37:31.123778 Hit any key to stop autoboot: 1
948 13:37:31.125357 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 13:37:31.126015 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
950 13:37:31.126520 Setting prompt string to ['=>']
951 13:37:31.127024 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
952 13:37:31.137557 0
953 13:37:31.138693 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 13:37:31.139278 Sending with 10 millisecond of delay
956 13:37:32.276357 => setenv autoload no
957 13:37:32.287185 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
958 13:37:32.292185 setenv autoload no
959 13:37:32.292981 Sending with 10 millisecond of delay
961 13:37:34.090949 => setenv initrd_high 0xffffffff
962 13:37:34.101523 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
963 13:37:34.102093 setenv initrd_high 0xffffffff
964 13:37:34.102582 Sending with 10 millisecond of delay
966 13:37:35.719975 => setenv fdt_high 0xffffffff
967 13:37:35.730811 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 13:37:35.731693 setenv fdt_high 0xffffffff
969 13:37:35.732467 Sending with 10 millisecond of delay
971 13:37:36.024543 => dhcp
972 13:37:36.035460 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
973 13:37:36.037303 dhcp
974 13:37:36.037864 Speed: 1000, full duplex
975 13:37:36.038338 BOOTP broadcast 1
976 13:37:36.047331 DHCP client bound to address 192.168.6.27 (12 ms)
977 13:37:36.048668 Sending with 10 millisecond of delay
979 13:37:37.727014 => setenv serverip 192.168.6.2
980 13:37:37.738080 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 13:37:37.739293 setenv serverip 192.168.6.2
982 13:37:37.740194 Sending with 10 millisecond of delay
984 13:37:41.466366 => tftpboot 0x01080000 970706/tftp-deploy-8j9swgu2/kernel/uImage
985 13:37:41.476938 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 13:37:41.477635 tftpboot 0x01080000 970706/tftp-deploy-8j9swgu2/kernel/uImage
987 13:37:41.478161 Speed: 1000, full duplex
988 13:37:41.478571 Using ethernet@ff3f0000 device
989 13:37:41.479691 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 13:37:41.485257 Filename '970706/tftp-deploy-8j9swgu2/kernel/uImage'.
991 13:37:41.489095 Load address: 0x1080000
992 13:37:44.412481 Loading: *################################################## 43.6 MiB
993 13:37:44.413123 14.9 MiB/s
994 13:37:44.413555 done
995 13:37:44.416990 Bytes transferred = 45713984 (2b98a40 hex)
996 13:37:44.417813 Sending with 10 millisecond of delay
998 13:37:49.114879 => tftpboot 0x08000000 970706/tftp-deploy-8j9swgu2/ramdisk/ramdisk.cpio.gz.uboot
999 13:37:49.125744 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1000 13:37:49.126700 tftpboot 0x08000000 970706/tftp-deploy-8j9swgu2/ramdisk/ramdisk.cpio.gz.uboot
1001 13:37:49.127187 Speed: 1000, full duplex
1002 13:37:49.127641 Using ethernet@ff3f0000 device
1003 13:37:49.128780 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 13:37:49.137236 Filename '970706/tftp-deploy-8j9swgu2/ramdisk/ramdisk.cpio.gz.uboot'.
1005 13:37:49.137780 Load address: 0x8000000
1006 13:37:56.164317 Loading: *####################T ############################# UDP wrong checksum 00000005 00006cec
1007 13:38:01.164614 T UDP wrong checksum 00000005 00006cec
1008 13:38:03.059761 UDP wrong checksum 000000ff 00004588
1009 13:38:03.109123 UDP wrong checksum 000000ff 0000de7a
1010 13:38:11.167734 T T UDP wrong checksum 00000005 00006cec
1011 13:38:31.170380 T T T T UDP wrong checksum 00000005 00006cec
1012 13:38:36.191405 T UDP wrong checksum 000000ff 00003825
1013 13:38:36.291194 UDP wrong checksum 000000ff 0000c217
1014 13:38:46.175735 T
1015 13:38:46.176200 Retry count exceeded; starting again
1017 13:38:46.177250 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1020 13:38:46.178462 end: 2.4 uboot-commands (duration 00:01:46) [common]
1022 13:38:46.179181 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1024 13:38:46.179783 end: 2 uboot-action (duration 00:01:46) [common]
1026 13:38:46.180655 Cleaning after the job
1027 13:38:46.180973 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/ramdisk
1028 13:38:46.181895 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/kernel
1029 13:38:46.208850 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/dtb
1030 13:38:46.210123 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/nfsrootfs
1031 13:38:46.371087 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970706/tftp-deploy-8j9swgu2/modules
1032 13:38:46.393534 start: 4.1 power-off (timeout 00:00:30) [common]
1033 13:38:46.394202 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1034 13:38:46.428677 >> OK - accepted request
1035 13:38:46.430926 Returned 0 in 0 seconds
1036 13:38:46.531644 end: 4.1 power-off (duration 00:00:00) [common]
1038 13:38:46.532609 start: 4.2 read-feedback (timeout 00:10:00) [common]
1039 13:38:46.533247 Listened to connection for namespace 'common' for up to 1s
1040 13:38:47.534171 Finalising connection for namespace 'common'
1041 13:38:47.534651 Disconnecting from shell: Finalise
1042 13:38:47.534911 =>
1043 13:38:47.635589 end: 4.2 read-feedback (duration 00:00:01) [common]
1044 13:38:47.636093 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/970706
1045 13:38:49.479037 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/970706
1046 13:38:49.479651 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.