Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 14:21:00.118641 lava-dispatcher, installed at version: 2024.01
2 14:21:00.119484 start: 0 validate
3 14:21:00.119969 Start time: 2024-11-10 14:21:00.119939+00:00 (UTC)
4 14:21:00.120556 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 14:21:00.121130 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 14:21:00.159077 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 14:21:00.159769 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 14:21:00.197446 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 14:21:00.198120 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 14:21:00.228058 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 14:21:00.228569 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 14:21:00.264969 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 14:21:00.265493 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 14:21:00.310065 validate duration: 0.19
16 14:21:00.311189 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 14:21:00.311558 start: 1.1 download-retry (timeout 00:10:00) [common]
18 14:21:00.311904 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 14:21:00.312571 Not decompressing ramdisk as can be used compressed.
20 14:21:00.313110 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 14:21:00.313412 saving as /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/ramdisk/initrd.cpio.gz
22 14:21:00.313899 total size: 5628169 (5 MB)
23 14:21:00.358208 progress 0 % (0 MB)
24 14:21:00.362732 progress 5 % (0 MB)
25 14:21:00.366811 progress 10 % (0 MB)
26 14:21:00.370470 progress 15 % (0 MB)
27 14:21:00.374671 progress 20 % (1 MB)
28 14:21:00.378364 progress 25 % (1 MB)
29 14:21:00.382406 progress 30 % (1 MB)
30 14:21:00.386428 progress 35 % (1 MB)
31 14:21:00.390068 progress 40 % (2 MB)
32 14:21:00.394043 progress 45 % (2 MB)
33 14:21:00.397656 progress 50 % (2 MB)
34 14:21:00.401742 progress 55 % (2 MB)
35 14:21:00.405948 progress 60 % (3 MB)
36 14:21:00.409483 progress 65 % (3 MB)
37 14:21:00.413527 progress 70 % (3 MB)
38 14:21:00.417201 progress 75 % (4 MB)
39 14:21:00.421214 progress 80 % (4 MB)
40 14:21:00.424669 progress 85 % (4 MB)
41 14:21:00.428307 progress 90 % (4 MB)
42 14:21:00.431814 progress 95 % (5 MB)
43 14:21:00.435064 progress 100 % (5 MB)
44 14:21:00.435726 5 MB downloaded in 0.12 s (44.06 MB/s)
45 14:21:00.436312 end: 1.1.1 http-download (duration 00:00:00) [common]
47 14:21:00.437232 end: 1.1 download-retry (duration 00:00:00) [common]
48 14:21:00.437540 start: 1.2 download-retry (timeout 00:10:00) [common]
49 14:21:00.437822 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 14:21:00.438309 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/kernel/Image
51 14:21:00.438561 saving as /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/kernel/Image
52 14:21:00.438779 total size: 45713920 (43 MB)
53 14:21:00.438993 No compression specified
54 14:21:00.478842 progress 0 % (0 MB)
55 14:21:00.508759 progress 5 % (2 MB)
56 14:21:00.537868 progress 10 % (4 MB)
57 14:21:00.567106 progress 15 % (6 MB)
58 14:21:00.596489 progress 20 % (8 MB)
59 14:21:00.625316 progress 25 % (10 MB)
60 14:21:00.654126 progress 30 % (13 MB)
61 14:21:00.682930 progress 35 % (15 MB)
62 14:21:00.711839 progress 40 % (17 MB)
63 14:21:00.740414 progress 45 % (19 MB)
64 14:21:00.769468 progress 50 % (21 MB)
65 14:21:00.798335 progress 55 % (24 MB)
66 14:21:00.826916 progress 60 % (26 MB)
67 14:21:00.856700 progress 65 % (28 MB)
68 14:21:00.887512 progress 70 % (30 MB)
69 14:21:00.935693 progress 75 % (32 MB)
70 14:21:00.965245 progress 80 % (34 MB)
71 14:21:00.996662 progress 85 % (37 MB)
72 14:21:01.029531 progress 90 % (39 MB)
73 14:21:01.058390 progress 95 % (41 MB)
74 14:21:01.086027 progress 100 % (43 MB)
75 14:21:01.086608 43 MB downloaded in 0.65 s (67.30 MB/s)
76 14:21:01.087085 end: 1.2.1 http-download (duration 00:00:01) [common]
78 14:21:01.087897 end: 1.2 download-retry (duration 00:00:01) [common]
79 14:21:01.088200 start: 1.3 download-retry (timeout 00:09:59) [common]
80 14:21:01.088471 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 14:21:01.088948 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 14:21:01.089216 saving as /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 14:21:01.089423 total size: 53209 (0 MB)
84 14:21:01.089630 No compression specified
85 14:21:01.127804 progress 61 % (0 MB)
86 14:21:01.128750 progress 100 % (0 MB)
87 14:21:01.129286 0 MB downloaded in 0.04 s (1.27 MB/s)
88 14:21:01.129764 end: 1.3.1 http-download (duration 00:00:00) [common]
90 14:21:01.130566 end: 1.3 download-retry (duration 00:00:00) [common]
91 14:21:01.130826 start: 1.4 download-retry (timeout 00:09:59) [common]
92 14:21:01.131086 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 14:21:01.131571 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 14:21:01.131822 saving as /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/nfsrootfs/full.rootfs.tar
95 14:21:01.132051 total size: 120894716 (115 MB)
96 14:21:01.132262 Using unxz to decompress xz
97 14:21:01.171469 progress 0 % (0 MB)
98 14:21:01.972251 progress 5 % (5 MB)
99 14:21:02.818173 progress 10 % (11 MB)
100 14:21:03.621882 progress 15 % (17 MB)
101 14:21:04.388796 progress 20 % (23 MB)
102 14:21:05.043463 progress 25 % (28 MB)
103 14:21:05.894211 progress 30 % (34 MB)
104 14:21:06.694450 progress 35 % (40 MB)
105 14:21:07.038913 progress 40 % (46 MB)
106 14:21:07.429370 progress 45 % (51 MB)
107 14:21:08.150459 progress 50 % (57 MB)
108 14:21:09.030312 progress 55 % (63 MB)
109 14:21:09.807208 progress 60 % (69 MB)
110 14:21:10.556422 progress 65 % (74 MB)
111 14:21:11.327008 progress 70 % (80 MB)
112 14:21:12.147098 progress 75 % (86 MB)
113 14:21:12.930519 progress 80 % (92 MB)
114 14:21:13.688928 progress 85 % (98 MB)
115 14:21:14.539896 progress 90 % (103 MB)
116 14:21:15.324938 progress 95 % (109 MB)
117 14:21:16.170435 progress 100 % (115 MB)
118 14:21:16.183160 115 MB downloaded in 15.05 s (7.66 MB/s)
119 14:21:16.184118 end: 1.4.1 http-download (duration 00:00:15) [common]
121 14:21:16.185677 end: 1.4 download-retry (duration 00:00:15) [common]
122 14:21:16.186174 start: 1.5 download-retry (timeout 00:09:44) [common]
123 14:21:16.186670 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 14:21:16.187536 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/modules.tar.xz
125 14:21:16.188015 saving as /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/modules/modules.tar
126 14:21:16.188413 total size: 11611892 (11 MB)
127 14:21:16.188815 Using unxz to decompress xz
128 14:21:16.236439 progress 0 % (0 MB)
129 14:21:16.303831 progress 5 % (0 MB)
130 14:21:16.378542 progress 10 % (1 MB)
131 14:21:16.475351 progress 15 % (1 MB)
132 14:21:16.568579 progress 20 % (2 MB)
133 14:21:16.648667 progress 25 % (2 MB)
134 14:21:16.725439 progress 30 % (3 MB)
135 14:21:16.804885 progress 35 % (3 MB)
136 14:21:16.877293 progress 40 % (4 MB)
137 14:21:16.953294 progress 45 % (5 MB)
138 14:21:17.038508 progress 50 % (5 MB)
139 14:21:17.117681 progress 55 % (6 MB)
140 14:21:17.203563 progress 60 % (6 MB)
141 14:21:17.285085 progress 65 % (7 MB)
142 14:21:17.367310 progress 70 % (7 MB)
143 14:21:17.444384 progress 75 % (8 MB)
144 14:21:17.527316 progress 80 % (8 MB)
145 14:21:17.607181 progress 85 % (9 MB)
146 14:21:17.685393 progress 90 % (9 MB)
147 14:21:17.763158 progress 95 % (10 MB)
148 14:21:17.839502 progress 100 % (11 MB)
149 14:21:17.850983 11 MB downloaded in 1.66 s (6.66 MB/s)
150 14:21:17.851911 end: 1.5.1 http-download (duration 00:00:02) [common]
152 14:21:17.853740 end: 1.5 download-retry (duration 00:00:02) [common]
153 14:21:17.854304 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 14:21:17.854863 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 14:21:34.891273 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/970731/extract-nfsrootfs-4rvbg0bd
156 14:21:34.891878 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 14:21:34.892190 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 14:21:34.892906 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f
159 14:21:34.893366 makedir: /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin
160 14:21:34.893710 makedir: /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/tests
161 14:21:34.894023 makedir: /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/results
162 14:21:34.894371 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-add-keys
163 14:21:34.894995 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-add-sources
164 14:21:34.895546 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-background-process-start
165 14:21:34.896070 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-background-process-stop
166 14:21:34.896609 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-common-functions
167 14:21:34.897099 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-echo-ipv4
168 14:21:34.897567 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-install-packages
169 14:21:34.898058 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-installed-packages
170 14:21:34.898620 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-os-build
171 14:21:34.899102 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-probe-channel
172 14:21:34.899576 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-probe-ip
173 14:21:34.900063 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-target-ip
174 14:21:34.900565 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-target-mac
175 14:21:34.901052 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-target-storage
176 14:21:34.901538 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-test-case
177 14:21:34.902019 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-test-event
178 14:21:34.902488 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-test-feedback
179 14:21:34.902963 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-test-raise
180 14:21:34.903427 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-test-reference
181 14:21:34.903892 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-test-runner
182 14:21:34.904428 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-test-set
183 14:21:34.904902 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-test-shell
184 14:21:34.905403 Updating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-add-keys (debian)
185 14:21:34.905941 Updating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-add-sources (debian)
186 14:21:34.906442 Updating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-install-packages (debian)
187 14:21:34.906936 Updating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-installed-packages (debian)
188 14:21:34.907423 Updating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/bin/lava-os-build (debian)
189 14:21:34.907850 Creating /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/environment
190 14:21:34.908248 LAVA metadata
191 14:21:34.908511 - LAVA_JOB_ID=970731
192 14:21:34.908724 - LAVA_DISPATCHER_IP=192.168.6.2
193 14:21:34.909086 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 14:21:34.910043 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 14:21:34.910348 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 14:21:34.910552 skipped lava-vland-overlay
197 14:21:34.910789 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 14:21:34.911038 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 14:21:34.911255 skipped lava-multinode-overlay
200 14:21:34.911491 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 14:21:34.911735 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 14:21:34.911975 Loading test definitions
203 14:21:34.912278 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 14:21:34.912495 Using /lava-970731 at stage 0
205 14:21:34.913603 uuid=970731_1.6.2.4.1 testdef=None
206 14:21:34.913915 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 14:21:34.914176 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 14:21:34.915723 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 14:21:34.916582 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 14:21:34.918594 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 14:21:34.919419 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 14:21:34.921280 runner path: /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/0/tests/0_timesync-off test_uuid 970731_1.6.2.4.1
215 14:21:34.921829 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 14:21:34.922626 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 14:21:34.922844 Using /lava-970731 at stage 0
219 14:21:34.923192 Fetching tests from https://github.com/kernelci/test-definitions.git
220 14:21:34.923488 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/0/tests/1_kselftest-alsa'
221 14:21:38.440249 Running '/usr/bin/git checkout kernelci.org
222 14:21:38.803345 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 14:21:38.805850 uuid=970731_1.6.2.4.5 testdef=None
224 14:21:38.806551 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 14:21:38.808185 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 14:21:38.814293 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 14:21:38.816118 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 14:21:38.824512 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 14:21:38.826405 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 14:21:38.834324 runner path: /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/0/tests/1_kselftest-alsa test_uuid 970731_1.6.2.4.5
234 14:21:38.834961 BOARD='meson-sm1-s905d3-libretech-cc'
235 14:21:38.835406 BRANCH='tip'
236 14:21:38.835834 SKIPFILE='/dev/null'
237 14:21:38.836299 SKIP_INSTALL='True'
238 14:21:38.836728 TESTPROG_URL='http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 14:21:38.837161 TST_CASENAME=''
240 14:21:38.837590 TST_CMDFILES='alsa'
241 14:21:38.838770 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 14:21:38.840519 Creating lava-test-runner.conf files
244 14:21:38.840964 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/970731/lava-overlay-bd4bap0f/lava-970731/0 for stage 0
245 14:21:38.841708 - 0_timesync-off
246 14:21:38.842231 - 1_kselftest-alsa
247 14:21:38.842950 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 14:21:38.843547 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 14:22:02.424508 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 14:22:02.424962 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 14:22:02.425257 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 14:22:02.425563 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 14:22:02.425855 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 14:22:03.057984 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 14:22:03.058572 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 14:22:03.058907 extracting modules file /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970731/extract-nfsrootfs-4rvbg0bd
257 14:22:04.755079 extracting modules file /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970731/extract-overlay-ramdisk-3zmyhoub/ramdisk
258 14:22:06.431733 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 14:22:06.432420 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 14:22:06.432722 [common] Applying overlay to NFS
261 14:22:06.432938 [common] Applying overlay /var/lib/lava/dispatcher/tmp/970731/compress-overlay-uvvx_3zo/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/970731/extract-nfsrootfs-4rvbg0bd
262 14:22:09.183513 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 14:22:09.184014 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 14:22:09.184296 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 14:22:09.184524 Converting downloaded kernel to a uImage
266 14:22:09.184833 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/kernel/Image /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/kernel/uImage
267 14:22:09.686097 output: Image Name:
268 14:22:09.686520 output: Created: Sun Nov 10 14:22:09 2024
269 14:22:09.686750 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 14:22:09.686968 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 14:22:09.687180 output: Load Address: 01080000
272 14:22:09.687391 output: Entry Point: 01080000
273 14:22:09.687598 output:
274 14:22:09.689383 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 14:22:09.689717 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 14:22:09.690209 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 14:22:09.690511 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 14:22:09.690786 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 14:22:09.691370 Building ramdisk /var/lib/lava/dispatcher/tmp/970731/extract-overlay-ramdisk-3zmyhoub/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/970731/extract-overlay-ramdisk-3zmyhoub/ramdisk
280 14:22:12.080342 >> 166827 blocks
281 14:22:20.602016 Adding RAMdisk u-boot header.
282 14:22:20.602518 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/970731/extract-overlay-ramdisk-3zmyhoub/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/970731/extract-overlay-ramdisk-3zmyhoub/ramdisk.cpio.gz.uboot
283 14:22:20.908183 output: Image Name:
284 14:22:20.908604 output: Created: Sun Nov 10 14:22:20 2024
285 14:22:20.908814 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 14:22:20.909017 output: Data Size: 23437319 Bytes = 22888.01 KiB = 22.35 MiB
287 14:22:20.909217 output: Load Address: 00000000
288 14:22:20.909413 output: Entry Point: 00000000
289 14:22:20.909613 output:
290 14:22:20.910221 rename /var/lib/lava/dispatcher/tmp/970731/extract-overlay-ramdisk-3zmyhoub/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/ramdisk/ramdisk.cpio.gz.uboot
291 14:22:20.910637 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
292 14:22:20.910921 end: 1.6 prepare-tftp-overlay (duration 00:01:03) [common]
293 14:22:20.911192 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:39) [common]
294 14:22:20.911430 No LXC device requested
295 14:22:20.911682 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 14:22:20.911936 start: 1.8 deploy-device-env (timeout 00:08:39) [common]
297 14:22:20.912445 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 14:22:20.912857 Checking files for TFTP limit of 4294967296 bytes.
299 14:22:20.915479 end: 1 tftp-deploy (duration 00:01:21) [common]
300 14:22:20.916066 start: 2 uboot-action (timeout 00:05:00) [common]
301 14:22:20.916589 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 14:22:20.917079 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 14:22:20.917571 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 14:22:20.918090 Using kernel file from prepare-kernel: 970731/tftp-deploy-dssr7q6u/kernel/uImage
305 14:22:20.918709 substitutions:
306 14:22:20.919112 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 14:22:20.919511 - {DTB_ADDR}: 0x01070000
308 14:22:20.919903 - {DTB}: 970731/tftp-deploy-dssr7q6u/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 14:22:20.920333 - {INITRD}: 970731/tftp-deploy-dssr7q6u/ramdisk/ramdisk.cpio.gz.uboot
310 14:22:20.920725 - {KERNEL_ADDR}: 0x01080000
311 14:22:20.921112 - {KERNEL}: 970731/tftp-deploy-dssr7q6u/kernel/uImage
312 14:22:20.921498 - {LAVA_MAC}: None
313 14:22:20.921920 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/970731/extract-nfsrootfs-4rvbg0bd
314 14:22:20.922311 - {NFS_SERVER_IP}: 192.168.6.2
315 14:22:20.922692 - {PRESEED_CONFIG}: None
316 14:22:20.923077 - {PRESEED_LOCAL}: None
317 14:22:20.923460 - {RAMDISK_ADDR}: 0x08000000
318 14:22:20.923836 - {RAMDISK}: 970731/tftp-deploy-dssr7q6u/ramdisk/ramdisk.cpio.gz.uboot
319 14:22:20.924249 - {ROOT_PART}: None
320 14:22:20.924631 - {ROOT}: None
321 14:22:20.925008 - {SERVER_IP}: 192.168.6.2
322 14:22:20.925383 - {TEE_ADDR}: 0x83000000
323 14:22:20.925759 - {TEE}: None
324 14:22:20.926137 Parsed boot commands:
325 14:22:20.926502 - setenv autoload no
326 14:22:20.926878 - setenv initrd_high 0xffffffff
327 14:22:20.927255 - setenv fdt_high 0xffffffff
328 14:22:20.927631 - dhcp
329 14:22:20.928029 - setenv serverip 192.168.6.2
330 14:22:20.928416 - tftpboot 0x01080000 970731/tftp-deploy-dssr7q6u/kernel/uImage
331 14:22:20.928801 - tftpboot 0x08000000 970731/tftp-deploy-dssr7q6u/ramdisk/ramdisk.cpio.gz.uboot
332 14:22:20.929182 - tftpboot 0x01070000 970731/tftp-deploy-dssr7q6u/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 14:22:20.929561 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/970731/extract-nfsrootfs-4rvbg0bd,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 14:22:20.929953 - bootm 0x01080000 0x08000000 0x01070000
335 14:22:20.930437 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 14:22:20.931889 start: 2.3 connect-device (timeout 00:05:00) [common]
338 14:22:20.932334 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 14:22:20.947446 Setting prompt string to ['lava-test: # ']
340 14:22:20.948976 end: 2.3 connect-device (duration 00:00:00) [common]
341 14:22:20.949579 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 14:22:20.950141 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 14:22:20.950696 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 14:22:20.951656 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 14:22:20.986335 >> OK - accepted request
346 14:22:20.988530 Returned 0 in 0 seconds
347 14:22:21.089642 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 14:22:21.091207 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 14:22:21.091754 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 14:22:21.092333 Setting prompt string to ['Hit any key to stop autoboot']
352 14:22:21.092792 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 14:22:21.094339 Trying 192.168.56.21...
354 14:22:21.094807 Connected to conserv1.
355 14:22:21.095208 Escape character is '^]'.
356 14:22:21.095608
357 14:22:21.096035 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 14:22:21.096455
359 14:22:28.364466 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 14:22:28.364906 bl2_stage_init 0x01
361 14:22:28.365136 bl2_stage_init 0x81
362 14:22:28.369925 hw id: 0x0000 - pwm id 0x01
363 14:22:28.370287 bl2_stage_init 0xc1
364 14:22:28.370514 bl2_stage_init 0x02
365 14:22:28.370738
366 14:22:28.375511 L0:00000000
367 14:22:28.375860 L1:00000703
368 14:22:28.376137 L2:00008067
369 14:22:28.376351 L3:15000000
370 14:22:28.376563 S1:00000000
371 14:22:28.377396 B2:20282000
372 14:22:28.382908 B1:a0f83180
373 14:22:28.383291
374 14:22:28.383506 TE: 69493
375 14:22:28.383715
376 14:22:28.388485 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 14:22:28.388798
378 14:22:28.389007 Board ID = 1
379 14:22:28.394057 Set cpu clk to 24M
380 14:22:28.394435 Set clk81 to 24M
381 14:22:28.394684 Use GP1_pll as DSU clk.
382 14:22:28.394913 DSU clk: 1200 Mhz
383 14:22:28.399650 CPU clk: 1200 MHz
384 14:22:28.400069 Set clk81 to 166.6M
385 14:22:28.405312 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 14:22:28.405996 board id: 1
387 14:22:28.415407 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 14:22:28.426223 fw parse done
389 14:22:28.432222 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 14:22:28.474873 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 14:22:28.485710 PIEI prepare done
392 14:22:28.486249 fastboot data load
393 14:22:28.486537 fastboot data verify
394 14:22:28.491201 verify result: 266
395 14:22:28.496824 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 14:22:28.497265 LPDDR4 probe
397 14:22:28.497527 ddr clk to 1584MHz
398 14:22:28.504796 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 14:22:28.542105
400 14:22:28.542640 dmc_version 0001
401 14:22:28.548750 Check phy result
402 14:22:28.554650 INFO : End of CA training
403 14:22:28.555083 INFO : End of initialization
404 14:22:28.560266 INFO : Training has run successfully!
405 14:22:28.560658 Check phy result
406 14:22:28.565889 INFO : End of initialization
407 14:22:28.566264 INFO : End of read enable training
408 14:22:28.571445 INFO : End of fine write leveling
409 14:22:28.577078 INFO : End of Write leveling coarse delay
410 14:22:28.577470 INFO : Training has run successfully!
411 14:22:28.577739 Check phy result
412 14:22:28.582573 INFO : End of initialization
413 14:22:28.582908 INFO : End of read dq deskew training
414 14:22:28.588193 INFO : End of MPR read delay center optimization
415 14:22:28.593859 INFO : End of write delay center optimization
416 14:22:28.599329 INFO : End of read delay center optimization
417 14:22:28.599682 INFO : End of max read latency training
418 14:22:28.604968 INFO : Training has run successfully!
419 14:22:28.605350 1D training succeed
420 14:22:28.614138 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 14:22:28.661825 Check phy result
422 14:22:28.662293 INFO : End of initialization
423 14:22:28.684152 INFO : End of 2D read delay Voltage center optimization
424 14:22:28.703276 INFO : End of 2D read delay Voltage center optimization
425 14:22:28.755216 INFO : End of 2D write delay Voltage center optimization
426 14:22:28.804416 INFO : End of 2D write delay Voltage center optimization
427 14:22:28.809871 INFO : Training has run successfully!
428 14:22:28.810242
429 14:22:28.810511 channel==0
430 14:22:28.815464 RxClkDly_Margin_A0==78 ps 8
431 14:22:28.815801 TxDqDly_Margin_A0==88 ps 9
432 14:22:28.821109 RxClkDly_Margin_A1==88 ps 9
433 14:22:28.821475 TxDqDly_Margin_A1==98 ps 10
434 14:22:28.821740 TrainedVREFDQ_A0==74
435 14:22:28.826732 TrainedVREFDQ_A1==75
436 14:22:28.827087 VrefDac_Margin_A0==24
437 14:22:28.827350 DeviceVref_Margin_A0==40
438 14:22:28.832324 VrefDac_Margin_A1==23
439 14:22:28.832707 DeviceVref_Margin_A1==39
440 14:22:28.832979
441 14:22:28.833234
442 14:22:28.833481 channel==1
443 14:22:28.837921 RxClkDly_Margin_A0==78 ps 8
444 14:22:28.838260 TxDqDly_Margin_A0==98 ps 10
445 14:22:28.843462 RxClkDly_Margin_A1==88 ps 9
446 14:22:28.843807 TxDqDly_Margin_A1==78 ps 8
447 14:22:28.849123 TrainedVREFDQ_A0==78
448 14:22:28.849678 TrainedVREFDQ_A1==77
449 14:22:28.850135 VrefDac_Margin_A0==22
450 14:22:28.854740 DeviceVref_Margin_A0==36
451 14:22:28.855219 VrefDac_Margin_A1==23
452 14:22:28.860307 DeviceVref_Margin_A1==37
453 14:22:28.860821
454 14:22:28.861272 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 14:22:28.861735
456 14:22:28.893969 soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000016 00000018 00000014 00000015 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
457 14:22:28.894570 2D training succeed
458 14:22:28.899522 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 14:22:28.905088 auto size-- 65535DDR cs0 size: 2048MB
460 14:22:28.905596 DDR cs1 size: 2048MB
461 14:22:28.910757 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 14:22:28.911242 cs0 DataBus test pass
463 14:22:28.916325 cs1 DataBus test pass
464 14:22:28.916840 cs0 AddrBus test pass
465 14:22:28.917281 cs1 AddrBus test pass
466 14:22:28.917716
467 14:22:28.921892 100bdlr_step_size ps== 478
468 14:22:28.922405 result report
469 14:22:28.927484 boot times 0Enable ddr reg access
470 14:22:28.932657 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 14:22:28.946509 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 14:22:29.602071 bl2z: ptr: 05129330, size: 00001e40
473 14:22:29.609381 0.0;M3 CHK:0;cm4_sp_mode 0
474 14:22:29.609910 MVN_1=0x00000000
475 14:22:29.610358 MVN_2=0x00000000
476 14:22:29.620879 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 14:22:29.621382 OPS=0x04
478 14:22:29.621825 ring efuse init
479 14:22:29.623857 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 14:22:29.629487 [0.017319 Inits done]
481 14:22:29.629969 secure task start!
482 14:22:29.630406 high task start!
483 14:22:29.630841 low task start!
484 14:22:29.633692 run into bl31
485 14:22:29.642343 NOTICE: BL31: v1.3(release):4fc40b1
486 14:22:29.650108 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 14:22:29.650592 NOTICE: BL31: G12A normal boot!
488 14:22:29.665641 NOTICE: BL31: BL33 decompress pass
489 14:22:29.671358 ERROR: Error initializing runtime service opteed_fast
490 14:22:32.414675 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 14:22:32.415109 bl2_stage_init 0x01
492 14:22:32.415338 bl2_stage_init 0x81
493 14:22:32.420260 hw id: 0x0000 - pwm id 0x01
494 14:22:32.421012 bl2_stage_init 0xc1
495 14:22:32.425839 bl2_stage_init 0x02
496 14:22:32.426285
497 14:22:32.426567 L0:00000000
498 14:22:32.426825 L1:00000703
499 14:22:32.427080 L2:00008067
500 14:22:32.427327 L3:15000000
501 14:22:32.431407 S1:00000000
502 14:22:32.431830 B2:20282000
503 14:22:32.432152 B1:a0f83180
504 14:22:32.432423
505 14:22:32.432684 TE: 69445
506 14:22:32.432935
507 14:22:32.437028 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 14:22:32.437441
509 14:22:32.442740 Board ID = 1
510 14:22:32.443179 Set cpu clk to 24M
511 14:22:32.443489 Set clk81 to 24M
512 14:22:32.448253 Use GP1_pll as DSU clk.
513 14:22:32.448677 DSU clk: 1200 Mhz
514 14:22:32.448951 CPU clk: 1200 MHz
515 14:22:32.453827 Set clk81 to 166.6M
516 14:22:32.459634 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 14:22:32.460194 board id: 1
518 14:22:32.465977 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 14:22:32.477598 fw parse done
520 14:22:32.483204 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 14:22:32.525306 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 14:22:32.536856 PIEI prepare done
523 14:22:32.537297 fastboot data load
524 14:22:32.537543 fastboot data verify
525 14:22:32.542547 verify result: 266
526 14:22:32.548108 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 14:22:32.548538 LPDDR4 probe
528 14:22:32.548756 ddr clk to 1584MHz
529 14:22:32.555856 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 14:22:32.592881
531 14:22:32.593522 dmc_version 0001
532 14:22:32.600044 Check phy result
533 14:22:32.605871 INFO : End of CA training
534 14:22:32.606266 INFO : End of initialization
535 14:22:32.611493 INFO : Training has run successfully!
536 14:22:32.611874 Check phy result
537 14:22:32.617144 INFO : End of initialization
538 14:22:32.617761 INFO : End of read enable training
539 14:22:32.622744 INFO : End of fine write leveling
540 14:22:32.628371 INFO : End of Write leveling coarse delay
541 14:22:32.628987 INFO : Training has run successfully!
542 14:22:32.629454 Check phy result
543 14:22:32.633872 INFO : End of initialization
544 14:22:32.634424 INFO : End of read dq deskew training
545 14:22:32.639406 INFO : End of MPR read delay center optimization
546 14:22:32.645045 INFO : End of write delay center optimization
547 14:22:32.650687 INFO : End of read delay center optimization
548 14:22:32.651296 INFO : End of max read latency training
549 14:22:32.656373 INFO : Training has run successfully!
550 14:22:32.656974 1D training succeed
551 14:22:32.665134 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 14:22:32.712390 Check phy result
553 14:22:32.713062 INFO : End of initialization
554 14:22:32.735056 INFO : End of 2D read delay Voltage center optimization
555 14:22:32.754631 INFO : End of 2D read delay Voltage center optimization
556 14:22:32.806411 INFO : End of 2D write delay Voltage center optimization
557 14:22:32.855642 INFO : End of 2D write delay Voltage center optimization
558 14:22:32.861193 INFO : Training has run successfully!
559 14:22:32.861774
560 14:22:32.862225 channel==0
561 14:22:32.866796 RxClkDly_Margin_A0==78 ps 8
562 14:22:32.867380 TxDqDly_Margin_A0==98 ps 10
563 14:22:32.872525 RxClkDly_Margin_A1==88 ps 9
564 14:22:32.873096 TxDqDly_Margin_A1==98 ps 10
565 14:22:32.873540 TrainedVREFDQ_A0==74
566 14:22:32.877972 TrainedVREFDQ_A1==75
567 14:22:32.878538 VrefDac_Margin_A0==24
568 14:22:32.878982 DeviceVref_Margin_A0==40
569 14:22:32.883604 VrefDac_Margin_A1==23
570 14:22:32.884202 DeviceVref_Margin_A1==39
571 14:22:32.884667
572 14:22:32.885108
573 14:22:32.889169 channel==1
574 14:22:32.889723 RxClkDly_Margin_A0==88 ps 9
575 14:22:32.890159 TxDqDly_Margin_A0==98 ps 10
576 14:22:32.894793 RxClkDly_Margin_A1==78 ps 8
577 14:22:32.895396 TxDqDly_Margin_A1==88 ps 9
578 14:22:32.900536 TrainedVREFDQ_A0==78
579 14:22:32.901101 TrainedVREFDQ_A1==75
580 14:22:32.901544 VrefDac_Margin_A0==22
581 14:22:32.905968 DeviceVref_Margin_A0==36
582 14:22:32.906516 VrefDac_Margin_A1==22
583 14:22:32.911588 DeviceVref_Margin_A1==39
584 14:22:32.912212
585 14:22:32.912700 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 14:22:32.913147
587 14:22:32.945183 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
588 14:22:32.945825 2D training succeed
589 14:22:32.950792 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 14:22:32.956473 auto size-- 65535DDR cs0 size: 2048MB
591 14:22:32.957023 DDR cs1 size: 2048MB
592 14:22:32.961971 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 14:22:32.962513 cs0 DataBus test pass
594 14:22:32.967588 cs1 DataBus test pass
595 14:22:32.968189 cs0 AddrBus test pass
596 14:22:32.968654 cs1 AddrBus test pass
597 14:22:32.969087
598 14:22:32.973197 100bdlr_step_size ps== 464
599 14:22:32.973748 result report
600 14:22:32.978778 boot times 0Enable ddr reg access
601 14:22:32.983218 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 14:22:32.997396 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 14:22:33.653077 bl2z: ptr: 05129330, size: 00001e40
604 14:22:33.661396 0.0;M3 CHK:0;cm4_sp_mode 0
605 14:22:33.662092 MVN_1=0x00000000
606 14:22:33.662577 MVN_2=0x00000000
607 14:22:33.672971 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 14:22:33.673637 OPS=0x04
609 14:22:33.674132 ring efuse init
610 14:22:33.678421 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 14:22:33.679035 [0.017320 Inits done]
612 14:22:33.679507 secure task start!
613 14:22:33.685623 high task start!
614 14:22:33.686183 low task start!
615 14:22:33.686822 run into bl31
616 14:22:33.695159 NOTICE: BL31: v1.3(release):4fc40b1
617 14:22:33.702304 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 14:22:33.702954 NOTICE: BL31: G12A normal boot!
619 14:22:33.718091 NOTICE: BL31: BL33 decompress pass
620 14:22:33.723261 ERROR: Error initializing runtime service opteed_fast
621 14:22:35.114197 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 14:22:35.114811 bl2_stage_init 0x01
623 14:22:35.115236 bl2_stage_init 0x81
624 14:22:35.119708 hw id: 0x0000 - pwm id 0x01
625 14:22:35.120211 bl2_stage_init 0xc1
626 14:22:35.125245 bl2_stage_init 0x02
627 14:22:35.125712
628 14:22:35.126127 L0:00000000
629 14:22:35.126526 L1:00000703
630 14:22:35.126921 L2:00008067
631 14:22:35.127314 L3:15000000
632 14:22:35.130942 S1:00000000
633 14:22:35.131402 B2:20282000
634 14:22:35.131805 B1:a0f83180
635 14:22:35.132242
636 14:22:35.132643 TE: 69742
637 14:22:35.133039
638 14:22:35.136421 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 14:22:35.136889
640 14:22:35.142138 Board ID = 1
641 14:22:35.142600 Set cpu clk to 24M
642 14:22:35.143005 Set clk81 to 24M
643 14:22:35.147663 Use GP1_pll as DSU clk.
644 14:22:35.148154 DSU clk: 1200 Mhz
645 14:22:35.148561 CPU clk: 1200 MHz
646 14:22:35.153127 Set clk81 to 166.6M
647 14:22:35.158818 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 14:22:35.159276 board id: 1
649 14:22:35.165407 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 14:22:35.176800 fw parse done
651 14:22:35.182650 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 14:22:35.224245 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 14:22:35.236215 PIEI prepare done
654 14:22:35.236693 fastboot data load
655 14:22:35.237108 fastboot data verify
656 14:22:35.241826 verify result: 266
657 14:22:35.247488 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 14:22:35.247971 LPDDR4 probe
659 14:22:35.248477 ddr clk to 1584MHz
660 14:22:35.255379 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 14:22:35.292322
662 14:22:35.292857 dmc_version 0001
663 14:22:35.298798 Check phy result
664 14:22:35.305250 INFO : End of CA training
665 14:22:35.305745 INFO : End of initialization
666 14:22:35.310858 INFO : Training has run successfully!
667 14:22:35.311340 Check phy result
668 14:22:35.316459 INFO : End of initialization
669 14:22:35.316952 INFO : End of read enable training
670 14:22:35.319859 INFO : End of fine write leveling
671 14:22:35.325385 INFO : End of Write leveling coarse delay
672 14:22:35.330967 INFO : Training has run successfully!
673 14:22:35.331468 Check phy result
674 14:22:35.331879 INFO : End of initialization
675 14:22:35.336562 INFO : End of read dq deskew training
676 14:22:35.342158 INFO : End of MPR read delay center optimization
677 14:22:35.342649 INFO : End of write delay center optimization
678 14:22:35.347952 INFO : End of read delay center optimization
679 14:22:35.353471 INFO : End of max read latency training
680 14:22:35.354009 INFO : Training has run successfully!
681 14:22:35.358993 1D training succeed
682 14:22:35.364180 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 14:22:35.411470 Check phy result
684 14:22:35.412042 INFO : End of initialization
685 14:22:35.434394 INFO : End of 2D read delay Voltage center optimization
686 14:22:35.454037 INFO : End of 2D read delay Voltage center optimization
687 14:22:35.505333 INFO : End of 2D write delay Voltage center optimization
688 14:22:35.555045 INFO : End of 2D write delay Voltage center optimization
689 14:22:35.560585 INFO : Training has run successfully!
690 14:22:35.561090
691 14:22:35.561517 channel==0
692 14:22:35.566224 RxClkDly_Margin_A0==78 ps 8
693 14:22:35.566757 TxDqDly_Margin_A0==98 ps 10
694 14:22:35.571875 RxClkDly_Margin_A1==78 ps 8
695 14:22:35.572415 TxDqDly_Margin_A1==98 ps 10
696 14:22:35.572848 TrainedVREFDQ_A0==74
697 14:22:35.577423 TrainedVREFDQ_A1==75
698 14:22:35.577986 VrefDac_Margin_A0==22
699 14:22:35.578440 DeviceVref_Margin_A0==40
700 14:22:35.582981 VrefDac_Margin_A1==23
701 14:22:35.583530 DeviceVref_Margin_A1==39
702 14:22:35.583974
703 14:22:35.584489
704 14:22:35.588578 channel==1
705 14:22:35.589095 RxClkDly_Margin_A0==78 ps 8
706 14:22:35.589532 TxDqDly_Margin_A0==78 ps 8
707 14:22:35.594218 RxClkDly_Margin_A1==78 ps 8
708 14:22:35.594757 TxDqDly_Margin_A1==98 ps 10
709 14:22:35.599859 TrainedVREFDQ_A0==75
710 14:22:35.600445 TrainedVREFDQ_A1==78
711 14:22:35.600890 VrefDac_Margin_A0==22
712 14:22:35.605382 DeviceVref_Margin_A0==39
713 14:22:35.605889 VrefDac_Margin_A1==22
714 14:22:35.610999 DeviceVref_Margin_A1==36
715 14:22:35.611494
716 14:22:35.611922 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 14:22:35.612392
718 14:22:35.644589 soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000062
719 14:22:35.645166 2D training succeed
720 14:22:35.650182 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 14:22:35.655854 auto size-- 65535DDR cs0 size: 2048MB
722 14:22:35.656396 DDR cs1 size: 2048MB
723 14:22:35.661359 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 14:22:35.661870 cs0 DataBus test pass
725 14:22:35.666987 cs1 DataBus test pass
726 14:22:35.667495 cs0 AddrBus test pass
727 14:22:35.667919 cs1 AddrBus test pass
728 14:22:35.668391
729 14:22:35.672587 100bdlr_step_size ps== 478
730 14:22:35.673085 result report
731 14:22:35.678202 boot times 0Enable ddr reg access
732 14:22:35.682630 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 14:22:35.696387 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 14:22:36.352261 bl2z: ptr: 05129330, size: 00001e40
735 14:22:36.359843 0.0;M3 CHK:0;cm4_sp_mode 0
736 14:22:36.360392 MVN_1=0x00000000
737 14:22:36.360655 MVN_2=0x00000000
738 14:22:36.371258 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 14:22:36.371637 OPS=0x04
740 14:22:36.371860 ring efuse init
741 14:22:36.376931 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 14:22:36.377279 [0.017319 Inits done]
743 14:22:36.377485 secure task start!
744 14:22:36.383388 high task start!
745 14:22:36.383738 low task start!
746 14:22:36.383946 run into bl31
747 14:22:36.393141 NOTICE: BL31: v1.3(release):4fc40b1
748 14:22:36.399912 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 14:22:36.400437 NOTICE: BL31: G12A normal boot!
750 14:22:36.416359 NOTICE: BL31: BL33 decompress pass
751 14:22:36.421402 ERROR: Error initializing runtime service opteed_fast
752 14:22:37.217308
753 14:22:37.217924
754 14:22:37.222776 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 14:22:37.223257
756 14:22:37.226009 Model: Libre Computer AML-S905D3-CC Solitude
757 14:22:37.372534 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 14:22:37.389727 DRAM: 2 GiB (effective 3.8 GiB)
759 14:22:37.489712 Core: 406 devices, 33 uclasses, devicetree: separate
760 14:22:37.494735 WDT: Not starting watchdog@f0d0
761 14:22:37.520704 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 14:22:37.532910 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 14:22:37.537692 ** Bad device specification mmc 0 **
764 14:22:37.547949 Card did not respond to voltage select! : -110
765 14:22:37.554558 ** Bad device specification mmc 0 **
766 14:22:37.555328 Couldn't find partition mmc 0
767 14:22:37.563846 Card did not respond to voltage select! : -110
768 14:22:37.569344 ** Bad device specification mmc 0 **
769 14:22:37.570105 Couldn't find partition mmc 0
770 14:22:37.573465 Error: could not access storage.
771 14:22:37.871551 Net: eth0: ethernet@ff3f0000
772 14:22:37.872505 starting USB...
773 14:22:38.116569 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 14:22:38.117363 Starting the controller
775 14:22:38.123121 USB XHCI 1.10
776 14:22:39.677710 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 14:22:39.686043 scanning usb for storage devices... 0 Storage Device(s) found
779 14:22:39.737110 Hit any key to stop autoboot: 1
780 14:22:39.737963 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 14:22:39.738354 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 14:22:39.738639 Setting prompt string to ['=>']
783 14:22:39.738926 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 14:22:39.752131 0
785 14:22:39.752938 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 14:22:39.853788 => setenv autoload no
788 14:22:39.854507 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 14:22:39.858605 setenv autoload no
791 14:22:39.959714 => setenv initrd_high 0xffffffff
792 14:22:39.960471 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 14:22:39.964558 setenv initrd_high 0xffffffff
795 14:22:40.065611 => setenv fdt_high 0xffffffff
796 14:22:40.066285 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 14:22:40.070421 setenv fdt_high 0xffffffff
799 14:22:40.171530 => dhcp
800 14:22:40.172134 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 14:22:40.176175 dhcp
802 14:22:40.681719 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
803 14:22:40.682135 Speed: 1000, full duplex
804 14:22:40.682363 BOOTP broadcast 1
805 14:22:40.930373 BOOTP broadcast 2
806 14:22:40.943469 DHCP client bound to address 192.168.6.21 (262 ms)
808 14:22:41.044910 => setenv serverip 192.168.6.2
809 14:22:41.045564 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 14:22:41.049017 setenv serverip 192.168.6.2
812 14:22:41.150145 => tftpboot 0x01080000 970731/tftp-deploy-dssr7q6u/kernel/uImage
813 14:22:41.150967 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
814 14:22:41.157743 tftpboot 0x01080000 970731/tftp-deploy-dssr7q6u/kernel/uImage
815 14:22:41.158278 Speed: 1000, full duplex
816 14:22:41.158724 Using ethernet@ff3f0000 device
817 14:22:41.163326 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
818 14:22:41.168769 Filename '970731/tftp-deploy-dssr7q6u/kernel/uImage'.
819 14:22:41.172028 Load address: 0x1080000
820 14:22:44.173510 Loading: *################################################## 43.6 MiB
821 14:22:44.173918 14.5 MiB/s
822 14:22:44.174144 done
823 14:22:44.177845 Bytes transferred = 45713984 (2b98a40 hex)
825 14:22:44.278940 => tftpboot 0x08000000 970731/tftp-deploy-dssr7q6u/ramdisk/ramdisk.cpio.gz.uboot
826 14:22:44.279537 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
827 14:22:44.286056 tftpboot 0x08000000 970731/tftp-deploy-dssr7q6u/ramdisk/ramdisk.cpio.gz.uboot
828 14:22:44.286376 Speed: 1000, full duplex
829 14:22:44.286594 Using ethernet@ff3f0000 device
830 14:22:44.291537 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
831 14:22:44.301403 Filename '970731/tftp-deploy-dssr7q6u/ramdisk/ramdisk.cpio.gz.uboot'.
832 14:22:44.301977 Load address: 0x8000000
833 14:22:51.500266 Loading: *###########################################T ###### UDP wrong checksum 00000005 000018c1
834 14:22:56.501285 T UDP wrong checksum 00000005 000018c1
835 14:23:06.503372 T T UDP wrong checksum 00000005 000018c1
836 14:23:26.507576 T T T T UDP wrong checksum 00000005 000018c1
837 14:23:41.511278 T T
838 14:23:41.511702 Retry count exceeded; starting again
840 14:23:41.512570 end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
843 14:23:41.513503 end: 2.4 uboot-commands (duration 00:01:21) [common]
845 14:23:41.514216 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
847 14:23:41.514782 end: 2 uboot-action (duration 00:01:21) [common]
849 14:23:41.515646 Cleaning after the job
850 14:23:41.515975 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/ramdisk
851 14:23:41.516827 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/kernel
852 14:23:41.530659 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/dtb
853 14:23:41.531482 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/nfsrootfs
854 14:23:41.568209 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970731/tftp-deploy-dssr7q6u/modules
855 14:23:41.577660 start: 4.1 power-off (timeout 00:00:30) [common]
856 14:23:41.578308 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
857 14:23:41.612183 >> OK - accepted request
858 14:23:41.614164 Returned 0 in 0 seconds
859 14:23:41.714907 end: 4.1 power-off (duration 00:00:00) [common]
861 14:23:41.715910 start: 4.2 read-feedback (timeout 00:10:00) [common]
862 14:23:41.716603 Listened to connection for namespace 'common' for up to 1s
863 14:23:42.716859 Finalising connection for namespace 'common'
864 14:23:42.717653 Disconnecting from shell: Finalise
865 14:23:42.718221 =>
866 14:23:42.819370 end: 4.2 read-feedback (duration 00:00:01) [common]
867 14:23:42.820127 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/970731
868 14:23:45.727449 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/970731
869 14:23:45.728095 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.