Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 14:00:19.436361 lava-dispatcher, installed at version: 2024.01
2 14:00:19.437209 start: 0 validate
3 14:00:19.437707 Start time: 2024-11-10 14:00:19.437677+00:00 (UTC)
4 14:00:19.438301 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 14:00:19.438856 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 14:00:19.476497 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 14:00:19.477167 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 14:00:19.509509 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 14:00:19.510179 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 14:00:19.541642 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 14:00:19.542135 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 14:00:19.573957 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 14:00:19.574419 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 14:00:19.612426 validate duration: 0.17
16 14:00:19.613273 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 14:00:19.613615 start: 1.1 download-retry (timeout 00:10:00) [common]
18 14:00:19.613917 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 14:00:19.614525 Not decompressing ramdisk as can be used compressed.
20 14:00:19.614996 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 14:00:19.615276 saving as /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/ramdisk/initrd.cpio.gz
22 14:00:19.615565 total size: 5628169 (5 MB)
23 14:00:19.652534 progress 0 % (0 MB)
24 14:00:19.656961 progress 5 % (0 MB)
25 14:00:19.661111 progress 10 % (0 MB)
26 14:00:19.664709 progress 15 % (0 MB)
27 14:00:19.668766 progress 20 % (1 MB)
28 14:00:19.672425 progress 25 % (1 MB)
29 14:00:19.676540 progress 30 % (1 MB)
30 14:00:19.680646 progress 35 % (1 MB)
31 14:00:19.684292 progress 40 % (2 MB)
32 14:00:19.688281 progress 45 % (2 MB)
33 14:00:19.691914 progress 50 % (2 MB)
34 14:00:19.695999 progress 55 % (2 MB)
35 14:00:19.699952 progress 60 % (3 MB)
36 14:00:19.703566 progress 65 % (3 MB)
37 14:00:19.707694 progress 70 % (3 MB)
38 14:00:19.711321 progress 75 % (4 MB)
39 14:00:19.715292 progress 80 % (4 MB)
40 14:00:19.719008 progress 85 % (4 MB)
41 14:00:19.723069 progress 90 % (4 MB)
42 14:00:19.726739 progress 95 % (5 MB)
43 14:00:19.730082 progress 100 % (5 MB)
44 14:00:19.730729 5 MB downloaded in 0.12 s (46.62 MB/s)
45 14:00:19.731255 end: 1.1.1 http-download (duration 00:00:00) [common]
47 14:00:19.732172 end: 1.1 download-retry (duration 00:00:00) [common]
48 14:00:19.732460 start: 1.2 download-retry (timeout 00:10:00) [common]
49 14:00:19.732726 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 14:00:19.733198 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/kernel/Image
51 14:00:19.733443 saving as /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/kernel/Image
52 14:00:19.733650 total size: 45713920 (43 MB)
53 14:00:19.733858 No compression specified
54 14:00:19.770164 progress 0 % (0 MB)
55 14:00:19.799612 progress 5 % (2 MB)
56 14:00:19.828576 progress 10 % (4 MB)
57 14:00:19.857642 progress 15 % (6 MB)
58 14:00:19.886692 progress 20 % (8 MB)
59 14:00:19.915555 progress 25 % (10 MB)
60 14:00:19.944247 progress 30 % (13 MB)
61 14:00:19.973088 progress 35 % (15 MB)
62 14:00:20.002186 progress 40 % (17 MB)
63 14:00:20.032201 progress 45 % (19 MB)
64 14:00:20.061099 progress 50 % (21 MB)
65 14:00:20.090026 progress 55 % (24 MB)
66 14:00:20.119119 progress 60 % (26 MB)
67 14:00:20.148772 progress 65 % (28 MB)
68 14:00:20.177331 progress 70 % (30 MB)
69 14:00:20.206162 progress 75 % (32 MB)
70 14:00:20.235184 progress 80 % (34 MB)
71 14:00:20.263283 progress 85 % (37 MB)
72 14:00:20.292152 progress 90 % (39 MB)
73 14:00:20.320798 progress 95 % (41 MB)
74 14:00:20.349548 progress 100 % (43 MB)
75 14:00:20.350134 43 MB downloaded in 0.62 s (70.72 MB/s)
76 14:00:20.350628 end: 1.2.1 http-download (duration 00:00:01) [common]
78 14:00:20.351467 end: 1.2 download-retry (duration 00:00:01) [common]
79 14:00:20.351753 start: 1.3 download-retry (timeout 00:09:59) [common]
80 14:00:20.352053 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 14:00:20.352531 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 14:00:20.352806 saving as /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 14:00:20.353020 total size: 53209 (0 MB)
84 14:00:20.353252 No compression specified
85 14:00:20.392866 progress 61 % (0 MB)
86 14:00:20.393741 progress 100 % (0 MB)
87 14:00:20.394315 0 MB downloaded in 0.04 s (1.23 MB/s)
88 14:00:20.394845 end: 1.3.1 http-download (duration 00:00:00) [common]
90 14:00:20.395766 end: 1.3 download-retry (duration 00:00:00) [common]
91 14:00:20.396114 start: 1.4 download-retry (timeout 00:09:59) [common]
92 14:00:20.396431 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 14:00:20.396899 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 14:00:20.397169 saving as /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/nfsrootfs/full.rootfs.tar
95 14:00:20.397407 total size: 120894716 (115 MB)
96 14:00:20.397644 Using unxz to decompress xz
97 14:00:20.433736 progress 0 % (0 MB)
98 14:00:21.230354 progress 5 % (5 MB)
99 14:00:22.077645 progress 10 % (11 MB)
100 14:00:22.888219 progress 15 % (17 MB)
101 14:00:23.647357 progress 20 % (23 MB)
102 14:00:24.257738 progress 25 % (28 MB)
103 14:00:25.080114 progress 30 % (34 MB)
104 14:00:25.867733 progress 35 % (40 MB)
105 14:00:26.232125 progress 40 % (46 MB)
106 14:00:26.607696 progress 45 % (51 MB)
107 14:00:27.341985 progress 50 % (57 MB)
108 14:00:28.224986 progress 55 % (63 MB)
109 14:00:29.006869 progress 60 % (69 MB)
110 14:00:29.761694 progress 65 % (74 MB)
111 14:00:30.572136 progress 70 % (80 MB)
112 14:00:31.488554 progress 75 % (86 MB)
113 14:00:32.302397 progress 80 % (92 MB)
114 14:00:33.059614 progress 85 % (98 MB)
115 14:00:33.930340 progress 90 % (103 MB)
116 14:00:34.825348 progress 95 % (109 MB)
117 14:00:35.758767 progress 100 % (115 MB)
118 14:00:35.771952 115 MB downloaded in 15.37 s (7.50 MB/s)
119 14:00:35.772989 end: 1.4.1 http-download (duration 00:00:15) [common]
121 14:00:35.774707 end: 1.4 download-retry (duration 00:00:15) [common]
122 14:00:35.775258 start: 1.5 download-retry (timeout 00:09:44) [common]
123 14:00:35.775811 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 14:00:35.776725 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/modules.tar.xz
125 14:00:35.777221 saving as /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/modules/modules.tar
126 14:00:35.777663 total size: 11611892 (11 MB)
127 14:00:35.778113 Using unxz to decompress xz
128 14:00:35.823925 progress 0 % (0 MB)
129 14:00:35.890159 progress 5 % (0 MB)
130 14:00:35.963913 progress 10 % (1 MB)
131 14:00:36.061314 progress 15 % (1 MB)
132 14:00:36.153413 progress 20 % (2 MB)
133 14:00:36.232207 progress 25 % (2 MB)
134 14:00:36.307321 progress 30 % (3 MB)
135 14:00:36.385138 progress 35 % (3 MB)
136 14:00:36.460528 progress 40 % (4 MB)
137 14:00:36.536699 progress 45 % (5 MB)
138 14:00:36.623065 progress 50 % (5 MB)
139 14:00:36.700728 progress 55 % (6 MB)
140 14:00:36.785194 progress 60 % (6 MB)
141 14:00:36.866567 progress 65 % (7 MB)
142 14:00:36.946637 progress 70 % (7 MB)
143 14:00:37.025049 progress 75 % (8 MB)
144 14:00:37.107630 progress 80 % (8 MB)
145 14:00:37.187706 progress 85 % (9 MB)
146 14:00:37.265977 progress 90 % (9 MB)
147 14:00:37.343524 progress 95 % (10 MB)
148 14:00:37.420371 progress 100 % (11 MB)
149 14:00:37.432235 11 MB downloaded in 1.65 s (6.69 MB/s)
150 14:00:37.432932 end: 1.5.1 http-download (duration 00:00:02) [common]
152 14:00:37.434602 end: 1.5 download-retry (duration 00:00:02) [common]
153 14:00:37.435134 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 14:00:37.435652 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 14:00:54.704695 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/970686/extract-nfsrootfs-t2clsipn
156 14:00:54.705295 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 14:00:54.705620 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 14:00:54.706241 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw
159 14:00:54.706739 makedir: /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin
160 14:00:54.707149 makedir: /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/tests
161 14:00:54.707549 makedir: /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/results
162 14:00:54.707935 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-add-keys
163 14:00:54.708547 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-add-sources
164 14:00:54.709055 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-background-process-start
165 14:00:54.709543 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-background-process-stop
166 14:00:54.710073 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-common-functions
167 14:00:54.710587 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-echo-ipv4
168 14:00:54.711074 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-install-packages
169 14:00:54.711547 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-installed-packages
170 14:00:54.712038 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-os-build
171 14:00:54.712538 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-probe-channel
172 14:00:54.713027 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-probe-ip
173 14:00:54.713528 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-target-ip
174 14:00:54.714066 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-target-mac
175 14:00:54.714559 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-target-storage
176 14:00:54.715050 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-test-case
177 14:00:54.715549 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-test-event
178 14:00:54.716043 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-test-feedback
179 14:00:54.716535 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-test-raise
180 14:00:54.717009 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-test-reference
181 14:00:54.717488 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-test-runner
182 14:00:54.717973 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-test-set
183 14:00:54.718443 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-test-shell
184 14:00:54.718924 Updating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-add-keys (debian)
185 14:00:54.719435 Updating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-add-sources (debian)
186 14:00:54.719949 Updating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-install-packages (debian)
187 14:00:54.720489 Updating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-installed-packages (debian)
188 14:00:54.720984 Updating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/bin/lava-os-build (debian)
189 14:00:54.721431 Creating /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/environment
190 14:00:54.721803 LAVA metadata
191 14:00:54.722059 - LAVA_JOB_ID=970686
192 14:00:54.722274 - LAVA_DISPATCHER_IP=192.168.6.2
193 14:00:54.722633 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 14:00:54.723594 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 14:00:54.723902 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 14:00:54.724172 skipped lava-vland-overlay
197 14:00:54.724413 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 14:00:54.724666 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 14:00:54.724883 skipped lava-multinode-overlay
200 14:00:54.725121 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 14:00:54.725366 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 14:00:54.725611 Loading test definitions
203 14:00:54.725881 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 14:00:54.726097 Using /lava-970686 at stage 0
205 14:00:54.727243 uuid=970686_1.6.2.4.1 testdef=None
206 14:00:54.727544 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 14:00:54.727801 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 14:00:54.729407 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 14:00:54.730168 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 14:00:54.732100 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 14:00:54.732907 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 14:00:54.734731 runner path: /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/0/tests/0_timesync-off test_uuid 970686_1.6.2.4.1
215 14:00:54.735277 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 14:00:54.736089 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 14:00:54.736309 Using /lava-970686 at stage 0
219 14:00:54.736654 Fetching tests from https://github.com/kernelci/test-definitions.git
220 14:00:54.736935 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/0/tests/1_kselftest-rtc'
221 14:00:58.081979 Running '/usr/bin/git checkout kernelci.org
222 14:00:58.210495 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 14:00:58.212020 uuid=970686_1.6.2.4.5 testdef=None
224 14:00:58.212390 end: 1.6.2.4.5 git-repo-action (duration 00:00:03) [common]
226 14:00:58.213158 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 14:00:58.216151 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 14:00:58.217045 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 14:00:58.221217 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 14:00:58.222151 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 14:00:58.225898 runner path: /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/0/tests/1_kselftest-rtc test_uuid 970686_1.6.2.4.5
234 14:00:58.226230 BOARD='meson-sm1-s905d3-libretech-cc'
235 14:00:58.226449 BRANCH='tip'
236 14:00:58.226655 SKIPFILE='/dev/null'
237 14:00:58.226863 SKIP_INSTALL='True'
238 14:00:58.227069 TESTPROG_URL='http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 14:00:58.227279 TST_CASENAME=''
240 14:00:58.227481 TST_CMDFILES='rtc'
241 14:00:58.228222 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 14:00:58.229056 Creating lava-test-runner.conf files
244 14:00:58.229270 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/970686/lava-overlay-nyl5acaw/lava-970686/0 for stage 0
245 14:00:58.229658 - 0_timesync-off
246 14:00:58.229922 - 1_kselftest-rtc
247 14:00:58.230284 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 14:00:58.230582 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 14:01:21.598456 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 14:01:21.598877 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 14:01:21.599169 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 14:01:21.599471 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 14:01:21.599758 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 14:01:22.211115 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 14:01:22.211594 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 14:01:22.211864 extracting modules file /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970686/extract-nfsrootfs-t2clsipn
257 14:01:23.608903 extracting modules file /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970686/extract-overlay-ramdisk-zx0aw08e/ramdisk
258 14:01:25.130722 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 14:01:25.131204 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 14:01:25.131498 [common] Applying overlay to NFS
261 14:01:25.131727 [common] Applying overlay /var/lib/lava/dispatcher/tmp/970686/compress-overlay-0nsfdo93/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/970686/extract-nfsrootfs-t2clsipn
262 14:01:27.871398 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 14:01:27.871870 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 14:01:27.872201 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 14:01:27.872464 Converting downloaded kernel to a uImage
266 14:01:27.872791 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/kernel/Image /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/kernel/uImage
267 14:01:28.369715 output: Image Name:
268 14:01:28.370142 output: Created: Sun Nov 10 14:01:27 2024
269 14:01:28.370379 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 14:01:28.370598 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 14:01:28.370804 output: Load Address: 01080000
272 14:01:28.371009 output: Entry Point: 01080000
273 14:01:28.371211 output:
274 14:01:28.371545 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 14:01:28.371824 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 14:01:28.372153 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 14:01:28.372431 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 14:01:28.372700 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 14:01:28.372978 Building ramdisk /var/lib/lava/dispatcher/tmp/970686/extract-overlay-ramdisk-zx0aw08e/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/970686/extract-overlay-ramdisk-zx0aw08e/ramdisk
280 14:01:30.545760 >> 166827 blocks
281 14:01:38.360453 Adding RAMdisk u-boot header.
282 14:01:38.361168 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/970686/extract-overlay-ramdisk-zx0aw08e/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/970686/extract-overlay-ramdisk-zx0aw08e/ramdisk.cpio.gz.uboot
283 14:01:38.627231 output: Image Name:
284 14:01:38.627647 output: Created: Sun Nov 10 14:01:38 2024
285 14:01:38.627858 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 14:01:38.628253 output: Data Size: 23436239 Bytes = 22886.95 KiB = 22.35 MiB
287 14:01:38.628704 output: Load Address: 00000000
288 14:01:38.629158 output: Entry Point: 00000000
289 14:01:38.629597 output:
290 14:01:38.630779 rename /var/lib/lava/dispatcher/tmp/970686/extract-overlay-ramdisk-zx0aw08e/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/ramdisk/ramdisk.cpio.gz.uboot
291 14:01:38.631556 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 14:01:38.632188 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 14:01:38.632773 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 14:01:38.633269 No LXC device requested
295 14:01:38.633813 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 14:01:38.634371 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 14:01:38.634913 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 14:01:38.635365 Checking files for TFTP limit of 4294967296 bytes.
299 14:01:38.638279 end: 1 tftp-deploy (duration 00:01:19) [common]
300 14:01:38.638912 start: 2 uboot-action (timeout 00:05:00) [common]
301 14:01:38.639483 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 14:01:38.640057 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 14:01:38.640615 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 14:01:38.641189 Using kernel file from prepare-kernel: 970686/tftp-deploy-yy7ub_20/kernel/uImage
305 14:01:38.641871 substitutions:
306 14:01:38.642313 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 14:01:38.642754 - {DTB_ADDR}: 0x01070000
308 14:01:38.643187 - {DTB}: 970686/tftp-deploy-yy7ub_20/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 14:01:38.643626 - {INITRD}: 970686/tftp-deploy-yy7ub_20/ramdisk/ramdisk.cpio.gz.uboot
310 14:01:38.644122 - {KERNEL_ADDR}: 0x01080000
311 14:01:38.644563 - {KERNEL}: 970686/tftp-deploy-yy7ub_20/kernel/uImage
312 14:01:38.644994 - {LAVA_MAC}: None
313 14:01:38.645470 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/970686/extract-nfsrootfs-t2clsipn
314 14:01:38.645905 - {NFS_SERVER_IP}: 192.168.6.2
315 14:01:38.646329 - {PRESEED_CONFIG}: None
316 14:01:38.646757 - {PRESEED_LOCAL}: None
317 14:01:38.647182 - {RAMDISK_ADDR}: 0x08000000
318 14:01:38.647604 - {RAMDISK}: 970686/tftp-deploy-yy7ub_20/ramdisk/ramdisk.cpio.gz.uboot
319 14:01:38.648054 - {ROOT_PART}: None
320 14:01:38.648484 - {ROOT}: None
321 14:01:38.648907 - {SERVER_IP}: 192.168.6.2
322 14:01:38.649328 - {TEE_ADDR}: 0x83000000
323 14:01:38.649751 - {TEE}: None
324 14:01:38.650173 Parsed boot commands:
325 14:01:38.650580 - setenv autoload no
326 14:01:38.650999 - setenv initrd_high 0xffffffff
327 14:01:38.651418 - setenv fdt_high 0xffffffff
328 14:01:38.651834 - dhcp
329 14:01:38.652275 - setenv serverip 192.168.6.2
330 14:01:38.652699 - tftpboot 0x01080000 970686/tftp-deploy-yy7ub_20/kernel/uImage
331 14:01:38.653122 - tftpboot 0x08000000 970686/tftp-deploy-yy7ub_20/ramdisk/ramdisk.cpio.gz.uboot
332 14:01:38.653544 - tftpboot 0x01070000 970686/tftp-deploy-yy7ub_20/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 14:01:38.653966 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/970686/extract-nfsrootfs-t2clsipn,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 14:01:38.654399 - bootm 0x01080000 0x08000000 0x01070000
335 14:01:38.654937 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 14:01:38.656608 start: 2.3 connect-device (timeout 00:05:00) [common]
338 14:01:38.657071 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 14:01:38.673047 Setting prompt string to ['lava-test: # ']
340 14:01:38.674695 end: 2.3 connect-device (duration 00:00:00) [common]
341 14:01:38.675362 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 14:01:38.675968 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 14:01:38.676605 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 14:01:38.677869 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 14:01:38.719641 >> OK - accepted request
346 14:01:38.722019 Returned 0 in 0 seconds
347 14:01:38.823275 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 14:01:38.825185 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 14:01:38.825832 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 14:01:38.826403 Setting prompt string to ['Hit any key to stop autoboot']
352 14:01:38.826916 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 14:01:38.828672 Trying 192.168.56.21...
354 14:01:38.829218 Connected to conserv1.
355 14:01:38.829685 Escape character is '^]'.
356 14:01:38.830143
357 14:01:38.830607 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 14:01:38.831091
359 14:01:46.357672 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 14:01:46.358327 bl2_stage_init 0x01
361 14:01:46.358817 bl2_stage_init 0x81
362 14:01:46.363274 hw id: 0x0000 - pwm id 0x01
363 14:01:46.363793 bl2_stage_init 0xc1
364 14:01:46.368815 bl2_stage_init 0x02
365 14:01:46.369329
366 14:01:46.369804 L0:00000000
367 14:01:46.370268 L1:00000703
368 14:01:46.370722 L2:00008067
369 14:01:46.371170 L3:15000000
370 14:01:46.374360 S1:00000000
371 14:01:46.374864 B2:20282000
372 14:01:46.375312 B1:a0f83180
373 14:01:46.375752
374 14:01:46.376241 TE: 70746
375 14:01:46.376688
376 14:01:46.379857 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 14:01:46.380364
378 14:01:46.385576 Board ID = 1
379 14:01:46.386063 Set cpu clk to 24M
380 14:01:46.386508 Set clk81 to 24M
381 14:01:46.391198 Use GP1_pll as DSU clk.
382 14:01:46.391676 DSU clk: 1200 Mhz
383 14:01:46.392157 CPU clk: 1200 MHz
384 14:01:46.396675 Set clk81 to 166.6M
385 14:01:46.402305 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 14:01:46.402789 board id: 1
387 14:01:46.409564 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 14:01:46.420477 fw parse done
389 14:01:46.426380 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 14:01:46.469559 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 14:01:46.480655 PIEI prepare done
392 14:01:46.481134 fastboot data load
393 14:01:46.481584 fastboot data verify
394 14:01:46.486152 verify result: 266
395 14:01:46.491814 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 14:01:46.492341 LPDDR4 probe
397 14:01:46.492790 ddr clk to 1584MHz
398 14:01:46.499729 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 14:01:46.537500
400 14:01:46.538015 dmc_version 0001
401 14:01:46.544550 Check phy result
402 14:01:46.550502 INFO : End of CA training
403 14:01:46.550984 INFO : End of initialization
404 14:01:46.556188 INFO : Training has run successfully!
405 14:01:46.556684 Check phy result
406 14:01:46.561703 INFO : End of initialization
407 14:01:46.562166 INFO : End of read enable training
408 14:01:46.567270 INFO : End of fine write leveling
409 14:01:46.572972 INFO : End of Write leveling coarse delay
410 14:01:46.573456 INFO : Training has run successfully!
411 14:01:46.573902 Check phy result
412 14:01:46.578485 INFO : End of initialization
413 14:01:46.578973 INFO : End of read dq deskew training
414 14:01:46.584216 INFO : End of MPR read delay center optimization
415 14:01:46.589717 INFO : End of write delay center optimization
416 14:01:46.595296 INFO : End of read delay center optimization
417 14:01:46.595763 INFO : End of max read latency training
418 14:01:46.600945 INFO : Training has run successfully!
419 14:01:46.601416 1D training succeed
420 14:01:46.610267 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 14:01:46.658463 Check phy result
422 14:01:46.658958 INFO : End of initialization
423 14:01:46.685838 INFO : End of 2D read delay Voltage center optimization
424 14:01:46.710041 INFO : End of 2D read delay Voltage center optimization
425 14:01:46.766738 INFO : End of 2D write delay Voltage center optimization
426 14:01:46.820722 INFO : End of 2D write delay Voltage center optimization
427 14:01:46.826339 INFO : Training has run successfully!
428 14:01:46.826811
429 14:01:46.827273 channel==0
430 14:01:46.831801 RxClkDly_Margin_A0==78 ps 8
431 14:01:46.832312 TxDqDly_Margin_A0==88 ps 9
432 14:01:46.837429 RxClkDly_Margin_A1==88 ps 9
433 14:01:46.837904 TxDqDly_Margin_A1==98 ps 10
434 14:01:46.838342 TrainedVREFDQ_A0==74
435 14:01:46.843103 TrainedVREFDQ_A1==75
436 14:01:46.843585 VrefDac_Margin_A0==24
437 14:01:46.844064 DeviceVref_Margin_A0==40
438 14:01:46.848643 VrefDac_Margin_A1==23
439 14:01:46.849119 DeviceVref_Margin_A1==39
440 14:01:46.849560
441 14:01:46.849995
442 14:01:46.850426 channel==1
443 14:01:46.854296 RxClkDly_Margin_A0==88 ps 9
444 14:01:46.854765 TxDqDly_Margin_A0==98 ps 10
445 14:01:46.859934 RxClkDly_Margin_A1==88 ps 9
446 14:01:46.860431 TxDqDly_Margin_A1==88 ps 9
447 14:01:46.865439 TrainedVREFDQ_A0==78
448 14:01:46.865912 TrainedVREFDQ_A1==78
449 14:01:46.866355 VrefDac_Margin_A0==23
450 14:01:46.871046 DeviceVref_Margin_A0==36
451 14:01:46.871538 VrefDac_Margin_A1==22
452 14:01:46.876698 DeviceVref_Margin_A1==36
453 14:01:46.877195
454 14:01:46.877642 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 14:01:46.878085
456 14:01:46.910299 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
457 14:01:46.910918 2D training succeed
458 14:01:46.915848 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 14:01:46.921365 auto size-- 65535DDR cs0 size: 2048MB
460 14:01:46.921869 DDR cs1 size: 2048MB
461 14:01:46.926947 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 14:01:46.927455 cs0 DataBus test pass
463 14:01:46.932584 cs1 DataBus test pass
464 14:01:46.933080 cs0 AddrBus test pass
465 14:01:46.933528 cs1 AddrBus test pass
466 14:01:46.933963
467 14:01:46.938203 100bdlr_step_size ps== 471
468 14:01:46.938722 result report
469 14:01:46.943771 boot times 0Enable ddr reg access
470 14:01:46.948972 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 14:01:46.962774 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 14:01:47.622249 bl2z: ptr: 05129330, size: 00001e40
473 14:01:47.630994 0.0;M3 CHK:0;cm4_sp_mode 0
474 14:01:47.631528 MVN_1=0x00000000
475 14:01:47.632014 MVN_2=0x00000000
476 14:01:47.642513 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 14:01:47.643021 OPS=0x04
478 14:01:47.643471 ring efuse init
479 14:01:47.645368 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 14:01:47.651230 [0.017354 Inits done]
481 14:01:47.651817 secure task start!
482 14:01:47.652336 high task start!
483 14:01:47.652781 low task start!
484 14:01:47.655343 run into bl31
485 14:01:47.663952 NOTICE: BL31: v1.3(release):4fc40b1
486 14:01:47.671779 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 14:01:47.672306 NOTICE: BL31: G12A normal boot!
488 14:01:47.687379 NOTICE: BL31: BL33 decompress pass
489 14:01:47.693064 ERROR: Error initializing runtime service opteed_fast
490 14:01:50.408985 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 14:01:50.409439 bl2_stage_init 0x01
492 14:01:50.409659 bl2_stage_init 0x81
493 14:01:50.414706 hw id: 0x0000 - pwm id 0x01
494 14:01:50.415372 bl2_stage_init 0xc1
495 14:01:50.420203 bl2_stage_init 0x02
496 14:01:50.420748
497 14:01:50.421195 L0:00000000
498 14:01:50.421628 L1:00000703
499 14:01:50.422059 L2:00008067
500 14:01:50.422484 L3:15000000
501 14:01:50.425744 S1:00000000
502 14:01:50.426259 B2:20282000
503 14:01:50.426689 B1:a0f83180
504 14:01:50.427114
505 14:01:50.427544 TE: 71770
506 14:01:50.427966
507 14:01:50.431303 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 14:01:50.431816
509 14:01:50.436893 Board ID = 1
510 14:01:50.437410 Set cpu clk to 24M
511 14:01:50.437867 Set clk81 to 24M
512 14:01:50.442551 Use GP1_pll as DSU clk.
513 14:01:50.443069 DSU clk: 1200 Mhz
514 14:01:50.443501 CPU clk: 1200 MHz
515 14:01:50.448122 Set clk81 to 166.6M
516 14:01:50.453767 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 14:01:50.454282 board id: 1
518 14:01:50.460927 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 14:01:50.471778 fw parse done
520 14:01:50.477804 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 14:01:50.520914 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 14:01:50.532105 PIEI prepare done
523 14:01:50.532647 fastboot data load
524 14:01:50.533086 fastboot data verify
525 14:01:50.537622 verify result: 266
526 14:01:50.543227 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 14:01:50.543757 LPDDR4 probe
528 14:01:50.544232 ddr clk to 1584MHz
529 14:01:50.551213 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 14:01:50.588930
531 14:01:50.589484 dmc_version 0001
532 14:01:50.595976 Check phy result
533 14:01:50.602041 INFO : End of CA training
534 14:01:50.602602 INFO : End of initialization
535 14:01:50.607602 INFO : Training has run successfully!
536 14:01:50.608163 Check phy result
537 14:01:50.613191 INFO : End of initialization
538 14:01:50.613716 INFO : End of read enable training
539 14:01:50.618804 INFO : End of fine write leveling
540 14:01:50.624393 INFO : End of Write leveling coarse delay
541 14:01:50.624926 INFO : Training has run successfully!
542 14:01:50.625383 Check phy result
543 14:01:50.629976 INFO : End of initialization
544 14:01:50.630505 INFO : End of read dq deskew training
545 14:01:50.635575 INFO : End of MPR read delay center optimization
546 14:01:50.641235 INFO : End of write delay center optimization
547 14:01:50.646832 INFO : End of read delay center optimization
548 14:01:50.647364 INFO : End of max read latency training
549 14:01:50.652380 INFO : Training has run successfully!
550 14:01:50.652916 1D training succeed
551 14:01:50.661560 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 14:01:50.709984 Check phy result
553 14:01:50.710624 INFO : End of initialization
554 14:01:50.737268 INFO : End of 2D read delay Voltage center optimization
555 14:01:50.761441 INFO : End of 2D read delay Voltage center optimization
556 14:01:50.818178 INFO : End of 2D write delay Voltage center optimization
557 14:01:50.872205 INFO : End of 2D write delay Voltage center optimization
558 14:01:50.877676 INFO : Training has run successfully!
559 14:01:50.878205
560 14:01:50.878661 channel==0
561 14:01:50.883233 RxClkDly_Margin_A0==78 ps 8
562 14:01:50.883752 TxDqDly_Margin_A0==98 ps 10
563 14:01:50.888862 RxClkDly_Margin_A1==88 ps 9
564 14:01:50.889389 TxDqDly_Margin_A1==98 ps 10
565 14:01:50.889845 TrainedVREFDQ_A0==74
566 14:01:50.894471 TrainedVREFDQ_A1==75
567 14:01:50.894999 VrefDac_Margin_A0==22
568 14:01:50.895451 DeviceVref_Margin_A0==40
569 14:01:50.900115 VrefDac_Margin_A1==23
570 14:01:50.900691 DeviceVref_Margin_A1==39
571 14:01:50.901187
572 14:01:50.901715
573 14:01:50.905726 channel==1
574 14:01:50.906317 RxClkDly_Margin_A0==88 ps 9
575 14:01:50.906775 TxDqDly_Margin_A0==98 ps 10
576 14:01:50.911312 RxClkDly_Margin_A1==88 ps 9
577 14:01:50.911861 TxDqDly_Margin_A1==88 ps 9
578 14:01:50.916862 TrainedVREFDQ_A0==75
579 14:01:50.917401 TrainedVREFDQ_A1==77
580 14:01:50.917860 VrefDac_Margin_A0==22
581 14:01:50.922508 DeviceVref_Margin_A0==39
582 14:01:50.923047 VrefDac_Margin_A1==22
583 14:01:50.928059 DeviceVref_Margin_A1==37
584 14:01:50.928599
585 14:01:50.929063 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 14:01:50.929518
587 14:01:50.961598 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
588 14:01:50.962248 2D training succeed
589 14:01:50.967271 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 14:01:50.972841 auto size-- 65535DDR cs0 size: 2048MB
591 14:01:50.973377 DDR cs1 size: 2048MB
592 14:01:50.978475 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 14:01:50.979003 cs0 DataBus test pass
594 14:01:50.984112 cs1 DataBus test pass
595 14:01:50.984632 cs0 AddrBus test pass
596 14:01:50.985092 cs1 AddrBus test pass
597 14:01:50.985537
598 14:01:50.989624 100bdlr_step_size ps== 471
599 14:01:50.990160 result report
600 14:01:50.995237 boot times 0Enable ddr reg access
601 14:01:51.000481 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 14:01:51.014369 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 14:01:51.674126 bl2z: ptr: 05129330, size: 00001e40
604 14:01:51.683171 0.0;M3 CHK:0;cm4_sp_mode 0
605 14:01:51.683773 MVN_1=0x00000000
606 14:01:51.684302 MVN_2=0x00000000
607 14:01:51.694664 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 14:01:51.695237 OPS=0x04
609 14:01:51.695710 ring efuse init
610 14:01:51.697611 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 14:01:51.703618 [0.017354 Inits done]
612 14:01:51.704194 secure task start!
613 14:01:51.704657 high task start!
614 14:01:51.705105 low task start!
615 14:01:51.708078 run into bl31
616 14:01:51.716725 NOTICE: BL31: v1.3(release):4fc40b1
617 14:01:51.724397 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 14:01:51.724952 NOTICE: BL31: G12A normal boot!
619 14:01:51.739926 NOTICE: BL31: BL33 decompress pass
620 14:01:51.745633 ERROR: Error initializing runtime service opteed_fast
621 14:01:53.108903 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 14:01:53.109566 bl2_stage_init 0x01
623 14:01:53.110037 bl2_stage_init 0x81
624 14:01:53.114734 hw id: 0x0000 - pwm id 0x01
625 14:01:53.115291 bl2_stage_init 0xc1
626 14:01:53.120372 bl2_stage_init 0x02
627 14:01:53.120901
628 14:01:53.121361 L0:00000000
629 14:01:53.121804 L1:00000703
630 14:01:53.122248 L2:00008067
631 14:01:53.122684 L3:15000000
632 14:01:53.125858 S1:00000000
633 14:01:53.126374 B2:20282000
634 14:01:53.126823 B1:a0f83180
635 14:01:53.127263
636 14:01:53.127702 TE: 72586
637 14:01:53.128187
638 14:01:53.131459 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 14:01:53.131974
640 14:01:53.137021 Board ID = 1
641 14:01:53.137558 Set cpu clk to 24M
642 14:01:53.138026 Set clk81 to 24M
643 14:01:53.142735 Use GP1_pll as DSU clk.
644 14:01:53.143254 DSU clk: 1200 Mhz
645 14:01:53.143708 CPU clk: 1200 MHz
646 14:01:53.148332 Set clk81 to 166.6M
647 14:01:53.153851 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 14:01:53.154369 board id: 1
649 14:01:53.160902 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 14:01:53.171802 fw parse done
651 14:01:53.177776 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 14:01:53.220982 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 14:01:53.232109 PIEI prepare done
654 14:01:53.232676 fastboot data load
655 14:01:53.233135 fastboot data verify
656 14:01:53.237678 verify result: 266
657 14:01:53.243317 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 14:01:53.243859 LPDDR4 probe
659 14:01:53.244378 ddr clk to 1584MHz
660 14:01:53.250392 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 14:01:53.289020
662 14:01:53.289606 dmc_version 0001
663 14:01:53.296127 Check phy result
664 14:01:53.301989 INFO : End of CA training
665 14:01:53.302517 INFO : End of initialization
666 14:01:53.307628 INFO : Training has run successfully!
667 14:01:53.308192 Check phy result
668 14:01:53.313256 INFO : End of initialization
669 14:01:53.313792 INFO : End of read enable training
670 14:01:53.316649 INFO : End of fine write leveling
671 14:01:53.322303 INFO : End of Write leveling coarse delay
672 14:01:53.327791 INFO : Training has run successfully!
673 14:01:53.328369 Check phy result
674 14:01:53.328834 INFO : End of initialization
675 14:01:53.333403 INFO : End of read dq deskew training
676 14:01:53.338957 INFO : End of MPR read delay center optimization
677 14:01:53.339495 INFO : End of write delay center optimization
678 14:01:53.344543 INFO : End of read delay center optimization
679 14:01:53.350163 INFO : End of max read latency training
680 14:01:53.350717 INFO : Training has run successfully!
681 14:01:53.355751 1D training succeed
682 14:01:53.360581 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 14:01:53.409919 Check phy result
684 14:01:53.410552 INFO : End of initialization
685 14:01:53.437391 INFO : End of 2D read delay Voltage center optimization
686 14:01:53.461324 INFO : End of 2D read delay Voltage center optimization
687 14:01:53.518053 INFO : End of 2D write delay Voltage center optimization
688 14:01:53.571916 INFO : End of 2D write delay Voltage center optimization
689 14:01:53.577483 INFO : Training has run successfully!
690 14:01:53.578010
691 14:01:53.578468 channel==0
692 14:01:53.583243 RxClkDly_Margin_A0==88 ps 9
693 14:01:53.583768 TxDqDly_Margin_A0==98 ps 10
694 14:01:53.588662 RxClkDly_Margin_A1==88 ps 9
695 14:01:53.589192 TxDqDly_Margin_A1==98 ps 10
696 14:01:53.589648 TrainedVREFDQ_A0==74
697 14:01:53.594260 TrainedVREFDQ_A1==74
698 14:01:53.594787 VrefDac_Margin_A0==23
699 14:01:53.595235 DeviceVref_Margin_A0==40
700 14:01:53.599891 VrefDac_Margin_A1==23
701 14:01:53.600436 DeviceVref_Margin_A1==40
702 14:01:53.600886
703 14:01:53.601338
704 14:01:53.605465 channel==1
705 14:01:53.605975 RxClkDly_Margin_A0==78 ps 8
706 14:01:53.606418 TxDqDly_Margin_A0==88 ps 9
707 14:01:53.611071 RxClkDly_Margin_A1==78 ps 8
708 14:01:53.611587 TxDqDly_Margin_A1==78 ps 8
709 14:01:53.616737 TrainedVREFDQ_A0==77
710 14:01:53.617307 TrainedVREFDQ_A1==75
711 14:01:53.617784 VrefDac_Margin_A0==22
712 14:01:53.622298 DeviceVref_Margin_A0==37
713 14:01:53.622831 VrefDac_Margin_A1==22
714 14:01:53.627973 DeviceVref_Margin_A1==38
715 14:01:53.628620
716 14:01:53.629152 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 14:01:53.629646
718 14:01:53.661383 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 14:01:53.661819 2D training succeed
720 14:01:53.666930 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 14:01:53.672572 auto size-- 65535DDR cs0 size: 2048MB
722 14:01:53.673056 DDR cs1 size: 2048MB
723 14:01:53.678168 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 14:01:53.678502 cs0 DataBus test pass
725 14:01:53.683766 cs1 DataBus test pass
726 14:01:53.684289 cs0 AddrBus test pass
727 14:01:53.684639 cs1 AddrBus test pass
728 14:01:53.684878
729 14:01:53.689363 100bdlr_step_size ps== 471
730 14:01:53.689700 result report
731 14:01:53.694937 boot times 0Enable ddr reg access
732 14:01:53.700251 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 14:01:53.713884 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 14:01:54.372377 bl2z: ptr: 05129330, size: 00001e40
735 14:01:54.380519 0.0;M3 CHK:0;cm4_sp_mode 0
736 14:01:54.380973 MVN_1=0x00000000
737 14:01:54.381222 MVN_2=0x00000000
738 14:01:54.392031 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 14:01:54.392375 OPS=0x04
740 14:01:54.392594 ring efuse init
741 14:01:54.397634 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 14:01:54.398059 [0.017354 Inits done]
743 14:01:54.398434 secure task start!
744 14:01:54.405514 high task start!
745 14:01:54.405962 low task start!
746 14:01:54.406206 run into bl31
747 14:01:54.414233 NOTICE: BL31: v1.3(release):4fc40b1
748 14:01:54.422031 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 14:01:54.422365 NOTICE: BL31: G12A normal boot!
750 14:01:54.437443 NOTICE: BL31: BL33 decompress pass
751 14:01:54.443247 ERROR: Error initializing runtime service opteed_fast
752 14:01:55.237378
753 14:01:55.237817
754 14:01:55.242713 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 14:01:55.243221
756 14:01:55.246786 Model: Libre Computer AML-S905D3-CC Solitude
757 14:01:55.393120 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 14:01:55.408928 DRAM: 2 GiB (effective 3.8 GiB)
759 14:01:55.509575 Core: 406 devices, 33 uclasses, devicetree: separate
760 14:01:55.515432 WDT: Not starting watchdog@f0d0
761 14:01:55.540491 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 14:01:55.552845 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 14:01:55.557713 ** Bad device specification mmc 0 **
764 14:01:55.567832 Card did not respond to voltage select! : -110
765 14:01:55.575633 ** Bad device specification mmc 0 **
766 14:01:55.576513 Couldn't find partition mmc 0
767 14:01:55.583710 Card did not respond to voltage select! : -110
768 14:01:55.589194 ** Bad device specification mmc 0 **
769 14:01:55.589731 Couldn't find partition mmc 0
770 14:01:55.594193 Error: could not access storage.
771 14:01:55.890695 Net: eth0: ethernet@ff3f0000
772 14:01:55.891329 starting USB...
773 14:01:56.135376 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 14:01:56.136089 Starting the controller
775 14:01:56.142268 USB XHCI 1.10
776 14:01:57.698783 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 14:01:57.707029 scanning usb for storage devices... 0 Storage Device(s) found
779 14:01:57.758709 Hit any key to stop autoboot: 1
780 14:01:57.759703 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 14:01:57.760406 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 14:01:57.760944 Setting prompt string to ['=>']
783 14:01:57.761490 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 14:01:57.774390 0
785 14:01:57.775433 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 14:01:57.876845 => setenv autoload no
788 14:01:57.877655 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 14:01:57.883026 setenv autoload no
791 14:01:57.984651 => setenv initrd_high 0xffffffff
792 14:01:57.985426 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 14:01:57.988812 setenv initrd_high 0xffffffff
795 14:01:58.090385 => setenv fdt_high 0xffffffff
796 14:01:58.091173 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 14:01:58.094700 setenv fdt_high 0xffffffff
799 14:01:58.196315 => dhcp
800 14:01:58.197092 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
801 14:01:58.200448 dhcp
802 14:01:59.207372 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
803 14:01:59.208107 Speed: 1000, full duplex
804 14:01:59.208589 BOOTP broadcast 1
805 14:01:59.234381 DHCP client bound to address 192.168.6.21 (26 ms)
807 14:01:59.336109 => setenv serverip 192.168.6.2
808 14:01:59.336992 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
809 14:01:59.341143 setenv serverip 192.168.6.2
811 14:01:59.442230 => tftpboot 0x01080000 970686/tftp-deploy-yy7ub_20/kernel/uImage
812 14:01:59.443091 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
813 14:01:59.450556 tftpboot 0x01080000 970686/tftp-deploy-yy7ub_20/kernel/uImage
814 14:01:59.451107 Speed: 1000, full duplex
815 14:01:59.451571 Using ethernet@ff3f0000 device
816 14:01:59.456055 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
817 14:01:59.461481 Filename '970686/tftp-deploy-yy7ub_20/kernel/uImage'.
818 14:01:59.465127 Load address: 0x1080000
819 14:02:02.655159 Loading: *################################################## 43.6 MiB
820 14:02:02.655841 14.9 MiB/s
821 14:02:02.656398 done
822 14:02:02.658562 Bytes transferred = 45713984 (2b98a40 hex)
824 14:02:02.760210 => tftpboot 0x08000000 970686/tftp-deploy-yy7ub_20/ramdisk/ramdisk.cpio.gz.uboot
825 14:02:02.761036 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 14:02:02.767801 tftpboot 0x08000000 970686/tftp-deploy-yy7ub_20/ramdisk/ramdisk.cpio.gz.uboot
827 14:02:02.768391 Speed: 1000, full duplex
828 14:02:02.768836 Using ethernet@ff3f0000 device
829 14:02:02.773221 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
830 14:02:02.783030 Filename '970686/tftp-deploy-yy7ub_20/ramdisk/ramdisk.cpio.gz.uboot'.
831 14:02:02.783561 Load address: 0x8000000
832 14:02:04.212863 Loading: *################################################# UDP wrong checksum 00000005 00002467
833 14:02:09.214345 T UDP wrong checksum 00000005 00002467
834 14:02:19.216309 T T UDP wrong checksum 00000005 00002467
835 14:02:39.220396 T T T T UDP wrong checksum 00000005 00002467
836 14:02:59.225251 T T T
837 14:02:59.225717 Retry count exceeded; starting again
839 14:02:59.226665 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
842 14:02:59.227700 end: 2.4 uboot-commands (duration 00:01:21) [common]
844 14:02:59.228695 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
846 14:02:59.229329 end: 2 uboot-action (duration 00:01:21) [common]
848 14:02:59.230223 Cleaning after the job
849 14:02:59.230571 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/ramdisk
850 14:02:59.231615 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/kernel
851 14:02:59.249347 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/dtb
852 14:02:59.250251 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/nfsrootfs
853 14:02:59.310651 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970686/tftp-deploy-yy7ub_20/modules
854 14:02:59.318520 start: 4.1 power-off (timeout 00:00:30) [common]
855 14:02:59.319250 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
856 14:02:59.356548 >> OK - accepted request
857 14:02:59.359123 Returned 0 in 0 seconds
858 14:02:59.460242 end: 4.1 power-off (duration 00:00:00) [common]
860 14:02:59.461340 start: 4.2 read-feedback (timeout 00:10:00) [common]
861 14:02:59.462014 Listened to connection for namespace 'common' for up to 1s
862 14:03:00.462927 Finalising connection for namespace 'common'
863 14:03:00.463405 Disconnecting from shell: Finalise
864 14:03:00.463700 =>
865 14:03:00.564462 end: 4.2 read-feedback (duration 00:00:01) [common]
866 14:03:00.564918 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/970686
867 14:03:03.588155 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/970686
868 14:03:03.588755 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.