Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 13:39:18.700867 lava-dispatcher, installed at version: 2024.01
2 13:39:18.701704 start: 0 validate
3 13:39:18.702184 Start time: 2024-11-10 13:39:18.702153+00:00 (UTC)
4 13:39:18.702744 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 13:39:18.703282 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 13:39:18.738910 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 13:39:18.739460 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 13:39:18.766827 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 13:39:18.767447 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 13:39:18.796238 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 13:39:18.796765 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 13:39:18.826012 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 13:39:18.826528 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 13:39:18.866170 validate duration: 0.16
16 13:39:18.867003 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 13:39:18.867328 start: 1.1 download-retry (timeout 00:10:00) [common]
18 13:39:18.867643 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 13:39:18.868280 Not decompressing ramdisk as can be used compressed.
20 13:39:18.868719 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 13:39:18.868998 saving as /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/ramdisk/initrd.cpio.gz
22 13:39:18.869265 total size: 5628140 (5 MB)
23 13:39:18.902997 progress 0 % (0 MB)
24 13:39:18.907085 progress 5 % (0 MB)
25 13:39:18.911380 progress 10 % (0 MB)
26 13:39:18.915228 progress 15 % (0 MB)
27 13:39:18.919362 progress 20 % (1 MB)
28 13:39:18.923262 progress 25 % (1 MB)
29 13:39:18.927322 progress 30 % (1 MB)
30 13:39:18.931412 progress 35 % (1 MB)
31 13:39:18.935061 progress 40 % (2 MB)
32 13:39:18.939036 progress 45 % (2 MB)
33 13:39:18.942692 progress 50 % (2 MB)
34 13:39:18.946856 progress 55 % (2 MB)
35 13:39:18.950887 progress 60 % (3 MB)
36 13:39:18.954765 progress 65 % (3 MB)
37 13:39:18.958840 progress 70 % (3 MB)
38 13:39:18.962511 progress 75 % (4 MB)
39 13:39:18.966598 progress 80 % (4 MB)
40 13:39:18.970247 progress 85 % (4 MB)
41 13:39:18.974174 progress 90 % (4 MB)
42 13:39:18.978148 progress 95 % (5 MB)
43 13:39:18.981479 progress 100 % (5 MB)
44 13:39:18.982140 5 MB downloaded in 0.11 s (47.56 MB/s)
45 13:39:18.982678 end: 1.1.1 http-download (duration 00:00:00) [common]
47 13:39:18.983551 end: 1.1 download-retry (duration 00:00:00) [common]
48 13:39:18.983836 start: 1.2 download-retry (timeout 00:10:00) [common]
49 13:39:18.984129 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 13:39:18.984629 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/kernel/Image
51 13:39:18.984877 saving as /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/kernel/Image
52 13:39:18.985085 total size: 45713920 (43 MB)
53 13:39:18.985296 No compression specified
54 13:39:19.030769 progress 0 % (0 MB)
55 13:39:19.059921 progress 5 % (2 MB)
56 13:39:19.088141 progress 10 % (4 MB)
57 13:39:19.116234 progress 15 % (6 MB)
58 13:39:19.144665 progress 20 % (8 MB)
59 13:39:19.172035 progress 25 % (10 MB)
60 13:39:19.199637 progress 30 % (13 MB)
61 13:39:19.227314 progress 35 % (15 MB)
62 13:39:19.255339 progress 40 % (17 MB)
63 13:39:19.282671 progress 45 % (19 MB)
64 13:39:19.310372 progress 50 % (21 MB)
65 13:39:19.338370 progress 55 % (24 MB)
66 13:39:19.365973 progress 60 % (26 MB)
67 13:39:19.393303 progress 65 % (28 MB)
68 13:39:19.421266 progress 70 % (30 MB)
69 13:39:19.449800 progress 75 % (32 MB)
70 13:39:19.478193 progress 80 % (34 MB)
71 13:39:19.505812 progress 85 % (37 MB)
72 13:39:19.534219 progress 90 % (39 MB)
73 13:39:19.562075 progress 95 % (41 MB)
74 13:39:19.589190 progress 100 % (43 MB)
75 13:39:19.589756 43 MB downloaded in 0.60 s (72.10 MB/s)
76 13:39:19.590227 end: 1.2.1 http-download (duration 00:00:01) [common]
78 13:39:19.591046 end: 1.2 download-retry (duration 00:00:01) [common]
79 13:39:19.591316 start: 1.3 download-retry (timeout 00:09:59) [common]
80 13:39:19.591581 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 13:39:19.592070 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 13:39:19.592347 saving as /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/dtb/meson-g12b-a311d-libretech-cc.dtb
83 13:39:19.592555 total size: 54703 (0 MB)
84 13:39:19.592763 No compression specified
85 13:39:19.635290 progress 59 % (0 MB)
86 13:39:19.636167 progress 100 % (0 MB)
87 13:39:19.636731 0 MB downloaded in 0.04 s (1.18 MB/s)
88 13:39:19.637217 end: 1.3.1 http-download (duration 00:00:00) [common]
90 13:39:19.638029 end: 1.3 download-retry (duration 00:00:00) [common]
91 13:39:19.638289 start: 1.4 download-retry (timeout 00:09:59) [common]
92 13:39:19.638550 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 13:39:19.639123 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 13:39:19.639434 saving as /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/nfsrootfs/full.rootfs.tar
95 13:39:19.639677 total size: 474398908 (452 MB)
96 13:39:19.639911 Using unxz to decompress xz
97 13:39:19.680582 progress 0 % (0 MB)
98 13:39:20.782873 progress 5 % (22 MB)
99 13:39:22.230697 progress 10 % (45 MB)
100 13:39:22.662728 progress 15 % (67 MB)
101 13:39:23.426343 progress 20 % (90 MB)
102 13:39:23.941539 progress 25 % (113 MB)
103 13:39:24.298300 progress 30 % (135 MB)
104 13:39:24.904917 progress 35 % (158 MB)
105 13:39:25.761906 progress 40 % (181 MB)
106 13:39:26.500410 progress 45 % (203 MB)
107 13:39:27.078285 progress 50 % (226 MB)
108 13:39:27.710220 progress 55 % (248 MB)
109 13:39:28.903655 progress 60 % (271 MB)
110 13:39:30.306234 progress 65 % (294 MB)
111 13:39:31.882748 progress 70 % (316 MB)
112 13:39:34.964575 progress 75 % (339 MB)
113 13:39:37.405547 progress 80 % (361 MB)
114 13:39:40.357196 progress 85 % (384 MB)
115 13:39:43.702646 progress 90 % (407 MB)
116 13:39:46.985351 progress 95 % (429 MB)
117 13:39:50.210367 progress 100 % (452 MB)
118 13:39:50.223579 452 MB downloaded in 30.58 s (14.79 MB/s)
119 13:39:50.224333 end: 1.4.1 http-download (duration 00:00:31) [common]
121 13:39:50.225923 end: 1.4 download-retry (duration 00:00:31) [common]
122 13:39:50.226428 start: 1.5 download-retry (timeout 00:09:29) [common]
123 13:39:50.226932 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 13:39:50.227722 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/modules.tar.xz
125 13:39:50.228217 saving as /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/modules/modules.tar
126 13:39:50.228618 total size: 11611892 (11 MB)
127 13:39:50.229026 Using unxz to decompress xz
128 13:39:50.271581 progress 0 % (0 MB)
129 13:39:50.338024 progress 5 % (0 MB)
130 13:39:50.412300 progress 10 % (1 MB)
131 13:39:50.511484 progress 15 % (1 MB)
132 13:39:50.607754 progress 20 % (2 MB)
133 13:39:50.686760 progress 25 % (2 MB)
134 13:39:50.762623 progress 30 % (3 MB)
135 13:39:50.840983 progress 35 % (3 MB)
136 13:39:50.913266 progress 40 % (4 MB)
137 13:39:50.989299 progress 45 % (5 MB)
138 13:39:51.073544 progress 50 % (5 MB)
139 13:39:51.150567 progress 55 % (6 MB)
140 13:39:51.237879 progress 60 % (6 MB)
141 13:39:51.320188 progress 65 % (7 MB)
142 13:39:51.402438 progress 70 % (7 MB)
143 13:39:51.480650 progress 75 % (8 MB)
144 13:39:51.564947 progress 80 % (8 MB)
145 13:39:51.648133 progress 85 % (9 MB)
146 13:39:51.727130 progress 90 % (9 MB)
147 13:39:51.805564 progress 95 % (10 MB)
148 13:39:51.883673 progress 100 % (11 MB)
149 13:39:51.895517 11 MB downloaded in 1.67 s (6.64 MB/s)
150 13:39:51.896197 end: 1.5.1 http-download (duration 00:00:02) [common]
152 13:39:51.897959 end: 1.5 download-retry (duration 00:00:02) [common]
153 13:39:51.898528 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 13:39:51.899094 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 13:40:08.103354 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/970649/extract-nfsrootfs-ig4wedgf
156 13:40:08.103951 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 13:40:08.104264 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 13:40:08.105083 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353
159 13:40:08.105568 makedir: /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin
160 13:40:08.105896 makedir: /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/tests
161 13:40:08.106213 makedir: /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/results
162 13:40:08.106541 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-add-keys
163 13:40:08.107075 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-add-sources
164 13:40:08.107598 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-background-process-start
165 13:40:08.108137 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-background-process-stop
166 13:40:08.108682 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-common-functions
167 13:40:08.109179 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-echo-ipv4
168 13:40:08.109662 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-install-packages
169 13:40:08.110146 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-installed-packages
170 13:40:08.110617 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-os-build
171 13:40:08.111098 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-probe-channel
172 13:40:08.111608 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-probe-ip
173 13:40:08.112241 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-target-ip
174 13:40:08.112762 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-target-mac
175 13:40:08.113244 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-target-storage
176 13:40:08.113729 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-test-case
177 13:40:08.114209 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-test-event
178 13:40:08.114684 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-test-feedback
179 13:40:08.115204 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-test-raise
180 13:40:08.115692 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-test-reference
181 13:40:08.116195 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-test-runner
182 13:40:08.116685 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-test-set
183 13:40:08.117153 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-test-shell
184 13:40:08.117635 Updating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-install-packages (oe)
185 13:40:08.118166 Updating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/bin/lava-installed-packages (oe)
186 13:40:08.118604 Creating /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/environment
187 13:40:08.118972 LAVA metadata
188 13:40:08.119227 - LAVA_JOB_ID=970649
189 13:40:08.119442 - LAVA_DISPATCHER_IP=192.168.6.2
190 13:40:08.119793 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 13:40:08.120784 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 13:40:08.121098 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 13:40:08.121307 skipped lava-vland-overlay
194 13:40:08.121547 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 13:40:08.121799 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 13:40:08.122016 skipped lava-multinode-overlay
197 13:40:08.122253 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 13:40:08.122504 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 13:40:08.122753 Loading test definitions
200 13:40:08.123028 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 13:40:08.123247 Using /lava-970649 at stage 0
202 13:40:08.124411 uuid=970649_1.6.2.4.1 testdef=None
203 13:40:08.124720 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 13:40:08.124984 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 13:40:08.126685 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 13:40:08.127471 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 13:40:08.129629 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 13:40:08.130457 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 13:40:08.132541 runner path: /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 970649_1.6.2.4.1
212 13:40:08.133087 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 13:40:08.133838 Creating lava-test-runner.conf files
215 13:40:08.134038 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/970649/lava-overlay-m1zml353/lava-970649/0 for stage 0
216 13:40:08.134368 - 0_v4l2-decoder-conformance-h264
217 13:40:08.134704 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 13:40:08.134973 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 13:40:08.156595 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 13:40:08.156979 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 13:40:08.157234 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 13:40:08.157500 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 13:40:08.157763 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 13:40:08.779929 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 13:40:08.780428 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 13:40:08.780679 extracting modules file /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970649/extract-nfsrootfs-ig4wedgf
227 13:40:10.172116 extracting modules file /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970649/extract-overlay-ramdisk-zuroh0dn/ramdisk
228 13:40:11.585527 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 13:40:11.586003 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 13:40:11.586281 [common] Applying overlay to NFS
231 13:40:11.586496 [common] Applying overlay /var/lib/lava/dispatcher/tmp/970649/compress-overlay-qv70bcrv/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/970649/extract-nfsrootfs-ig4wedgf
232 13:40:11.616370 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 13:40:11.616797 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 13:40:11.617070 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 13:40:11.617300 Converting downloaded kernel to a uImage
236 13:40:11.617613 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/kernel/Image /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/kernel/uImage
237 13:40:12.094283 output: Image Name:
238 13:40:12.094698 output: Created: Sun Nov 10 13:40:11 2024
239 13:40:12.094911 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 13:40:12.095116 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 13:40:12.095320 output: Load Address: 01080000
242 13:40:12.095518 output: Entry Point: 01080000
243 13:40:12.095717 output:
244 13:40:12.096086 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 13:40:12.096365 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 13:40:12.096636 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 13:40:12.096891 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 13:40:12.097149 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 13:40:12.097410 Building ramdisk /var/lib/lava/dispatcher/tmp/970649/extract-overlay-ramdisk-zuroh0dn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/970649/extract-overlay-ramdisk-zuroh0dn/ramdisk
250 13:40:14.236541 >> 166827 blocks
251 13:40:21.943333 Adding RAMdisk u-boot header.
252 13:40:21.943785 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/970649/extract-overlay-ramdisk-zuroh0dn/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/970649/extract-overlay-ramdisk-zuroh0dn/ramdisk.cpio.gz.uboot
253 13:40:22.197068 output: Image Name:
254 13:40:22.197495 output: Created: Sun Nov 10 13:40:21 2024
255 13:40:22.197710 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 13:40:22.197917 output: Data Size: 23436283 Bytes = 22887.00 KiB = 22.35 MiB
257 13:40:22.198120 output: Load Address: 00000000
258 13:40:22.198319 output: Entry Point: 00000000
259 13:40:22.198517 output:
260 13:40:22.199184 rename /var/lib/lava/dispatcher/tmp/970649/extract-overlay-ramdisk-zuroh0dn/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/ramdisk/ramdisk.cpio.gz.uboot
261 13:40:22.199606 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 13:40:22.199894 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 13:40:22.200518 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 13:40:22.201044 No LXC device requested
265 13:40:22.201602 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 13:40:22.202164 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 13:40:22.202711 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 13:40:22.203167 Checking files for TFTP limit of 4294967296 bytes.
269 13:40:22.206117 end: 1 tftp-deploy (duration 00:01:03) [common]
270 13:40:22.206749 start: 2 uboot-action (timeout 00:05:00) [common]
271 13:40:22.207325 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 13:40:22.207871 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 13:40:22.208460 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 13:40:22.209034 Using kernel file from prepare-kernel: 970649/tftp-deploy-4snw433d/kernel/uImage
275 13:40:22.209721 substitutions:
276 13:40:22.210165 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 13:40:22.210609 - {DTB_ADDR}: 0x01070000
278 13:40:22.211048 - {DTB}: 970649/tftp-deploy-4snw433d/dtb/meson-g12b-a311d-libretech-cc.dtb
279 13:40:22.211489 - {INITRD}: 970649/tftp-deploy-4snw433d/ramdisk/ramdisk.cpio.gz.uboot
280 13:40:22.211926 - {KERNEL_ADDR}: 0x01080000
281 13:40:22.212225 - {KERNEL}: 970649/tftp-deploy-4snw433d/kernel/uImage
282 13:40:22.212426 - {LAVA_MAC}: None
283 13:40:22.212647 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/970649/extract-nfsrootfs-ig4wedgf
284 13:40:22.212848 - {NFS_SERVER_IP}: 192.168.6.2
285 13:40:22.213111 - {PRESEED_CONFIG}: None
286 13:40:22.213548 - {PRESEED_LOCAL}: None
287 13:40:22.213981 - {RAMDISK_ADDR}: 0x08000000
288 13:40:22.214425 - {RAMDISK}: 970649/tftp-deploy-4snw433d/ramdisk/ramdisk.cpio.gz.uboot
289 13:40:22.214852 - {ROOT_PART}: None
290 13:40:22.215279 - {ROOT}: None
291 13:40:22.215704 - {SERVER_IP}: 192.168.6.2
292 13:40:22.216161 - {TEE_ADDR}: 0x83000000
293 13:40:22.216591 - {TEE}: None
294 13:40:22.217020 Parsed boot commands:
295 13:40:22.217440 - setenv autoload no
296 13:40:22.217867 - setenv initrd_high 0xffffffff
297 13:40:22.218294 - setenv fdt_high 0xffffffff
298 13:40:22.218717 - dhcp
299 13:40:22.219143 - setenv serverip 192.168.6.2
300 13:40:22.219565 - tftpboot 0x01080000 970649/tftp-deploy-4snw433d/kernel/uImage
301 13:40:22.220014 - tftpboot 0x08000000 970649/tftp-deploy-4snw433d/ramdisk/ramdisk.cpio.gz.uboot
302 13:40:22.220447 - tftpboot 0x01070000 970649/tftp-deploy-4snw433d/dtb/meson-g12b-a311d-libretech-cc.dtb
303 13:40:22.220876 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/970649/extract-nfsrootfs-ig4wedgf,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 13:40:22.221318 - bootm 0x01080000 0x08000000 0x01070000
305 13:40:22.221856 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 13:40:22.223487 start: 2.3 connect-device (timeout 00:05:00) [common]
308 13:40:22.223946 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 13:40:22.240166 Setting prompt string to ['lava-test: # ']
310 13:40:22.241805 end: 2.3 connect-device (duration 00:00:00) [common]
311 13:40:22.242456 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 13:40:22.243063 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 13:40:22.243635 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 13:40:22.244914 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 13:40:22.283117 >> OK - accepted request
316 13:40:22.285614 Returned 0 in 0 seconds
317 13:40:22.386888 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 13:40:22.388830 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 13:40:22.389462 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 13:40:22.390045 Setting prompt string to ['Hit any key to stop autoboot']
322 13:40:22.390553 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 13:40:22.392296 Trying 192.168.56.21...
324 13:40:22.392829 Connected to conserv1.
325 13:40:22.393292 Escape character is '^]'.
326 13:40:22.393751
327 13:40:22.394212 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 13:40:22.394664
329 13:40:34.012724 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 13:40:34.013146 bl2_stage_init 0x01
331 13:40:34.013373 bl2_stage_init 0x81
332 13:40:34.018230 hw id: 0x0000 - pwm id 0x01
333 13:40:34.018547 bl2_stage_init 0xc1
334 13:40:34.018760 bl2_stage_init 0x02
335 13:40:34.018960
336 13:40:34.023809 L0:00000000
337 13:40:34.024137 L1:20000703
338 13:40:34.024341 L2:00008067
339 13:40:34.024542 L3:14000000
340 13:40:34.029354 B2:00402000
341 13:40:34.029601 B1:e0f83180
342 13:40:34.029799
343 13:40:34.029996 TE: 58124
344 13:40:34.030191
345 13:40:34.035014 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 13:40:34.035254
347 13:40:34.035456 Board ID = 1
348 13:40:34.040555 Set A53 clk to 24M
349 13:40:34.041049 Set A73 clk to 24M
350 13:40:34.041483 Set clk81 to 24M
351 13:40:34.046225 A53 clk: 1200 MHz
352 13:40:34.046696 A73 clk: 1200 MHz
353 13:40:34.047126 CLK81: 166.6M
354 13:40:34.047406 smccc: 00012a91
355 13:40:34.051824 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 13:40:34.057338 board id: 1
357 13:40:34.063113 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 13:40:34.073820 fw parse done
359 13:40:34.079883 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 13:40:34.122468 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 13:40:34.133399 PIEI prepare done
362 13:40:34.133778 fastboot data load
363 13:40:34.134024 fastboot data verify
364 13:40:34.139128 verify result: 266
365 13:40:34.144624 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 13:40:34.145134 LPDDR4 probe
367 13:40:34.145540 ddr clk to 1584MHz
368 13:40:34.152604 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 13:40:34.189963
370 13:40:34.190528 dmc_version 0001
371 13:40:34.196699 Check phy result
372 13:40:34.202532 INFO : End of CA training
373 13:40:34.203056 INFO : End of initialization
374 13:40:34.208144 INFO : Training has run successfully!
375 13:40:34.208655 Check phy result
376 13:40:34.213673 INFO : End of initialization
377 13:40:34.214168 INFO : End of read enable training
378 13:40:34.219284 INFO : End of fine write leveling
379 13:40:34.224897 INFO : End of Write leveling coarse delay
380 13:40:34.225393 INFO : Training has run successfully!
381 13:40:34.225797 Check phy result
382 13:40:34.230470 INFO : End of initialization
383 13:40:34.230961 INFO : End of read dq deskew training
384 13:40:34.236097 INFO : End of MPR read delay center optimization
385 13:40:34.241678 INFO : End of write delay center optimization
386 13:40:34.247250 INFO : End of read delay center optimization
387 13:40:34.247738 INFO : End of max read latency training
388 13:40:34.252860 INFO : Training has run successfully!
389 13:40:34.253345 1D training succeed
390 13:40:34.262058 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 13:40:34.309657 Check phy result
392 13:40:34.310222 INFO : End of initialization
393 13:40:34.332341 INFO : End of 2D read delay Voltage center optimization
394 13:40:34.352518 INFO : End of 2D read delay Voltage center optimization
395 13:40:34.404652 INFO : End of 2D write delay Voltage center optimization
396 13:40:34.453981 INFO : End of 2D write delay Voltage center optimization
397 13:40:34.459545 INFO : Training has run successfully!
398 13:40:34.460067
399 13:40:34.460486 channel==0
400 13:40:34.465094 RxClkDly_Margin_A0==88 ps 9
401 13:40:34.465563 TxDqDly_Margin_A0==98 ps 10
402 13:40:34.470688 RxClkDly_Margin_A1==88 ps 9
403 13:40:34.471161 TxDqDly_Margin_A1==98 ps 10
404 13:40:34.471563 TrainedVREFDQ_A0==74
405 13:40:34.476272 TrainedVREFDQ_A1==74
406 13:40:34.476748 VrefDac_Margin_A0==25
407 13:40:34.477148 DeviceVref_Margin_A0==40
408 13:40:34.481900 VrefDac_Margin_A1==25
409 13:40:34.482382 DeviceVref_Margin_A1==40
410 13:40:34.482799
411 13:40:34.483205
412 13:40:34.487484 channel==1
413 13:40:34.487959 RxClkDly_Margin_A0==98 ps 10
414 13:40:34.488416 TxDqDly_Margin_A0==88 ps 9
415 13:40:34.493001 RxClkDly_Margin_A1==88 ps 9
416 13:40:34.493473 TxDqDly_Margin_A1==88 ps 9
417 13:40:34.498672 TrainedVREFDQ_A0==75
418 13:40:34.499009 TrainedVREFDQ_A1==77
419 13:40:34.499252 VrefDac_Margin_A0==22
420 13:40:34.504250 DeviceVref_Margin_A0==39
421 13:40:34.504715 VrefDac_Margin_A1==24
422 13:40:34.509792 DeviceVref_Margin_A1==37
423 13:40:34.510247
424 13:40:34.510621 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 13:40:34.510981
426 13:40:34.543399 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000019 00000017 00000017 00000016 00000018 00000016 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 13:40:34.543866 2D training succeed
428 13:40:34.548990 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 13:40:34.554570 auto size-- 65535DDR cs0 size: 2048MB
430 13:40:34.554900 DDR cs1 size: 2048MB
431 13:40:34.560214 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 13:40:34.560671 cs0 DataBus test pass
433 13:40:34.565740 cs1 DataBus test pass
434 13:40:34.566060 cs0 AddrBus test pass
435 13:40:34.566294 cs1 AddrBus test pass
436 13:40:34.566537
437 13:40:34.571601 100bdlr_step_size ps== 420
438 13:40:34.572022 result report
439 13:40:34.576940 boot times 0Enable ddr reg access
440 13:40:34.582239 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 13:40:34.595672 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 13:40:35.169364 0.0;M3 CHK:0;cm4_sp_mode 0
443 13:40:35.170000 MVN_1=0x00000000
444 13:40:35.174816 MVN_2=0x00000000
445 13:40:35.180623 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 13:40:35.181111 OPS=0x10
447 13:40:35.181588 ring efuse init
448 13:40:35.182026 chipver efuse init
449 13:40:35.186260 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 13:40:35.191798 [0.018961 Inits done]
451 13:40:35.192153 secure task start!
452 13:40:35.192386 high task start!
453 13:40:35.196426 low task start!
454 13:40:35.196749 run into bl31
455 13:40:35.203061 NOTICE: BL31: v1.3(release):4fc40b1
456 13:40:35.210850 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 13:40:35.211367 NOTICE: BL31: G12A normal boot!
458 13:40:35.236818 NOTICE: BL31: BL33 decompress pass
459 13:40:35.242493 ERROR: Error initializing runtime service opteed_fast
460 13:40:36.475332
461 13:40:36.475760
462 13:40:36.483678 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 13:40:36.484011
464 13:40:36.484254 Model: Libre Computer AML-A311D-CC Alta
465 13:40:36.692166 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 13:40:36.715578 DRAM: 2 GiB (effective 3.8 GiB)
467 13:40:36.858517 Core: 408 devices, 31 uclasses, devicetree: separate
468 13:40:36.864313 WDT: Not starting watchdog@f0d0
469 13:40:36.896581 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 13:40:36.909017 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 13:40:36.913999 ** Bad device specification mmc 0 **
472 13:40:36.924371 Card did not respond to voltage select! : -110
473 13:40:36.931994 ** Bad device specification mmc 0 **
474 13:40:36.932294 Couldn't find partition mmc 0
475 13:40:36.940380 Card did not respond to voltage select! : -110
476 13:40:36.945859 ** Bad device specification mmc 0 **
477 13:40:36.946260 Couldn't find partition mmc 0
478 13:40:36.950900 Error: could not access storage.
479 13:40:38.213692 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 13:40:38.214125 bl2_stage_init 0x01
481 13:40:38.214352 bl2_stage_init 0x81
482 13:40:38.219258 hw id: 0x0000 - pwm id 0x01
483 13:40:38.219606 bl2_stage_init 0xc1
484 13:40:38.219825 bl2_stage_init 0x02
485 13:40:38.220085
486 13:40:38.224808 L0:00000000
487 13:40:38.225126 L1:20000703
488 13:40:38.225344 L2:00008067
489 13:40:38.225546 L3:14000000
490 13:40:38.230456 B2:00402000
491 13:40:38.230802 B1:e0f83180
492 13:40:38.231018
493 13:40:38.231225 TE: 58124
494 13:40:38.231444
495 13:40:38.236051 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 13:40:38.236379
497 13:40:38.236594 Board ID = 1
498 13:40:38.241664 Set A53 clk to 24M
499 13:40:38.242031 Set A73 clk to 24M
500 13:40:38.242246 Set clk81 to 24M
501 13:40:38.247238 A53 clk: 1200 MHz
502 13:40:38.247584 A73 clk: 1200 MHz
503 13:40:38.247801 CLK81: 166.6M
504 13:40:38.248037 smccc: 00012a91
505 13:40:38.252835 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 13:40:38.258466 board id: 1
507 13:40:38.264305 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 13:40:38.274964 fw parse done
509 13:40:38.281000 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 13:40:38.323512 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 13:40:38.334530 PIEI prepare done
512 13:40:38.334906 fastboot data load
513 13:40:38.335126 fastboot data verify
514 13:40:38.340395 verify result: 266
515 13:40:38.345823 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 13:40:38.346282 LPDDR4 probe
517 13:40:38.346624 ddr clk to 1584MHz
518 13:40:38.353824 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 13:40:38.391095
520 13:40:38.391517 dmc_version 0001
521 13:40:38.399419 Check phy result
522 13:40:38.403751 INFO : End of CA training
523 13:40:38.404131 INFO : End of initialization
524 13:40:38.409102 INFO : Training has run successfully!
525 13:40:38.409417 Check phy result
526 13:40:38.414895 INFO : End of initialization
527 13:40:38.415216 INFO : End of read enable training
528 13:40:38.420313 INFO : End of fine write leveling
529 13:40:38.425895 INFO : End of Write leveling coarse delay
530 13:40:38.426369 INFO : Training has run successfully!
531 13:40:38.426619 Check phy result
532 13:40:38.431503 INFO : End of initialization
533 13:40:38.431820 INFO : End of read dq deskew training
534 13:40:38.437008 INFO : End of MPR read delay center optimization
535 13:40:38.442896 INFO : End of write delay center optimization
536 13:40:38.448380 INFO : End of read delay center optimization
537 13:40:38.448721 INFO : End of max read latency training
538 13:40:38.454628 INFO : Training has run successfully!
539 13:40:38.455015 1D training succeed
540 13:40:38.465006 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 13:40:38.512327 Check phy result
542 13:40:38.512895 INFO : End of initialization
543 13:40:38.534182 INFO : End of 2D read delay Voltage center optimization
544 13:40:38.551859 INFO : End of 2D read delay Voltage center optimization
545 13:40:38.606447 INFO : End of 2D write delay Voltage center optimization
546 13:40:38.654718 INFO : End of 2D write delay Voltage center optimization
547 13:40:38.659554 INFO : Training has run successfully!
548 13:40:38.659898
549 13:40:38.660923 channel==0
550 13:40:38.665165 RxClkDly_Margin_A0==88 ps 9
551 13:40:38.666308 TxDqDly_Margin_A0==98 ps 10
552 13:40:38.670747 RxClkDly_Margin_A1==88 ps 9
553 13:40:38.671081 TxDqDly_Margin_A1==98 ps 10
554 13:40:38.672135 TrainedVREFDQ_A0==74
555 13:40:38.676334 TrainedVREFDQ_A1==74
556 13:40:38.676675 VrefDac_Margin_A0==25
557 13:40:38.676911 DeviceVref_Margin_A0==40
558 13:40:38.681959 VrefDac_Margin_A1==25
559 13:40:38.682928 DeviceVref_Margin_A1==40
560 13:40:38.683178
561 13:40:38.683753
562 13:40:38.687532 channel==1
563 13:40:38.687850 RxClkDly_Margin_A0==88 ps 9
564 13:40:38.688108 TxDqDly_Margin_A0==88 ps 9
565 13:40:38.693207 RxClkDly_Margin_A1==88 ps 9
566 13:40:38.693905 TxDqDly_Margin_A1==88 ps 9
567 13:40:38.698809 TrainedVREFDQ_A0==75
568 13:40:38.699163 TrainedVREFDQ_A1==77
569 13:40:38.699391 VrefDac_Margin_A0==22
570 13:40:38.704438 DeviceVref_Margin_A0==38
571 13:40:38.704923 VrefDac_Margin_A1==24
572 13:40:38.710223 DeviceVref_Margin_A1==37
573 13:40:38.710560
574 13:40:38.710782 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 13:40:38.710991
576 13:40:38.743551 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 13:40:38.743943 2D training succeed
578 13:40:38.749139 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 13:40:38.754789 auto size-- 65535DDR cs0 size: 2048MB
580 13:40:38.755099 DDR cs1 size: 2048MB
581 13:40:38.760365 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 13:40:38.760663 cs0 DataBus test pass
583 13:40:38.768563 cs1 DataBus test pass
584 13:40:38.768898 cs0 AddrBus test pass
585 13:40:38.769109 cs1 AddrBus test pass
586 13:40:38.769315
587 13:40:38.771571 100bdlr_step_size ps== 420
588 13:40:38.771898 result report
589 13:40:38.777160 boot times 0Enable ddr reg access
590 13:40:38.783561 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 13:40:38.796524 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 13:40:39.369601 0.0;M3 CHK:0;cm4_sp_mode 0
593 13:40:39.370036 MVN_1=0x00000000
594 13:40:39.375087 MVN_2=0x00000000
595 13:40:39.380863 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 13:40:39.381233 OPS=0x10
597 13:40:39.381451 ring efuse init
598 13:40:39.381665 chipver efuse init
599 13:40:39.386826 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 13:40:39.391956 [0.018961 Inits done]
601 13:40:39.392520 secure task start!
602 13:40:39.392966 high task start!
603 13:40:39.396581 low task start!
604 13:40:39.397065 run into bl31
605 13:40:39.403325 NOTICE: BL31: v1.3(release):4fc40b1
606 13:40:39.411577 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 13:40:39.412295 NOTICE: BL31: G12A normal boot!
608 13:40:39.436500 NOTICE: BL31: BL33 decompress pass
609 13:40:39.442203 ERROR: Error initializing runtime service opteed_fast
610 13:40:40.675236
611 13:40:40.675885
612 13:40:40.683556 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 13:40:40.684100
614 13:40:40.684555 Model: Libre Computer AML-A311D-CC Alta
615 13:40:40.891974 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 13:40:40.915380 DRAM: 2 GiB (effective 3.8 GiB)
617 13:40:41.058480 Core: 408 devices, 31 uclasses, devicetree: separate
618 13:40:41.064350 WDT: Not starting watchdog@f0d0
619 13:40:41.096611 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 13:40:41.108951 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 13:40:41.113986 ** Bad device specification mmc 0 **
622 13:40:41.124369 Card did not respond to voltage select! : -110
623 13:40:41.132024 ** Bad device specification mmc 0 **
624 13:40:41.132573 Couldn't find partition mmc 0
625 13:40:41.140362 Card did not respond to voltage select! : -110
626 13:40:41.145735 ** Bad device specification mmc 0 **
627 13:40:41.146268 Couldn't find partition mmc 0
628 13:40:41.150871 Error: could not access storage.
629 13:40:41.494426 Net: eth0: ethernet@ff3f0000
630 13:40:41.495084 starting USB...
631 13:40:41.746150 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 13:40:41.746793 Starting the controller
633 13:40:41.753164 USB XHCI 1.10
634 13:40:43.464705 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 13:40:43.465286 bl2_stage_init 0x01
636 13:40:43.465757 bl2_stage_init 0x81
637 13:40:43.470201 hw id: 0x0000 - pwm id 0x01
638 13:40:43.470884 bl2_stage_init 0xc1
639 13:40:43.471503 bl2_stage_init 0x02
640 13:40:43.472193
641 13:40:43.475798 L0:00000000
642 13:40:43.476233 L1:20000703
643 13:40:43.476496 L2:00008067
644 13:40:43.476886 L3:14000000
645 13:40:43.481479 B2:00402000
646 13:40:43.482090 B1:e0f83180
647 13:40:43.482543
648 13:40:43.482982 TE: 58124
649 13:40:43.483425
650 13:40:43.487064 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 13:40:43.487680
652 13:40:43.488176 Board ID = 1
653 13:40:43.492952 Set A53 clk to 24M
654 13:40:43.493404 Set A73 clk to 24M
655 13:40:43.493647 Set clk81 to 24M
656 13:40:43.498259 A53 clk: 1200 MHz
657 13:40:43.498623 A73 clk: 1200 MHz
658 13:40:43.498850 CLK81: 166.6M
659 13:40:43.499072 smccc: 00012a92
660 13:40:43.503782 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 13:40:43.509402 board id: 1
662 13:40:43.515301 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 13:40:43.525945 fw parse done
664 13:40:43.532028 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 13:40:43.574530 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 13:40:43.585414 PIEI prepare done
667 13:40:43.585950 fastboot data load
668 13:40:43.586275 fastboot data verify
669 13:40:43.591035 verify result: 266
670 13:40:43.596567 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 13:40:43.597275 LPDDR4 probe
672 13:40:43.597853 ddr clk to 1584MHz
673 13:40:43.604539 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 13:40:43.641836
675 13:40:43.642666 dmc_version 0001
676 13:40:43.648520 Check phy result
677 13:40:43.654411 INFO : End of CA training
678 13:40:43.654934 INFO : End of initialization
679 13:40:43.659888 INFO : Training has run successfully!
680 13:40:43.660389 Check phy result
681 13:40:43.665555 INFO : End of initialization
682 13:40:43.666076 INFO : End of read enable training
683 13:40:43.671112 INFO : End of fine write leveling
684 13:40:43.676711 INFO : End of Write leveling coarse delay
685 13:40:43.677172 INFO : Training has run successfully!
686 13:40:43.677463 Check phy result
687 13:40:43.682476 INFO : End of initialization
688 13:40:43.683128 INFO : End of read dq deskew training
689 13:40:43.687888 INFO : End of MPR read delay center optimization
690 13:40:43.693587 INFO : End of write delay center optimization
691 13:40:43.699160 INFO : End of read delay center optimization
692 13:40:43.699662 INFO : End of max read latency training
693 13:40:43.704742 INFO : Training has run successfully!
694 13:40:43.705233 1D training succeed
695 13:40:43.713921 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 13:40:43.760564 Check phy result
697 13:40:43.760952 INFO : End of initialization
698 13:40:43.783050 INFO : End of 2D read delay Voltage center optimization
699 13:40:43.804076 INFO : End of 2D read delay Voltage center optimization
700 13:40:43.855969 INFO : End of 2D write delay Voltage center optimization
701 13:40:43.905250 INFO : End of 2D write delay Voltage center optimization
702 13:40:43.910798 INFO : Training has run successfully!
703 13:40:43.911110
704 13:40:43.911334 channel==0
705 13:40:43.916402 RxClkDly_Margin_A0==88 ps 9
706 13:40:43.916733 TxDqDly_Margin_A0==98 ps 10
707 13:40:43.921963 RxClkDly_Margin_A1==78 ps 8
708 13:40:43.922270 TxDqDly_Margin_A1==98 ps 10
709 13:40:43.922499 TrainedVREFDQ_A0==74
710 13:40:43.927566 TrainedVREFDQ_A1==74
711 13:40:43.927876 VrefDac_Margin_A0==24
712 13:40:43.928206 DeviceVref_Margin_A0==40
713 13:40:43.933166 VrefDac_Margin_A1==26
714 13:40:43.933483 DeviceVref_Margin_A1==40
715 13:40:43.933705
716 13:40:43.933920
717 13:40:43.938769 channel==1
718 13:40:43.939068 RxClkDly_Margin_A0==98 ps 10
719 13:40:43.939284 TxDqDly_Margin_A0==88 ps 9
720 13:40:43.944447 RxClkDly_Margin_A1==98 ps 10
721 13:40:43.944773 TxDqDly_Margin_A1==88 ps 9
722 13:40:43.950007 TrainedVREFDQ_A0==76
723 13:40:43.950334 TrainedVREFDQ_A1==77
724 13:40:43.950559 VrefDac_Margin_A0==22
725 13:40:43.955626 DeviceVref_Margin_A0==38
726 13:40:43.955933 VrefDac_Margin_A1==24
727 13:40:43.961235 DeviceVref_Margin_A1==37
728 13:40:43.961539
729 13:40:43.961763 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 13:40:43.961976
731 13:40:43.994933 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 13:40:43.995364 2D training succeed
733 13:40:44.000464 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 13:40:44.005976 auto size-- 65535DDR cs0 size: 2048MB
735 13:40:44.006336 DDR cs1 size: 2048MB
736 13:40:44.011679 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 13:40:44.012104 cs0 DataBus test pass
738 13:40:44.017300 cs1 DataBus test pass
739 13:40:44.017712 cs0 AddrBus test pass
740 13:40:44.017931 cs1 AddrBus test pass
741 13:40:44.018139
742 13:40:44.023031 100bdlr_step_size ps== 420
743 13:40:44.023459 result report
744 13:40:44.028647 boot times 0Enable ddr reg access
745 13:40:44.033829 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 13:40:44.047183 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 13:40:44.619252 0.0;M3 CHK:0;cm4_sp_mode 0
748 13:40:44.619690 MVN_1=0x00000000
749 13:40:44.624847 MVN_2=0x00000000
750 13:40:44.630540 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 13:40:44.630889 OPS=0x10
752 13:40:44.631100 ring efuse init
753 13:40:44.631303 chipver efuse init
754 13:40:44.636165 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 13:40:44.641718 [0.018961 Inits done]
756 13:40:44.642062 secure task start!
757 13:40:44.642275 high task start!
758 13:40:44.646301 low task start!
759 13:40:44.646640 run into bl31
760 13:40:44.652881 NOTICE: BL31: v1.3(release):4fc40b1
761 13:40:44.660683 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 13:40:44.661003 NOTICE: BL31: G12A normal boot!
763 13:40:44.686212 NOTICE: BL31: BL33 decompress pass
764 13:40:44.692022 ERROR: Error initializing runtime service opteed_fast
765 13:40:45.924666
766 13:40:45.925280
767 13:40:45.933136 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 13:40:45.933630
769 13:40:45.934059 Model: Libre Computer AML-A311D-CC Alta
770 13:40:46.141571 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 13:40:46.164909 DRAM: 2 GiB (effective 3.8 GiB)
772 13:40:46.307926 Core: 408 devices, 31 uclasses, devicetree: separate
773 13:40:46.312837 WDT: Not starting watchdog@f0d0
774 13:40:46.346026 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 13:40:46.358414 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 13:40:46.362626 ** Bad device specification mmc 0 **
777 13:40:46.373768 Card did not respond to voltage select! : -110
778 13:40:46.381491 ** Bad device specification mmc 0 **
779 13:40:46.382094 Couldn't find partition mmc 0
780 13:40:46.389764 Card did not respond to voltage select! : -110
781 13:40:46.395295 ** Bad device specification mmc 0 **
782 13:40:46.395840 Couldn't find partition mmc 0
783 13:40:46.399345 Error: could not access storage.
784 13:40:46.742866 Net: eth0: ethernet@ff3f0000
785 13:40:46.743522 starting USB...
786 13:40:46.994784 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 13:40:46.995425 Starting the controller
788 13:40:47.001693 USB XHCI 1.10
789 13:40:49.163318 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 13:40:49.164021 bl2_stage_init 0x01
791 13:40:49.164505 bl2_stage_init 0x81
792 13:40:49.168725 hw id: 0x0000 - pwm id 0x01
793 13:40:49.169264 bl2_stage_init 0xc1
794 13:40:49.169723 bl2_stage_init 0x02
795 13:40:49.170173
796 13:40:49.174300 L0:00000000
797 13:40:49.174790 L1:20000703
798 13:40:49.175238 L2:00008067
799 13:40:49.175681 L3:14000000
800 13:40:49.177188 B2:00402000
801 13:40:49.177661 B1:e0f83180
802 13:40:49.178104
803 13:40:49.178544 TE: 58167
804 13:40:49.178985
805 13:40:49.188395 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 13:40:49.188928
807 13:40:49.189378 Board ID = 1
808 13:40:49.189822 Set A53 clk to 24M
809 13:40:49.190257 Set A73 clk to 24M
810 13:40:49.194035 Set clk81 to 24M
811 13:40:49.194531 A53 clk: 1200 MHz
812 13:40:49.194978 A73 clk: 1200 MHz
813 13:40:49.199581 CLK81: 166.6M
814 13:40:49.200101 smccc: 00012abe
815 13:40:49.205455 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 13:40:49.205956 board id: 1
817 13:40:49.212807 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 13:40:49.224389 fw parse done
819 13:40:49.230292 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 13:40:49.272898 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 13:40:49.283822 PIEI prepare done
822 13:40:49.284416 fastboot data load
823 13:40:49.284882 fastboot data verify
824 13:40:49.289441 verify result: 266
825 13:40:49.295116 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 13:40:49.295687 LPDDR4 probe
827 13:40:49.296204 ddr clk to 1584MHz
828 13:40:49.303053 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 13:40:49.340291
830 13:40:49.340847 dmc_version 0001
831 13:40:49.346939 Check phy result
832 13:40:49.352806 INFO : End of CA training
833 13:40:49.353341 INFO : End of initialization
834 13:40:49.358414 INFO : Training has run successfully!
835 13:40:49.358922 Check phy result
836 13:40:49.364136 INFO : End of initialization
837 13:40:49.364642 INFO : End of read enable training
838 13:40:49.369589 INFO : End of fine write leveling
839 13:40:49.375184 INFO : End of Write leveling coarse delay
840 13:40:49.375726 INFO : Training has run successfully!
841 13:40:49.376245 Check phy result
842 13:40:49.380849 INFO : End of initialization
843 13:40:49.381353 INFO : End of read dq deskew training
844 13:40:49.386423 INFO : End of MPR read delay center optimization
845 13:40:49.392155 INFO : End of write delay center optimization
846 13:40:49.397595 INFO : End of read delay center optimization
847 13:40:49.398084 INFO : End of max read latency training
848 13:40:49.403235 INFO : Training has run successfully!
849 13:40:49.403733 1D training succeed
850 13:40:49.411714 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 13:40:49.460151 Check phy result
852 13:40:49.460778 INFO : End of initialization
853 13:40:49.481690 INFO : End of 2D read delay Voltage center optimization
854 13:40:49.502893 INFO : End of 2D read delay Voltage center optimization
855 13:40:49.554869 INFO : End of 2D write delay Voltage center optimization
856 13:40:49.604315 INFO : End of 2D write delay Voltage center optimization
857 13:40:49.609716 INFO : Training has run successfully!
858 13:40:49.609976
859 13:40:49.610193 channel==0
860 13:40:49.615284 RxClkDly_Margin_A0==88 ps 9
861 13:40:49.615528 TxDqDly_Margin_A0==98 ps 10
862 13:40:49.620971 RxClkDly_Margin_A1==88 ps 9
863 13:40:49.621221 TxDqDly_Margin_A1==88 ps 9
864 13:40:49.621691 TrainedVREFDQ_A0==74
865 13:40:49.626567 TrainedVREFDQ_A1==74
866 13:40:49.626856 VrefDac_Margin_A0==25
867 13:40:49.627055 DeviceVref_Margin_A0==40
868 13:40:49.632183 VrefDac_Margin_A1==25
869 13:40:49.632622 DeviceVref_Margin_A1==40
870 13:40:49.633026
871 13:40:49.633415
872 13:40:49.633794 channel==1
873 13:40:49.637812 RxClkDly_Margin_A0==98 ps 10
874 13:40:49.638286 TxDqDly_Margin_A0==98 ps 10
875 13:40:49.643368 RxClkDly_Margin_A1==98 ps 10
876 13:40:49.643835 TxDqDly_Margin_A1==88 ps 9
877 13:40:49.649064 TrainedVREFDQ_A0==77
878 13:40:49.649535 TrainedVREFDQ_A1==77
879 13:40:49.649970 VrefDac_Margin_A0==22
880 13:40:49.654630 DeviceVref_Margin_A0==37
881 13:40:49.655166 VrefDac_Margin_A1==22
882 13:40:49.660192 DeviceVref_Margin_A1==37
883 13:40:49.660661
884 13:40:49.661091 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 13:40:49.661518
886 13:40:49.693758 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
887 13:40:49.694303 2D training succeed
888 13:40:49.699331 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 13:40:49.704951 auto size-- 65535DDR cs0 size: 2048MB
890 13:40:49.705487 DDR cs1 size: 2048MB
891 13:40:49.710570 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 13:40:49.711051 cs0 DataBus test pass
893 13:40:49.716153 cs1 DataBus test pass
894 13:40:49.716637 cs0 AddrBus test pass
895 13:40:49.717066 cs1 AddrBus test pass
896 13:40:49.717487
897 13:40:49.721784 100bdlr_step_size ps== 420
898 13:40:49.722279 result report
899 13:40:49.727361 boot times 0Enable ddr reg access
900 13:40:49.732720 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 13:40:49.746293 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 13:40:50.320039 0.0;M3 CHK:0;cm4_sp_mode 0
903 13:40:50.320725 MVN_1=0x00000000
904 13:40:50.325371 MVN_2=0x00000000
905 13:40:50.331211 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 13:40:50.331722 OPS=0x10
907 13:40:50.332225 ring efuse init
908 13:40:50.332679 chipver efuse init
909 13:40:50.336734 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 13:40:50.342312 [0.018961 Inits done]
911 13:40:50.342815 secure task start!
912 13:40:50.343267 high task start!
913 13:40:50.346905 low task start!
914 13:40:50.347405 run into bl31
915 13:40:50.353571 NOTICE: BL31: v1.3(release):4fc40b1
916 13:40:50.362675 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 13:40:50.363209 NOTICE: BL31: G12A normal boot!
918 13:40:50.387302 NOTICE: BL31: BL33 decompress pass
919 13:40:50.392035 ERROR: Error initializing runtime service opteed_fast
920 13:40:51.625916
921 13:40:51.626592
922 13:40:51.634242 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 13:40:51.634755
924 13:40:51.635221 Model: Libre Computer AML-A311D-CC Alta
925 13:40:51.842699 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 13:40:51.866067 DRAM: 2 GiB (effective 3.8 GiB)
927 13:40:52.009088 Core: 408 devices, 31 uclasses, devicetree: separate
928 13:40:52.014973 WDT: Not starting watchdog@f0d0
929 13:40:52.047227 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 13:40:52.059602 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 13:40:52.064600 ** Bad device specification mmc 0 **
932 13:40:52.074912 Card did not respond to voltage select! : -110
933 13:40:52.082566 ** Bad device specification mmc 0 **
934 13:40:52.083067 Couldn't find partition mmc 0
935 13:40:52.090919 Card did not respond to voltage select! : -110
936 13:40:52.096425 ** Bad device specification mmc 0 **
937 13:40:52.096919 Couldn't find partition mmc 0
938 13:40:52.101515 Error: could not access storage.
939 13:40:52.445060 Net: eth0: ethernet@ff3f0000
940 13:40:52.445693 starting USB...
941 13:40:52.696937 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 13:40:52.697462 Starting the controller
943 13:40:52.703897 USB XHCI 1.10
944 13:40:54.258174 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 13:40:54.266431 scanning usb for storage devices... 0 Storage Device(s) found
947 13:40:54.318082 Hit any key to stop autoboot: 1
948 13:40:54.319037 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 13:40:54.319697 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 13:40:54.320308 Setting prompt string to ['=>']
951 13:40:54.320869 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 13:40:54.333971 0
953 13:40:54.334951 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 13:40:54.335516 Sending with 10 millisecond of delay
956 13:40:55.470793 => setenv autoload no
957 13:40:55.481697 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 13:40:55.487133 setenv autoload no
959 13:40:55.487928 Sending with 10 millisecond of delay
961 13:40:57.286250 => setenv initrd_high 0xffffffff
962 13:40:57.297132 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 13:40:57.298121 setenv initrd_high 0xffffffff
964 13:40:57.298894 Sending with 10 millisecond of delay
966 13:40:58.916829 => setenv fdt_high 0xffffffff
967 13:40:58.927726 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 13:40:58.928763 setenv fdt_high 0xffffffff
969 13:40:58.929544 Sending with 10 millisecond of delay
971 13:40:59.221671 => dhcp
972 13:40:59.232518 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 13:40:59.233457 dhcp
974 13:40:59.233941 Speed: 1000, full duplex
975 13:40:59.234403 BOOTP broadcast 1
976 13:40:59.243198 DHCP client bound to address 192.168.6.27 (10 ms)
977 13:40:59.244089 Sending with 10 millisecond of delay
979 13:41:00.921995 => setenv serverip 192.168.6.2
980 13:41:00.932955 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 13:41:00.933976 setenv serverip 192.168.6.2
982 13:41:00.934725 Sending with 10 millisecond of delay
984 13:41:04.667789 => tftpboot 0x01080000 970649/tftp-deploy-4snw433d/kernel/uImage
985 13:41:04.678528 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 13:41:04.679552 tftpboot 0x01080000 970649/tftp-deploy-4snw433d/kernel/uImage
987 13:41:04.679973 Speed: 1000, full duplex
988 13:41:04.680447 Using ethernet@ff3f0000 device
989 13:41:04.681417 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 13:41:04.686987 Filename '970649/tftp-deploy-4snw433d/kernel/uImage'.
991 13:41:04.691183 Load address: 0x1080000
992 13:41:07.572764 Loading: *################################################## 43.6 MiB
993 13:41:07.573177 15.1 MiB/s
994 13:41:07.573402 done
995 13:41:07.577269 Bytes transferred = 45713984 (2b98a40 hex)
996 13:41:07.578153 Sending with 10 millisecond of delay
998 13:41:12.271918 => tftpboot 0x08000000 970649/tftp-deploy-4snw433d/ramdisk/ramdisk.cpio.gz.uboot
999 13:41:12.282570 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 13:41:12.283140 tftpboot 0x08000000 970649/tftp-deploy-4snw433d/ramdisk/ramdisk.cpio.gz.uboot
1001 13:41:12.283365 Speed: 1000, full duplex
1002 13:41:12.283567 Using ethernet@ff3f0000 device
1003 13:41:12.285453 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 13:41:12.294006 Filename '970649/tftp-deploy-4snw433d/ramdisk/ramdisk.cpio.gz.uboot'.
1005 13:41:12.294301 Load address: 0x8000000
1006 13:41:18.802144 Loading: *########################T ######################### UDP wrong checksum 00000005 0000d8c2
1007 13:41:23.802270 T UDP wrong checksum 00000005 0000d8c2
1008 13:41:25.238990 UDP wrong checksum 000000ff 0000ef64
1009 13:41:25.277981 UDP wrong checksum 000000ff 00007957
1010 13:41:33.806037 T T UDP wrong checksum 00000005 0000d8c2
1011 13:41:53.690509 T T T UDP wrong checksum 000000ff 00001489
1012 13:41:53.770217 UDP wrong checksum 000000ff 0000ad7b
1013 13:41:53.810102 T UDP wrong checksum 00000005 0000d8c2
1014 13:42:08.814178 T T
1015 13:42:08.814864 Retry count exceeded; starting again
1017 13:42:08.816509 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1020 13:42:08.818609 end: 2.4 uboot-commands (duration 00:01:47) [common]
1022 13:42:08.820204 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1024 13:42:08.821442 end: 2 uboot-action (duration 00:01:47) [common]
1026 13:42:08.823230 Cleaning after the job
1027 13:42:08.823881 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/ramdisk
1028 13:42:08.825481 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/kernel
1029 13:42:08.854501 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/dtb
1030 13:42:08.855259 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/nfsrootfs
1031 13:42:08.924968 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970649/tftp-deploy-4snw433d/modules
1032 13:42:08.932157 start: 4.1 power-off (timeout 00:00:30) [common]
1033 13:42:08.932773 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1034 13:42:08.965838 >> OK - accepted request
1035 13:42:08.968005 Returned 0 in 0 seconds
1036 13:42:09.068845 end: 4.1 power-off (duration 00:00:00) [common]
1038 13:42:09.069887 start: 4.2 read-feedback (timeout 00:10:00) [common]
1039 13:42:09.070575 Listened to connection for namespace 'common' for up to 1s
1040 13:42:10.072400 Finalising connection for namespace 'common'
1041 13:42:10.072917 Disconnecting from shell: Finalise
1042 13:42:10.073216 =>
1043 13:42:10.173960 end: 4.2 read-feedback (duration 00:00:01) [common]
1044 13:42:10.174446 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/970649
1045 13:42:12.654949 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/970649
1046 13:42:12.655581 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.