Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 14:06:59.683069 lava-dispatcher, installed at version: 2024.01
2 14:06:59.683898 start: 0 validate
3 14:06:59.684411 Start time: 2024-11-10 14:06:59.684381+00:00 (UTC)
4 14:06:59.684974 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 14:06:59.685529 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 14:06:59.721181 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 14:06:59.721729 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 14:06:59.757321 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 14:06:59.757990 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 14:06:59.787089 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 14:06:59.787593 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 14:06:59.818564 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 14:06:59.819068 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc6-686-gd5c38c200807%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 14:06:59.858054 validate duration: 0.17
16 14:06:59.859066 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 14:06:59.859477 start: 1.1 download-retry (timeout 00:10:00) [common]
18 14:06:59.859837 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 14:06:59.860557 Not decompressing ramdisk as can be used compressed.
20 14:06:59.861092 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 14:06:59.861400 saving as /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/ramdisk/initrd.cpio.gz
22 14:06:59.861733 total size: 5628140 (5 MB)
23 14:06:59.896838 progress 0 % (0 MB)
24 14:06:59.900722 progress 5 % (0 MB)
25 14:06:59.904746 progress 10 % (0 MB)
26 14:06:59.908367 progress 15 % (0 MB)
27 14:06:59.912354 progress 20 % (1 MB)
28 14:06:59.916159 progress 25 % (1 MB)
29 14:06:59.920227 progress 30 % (1 MB)
30 14:06:59.924250 progress 35 % (1 MB)
31 14:06:59.927814 progress 40 % (2 MB)
32 14:06:59.931882 progress 45 % (2 MB)
33 14:06:59.935424 progress 50 % (2 MB)
34 14:06:59.939375 progress 55 % (2 MB)
35 14:06:59.943387 progress 60 % (3 MB)
36 14:06:59.947064 progress 65 % (3 MB)
37 14:06:59.951026 progress 70 % (3 MB)
38 14:06:59.954588 progress 75 % (4 MB)
39 14:06:59.958555 progress 80 % (4 MB)
40 14:06:59.962161 progress 85 % (4 MB)
41 14:06:59.966155 progress 90 % (4 MB)
42 14:06:59.970004 progress 95 % (5 MB)
43 14:06:59.973491 progress 100 % (5 MB)
44 14:06:59.974237 5 MB downloaded in 0.11 s (47.72 MB/s)
45 14:06:59.974822 end: 1.1.1 http-download (duration 00:00:00) [common]
47 14:06:59.975711 end: 1.1 download-retry (duration 00:00:00) [common]
48 14:06:59.976027 start: 1.2 download-retry (timeout 00:10:00) [common]
49 14:06:59.976308 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 14:06:59.976870 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/kernel/Image
51 14:06:59.977131 saving as /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/kernel/Image
52 14:06:59.977342 total size: 45713920 (43 MB)
53 14:06:59.977554 No compression specified
54 14:07:00.013392 progress 0 % (0 MB)
55 14:07:00.050247 progress 5 % (2 MB)
56 14:07:00.086058 progress 10 % (4 MB)
57 14:07:00.119830 progress 15 % (6 MB)
58 14:07:00.153478 progress 20 % (8 MB)
59 14:07:00.187282 progress 25 % (10 MB)
60 14:07:00.221002 progress 30 % (13 MB)
61 14:07:00.261456 progress 35 % (15 MB)
62 14:07:00.295856 progress 40 % (17 MB)
63 14:07:00.330493 progress 45 % (19 MB)
64 14:07:00.365316 progress 50 % (21 MB)
65 14:07:00.399699 progress 55 % (24 MB)
66 14:07:00.435102 progress 60 % (26 MB)
67 14:07:00.469039 progress 65 % (28 MB)
68 14:07:00.503950 progress 70 % (30 MB)
69 14:07:00.539254 progress 75 % (32 MB)
70 14:07:00.574679 progress 80 % (34 MB)
71 14:07:00.608216 progress 85 % (37 MB)
72 14:07:00.642759 progress 90 % (39 MB)
73 14:07:00.675440 progress 95 % (41 MB)
74 14:07:00.704007 progress 100 % (43 MB)
75 14:07:00.704602 43 MB downloaded in 0.73 s (59.95 MB/s)
76 14:07:00.705115 end: 1.2.1 http-download (duration 00:00:01) [common]
78 14:07:00.705986 end: 1.2 download-retry (duration 00:00:01) [common]
79 14:07:00.706321 start: 1.3 download-retry (timeout 00:09:59) [common]
80 14:07:00.706630 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 14:07:00.707898 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 14:07:00.708260 saving as /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 14:07:00.708502 total size: 53209 (0 MB)
84 14:07:00.708746 No compression specified
85 14:07:00.746853 progress 61 % (0 MB)
86 14:07:00.747958 progress 100 % (0 MB)
87 14:07:00.748700 0 MB downloaded in 0.04 s (1.26 MB/s)
88 14:07:00.749293 end: 1.3.1 http-download (duration 00:00:00) [common]
90 14:07:00.750278 end: 1.3 download-retry (duration 00:00:00) [common]
91 14:07:00.750599 start: 1.4 download-retry (timeout 00:09:59) [common]
92 14:07:00.750923 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 14:07:00.751444 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 14:07:00.751747 saving as /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/nfsrootfs/full.rootfs.tar
95 14:07:00.752019 total size: 474398908 (452 MB)
96 14:07:00.752298 Using unxz to decompress xz
97 14:07:00.788738 progress 0 % (0 MB)
98 14:07:01.928365 progress 5 % (22 MB)
99 14:07:03.365669 progress 10 % (45 MB)
100 14:07:03.809001 progress 15 % (67 MB)
101 14:07:04.669919 progress 20 % (90 MB)
102 14:07:05.194893 progress 25 % (113 MB)
103 14:07:05.546643 progress 30 % (135 MB)
104 14:07:06.163651 progress 35 % (158 MB)
105 14:07:07.107198 progress 40 % (181 MB)
106 14:07:07.887407 progress 45 % (203 MB)
107 14:07:08.455386 progress 50 % (226 MB)
108 14:07:09.118718 progress 55 % (248 MB)
109 14:07:10.492652 progress 60 % (271 MB)
110 14:07:12.031675 progress 65 % (294 MB)
111 14:07:13.649645 progress 70 % (316 MB)
112 14:07:16.771258 progress 75 % (339 MB)
113 14:07:19.309198 progress 80 % (361 MB)
114 14:07:22.280439 progress 85 % (384 MB)
115 14:07:25.658912 progress 90 % (407 MB)
116 14:07:28.865572 progress 95 % (429 MB)
117 14:07:32.066230 progress 100 % (452 MB)
118 14:07:32.079167 452 MB downloaded in 31.33 s (14.44 MB/s)
119 14:07:32.079748 end: 1.4.1 http-download (duration 00:00:31) [common]
121 14:07:32.081312 end: 1.4 download-retry (duration 00:00:31) [common]
122 14:07:32.081887 start: 1.5 download-retry (timeout 00:09:28) [common]
123 14:07:32.082454 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 14:07:32.083499 downloading http://storage.kernelci.org/tip/master/v6.12-rc6-686-gd5c38c200807/arm64/defconfig/gcc-12/modules.tar.xz
125 14:07:32.084067 saving as /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/modules/modules.tar
126 14:07:32.084519 total size: 11611892 (11 MB)
127 14:07:32.084975 Using unxz to decompress xz
128 14:07:32.133197 progress 0 % (0 MB)
129 14:07:32.199459 progress 5 % (0 MB)
130 14:07:32.273600 progress 10 % (1 MB)
131 14:07:32.369367 progress 15 % (1 MB)
132 14:07:32.461821 progress 20 % (2 MB)
133 14:07:32.543011 progress 25 % (2 MB)
134 14:07:32.618469 progress 30 % (3 MB)
135 14:07:32.696280 progress 35 % (3 MB)
136 14:07:32.767899 progress 40 % (4 MB)
137 14:07:32.844390 progress 45 % (5 MB)
138 14:07:32.929269 progress 50 % (5 MB)
139 14:07:33.011758 progress 55 % (6 MB)
140 14:07:33.097198 progress 60 % (6 MB)
141 14:07:33.177332 progress 65 % (7 MB)
142 14:07:33.257270 progress 70 % (7 MB)
143 14:07:33.334549 progress 75 % (8 MB)
144 14:07:33.420119 progress 80 % (8 MB)
145 14:07:33.499465 progress 85 % (9 MB)
146 14:07:33.581284 progress 90 % (9 MB)
147 14:07:33.660264 progress 95 % (10 MB)
148 14:07:33.737308 progress 100 % (11 MB)
149 14:07:33.748893 11 MB downloaded in 1.66 s (6.65 MB/s)
150 14:07:33.749431 end: 1.5.1 http-download (duration 00:00:02) [common]
152 14:07:33.750256 end: 1.5 download-retry (duration 00:00:02) [common]
153 14:07:33.750524 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 14:07:33.750790 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 14:07:49.416146 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/970698/extract-nfsrootfs-65ut9uwx
156 14:07:49.416756 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 14:07:49.417043 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 14:07:49.417756 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k
159 14:07:49.418212 makedir: /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin
160 14:07:49.418553 makedir: /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/tests
161 14:07:49.418873 makedir: /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/results
162 14:07:49.419243 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-add-keys
163 14:07:49.419890 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-add-sources
164 14:07:49.420510 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-background-process-start
165 14:07:49.421118 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-background-process-stop
166 14:07:49.421676 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-common-functions
167 14:07:49.422205 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-echo-ipv4
168 14:07:49.422717 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-install-packages
169 14:07:49.423272 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-installed-packages
170 14:07:49.423788 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-os-build
171 14:07:49.424315 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-probe-channel
172 14:07:49.424826 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-probe-ip
173 14:07:49.425322 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-target-ip
174 14:07:49.425808 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-target-mac
175 14:07:49.426291 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-target-storage
176 14:07:49.426871 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-test-case
177 14:07:49.427374 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-test-event
178 14:07:49.427868 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-test-feedback
179 14:07:49.428400 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-test-raise
180 14:07:49.428896 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-test-reference
181 14:07:49.429391 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-test-runner
182 14:07:49.429924 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-test-set
183 14:07:49.430443 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-test-shell
184 14:07:49.430951 Updating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-install-packages (oe)
185 14:07:49.431489 Updating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/bin/lava-installed-packages (oe)
186 14:07:49.431934 Creating /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/environment
187 14:07:49.432331 LAVA metadata
188 14:07:49.432592 - LAVA_JOB_ID=970698
189 14:07:49.432806 - LAVA_DISPATCHER_IP=192.168.6.2
190 14:07:49.433185 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 14:07:49.434176 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 14:07:49.434499 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 14:07:49.434709 skipped lava-vland-overlay
194 14:07:49.434949 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 14:07:49.435204 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 14:07:49.435421 skipped lava-multinode-overlay
197 14:07:49.435662 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 14:07:49.435912 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 14:07:49.436202 Loading test definitions
200 14:07:49.436486 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 14:07:49.436707 Using /lava-970698 at stage 0
202 14:07:49.437893 uuid=970698_1.6.2.4.1 testdef=None
203 14:07:49.438206 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 14:07:49.438469 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 14:07:49.440234 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 14:07:49.441027 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 14:07:49.443205 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 14:07:49.444062 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 14:07:49.446137 runner path: /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 970698_1.6.2.4.1
212 14:07:49.446693 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 14:07:49.447448 Creating lava-test-runner.conf files
215 14:07:49.447649 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/970698/lava-overlay-hxq23_1k/lava-970698/0 for stage 0
216 14:07:49.448007 - 0_v4l2-decoder-conformance-vp9
217 14:07:49.448355 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 14:07:49.448623 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 14:07:49.470308 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 14:07:49.470708 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 14:07:49.470965 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 14:07:49.471229 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 14:07:49.471489 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 14:07:50.094807 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 14:07:50.095281 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 14:07:50.095528 extracting modules file /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970698/extract-nfsrootfs-65ut9uwx
227 14:07:51.486998 extracting modules file /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/modules/modules.tar to /var/lib/lava/dispatcher/tmp/970698/extract-overlay-ramdisk-5ugi7aby/ramdisk
228 14:07:52.888220 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 14:07:52.888696 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 14:07:52.888971 [common] Applying overlay to NFS
231 14:07:52.889187 [common] Applying overlay /var/lib/lava/dispatcher/tmp/970698/compress-overlay-mmuaf5_o/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/970698/extract-nfsrootfs-65ut9uwx
232 14:07:52.918269 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 14:07:52.918668 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 14:07:52.918939 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 14:07:52.919170 Converting downloaded kernel to a uImage
236 14:07:52.919478 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/kernel/Image /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/kernel/uImage
237 14:07:53.376523 output: Image Name:
238 14:07:53.376949 output: Created: Sun Nov 10 14:07:52 2024
239 14:07:53.377160 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 14:07:53.377365 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 14:07:53.377569 output: Load Address: 01080000
242 14:07:53.377769 output: Entry Point: 01080000
243 14:07:53.377967 output:
244 14:07:53.378303 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 14:07:53.378569 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 14:07:53.378837 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 14:07:53.379090 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 14:07:53.379346 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 14:07:53.379607 Building ramdisk /var/lib/lava/dispatcher/tmp/970698/extract-overlay-ramdisk-5ugi7aby/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/970698/extract-overlay-ramdisk-5ugi7aby/ramdisk
250 14:07:55.526415 >> 166827 blocks
251 14:08:03.672234 Adding RAMdisk u-boot header.
252 14:08:03.672955 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/970698/extract-overlay-ramdisk-5ugi7aby/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/970698/extract-overlay-ramdisk-5ugi7aby/ramdisk.cpio.gz.uboot
253 14:08:03.923360 output: Image Name:
254 14:08:03.923769 output: Created: Sun Nov 10 14:08:03 2024
255 14:08:03.924057 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 14:08:03.924531 output: Data Size: 23436383 Bytes = 22887.09 KiB = 22.35 MiB
257 14:08:03.924980 output: Load Address: 00000000
258 14:08:03.925440 output: Entry Point: 00000000
259 14:08:03.925876 output:
260 14:08:03.927156 rename /var/lib/lava/dispatcher/tmp/970698/extract-overlay-ramdisk-5ugi7aby/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/ramdisk/ramdisk.cpio.gz.uboot
261 14:08:03.927944 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 14:08:03.928584 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 14:08:03.929165 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 14:08:03.929670 No LXC device requested
265 14:08:03.930225 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 14:08:03.930786 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 14:08:03.931331 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 14:08:03.931786 Checking files for TFTP limit of 4294967296 bytes.
269 14:08:03.934726 end: 1 tftp-deploy (duration 00:01:04) [common]
270 14:08:03.935359 start: 2 uboot-action (timeout 00:05:00) [common]
271 14:08:03.935928 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 14:08:03.936510 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 14:08:03.937064 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 14:08:03.937633 Using kernel file from prepare-kernel: 970698/tftp-deploy-g9wtyx96/kernel/uImage
275 14:08:03.938318 substitutions:
276 14:08:03.938764 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 14:08:03.939208 - {DTB_ADDR}: 0x01070000
278 14:08:03.939649 - {DTB}: 970698/tftp-deploy-g9wtyx96/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 14:08:03.940125 - {INITRD}: 970698/tftp-deploy-g9wtyx96/ramdisk/ramdisk.cpio.gz.uboot
280 14:08:03.940568 - {KERNEL_ADDR}: 0x01080000
281 14:08:03.941000 - {KERNEL}: 970698/tftp-deploy-g9wtyx96/kernel/uImage
282 14:08:03.941435 - {LAVA_MAC}: None
283 14:08:03.941909 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/970698/extract-nfsrootfs-65ut9uwx
284 14:08:03.942349 - {NFS_SERVER_IP}: 192.168.6.2
285 14:08:03.942780 - {PRESEED_CONFIG}: None
286 14:08:03.943212 - {PRESEED_LOCAL}: None
287 14:08:03.943641 - {RAMDISK_ADDR}: 0x08000000
288 14:08:03.944097 - {RAMDISK}: 970698/tftp-deploy-g9wtyx96/ramdisk/ramdisk.cpio.gz.uboot
289 14:08:03.944531 - {ROOT_PART}: None
290 14:08:03.944957 - {ROOT}: None
291 14:08:03.945385 - {SERVER_IP}: 192.168.6.2
292 14:08:03.945815 - {TEE_ADDR}: 0x83000000
293 14:08:03.946241 - {TEE}: None
294 14:08:03.946670 Parsed boot commands:
295 14:08:03.947086 - setenv autoload no
296 14:08:03.947510 - setenv initrd_high 0xffffffff
297 14:08:03.947934 - setenv fdt_high 0xffffffff
298 14:08:03.948387 - dhcp
299 14:08:03.948812 - setenv serverip 192.168.6.2
300 14:08:03.949235 - tftpboot 0x01080000 970698/tftp-deploy-g9wtyx96/kernel/uImage
301 14:08:03.949664 - tftpboot 0x08000000 970698/tftp-deploy-g9wtyx96/ramdisk/ramdisk.cpio.gz.uboot
302 14:08:03.950092 - tftpboot 0x01070000 970698/tftp-deploy-g9wtyx96/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 14:08:03.950517 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/970698/extract-nfsrootfs-65ut9uwx,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 14:08:03.950957 - bootm 0x01080000 0x08000000 0x01070000
305 14:08:03.951503 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 14:08:03.953206 start: 2.3 connect-device (timeout 00:05:00) [common]
308 14:08:03.953667 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 14:08:03.969374 Setting prompt string to ['lava-test: # ']
310 14:08:03.970974 end: 2.3 connect-device (duration 00:00:00) [common]
311 14:08:03.971622 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 14:08:03.972265 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 14:08:03.972849 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 14:08:03.974289 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 14:08:04.011890 >> OK - accepted request
316 14:08:04.014029 Returned 0 in 0 seconds
317 14:08:04.115215 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 14:08:04.117026 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 14:08:04.117656 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 14:08:04.118221 Setting prompt string to ['Hit any key to stop autoboot']
322 14:08:04.118734 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 14:08:04.120461 Trying 192.168.56.21...
324 14:08:04.120986 Connected to conserv1.
325 14:08:04.121448 Escape character is '^]'.
326 14:08:04.121903
327 14:08:04.122364 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 14:08:04.122830
329 14:08:12.329461 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 14:08:12.329894 bl2_stage_init 0x01
331 14:08:12.330120 bl2_stage_init 0x81
332 14:08:12.335149 hw id: 0x0000 - pwm id 0x01
333 14:08:12.335552 bl2_stage_init 0xc1
334 14:08:12.340638 bl2_stage_init 0x02
335 14:08:12.341085
336 14:08:12.341466 L0:00000000
337 14:08:12.341748 L1:00000703
338 14:08:12.341978 L2:00008067
339 14:08:12.342212 L3:15000000
340 14:08:12.346380 S1:00000000
341 14:08:12.346802 B2:20282000
342 14:08:12.347133 B1:a0f83180
343 14:08:12.347440
344 14:08:12.347771 TE: 69543
345 14:08:12.348149
346 14:08:12.351843 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 14:08:12.352264
348 14:08:12.357374 Board ID = 1
349 14:08:12.357682 Set cpu clk to 24M
350 14:08:12.357892 Set clk81 to 24M
351 14:08:12.363068 Use GP1_pll as DSU clk.
352 14:08:12.363473 DSU clk: 1200 Mhz
353 14:08:12.363847 CPU clk: 1200 MHz
354 14:08:12.368598 Set clk81 to 166.6M
355 14:08:12.374459 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 14:08:12.374980 board id: 1
357 14:08:12.381332 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 14:08:12.392297 fw parse done
359 14:08:12.398175 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 14:08:12.441384 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 14:08:12.452474 PIEI prepare done
362 14:08:12.453008 fastboot data load
363 14:08:12.453482 fastboot data verify
364 14:08:12.458041 verify result: 266
365 14:08:12.463621 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 14:08:12.464256 LPDDR4 probe
367 14:08:12.464744 ddr clk to 1584MHz
368 14:08:12.471640 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 14:08:12.509465
370 14:08:12.509997 dmc_version 0001
371 14:08:12.516464 Check phy result
372 14:08:12.522435 INFO : End of CA training
373 14:08:12.522946 INFO : End of initialization
374 14:08:12.528077 INFO : Training has run successfully!
375 14:08:12.528580 Check phy result
376 14:08:12.533635 INFO : End of initialization
377 14:08:12.534150 INFO : End of read enable training
378 14:08:12.536912 INFO : End of fine write leveling
379 14:08:12.542504 INFO : End of Write leveling coarse delay
380 14:08:12.548115 INFO : Training has run successfully!
381 14:08:12.548612 Check phy result
382 14:08:12.549066 INFO : End of initialization
383 14:08:12.553672 INFO : End of read dq deskew training
384 14:08:12.559346 INFO : End of MPR read delay center optimization
385 14:08:12.559866 INFO : End of write delay center optimization
386 14:08:12.564858 INFO : End of read delay center optimization
387 14:08:12.570518 INFO : End of max read latency training
388 14:08:12.571015 INFO : Training has run successfully!
389 14:08:12.576132 1D training succeed
390 14:08:12.582049 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 14:08:12.630186 Check phy result
392 14:08:12.630687 INFO : End of initialization
393 14:08:12.657493 INFO : End of 2D read delay Voltage center optimization
394 14:08:12.681678 INFO : End of 2D read delay Voltage center optimization
395 14:08:12.738388 INFO : End of 2D write delay Voltage center optimization
396 14:08:12.792405 INFO : End of 2D write delay Voltage center optimization
397 14:08:12.797950 INFO : Training has run successfully!
398 14:08:12.798432
399 14:08:12.798908 channel==0
400 14:08:12.803529 RxClkDly_Margin_A0==78 ps 8
401 14:08:12.804060 TxDqDly_Margin_A0==98 ps 10
402 14:08:12.809206 RxClkDly_Margin_A1==88 ps 9
403 14:08:12.809698 TxDqDly_Margin_A1==98 ps 10
404 14:08:12.810159 TrainedVREFDQ_A0==74
405 14:08:12.814725 TrainedVREFDQ_A1==74
406 14:08:12.815212 VrefDac_Margin_A0==23
407 14:08:12.815667 DeviceVref_Margin_A0==40
408 14:08:12.820337 VrefDac_Margin_A1==23
409 14:08:12.820823 DeviceVref_Margin_A1==40
410 14:08:12.821271
411 14:08:12.821718
412 14:08:12.825950 channel==1
413 14:08:12.826436 RxClkDly_Margin_A0==78 ps 8
414 14:08:12.826889 TxDqDly_Margin_A0==98 ps 10
415 14:08:12.831516 RxClkDly_Margin_A1==78 ps 8
416 14:08:12.832020 TxDqDly_Margin_A1==88 ps 9
417 14:08:12.837202 TrainedVREFDQ_A0==78
418 14:08:12.837683 TrainedVREFDQ_A1==77
419 14:08:12.838135 VrefDac_Margin_A0==22
420 14:08:12.842705 DeviceVref_Margin_A0==36
421 14:08:12.843182 VrefDac_Margin_A1==22
422 14:08:12.848333 DeviceVref_Margin_A1==37
423 14:08:12.848809
424 14:08:12.849265 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 14:08:12.849711
426 14:08:12.882049 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 14:08:12.882631 2D training succeed
428 14:08:12.887620 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 14:08:12.893346 auto size-- 65535DDR cs0 size: 2048MB
430 14:08:12.893857 DDR cs1 size: 2048MB
431 14:08:12.898817 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 14:08:12.899304 cs0 DataBus test pass
433 14:08:12.904427 cs1 DataBus test pass
434 14:08:12.904916 cs0 AddrBus test pass
435 14:08:12.905370 cs1 AddrBus test pass
436 14:08:12.905809
437 14:08:12.910059 100bdlr_step_size ps== 471
438 14:08:12.910554 result report
439 14:08:12.915598 boot times 0Enable ddr reg access
440 14:08:12.920906 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 14:08:12.934762 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 14:08:13.594853 bl2z: ptr: 05129330, size: 00001e40
443 14:08:13.603252 0.0;M3 CHK:0;cm4_sp_mode 0
444 14:08:13.603772 MVN_1=0x00000000
445 14:08:13.604295 MVN_2=0x00000000
446 14:08:13.614718 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 14:08:13.615210 OPS=0x04
448 14:08:13.615665 ring efuse init
449 14:08:13.617678 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 14:08:13.624168 [0.017354 Inits done]
451 14:08:13.624647 secure task start!
452 14:08:13.625095 high task start!
453 14:08:13.625535 low task start!
454 14:08:13.628501 run into bl31
455 14:08:13.637003 NOTICE: BL31: v1.3(release):4fc40b1
456 14:08:13.644800 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 14:08:13.645289 NOTICE: BL31: G12A normal boot!
458 14:08:13.660404 NOTICE: BL31: BL33 decompress pass
459 14:08:13.666046 ERROR: Error initializing runtime service opteed_fast
460 14:08:16.378825 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 14:08:16.379490 bl2_stage_init 0x01
462 14:08:16.379974 bl2_stage_init 0x81
463 14:08:16.384334 hw id: 0x0000 - pwm id 0x01
464 14:08:16.384864 bl2_stage_init 0xc1
465 14:08:16.389966 bl2_stage_init 0x02
466 14:08:16.390535
467 14:08:16.390982 L0:00000000
468 14:08:16.391409 L1:00000703
469 14:08:16.391842 L2:00008067
470 14:08:16.392314 L3:15000000
471 14:08:16.395545 S1:00000000
472 14:08:16.396044 B2:20282000
473 14:08:16.396479 B1:a0f83180
474 14:08:16.396903
475 14:08:16.397330 TE: 70441
476 14:08:16.397755
477 14:08:16.401149 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 14:08:16.401617
479 14:08:16.406790 Board ID = 1
480 14:08:16.407250 Set cpu clk to 24M
481 14:08:16.407679 Set clk81 to 24M
482 14:08:16.412283 Use GP1_pll as DSU clk.
483 14:08:16.412758 DSU clk: 1200 Mhz
484 14:08:16.413202 CPU clk: 1200 MHz
485 14:08:16.417927 Set clk81 to 166.6M
486 14:08:16.423478 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 14:08:16.423955 board id: 1
488 14:08:16.430666 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 14:08:16.441348 fw parse done
490 14:08:16.447287 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 14:08:16.489952 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 14:08:16.500825 PIEI prepare done
493 14:08:16.501288 fastboot data load
494 14:08:16.501722 fastboot data verify
495 14:08:16.506505 verify result: 266
496 14:08:16.512115 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 14:08:16.512580 LPDDR4 probe
498 14:08:16.513009 ddr clk to 1584MHz
499 14:08:16.520093 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 14:08:16.557342
501 14:08:16.557857 dmc_version 0001
502 14:08:16.564053 Check phy result
503 14:08:16.569942 INFO : End of CA training
504 14:08:16.570503 INFO : End of initialization
505 14:08:16.575579 INFO : Training has run successfully!
506 14:08:16.576088 Check phy result
507 14:08:16.581125 INFO : End of initialization
508 14:08:16.581606 INFO : End of read enable training
509 14:08:16.586823 INFO : End of fine write leveling
510 14:08:16.592329 INFO : End of Write leveling coarse delay
511 14:08:16.592810 INFO : Training has run successfully!
512 14:08:16.593259 Check phy result
513 14:08:16.597924 INFO : End of initialization
514 14:08:16.598407 INFO : End of read dq deskew training
515 14:08:16.603580 INFO : End of MPR read delay center optimization
516 14:08:16.609116 INFO : End of write delay center optimization
517 14:08:16.614839 INFO : End of read delay center optimization
518 14:08:16.615311 INFO : End of max read latency training
519 14:08:16.620333 INFO : Training has run successfully!
520 14:08:16.620811 1D training succeed
521 14:08:16.629529 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 14:08:16.677091 Check phy result
523 14:08:16.677574 INFO : End of initialization
524 14:08:16.699445 INFO : End of 2D read delay Voltage center optimization
525 14:08:16.718729 INFO : End of 2D read delay Voltage center optimization
526 14:08:16.770478 INFO : End of 2D write delay Voltage center optimization
527 14:08:16.819683 INFO : End of 2D write delay Voltage center optimization
528 14:08:16.825277 INFO : Training has run successfully!
529 14:08:16.825756
530 14:08:16.826207 channel==0
531 14:08:16.830863 RxClkDly_Margin_A0==78 ps 8
532 14:08:16.831335 TxDqDly_Margin_A0==98 ps 10
533 14:08:16.836459 RxClkDly_Margin_A1==88 ps 9
534 14:08:16.836934 TxDqDly_Margin_A1==98 ps 10
535 14:08:16.837383 TrainedVREFDQ_A0==74
536 14:08:16.842065 TrainedVREFDQ_A1==74
537 14:08:16.842554 VrefDac_Margin_A0==24
538 14:08:16.843004 DeviceVref_Margin_A0==40
539 14:08:16.847654 VrefDac_Margin_A1==23
540 14:08:16.848151 DeviceVref_Margin_A1==40
541 14:08:16.848599
542 14:08:16.849042
543 14:08:16.853270 channel==1
544 14:08:16.853741 RxClkDly_Margin_A0==88 ps 9
545 14:08:16.854181 TxDqDly_Margin_A0==88 ps 9
546 14:08:16.858842 RxClkDly_Margin_A1==88 ps 9
547 14:08:16.859316 TxDqDly_Margin_A1==88 ps 9
548 14:08:16.864442 TrainedVREFDQ_A0==75
549 14:08:16.864935 TrainedVREFDQ_A1==77
550 14:08:16.865384 VrefDac_Margin_A0==22
551 14:08:16.870061 DeviceVref_Margin_A0==39
552 14:08:16.870537 VrefDac_Margin_A1==22
553 14:08:16.875663 DeviceVref_Margin_A1==37
554 14:08:16.876163
555 14:08:16.876616 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 14:08:16.877060
557 14:08:16.909263 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 14:08:16.909784 2D training succeed
559 14:08:16.914857 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 14:08:16.920455 auto size-- 65535DDR cs0 size: 2048MB
561 14:08:16.920953 DDR cs1 size: 2048MB
562 14:08:16.926037 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 14:08:16.926509 cs0 DataBus test pass
564 14:08:16.931642 cs1 DataBus test pass
565 14:08:16.932157 cs0 AddrBus test pass
566 14:08:16.932613 cs1 AddrBus test pass
567 14:08:16.933056
568 14:08:16.937256 100bdlr_step_size ps== 478
569 14:08:16.937744 result report
570 14:08:16.942869 boot times 0Enable ddr reg access
571 14:08:16.948047 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 14:08:16.961933 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 14:08:17.617485 bl2z: ptr: 05129330, size: 00001e40
574 14:08:17.625785 0.0;M3 CHK:0;cm4_sp_mode 0
575 14:08:17.626307 MVN_1=0x00000000
576 14:08:17.626765 MVN_2=0x00000000
577 14:08:17.637261 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 14:08:17.637752 OPS=0x04
579 14:08:17.638208 ring efuse init
580 14:08:17.642864 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 14:08:17.643363 [0.017319 Inits done]
582 14:08:17.643809 secure task start!
583 14:08:17.650793 high task start!
584 14:08:17.651283 low task start!
585 14:08:17.651733 run into bl31
586 14:08:17.659438 NOTICE: BL31: v1.3(release):4fc40b1
587 14:08:17.667203 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 14:08:17.667697 NOTICE: BL31: G12A normal boot!
589 14:08:17.682758 NOTICE: BL31: BL33 decompress pass
590 14:08:17.688462 ERROR: Error initializing runtime service opteed_fast
591 14:08:19.081032 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 14:08:19.081678 bl2_stage_init 0x01
593 14:08:19.082143 bl2_stage_init 0x81
594 14:08:19.086418 hw id: 0x0000 - pwm id 0x01
595 14:08:19.086919 bl2_stage_init 0xc1
596 14:08:19.092089 bl2_stage_init 0x02
597 14:08:19.092586
598 14:08:19.093037 L0:00000000
599 14:08:19.093484 L1:00000703
600 14:08:19.093921 L2:00008067
601 14:08:19.094360 L3:15000000
602 14:08:19.097671 S1:00000000
603 14:08:19.098158 B2:20282000
604 14:08:19.098604 B1:a0f83180
605 14:08:19.099040
606 14:08:19.099474 TE: 72054
607 14:08:19.099909
608 14:08:19.103154 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 14:08:19.103648
610 14:08:19.108754 Board ID = 1
611 14:08:19.109237 Set cpu clk to 24M
612 14:08:19.109686 Set clk81 to 24M
613 14:08:19.114422 Use GP1_pll as DSU clk.
614 14:08:19.114914 DSU clk: 1200 Mhz
615 14:08:19.115366 CPU clk: 1200 MHz
616 14:08:19.120053 Set clk81 to 166.6M
617 14:08:19.125663 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 14:08:19.126157 board id: 1
619 14:08:19.131886 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 14:08:19.143669 fw parse done
621 14:08:19.149799 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 14:08:19.193000 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 14:08:19.203831 PIEI prepare done
624 14:08:19.204385 fastboot data load
625 14:08:19.204844 fastboot data verify
626 14:08:19.209592 verify result: 266
627 14:08:19.215039 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 14:08:19.215534 LPDDR4 probe
629 14:08:19.216010 ddr clk to 1584MHz
630 14:08:19.223082 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 14:08:19.260816
632 14:08:19.261359 dmc_version 0001
633 14:08:19.267879 Check phy result
634 14:08:19.273859 INFO : End of CA training
635 14:08:19.274397 INFO : End of initialization
636 14:08:19.279435 INFO : Training has run successfully!
637 14:08:19.279933 Check phy result
638 14:08:19.285009 INFO : End of initialization
639 14:08:19.285502 INFO : End of read enable training
640 14:08:19.288322 INFO : End of fine write leveling
641 14:08:19.293827 INFO : End of Write leveling coarse delay
642 14:08:19.299508 INFO : Training has run successfully!
643 14:08:19.300018 Check phy result
644 14:08:19.300479 INFO : End of initialization
645 14:08:19.305075 INFO : End of read dq deskew training
646 14:08:19.310670 INFO : End of MPR read delay center optimization
647 14:08:19.311150 INFO : End of write delay center optimization
648 14:08:19.316274 INFO : End of read delay center optimization
649 14:08:19.321832 INFO : End of max read latency training
650 14:08:19.322307 INFO : Training has run successfully!
651 14:08:19.327473 1D training succeed
652 14:08:19.333462 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 14:08:19.381681 Check phy result
654 14:08:19.382212 INFO : End of initialization
655 14:08:19.409198 INFO : End of 2D read delay Voltage center optimization
656 14:08:19.433229 INFO : End of 2D read delay Voltage center optimization
657 14:08:19.489999 INFO : End of 2D write delay Voltage center optimization
658 14:08:19.543956 INFO : End of 2D write delay Voltage center optimization
659 14:08:19.549575 INFO : Training has run successfully!
660 14:08:19.550089
661 14:08:19.550550 channel==0
662 14:08:19.555149 RxClkDly_Margin_A0==78 ps 8
663 14:08:19.555647 TxDqDly_Margin_A0==98 ps 10
664 14:08:19.560601 RxClkDly_Margin_A1==69 ps 7
665 14:08:19.561126 TxDqDly_Margin_A1==88 ps 9
666 14:08:19.561586 TrainedVREFDQ_A0==74
667 14:08:19.566139 TrainedVREFDQ_A1==74
668 14:08:19.566634 VrefDac_Margin_A0==24
669 14:08:19.567085 DeviceVref_Margin_A0==40
670 14:08:19.571959 VrefDac_Margin_A1==23
671 14:08:19.572504 DeviceVref_Margin_A1==40
672 14:08:19.572973
673 14:08:19.573421
674 14:08:19.573863 channel==1
675 14:08:19.577453 RxClkDly_Margin_A0==78 ps 8
676 14:08:19.577947 TxDqDly_Margin_A0==98 ps 10
677 14:08:19.583090 RxClkDly_Margin_A1==78 ps 8
678 14:08:19.583566 TxDqDly_Margin_A1==88 ps 9
679 14:08:19.588462 TrainedVREFDQ_A0==78
680 14:08:19.588954 TrainedVREFDQ_A1==77
681 14:08:19.589410 VrefDac_Margin_A0==22
682 14:08:19.594088 DeviceVref_Margin_A0==36
683 14:08:19.594590 VrefDac_Margin_A1==22
684 14:08:19.599697 DeviceVref_Margin_A1==37
685 14:08:19.600224
686 14:08:19.600679 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 14:08:19.601125
688 14:08:19.633375 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 14:08:19.633955 2D training succeed
690 14:08:19.638944 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 14:08:19.644599 auto size-- 65535DDR cs0 size: 2048MB
692 14:08:19.645093 DDR cs1 size: 2048MB
693 14:08:19.650173 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 14:08:19.650659 cs0 DataBus test pass
695 14:08:19.655785 cs1 DataBus test pass
696 14:08:19.656333 cs0 AddrBus test pass
697 14:08:19.656796 cs1 AddrBus test pass
698 14:08:19.657236
699 14:08:19.661330 100bdlr_step_size ps== 471
700 14:08:19.661828 result report
701 14:08:19.666915 boot times 0Enable ddr reg access
702 14:08:19.672193 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 14:08:19.685918 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 14:08:20.344819 bl2z: ptr: 05129330, size: 00001e40
705 14:08:20.352087 0.0;M3 CHK:0;cm4_sp_mode 0
706 14:08:20.352502 MVN_1=0x00000000
707 14:08:20.352737 MVN_2=0x00000000
708 14:08:20.363474 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 14:08:20.363772 OPS=0x04
710 14:08:20.364008 ring efuse init
711 14:08:20.366425 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 14:08:20.372578 [0.017354 Inits done]
713 14:08:20.372871 secure task start!
714 14:08:20.373079 high task start!
715 14:08:20.373282 low task start!
716 14:08:20.376884 run into bl31
717 14:08:20.385497 NOTICE: BL31: v1.3(release):4fc40b1
718 14:08:20.393378 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 14:08:20.393803 NOTICE: BL31: G12A normal boot!
720 14:08:20.408917 NOTICE: BL31: BL33 decompress pass
721 14:08:20.414583 ERROR: Error initializing runtime service opteed_fast
722 14:08:21.208801
723 14:08:21.209456
724 14:08:21.214220 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 14:08:21.214766
726 14:08:21.217689 Model: Libre Computer AML-S905D3-CC Solitude
727 14:08:21.364551 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 14:08:21.379919 DRAM: 2 GiB (effective 3.8 GiB)
729 14:08:21.480910 Core: 406 devices, 33 uclasses, devicetree: separate
730 14:08:21.486737 WDT: Not starting watchdog@f0d0
731 14:08:21.511806 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 14:08:21.524029 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 14:08:21.529091 ** Bad device specification mmc 0 **
734 14:08:21.539124 Card did not respond to voltage select! : -110
735 14:08:21.546765 ** Bad device specification mmc 0 **
736 14:08:21.547336 Couldn't find partition mmc 0
737 14:08:21.555085 Card did not respond to voltage select! : -110
738 14:08:21.560612 ** Bad device specification mmc 0 **
739 14:08:21.561159 Couldn't find partition mmc 0
740 14:08:21.565687 Error: could not access storage.
741 14:08:21.863061 Net: eth0: ethernet@ff3f0000
742 14:08:21.863692 starting USB...
743 14:08:22.107811 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 14:08:22.108479 Starting the controller
745 14:08:22.114794 USB XHCI 1.10
746 14:08:23.671334 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 14:08:23.679729 scanning usb for storage devices... 0 Storage Device(s) found
749 14:08:23.731392 Hit any key to stop autoboot: 1
750 14:08:23.732593 end: 2.4.2 bootloader-interrupt (duration 00:00:20) [common]
751 14:08:23.733297 start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
752 14:08:23.733835 Setting prompt string to ['=>']
753 14:08:23.734374 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
754 14:08:23.745755 0
755 14:08:23.746739 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 14:08:23.848080 => setenv autoload no
758 14:08:23.849113 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
759 14:08:23.854660 setenv autoload no
761 14:08:23.956236 => setenv initrd_high 0xffffffff
762 14:08:23.957197 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 14:08:23.961484 setenv initrd_high 0xffffffff
765 14:08:24.063065 => setenv fdt_high 0xffffffff
766 14:08:24.064087 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 14:08:24.068307 setenv fdt_high 0xffffffff
769 14:08:24.169893 => dhcp
770 14:08:24.170813 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 14:08:24.174838 dhcp
772 14:08:25.180769 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 14:08:25.181393 Speed: 1000, full duplex
774 14:08:25.181854 BOOTP broadcast 1
775 14:08:25.207787 DHCP client bound to address 192.168.6.21 (26 ms)
777 14:08:25.309414 => setenv serverip 192.168.6.2
778 14:08:25.310378 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
779 14:08:25.314890 setenv serverip 192.168.6.2
781 14:08:25.416526 => tftpboot 0x01080000 970698/tftp-deploy-g9wtyx96/kernel/uImage
782 14:08:25.417411 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
783 14:08:25.424943 tftpboot 0x01080000 970698/tftp-deploy-g9wtyx96/kernel/uImage
784 14:08:25.425502 Speed: 1000, full duplex
785 14:08:25.425976 Using ethernet@ff3f0000 device
786 14:08:25.430530 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 14:08:25.435948 Filename '970698/tftp-deploy-g9wtyx96/kernel/uImage'.
788 14:08:25.439812 Load address: 0x1080000
789 14:08:28.202452 Loading: *################################################## 43.6 MiB
790 14:08:28.203126 15.8 MiB/s
791 14:08:28.203610 done
792 14:08:28.206915 Bytes transferred = 45713984 (2b98a40 hex)
794 14:08:28.308620 => tftpboot 0x08000000 970698/tftp-deploy-g9wtyx96/ramdisk/ramdisk.cpio.gz.uboot
795 14:08:28.309439 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
796 14:08:28.316341 tftpboot 0x08000000 970698/tftp-deploy-g9wtyx96/ramdisk/ramdisk.cpio.gz.uboot
797 14:08:28.316860 Speed: 1000, full duplex
798 14:08:28.317304 Using ethernet@ff3f0000 device
799 14:08:28.321801 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 14:08:28.330629 Filename '970698/tftp-deploy-g9wtyx96/ramdisk/ramdisk.cpio.gz.uboot'.
801 14:08:28.331149 Load address: 0x8000000
802 14:08:29.822379 Loading: *################################################# UDP wrong checksum 00000005 00004300
803 14:08:34.823716 T UDP wrong checksum 00000005 00004300
804 14:08:44.825946 T T UDP wrong checksum 00000005 00004300
805 14:08:59.852156 T T T UDP wrong checksum 000000ff 0000cdb5
806 14:08:59.863803 UDP wrong checksum 000000ff 0000262d
807 14:09:04.830023 T UDP wrong checksum 00000005 00004300
808 14:09:24.834657 T T T
809 14:09:24.835283 Retry count exceeded; starting again
811 14:09:24.836742 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
814 14:09:24.838478 end: 2.4 uboot-commands (duration 00:01:21) [common]
816 14:09:24.839800 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
818 14:09:24.841005 end: 2 uboot-action (duration 00:01:21) [common]
820 14:09:24.842510 Cleaning after the job
821 14:09:24.843048 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/ramdisk
822 14:09:24.844409 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/kernel
823 14:09:24.891156 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/dtb
824 14:09:24.892111 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/nfsrootfs
825 14:09:25.212059 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/970698/tftp-deploy-g9wtyx96/modules
826 14:09:25.234737 start: 4.1 power-off (timeout 00:00:30) [common]
827 14:09:25.235416 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
828 14:09:25.269161 >> OK - accepted request
829 14:09:25.271240 Returned 0 in 0 seconds
830 14:09:25.372078 end: 4.1 power-off (duration 00:00:00) [common]
832 14:09:25.373095 start: 4.2 read-feedback (timeout 00:10:00) [common]
833 14:09:25.373754 Listened to connection for namespace 'common' for up to 1s
834 14:09:26.374703 Finalising connection for namespace 'common'
835 14:09:26.375174 Disconnecting from shell: Finalise
836 14:09:26.375438 =>
837 14:09:26.476211 end: 4.2 read-feedback (duration 00:00:01) [common]
838 14:09:26.476671 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/970698
839 14:09:29.007137 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/970698
840 14:09:29.007758 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.