Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:12:41.020633 lava-dispatcher, installed at version: 2024.01
2 08:12:41.021414 start: 0 validate
3 08:12:41.021884 Start time: 2024-11-11 08:12:41.021855+00:00 (UTC)
4 08:12:41.022431 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:12:41.022962 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:12:41.062707 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:12:41.063281 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:12:41.095262 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:12:41.095871 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 08:12:41.127764 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:12:41.128268 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:12:41.162356 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:12:41.162854 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 08:12:41.205130 validate duration: 0.18
16 08:12:41.205946 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:12:41.206267 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:12:41.206555 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:12:41.207142 Not decompressing ramdisk as can be used compressed.
20 08:12:41.207589 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 08:12:41.207852 saving as /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/ramdisk/initrd.cpio.gz
22 08:12:41.208136 total size: 5628182 (5 MB)
23 08:12:41.244518 progress 0 % (0 MB)
24 08:12:41.252209 progress 5 % (0 MB)
25 08:12:41.260458 progress 10 % (0 MB)
26 08:12:41.267860 progress 15 % (0 MB)
27 08:12:41.274161 progress 20 % (1 MB)
28 08:12:41.278005 progress 25 % (1 MB)
29 08:12:41.282097 progress 30 % (1 MB)
30 08:12:41.286262 progress 35 % (1 MB)
31 08:12:41.290003 progress 40 % (2 MB)
32 08:12:41.294030 progress 45 % (2 MB)
33 08:12:41.297688 progress 50 % (2 MB)
34 08:12:41.301876 progress 55 % (2 MB)
35 08:12:41.305994 progress 60 % (3 MB)
36 08:12:41.309651 progress 65 % (3 MB)
37 08:12:41.313714 progress 70 % (3 MB)
38 08:12:41.317516 progress 75 % (4 MB)
39 08:12:41.321630 progress 80 % (4 MB)
40 08:12:41.325278 progress 85 % (4 MB)
41 08:12:41.329383 progress 90 % (4 MB)
42 08:12:41.333326 progress 95 % (5 MB)
43 08:12:41.336639 progress 100 % (5 MB)
44 08:12:41.337295 5 MB downloaded in 0.13 s (41.56 MB/s)
45 08:12:41.337848 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:12:41.338743 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:12:41.339034 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:12:41.339303 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:12:41.339775 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/kernel/Image
51 08:12:41.340055 saving as /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/kernel/Image
52 08:12:41.340271 total size: 45713920 (43 MB)
53 08:12:41.340483 No compression specified
54 08:12:41.377900 progress 0 % (0 MB)
55 08:12:41.407338 progress 5 % (2 MB)
56 08:12:41.437531 progress 10 % (4 MB)
57 08:12:41.467195 progress 15 % (6 MB)
58 08:12:41.496588 progress 20 % (8 MB)
59 08:12:41.528282 progress 25 % (10 MB)
60 08:12:41.561011 progress 30 % (13 MB)
61 08:12:41.590612 progress 35 % (15 MB)
62 08:12:41.620210 progress 40 % (17 MB)
63 08:12:41.649279 progress 45 % (19 MB)
64 08:12:41.678504 progress 50 % (21 MB)
65 08:12:41.707897 progress 55 % (24 MB)
66 08:12:41.737294 progress 60 % (26 MB)
67 08:12:41.766274 progress 65 % (28 MB)
68 08:12:41.795861 progress 70 % (30 MB)
69 08:12:41.825177 progress 75 % (32 MB)
70 08:12:41.854374 progress 80 % (34 MB)
71 08:12:41.883444 progress 85 % (37 MB)
72 08:12:41.912848 progress 90 % (39 MB)
73 08:12:41.942346 progress 95 % (41 MB)
74 08:12:41.971143 progress 100 % (43 MB)
75 08:12:41.971704 43 MB downloaded in 0.63 s (69.04 MB/s)
76 08:12:41.972234 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:12:41.973100 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:12:41.973393 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:12:41.973671 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:12:41.974151 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 08:12:41.974429 saving as /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 08:12:41.974648 total size: 53209 (0 MB)
84 08:12:41.974866 No compression specified
85 08:12:42.014348 progress 61 % (0 MB)
86 08:12:42.015201 progress 100 % (0 MB)
87 08:12:42.015740 0 MB downloaded in 0.04 s (1.24 MB/s)
88 08:12:42.016280 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:12:42.017223 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:12:42.017494 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:12:42.017759 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:12:42.018224 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 08:12:42.018468 saving as /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/nfsrootfs/full.rootfs.tar
95 08:12:42.018673 total size: 107552908 (102 MB)
96 08:12:42.018883 Using unxz to decompress xz
97 08:12:42.052522 progress 0 % (0 MB)
98 08:12:42.703538 progress 5 % (5 MB)
99 08:12:43.458671 progress 10 % (10 MB)
100 08:12:44.183393 progress 15 % (15 MB)
101 08:12:44.933910 progress 20 % (20 MB)
102 08:12:45.501296 progress 25 % (25 MB)
103 08:12:46.122524 progress 30 % (30 MB)
104 08:12:46.853924 progress 35 % (35 MB)
105 08:12:47.209217 progress 40 % (41 MB)
106 08:12:47.643847 progress 45 % (46 MB)
107 08:12:48.337305 progress 50 % (51 MB)
108 08:12:49.026552 progress 55 % (56 MB)
109 08:12:49.785616 progress 60 % (61 MB)
110 08:12:50.540640 progress 65 % (66 MB)
111 08:12:51.272298 progress 70 % (71 MB)
112 08:12:52.072895 progress 75 % (76 MB)
113 08:12:52.750212 progress 80 % (82 MB)
114 08:12:53.452823 progress 85 % (87 MB)
115 08:12:54.191521 progress 90 % (92 MB)
116 08:12:54.905992 progress 95 % (97 MB)
117 08:12:55.652091 progress 100 % (102 MB)
118 08:12:55.664688 102 MB downloaded in 13.65 s (7.52 MB/s)
119 08:12:55.665563 end: 1.4.1 http-download (duration 00:00:14) [common]
121 08:12:55.667169 end: 1.4 download-retry (duration 00:00:14) [common]
122 08:12:55.667682 start: 1.5 download-retry (timeout 00:09:46) [common]
123 08:12:55.668230 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 08:12:55.669253 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/modules.tar.xz
125 08:12:55.669736 saving as /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/modules/modules.tar
126 08:12:55.670148 total size: 11612196 (11 MB)
127 08:12:55.670573 Using unxz to decompress xz
128 08:12:55.711231 progress 0 % (0 MB)
129 08:12:55.779857 progress 5 % (0 MB)
130 08:12:55.857422 progress 10 % (1 MB)
131 08:12:55.956543 progress 15 % (1 MB)
132 08:12:56.050936 progress 20 % (2 MB)
133 08:12:56.133634 progress 25 % (2 MB)
134 08:12:56.210637 progress 30 % (3 MB)
135 08:12:56.291904 progress 35 % (3 MB)
136 08:12:56.366710 progress 40 % (4 MB)
137 08:12:56.446393 progress 45 % (5 MB)
138 08:12:56.533914 progress 50 % (5 MB)
139 08:12:56.614274 progress 55 % (6 MB)
140 08:12:56.701748 progress 60 % (6 MB)
141 08:12:56.785989 progress 65 % (7 MB)
142 08:12:56.868929 progress 70 % (7 MB)
143 08:12:56.947418 progress 75 % (8 MB)
144 08:12:57.032404 progress 80 % (8 MB)
145 08:12:57.116036 progress 85 % (9 MB)
146 08:12:57.195027 progress 90 % (9 MB)
147 08:12:57.272684 progress 95 % (10 MB)
148 08:12:57.349182 progress 100 % (11 MB)
149 08:12:57.361631 11 MB downloaded in 1.69 s (6.55 MB/s)
150 08:12:57.362493 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:12:57.364114 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:12:57.364643 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 08:12:57.365158 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 08:13:07.166395 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/974135/extract-nfsrootfs-l30u5eno
156 08:13:07.167016 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 08:13:07.167309 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 08:13:07.167942 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll
159 08:13:07.168458 makedir: /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin
160 08:13:07.168796 makedir: /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/tests
161 08:13:07.169110 makedir: /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/results
162 08:13:07.169454 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-add-keys
163 08:13:07.170002 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-add-sources
164 08:13:07.170526 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-background-process-start
165 08:13:07.171029 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-background-process-stop
166 08:13:07.171613 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-common-functions
167 08:13:07.172162 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-echo-ipv4
168 08:13:07.172676 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-install-packages
169 08:13:07.173180 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-installed-packages
170 08:13:07.173673 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-os-build
171 08:13:07.174166 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-probe-channel
172 08:13:07.174659 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-probe-ip
173 08:13:07.175146 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-target-ip
174 08:13:07.175632 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-target-mac
175 08:13:07.176175 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-target-storage
176 08:13:07.176733 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-test-case
177 08:13:07.177268 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-test-event
178 08:13:07.177776 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-test-feedback
179 08:13:07.178273 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-test-raise
180 08:13:07.178772 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-test-reference
181 08:13:07.179263 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-test-runner
182 08:13:07.179755 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-test-set
183 08:13:07.180404 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-test-shell
184 08:13:07.180956 Updating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-install-packages (oe)
185 08:13:07.181538 Updating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/bin/lava-installed-packages (oe)
186 08:13:07.181993 Creating /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/environment
187 08:13:07.182380 LAVA metadata
188 08:13:07.182649 - LAVA_JOB_ID=974135
189 08:13:07.182866 - LAVA_DISPATCHER_IP=192.168.6.2
190 08:13:07.183252 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 08:13:07.184316 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 08:13:07.184661 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 08:13:07.184874 skipped lava-vland-overlay
194 08:13:07.185119 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 08:13:07.185377 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 08:13:07.185599 skipped lava-multinode-overlay
197 08:13:07.185846 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 08:13:07.186104 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 08:13:07.186359 Loading test definitions
200 08:13:07.186644 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 08:13:07.186867 Using /lava-974135 at stage 0
202 08:13:07.188128 uuid=974135_1.6.2.4.1 testdef=None
203 08:13:07.188471 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 08:13:07.188740 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 08:13:07.190655 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 08:13:07.191472 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 08:13:07.193851 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 08:13:07.194701 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 08:13:07.196985 runner path: /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/0/tests/0_dmesg test_uuid 974135_1.6.2.4.1
212 08:13:07.197612 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 08:13:07.198392 Creating lava-test-runner.conf files
215 08:13:07.198597 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/974135/lava-overlay-hdjigsll/lava-974135/0 for stage 0
216 08:13:07.198952 - 0_dmesg
217 08:13:07.199315 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 08:13:07.199600 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 08:13:07.221627 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 08:13:07.222078 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 08:13:07.222347 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 08:13:07.222618 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 08:13:07.222886 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 08:13:07.847884 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 08:13:07.848405 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 08:13:07.848674 extracting modules file /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974135/extract-nfsrootfs-l30u5eno
227 08:13:09.233606 extracting modules file /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974135/extract-overlay-ramdisk-zm12k5f1/ramdisk
228 08:13:10.656473 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 08:13:10.656995 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 08:13:10.657324 [common] Applying overlay to NFS
231 08:13:10.657559 [common] Applying overlay /var/lib/lava/dispatcher/tmp/974135/compress-overlay-bhc8wilu/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/974135/extract-nfsrootfs-l30u5eno
232 08:13:10.688271 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 08:13:10.688781 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 08:13:10.689112 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 08:13:10.689366 Converting downloaded kernel to a uImage
236 08:13:10.689706 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/kernel/Image /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/kernel/uImage
237 08:13:11.205045 output: Image Name:
238 08:13:11.205463 output: Created: Mon Nov 11 08:13:10 2024
239 08:13:11.205677 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 08:13:11.205883 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 08:13:11.206085 output: Load Address: 01080000
242 08:13:11.206285 output: Entry Point: 01080000
243 08:13:11.206485 output:
244 08:13:11.206822 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 08:13:11.207093 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 08:13:11.207364 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 08:13:11.207617 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 08:13:11.207875 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 08:13:11.208174 Building ramdisk /var/lib/lava/dispatcher/tmp/974135/extract-overlay-ramdisk-zm12k5f1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/974135/extract-overlay-ramdisk-zm12k5f1/ramdisk
250 08:13:13.646070 >> 166829 blocks
251 08:13:21.338599 Adding RAMdisk u-boot header.
252 08:13:21.339024 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/974135/extract-overlay-ramdisk-zm12k5f1/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/974135/extract-overlay-ramdisk-zm12k5f1/ramdisk.cpio.gz.uboot
253 08:13:21.597720 output: Image Name:
254 08:13:21.598120 output: Created: Mon Nov 11 08:13:21 2024
255 08:13:21.598333 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 08:13:21.598539 output: Data Size: 23436111 Bytes = 22886.83 KiB = 22.35 MiB
257 08:13:21.598740 output: Load Address: 00000000
258 08:13:21.598940 output: Entry Point: 00000000
259 08:13:21.599134 output:
260 08:13:21.599811 rename /var/lib/lava/dispatcher/tmp/974135/extract-overlay-ramdisk-zm12k5f1/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/ramdisk/ramdisk.cpio.gz.uboot
261 08:13:21.600505 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 08:13:21.601128 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 08:13:21.601706 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 08:13:21.602204 No LXC device requested
265 08:13:21.602754 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 08:13:21.603308 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 08:13:21.603850 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 08:13:21.604339 Checking files for TFTP limit of 4294967296 bytes.
269 08:13:21.607263 end: 1 tftp-deploy (duration 00:00:40) [common]
270 08:13:21.607888 start: 2 uboot-action (timeout 00:05:00) [common]
271 08:13:21.608528 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 08:13:21.609082 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 08:13:21.609637 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 08:13:21.610214 Using kernel file from prepare-kernel: 974135/tftp-deploy-tdgkveu7/kernel/uImage
275 08:13:21.610904 substitutions:
276 08:13:21.611353 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 08:13:21.611799 - {DTB_ADDR}: 0x01070000
278 08:13:21.612271 - {DTB}: 974135/tftp-deploy-tdgkveu7/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 08:13:21.612712 - {INITRD}: 974135/tftp-deploy-tdgkveu7/ramdisk/ramdisk.cpio.gz.uboot
280 08:13:21.613151 - {KERNEL_ADDR}: 0x01080000
281 08:13:21.613583 - {KERNEL}: 974135/tftp-deploy-tdgkveu7/kernel/uImage
282 08:13:21.614017 - {LAVA_MAC}: None
283 08:13:21.614492 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/974135/extract-nfsrootfs-l30u5eno
284 08:13:21.614932 - {NFS_SERVER_IP}: 192.168.6.2
285 08:13:21.615362 - {PRESEED_CONFIG}: None
286 08:13:21.615791 - {PRESEED_LOCAL}: None
287 08:13:21.616283 - {RAMDISK_ADDR}: 0x08000000
288 08:13:21.616717 - {RAMDISK}: 974135/tftp-deploy-tdgkveu7/ramdisk/ramdisk.cpio.gz.uboot
289 08:13:21.617149 - {ROOT_PART}: None
290 08:13:21.617576 - {ROOT}: None
291 08:13:21.618005 - {SERVER_IP}: 192.168.6.2
292 08:13:21.618433 - {TEE_ADDR}: 0x83000000
293 08:13:21.618859 - {TEE}: None
294 08:13:21.619290 Parsed boot commands:
295 08:13:21.619708 - setenv autoload no
296 08:13:21.620162 - setenv initrd_high 0xffffffff
297 08:13:21.620593 - setenv fdt_high 0xffffffff
298 08:13:21.621018 - dhcp
299 08:13:21.621443 - setenv serverip 192.168.6.2
300 08:13:21.621874 - tftpboot 0x01080000 974135/tftp-deploy-tdgkveu7/kernel/uImage
301 08:13:21.622301 - tftpboot 0x08000000 974135/tftp-deploy-tdgkveu7/ramdisk/ramdisk.cpio.gz.uboot
302 08:13:21.622730 - tftpboot 0x01070000 974135/tftp-deploy-tdgkveu7/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 08:13:21.623163 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/974135/extract-nfsrootfs-l30u5eno,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 08:13:21.623606 - bootm 0x01080000 0x08000000 0x01070000
305 08:13:21.624190 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 08:13:21.625842 start: 2.3 connect-device (timeout 00:05:00) [common]
308 08:13:21.626303 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 08:13:21.640903 Setting prompt string to ['lava-test: # ']
310 08:13:21.642549 end: 2.3 connect-device (duration 00:00:00) [common]
311 08:13:21.643205 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 08:13:21.643795 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 08:13:21.644571 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 08:13:21.645847 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 08:13:21.683905 >> OK - accepted request
316 08:13:21.686884 Returned 0 in 0 seconds
317 08:13:21.788266 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 08:13:21.789651 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 08:13:21.789989 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 08:13:21.790300 Setting prompt string to ['Hit any key to stop autoboot']
322 08:13:21.790829 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 08:13:21.792639 Trying 192.168.56.21...
324 08:13:21.793212 Connected to conserv1.
325 08:13:21.793537 Escape character is '^]'.
326 08:13:21.793780
327 08:13:21.794019 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 08:13:21.794257
329 08:13:28.987287 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 08:13:28.987687 bl2_stage_init 0x01
331 08:13:28.987922 bl2_stage_init 0x81
332 08:13:28.992830 hw id: 0x0000 - pwm id 0x01
333 08:13:28.993131 bl2_stage_init 0xc1
334 08:13:28.998489 bl2_stage_init 0x02
335 08:13:28.998774
336 08:13:28.998991 L0:00000000
337 08:13:28.999195 L1:00000703
338 08:13:28.999398 L2:00008067
339 08:13:28.999595 L3:15000000
340 08:13:29.004054 S1:00000000
341 08:13:29.004335 B2:20282000
342 08:13:29.004553 B1:a0f83180
343 08:13:29.004761
344 08:13:29.004965 TE: 73070
345 08:13:29.005166
346 08:13:29.009621 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 08:13:29.009909
348 08:13:29.015359 Board ID = 1
349 08:13:29.015670 Set cpu clk to 24M
350 08:13:29.015881 Set clk81 to 24M
351 08:13:29.020949 Use GP1_pll as DSU clk.
352 08:13:29.021270 DSU clk: 1200 Mhz
353 08:13:29.021480 CPU clk: 1200 MHz
354 08:13:29.026535 Set clk81 to 166.6M
355 08:13:29.031976 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 08:13:29.032277 board id: 1
357 08:13:29.039227 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 08:13:29.049968 fw parse done
359 08:13:29.055928 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 08:13:29.098578 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 08:13:29.109489 PIEI prepare done
362 08:13:29.109821 fastboot data load
363 08:13:29.110037 fastboot data verify
364 08:13:29.115047 verify result: 266
365 08:13:29.120618 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 08:13:29.120918 LPDDR4 probe
367 08:13:29.121131 ddr clk to 1584MHz
368 08:13:29.128621 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 08:13:29.165958
370 08:13:29.166342 dmc_version 0001
371 08:13:29.172543 Check phy result
372 08:13:29.178456 INFO : End of CA training
373 08:13:29.178761 INFO : End of initialization
374 08:13:29.184062 INFO : Training has run successfully!
375 08:13:29.184353 Check phy result
376 08:13:29.189670 INFO : End of initialization
377 08:13:29.189962 INFO : End of read enable training
378 08:13:29.195229 INFO : End of fine write leveling
379 08:13:29.200925 INFO : End of Write leveling coarse delay
380 08:13:29.201194 INFO : Training has run successfully!
381 08:13:29.201399 Check phy result
382 08:13:29.206419 INFO : End of initialization
383 08:13:29.206695 INFO : End of read dq deskew training
384 08:13:29.212050 INFO : End of MPR read delay center optimization
385 08:13:29.217645 INFO : End of write delay center optimization
386 08:13:29.223206 INFO : End of read delay center optimization
387 08:13:29.223477 INFO : End of max read latency training
388 08:13:29.228937 INFO : Training has run successfully!
389 08:13:29.229200 1D training succeed
390 08:13:29.238050 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 08:13:29.285738 Check phy result
392 08:13:29.286116 INFO : End of initialization
393 08:13:29.307118 INFO : End of 2D read delay Voltage center optimization
394 08:13:29.327151 INFO : End of 2D read delay Voltage center optimization
395 08:13:29.379205 INFO : End of 2D write delay Voltage center optimization
396 08:13:29.428281 INFO : End of 2D write delay Voltage center optimization
397 08:13:29.433739 INFO : Training has run successfully!
398 08:13:29.434045
399 08:13:29.434264 channel==0
400 08:13:29.439429 RxClkDly_Margin_A0==88 ps 9
401 08:13:29.439713 TxDqDly_Margin_A0==98 ps 10
402 08:13:29.442669 RxClkDly_Margin_A1==88 ps 9
403 08:13:29.442952 TxDqDly_Margin_A1==98 ps 10
404 08:13:29.448208 TrainedVREFDQ_A0==74
405 08:13:29.448502 TrainedVREFDQ_A1==74
406 08:13:29.453828 VrefDac_Margin_A0==24
407 08:13:29.454098 DeviceVref_Margin_A0==40
408 08:13:29.454308 VrefDac_Margin_A1==23
409 08:13:29.459399 DeviceVref_Margin_A1==40
410 08:13:29.459670
411 08:13:29.459885
412 08:13:29.460139 channel==1
413 08:13:29.460344 RxClkDly_Margin_A0==88 ps 9
414 08:13:29.462731 TxDqDly_Margin_A0==88 ps 9
415 08:13:29.468329 RxClkDly_Margin_A1==88 ps 9
416 08:13:29.468604 TxDqDly_Margin_A1==88 ps 9
417 08:13:29.468818 TrainedVREFDQ_A0==75
418 08:13:29.473984 TrainedVREFDQ_A1==75
419 08:13:29.474265 VrefDac_Margin_A0==22
420 08:13:29.479600 DeviceVref_Margin_A0==39
421 08:13:29.479880 VrefDac_Margin_A1==20
422 08:13:29.480119 DeviceVref_Margin_A1==39
423 08:13:29.480327
424 08:13:29.485125 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 08:13:29.485400
426 08:13:29.518742 soc_vref_reg_value 0x 0000001a 00000019 00000019 00000017 00000019 00000015 00000018 00000016 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 08:13:29.519158 2D training succeed
428 08:13:29.524322 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 08:13:29.529988 auto size-- 65535DDR cs0 size: 2048MB
430 08:13:29.530292 DDR cs1 size: 2048MB
431 08:13:29.535573 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 08:13:29.535889 cs0 DataBus test pass
433 08:13:29.536211 cs1 DataBus test pass
434 08:13:29.541147 cs0 AddrBus test pass
435 08:13:29.541626 cs1 AddrBus test pass
436 08:13:29.542060
437 08:13:29.546804 100bdlr_step_size ps== 478
438 08:13:29.547354 result report
439 08:13:29.547796 boot times 0Enable ddr reg access
440 08:13:29.556619 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 08:13:29.570394 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 08:13:30.225110 bl2z: ptr: 05129330, size: 00001e40
443 08:13:30.232662 0.0;M3 CHK:0;cm4_sp_mode 0
444 08:13:30.233160 MVN_1=0x00000000
445 08:13:30.233611 MVN_2=0x00000000
446 08:13:30.244158 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 08:13:30.244649 OPS=0x04
448 08:13:30.245101 ring efuse init
449 08:13:30.249752 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 08:13:30.250237 [0.017319 Inits done]
451 08:13:30.250678 secure task start!
452 08:13:30.257186 high task start!
453 08:13:30.257664 low task start!
454 08:13:30.258112 run into bl31
455 08:13:30.265753 NOTICE: BL31: v1.3(release):4fc40b1
456 08:13:30.273480 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 08:13:30.274008 NOTICE: BL31: G12A normal boot!
458 08:13:30.288970 NOTICE: BL31: BL33 decompress pass
459 08:13:30.294683 ERROR: Error initializing runtime service opteed_fast
460 08:13:33.031490 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 08:13:33.032253 bl2_stage_init 0x01
462 08:13:33.032735 bl2_stage_init 0x81
463 08:13:33.037355 hw id: 0x0000 - pwm id 0x01
464 08:13:33.037920 bl2_stage_init 0xc1
465 08:13:33.042644 bl2_stage_init 0x02
466 08:13:33.043203
467 08:13:33.043648 L0:00000000
468 08:13:33.044132 L1:00000703
469 08:13:33.044574 L2:00008067
470 08:13:33.045005 L3:15000000
471 08:13:33.048162 S1:00000000
472 08:13:33.048652 B2:20282000
473 08:13:33.049083 B1:a0f83180
474 08:13:33.049508
475 08:13:33.049938 TE: 68475
476 08:13:33.050367
477 08:13:33.053864 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 08:13:33.054405
479 08:13:33.059221 Board ID = 1
480 08:13:33.059703 Set cpu clk to 24M
481 08:13:33.060176 Set clk81 to 24M
482 08:13:33.064824 Use GP1_pll as DSU clk.
483 08:13:33.065304 DSU clk: 1200 Mhz
484 08:13:33.065734 CPU clk: 1200 MHz
485 08:13:33.070592 Set clk81 to 166.6M
486 08:13:33.076246 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 08:13:33.076732 board id: 1
488 08:13:33.083274 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 08:13:33.094133 fw parse done
490 08:13:33.100094 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 08:13:33.143225 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 08:13:33.154454 PIEI prepare done
493 08:13:33.155005 fastboot data load
494 08:13:33.155442 fastboot data verify
495 08:13:33.159956 verify result: 266
496 08:13:33.165586 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 08:13:33.166073 LPDDR4 probe
498 08:13:33.166501 ddr clk to 1584MHz
499 08:13:33.173650 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 08:13:33.211332
501 08:13:33.211852 dmc_version 0001
502 08:13:33.218315 Check phy result
503 08:13:33.224336 INFO : End of CA training
504 08:13:33.224849 INFO : End of initialization
505 08:13:33.229985 INFO : Training has run successfully!
506 08:13:33.230473 Check phy result
507 08:13:33.235627 INFO : End of initialization
508 08:13:33.236161 INFO : End of read enable training
509 08:13:33.241168 INFO : End of fine write leveling
510 08:13:33.246762 INFO : End of Write leveling coarse delay
511 08:13:33.247261 INFO : Training has run successfully!
512 08:13:33.247711 Check phy result
513 08:13:33.252326 INFO : End of initialization
514 08:13:33.252817 INFO : End of read dq deskew training
515 08:13:33.257951 INFO : End of MPR read delay center optimization
516 08:13:33.263611 INFO : End of write delay center optimization
517 08:13:33.269180 INFO : End of read delay center optimization
518 08:13:33.269680 INFO : End of max read latency training
519 08:13:33.274749 INFO : Training has run successfully!
520 08:13:33.275240 1D training succeed
521 08:13:33.283957 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 08:13:33.332302 Check phy result
523 08:13:33.332861 INFO : End of initialization
524 08:13:33.359793 INFO : End of 2D read delay Voltage center optimization
525 08:13:33.383896 INFO : End of 2D read delay Voltage center optimization
526 08:13:33.440780 INFO : End of 2D write delay Voltage center optimization
527 08:13:33.494709 INFO : End of 2D write delay Voltage center optimization
528 08:13:33.500286 INFO : Training has run successfully!
529 08:13:33.500823
530 08:13:33.501281 channel==0
531 08:13:33.505771 RxClkDly_Margin_A0==69 ps 7
532 08:13:33.506299 TxDqDly_Margin_A0==88 ps 9
533 08:13:33.509119 RxClkDly_Margin_A1==88 ps 9
534 08:13:33.509646 TxDqDly_Margin_A1==88 ps 9
535 08:13:33.514827 TrainedVREFDQ_A0==74
536 08:13:33.515371 TrainedVREFDQ_A1==74
537 08:13:33.515826 VrefDac_Margin_A0==25
538 08:13:33.520386 DeviceVref_Margin_A0==40
539 08:13:33.520934 VrefDac_Margin_A1==23
540 08:13:33.525922 DeviceVref_Margin_A1==40
541 08:13:33.526483
542 08:13:33.526960
543 08:13:33.527453 channel==1
544 08:13:33.527952 RxClkDly_Margin_A0==78 ps 8
545 08:13:33.531534 TxDqDly_Margin_A0==78 ps 8
546 08:13:33.532106 RxClkDly_Margin_A1==78 ps 8
547 08:13:33.537033 TxDqDly_Margin_A1==88 ps 9
548 08:13:33.537591 TrainedVREFDQ_A0==75
549 08:13:33.538066 TrainedVREFDQ_A1==77
550 08:13:33.542698 VrefDac_Margin_A0==22
551 08:13:33.543259 DeviceVref_Margin_A0==39
552 08:13:33.543712 VrefDac_Margin_A1==22
553 08:13:33.548267 DeviceVref_Margin_A1==37
554 08:13:33.548843
555 08:13:33.553833 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 08:13:33.554387
557 08:13:33.581844 soc_vref_reg_value 0x 00000019 00000019 00000018 00000017 00000019 00000015 00000018 00000016 00000018 00000017 00000017 00000018 00000018 00000018 00000018 00000019 00000019 00000018 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000019 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
558 08:13:33.587447 2D training succeed
559 08:13:33.593048 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 08:13:33.593610 auto size-- 65535DDR cs0 size: 2048MB
561 08:13:33.598706 DDR cs1 size: 2048MB
562 08:13:33.599249 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 08:13:33.604271 cs0 DataBus test pass
564 08:13:33.604801 cs1 DataBus test pass
565 08:13:33.605252 cs0 AddrBus test pass
566 08:13:33.609870 cs1 AddrBus test pass
567 08:13:33.610396
568 08:13:33.610850 100bdlr_step_size ps== 471
569 08:13:33.611298 result report
570 08:13:33.615436 boot times 0Enable ddr reg access
571 08:13:33.622800 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 08:13:33.636631 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 08:13:34.296402 bl2z: ptr: 05129330, size: 00001e40
574 08:13:34.305100 0.0;M3 CHK:0;cm4_sp_mode 0
575 08:13:34.305667 MVN_1=0x00000000
576 08:13:34.306129 MVN_2=0x00000000
577 08:13:34.316473 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 08:13:34.317019 OPS=0x04
579 08:13:34.317486 ring efuse init
580 08:13:34.322106 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 08:13:34.322678 [0.017354 Inits done]
582 08:13:34.323290 secure task start!
583 08:13:34.329238 high task start!
584 08:13:34.329770 low task start!
585 08:13:34.330226 run into bl31
586 08:13:34.338793 NOTICE: BL31: v1.3(release):4fc40b1
587 08:13:34.346221 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 08:13:34.346758 NOTICE: BL31: G12A normal boot!
589 08:13:34.362119 NOTICE: BL31: BL33 decompress pass
590 08:13:34.367303 ERROR: Error initializing runtime service opteed_fast
591 08:13:35.732714 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 08:13:35.733365 bl2_stage_init 0x01
593 08:13:35.733839 bl2_stage_init 0x81
594 08:13:35.738352 hw id: 0x0000 - pwm id 0x01
595 08:13:35.738885 bl2_stage_init 0xc1
596 08:13:35.744001 bl2_stage_init 0x02
597 08:13:35.744547
598 08:13:35.745010 L0:00000000
599 08:13:35.745458 L1:00000703
600 08:13:35.745901 L2:00008067
601 08:13:35.746343 L3:15000000
602 08:13:35.749660 S1:00000000
603 08:13:35.750217 B2:20282000
604 08:13:35.750670 B1:a0f83180
605 08:13:35.751112
606 08:13:35.751553 TE: 69531
607 08:13:35.752026
608 08:13:35.755159 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 08:13:35.755734
610 08:13:35.760846 Board ID = 1
611 08:13:35.761450 Set cpu clk to 24M
612 08:13:35.761910 Set clk81 to 24M
613 08:13:35.766426 Use GP1_pll as DSU clk.
614 08:13:35.767011 DSU clk: 1200 Mhz
615 08:13:35.767474 CPU clk: 1200 MHz
616 08:13:35.772025 Set clk81 to 166.6M
617 08:13:35.777634 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 08:13:35.778203 board id: 1
619 08:13:35.784752 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 08:13:35.795633 fw parse done
621 08:13:35.801574 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 08:13:35.844671 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 08:13:35.855836 PIEI prepare done
624 08:13:35.856426 fastboot data load
625 08:13:35.856891 fastboot data verify
626 08:13:35.861430 verify result: 266
627 08:13:35.867040 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 08:13:35.867564 LPDDR4 probe
629 08:13:35.868048 ddr clk to 1584MHz
630 08:13:35.875051 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 08:13:35.912732
632 08:13:35.913304 dmc_version 0001
633 08:13:35.919739 Check phy result
634 08:13:35.925775 INFO : End of CA training
635 08:13:35.926293 INFO : End of initialization
636 08:13:35.931327 INFO : Training has run successfully!
637 08:13:35.931843 Check phy result
638 08:13:35.937016 INFO : End of initialization
639 08:13:35.937556 INFO : End of read enable training
640 08:13:35.942619 INFO : End of fine write leveling
641 08:13:35.948137 INFO : End of Write leveling coarse delay
642 08:13:35.948653 INFO : Training has run successfully!
643 08:13:35.949103 Check phy result
644 08:13:35.953764 INFO : End of initialization
645 08:13:35.954273 INFO : End of read dq deskew training
646 08:13:35.959330 INFO : End of MPR read delay center optimization
647 08:13:35.964970 INFO : End of write delay center optimization
648 08:13:35.970533 INFO : End of read delay center optimization
649 08:13:35.971049 INFO : End of max read latency training
650 08:13:35.976172 INFO : Training has run successfully!
651 08:13:35.976686 1D training succeed
652 08:13:35.985267 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 08:13:36.032674 Check phy result
654 08:13:36.033238 INFO : End of initialization
655 08:13:36.061102 INFO : End of 2D read delay Voltage center optimization
656 08:13:36.085140 INFO : End of 2D read delay Voltage center optimization
657 08:13:36.140946 INFO : End of 2D write delay Voltage center optimization
658 08:13:36.195761 INFO : End of 2D write delay Voltage center optimization
659 08:13:36.201320 INFO : Training has run successfully!
660 08:13:36.201833
661 08:13:36.202290 channel==0
662 08:13:36.207064 RxClkDly_Margin_A0==78 ps 8
663 08:13:36.207605 TxDqDly_Margin_A0==88 ps 9
664 08:13:36.212537 RxClkDly_Margin_A1==88 ps 9
665 08:13:36.213048 TxDqDly_Margin_A1==98 ps 10
666 08:13:36.213500 TrainedVREFDQ_A0==74
667 08:13:36.218115 TrainedVREFDQ_A1==74
668 08:13:36.218631 VrefDac_Margin_A0==23
669 08:13:36.219080 DeviceVref_Margin_A0==40
670 08:13:36.223710 VrefDac_Margin_A1==23
671 08:13:36.224248 DeviceVref_Margin_A1==40
672 08:13:36.224704
673 08:13:36.225148
674 08:13:36.225585 channel==1
675 08:13:36.229317 RxClkDly_Margin_A0==88 ps 9
676 08:13:36.229822 TxDqDly_Margin_A0==98 ps 10
677 08:13:36.235035 RxClkDly_Margin_A1==78 ps 8
678 08:13:36.235541 TxDqDly_Margin_A1==88 ps 9
679 08:13:36.240521 TrainedVREFDQ_A0==78
680 08:13:36.241034 TrainedVREFDQ_A1==75
681 08:13:36.241481 VrefDac_Margin_A0==22
682 08:13:36.246120 DeviceVref_Margin_A0==36
683 08:13:36.246629 VrefDac_Margin_A1==20
684 08:13:36.251701 DeviceVref_Margin_A1==39
685 08:13:36.252243
686 08:13:36.252702 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 08:13:36.253146
688 08:13:36.285257 soc_vref_reg_value 0x 0000001a 00000019 00000018 00000017 00000019 00000016 00000018 00000016 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000019 00000018 00000018 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
689 08:13:36.285853 2D training succeed
690 08:13:36.291074 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 08:13:36.296558 auto size-- 65535DDR cs0 size: 2048MB
692 08:13:36.297099 DDR cs1 size: 2048MB
693 08:13:36.302129 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 08:13:36.302637 cs0 DataBus test pass
695 08:13:36.307722 cs1 DataBus test pass
696 08:13:36.308285 cs0 AddrBus test pass
697 08:13:36.308743 cs1 AddrBus test pass
698 08:13:36.309184
699 08:13:36.313328 100bdlr_step_size ps== 471
700 08:13:36.313849 result report
701 08:13:36.319043 boot times 0Enable ddr reg access
702 08:13:36.324125 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 08:13:36.337883 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 08:13:36.997073 bl2z: ptr: 05129330, size: 00001e40
705 08:13:37.006531 0.0;M3 CHK:0;cm4_sp_mode 0
706 08:13:37.007070 MVN_1=0x00000000
707 08:13:37.007528 MVN_2=0x00000000
708 08:13:37.018076 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 08:13:37.018636 OPS=0x04
710 08:13:37.019100 ring efuse init
711 08:13:37.023649 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 08:13:37.024220 [0.017354 Inits done]
713 08:13:37.024679 secure task start!
714 08:13:37.030994 high task start!
715 08:13:37.031514 low task start!
716 08:13:37.031965 run into bl31
717 08:13:37.039591 NOTICE: BL31: v1.3(release):4fc40b1
718 08:13:37.047390 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 08:13:37.047917 NOTICE: BL31: G12A normal boot!
720 08:13:37.062910 NOTICE: BL31: BL33 decompress pass
721 08:13:37.068595 ERROR: Error initializing runtime service opteed_fast
722 08:13:37.862416
723 08:13:37.862814
724 08:13:37.867864 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 08:13:37.868201
726 08:13:37.871596 Model: Libre Computer AML-S905D3-CC Solitude
727 08:13:38.018356 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 08:13:38.033671 DRAM: 2 GiB (effective 3.8 GiB)
729 08:13:38.135651 Core: 406 devices, 33 uclasses, devicetree: separate
730 08:13:38.140713 WDT: Not starting watchdog@f0d0
731 08:13:38.165693 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 08:13:38.177886 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 08:13:38.182968 ** Bad device specification mmc 0 **
734 08:13:38.192977 Card did not respond to voltage select! : -110
735 08:13:38.200655 ** Bad device specification mmc 0 **
736 08:13:38.201592 Couldn't find partition mmc 0
737 08:13:38.208943 Card did not respond to voltage select! : -110
738 08:13:38.214306 ** Bad device specification mmc 0 **
739 08:13:38.214852 Couldn't find partition mmc 0
740 08:13:38.219296 Error: could not access storage.
741 08:13:38.516102 Net: eth0: ethernet@ff3f0000
742 08:13:38.516703 starting USB...
743 08:13:38.761691 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 08:13:38.762390 Starting the controller
745 08:13:38.768689 USB XHCI 1.10
746 08:13:40.322289 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 08:13:40.330503 scanning usb for storage devices... 0 Storage Device(s) found
749 08:13:40.382493 Hit any key to stop autoboot: 1
750 08:13:40.383780 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 08:13:40.384454 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 08:13:40.384952 Setting prompt string to ['=>']
753 08:13:40.385449 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 08:13:40.395684 0
755 08:13:40.396663 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 08:13:40.498131 => setenv autoload no
758 08:13:40.499319 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 08:13:40.506836 setenv autoload no
761 08:13:40.609250 => setenv initrd_high 0xffffffff
762 08:13:40.611000 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 08:13:40.614669 setenv initrd_high 0xffffffff
765 08:13:40.717858 => setenv fdt_high 0xffffffff
766 08:13:40.718783 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 08:13:40.723214 setenv fdt_high 0xffffffff
769 08:13:40.825019 => dhcp
770 08:13:40.825764 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 08:13:40.829041 dhcp
772 08:13:41.585607 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 08:13:41.586230 Speed: 1000, full duplex
774 08:13:41.586643 BOOTP broadcast 1
775 08:13:41.833798 BOOTP broadcast 2
776 08:13:41.849057 DHCP client bound to address 192.168.6.21 (263 ms)
778 08:13:41.950878 => setenv serverip 192.168.6.2
779 08:13:41.951842 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
780 08:13:41.956376 setenv serverip 192.168.6.2
782 08:13:42.058247 => tftpboot 0x01080000 974135/tftp-deploy-tdgkveu7/kernel/uImage
783 08:13:42.059320 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
784 08:13:42.065953 tftpboot 0x01080000 974135/tftp-deploy-tdgkveu7/kernel/uImage
785 08:13:42.066451 Speed: 1000, full duplex
786 08:13:42.066853 Using ethernet@ff3f0000 device
787 08:13:42.071336 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 08:13:42.076861 Filename '974135/tftp-deploy-tdgkveu7/kernel/uImage'.
789 08:13:42.080837 Load address: 0x1080000
790 08:13:44.197886 Loading: *################################## UDP wrong checksum 000000ff 0000ebe5
791 08:13:44.255811 # UDP wrong checksum 000000ff 000086d8
792 08:13:45.193563 ############### 43.6 MiB
793 08:13:45.194230 14 MiB/s
794 08:13:45.194684 done
795 08:13:45.197938 Bytes transferred = 45713984 (2b98a40 hex)
797 08:13:45.299561 => tftpboot 0x08000000 974135/tftp-deploy-tdgkveu7/ramdisk/ramdisk.cpio.gz.uboot
798 08:13:45.300394 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
799 08:13:45.307394 tftpboot 0x08000000 974135/tftp-deploy-tdgkveu7/ramdisk/ramdisk.cpio.gz.uboot
800 08:13:45.307936 Speed: 1000, full duplex
801 08:13:45.308417 Using ethernet@ff3f0000 device
802 08:13:45.313076 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
803 08:13:45.322681 Filename '974135/tftp-deploy-tdgkveu7/ramdisk/ramdisk.cpio.gz.uboot'.
804 08:13:45.323236 Load address: 0x8000000
805 08:13:46.756093 Loading: *################################################# UDP wrong checksum 00000005 000033e1
806 08:13:51.755684 T UDP wrong checksum 00000005 000033e1
807 08:13:58.845043 T UDP wrong checksum 000000ff 00006f63
808 08:13:58.896910 UDP wrong checksum 000000ff 0000f955
809 08:13:59.145310 UDP wrong checksum 000000ff 0000dd27
810 08:13:59.206627 UDP wrong checksum 000000ff 0000681a
811 08:14:01.757900 T UDP wrong checksum 00000005 000033e1
812 08:14:09.930319 T UDP wrong checksum 000000ff 0000767a
813 08:14:09.943074 UDP wrong checksum 000000ff 0000ff6c
814 08:14:21.761885 T T T UDP wrong checksum 00000005 000033e1
815 08:14:24.767355 UDP wrong checksum 000000ff 00001de5
816 08:14:24.805677 UDP wrong checksum 000000ff 0000add7
817 08:14:41.766302 T T T
818 08:14:41.766724 Retry count exceeded; starting again
820 08:14:41.768875 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
823 08:14:41.770757 end: 2.4 uboot-commands (duration 00:01:20) [common]
825 08:14:41.772199 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
827 08:14:41.773216 end: 2 uboot-action (duration 00:01:20) [common]
829 08:14:41.774734 Cleaning after the job
830 08:14:41.775276 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/ramdisk
831 08:14:41.776666 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/kernel
832 08:14:41.819350 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/dtb
833 08:14:41.820510 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/nfsrootfs
834 08:14:41.961392 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974135/tftp-deploy-tdgkveu7/modules
835 08:14:41.981308 start: 4.1 power-off (timeout 00:00:30) [common]
836 08:14:41.981981 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
837 08:14:42.014514 >> OK - accepted request
838 08:14:42.016618 Returned 0 in 0 seconds
839 08:14:42.117409 end: 4.1 power-off (duration 00:00:00) [common]
841 08:14:42.118409 start: 4.2 read-feedback (timeout 00:10:00) [common]
842 08:14:42.119077 Listened to connection for namespace 'common' for up to 1s
843 08:14:43.120021 Finalising connection for namespace 'common'
844 08:14:43.120529 Disconnecting from shell: Finalise
845 08:14:43.120836 =>
846 08:14:43.221614 end: 4.2 read-feedback (duration 00:00:01) [common]
847 08:14:43.222295 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/974135
848 08:14:45.063571 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/974135
849 08:14:45.064202 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.