Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:18:41.126592 lava-dispatcher, installed at version: 2024.01
2 08:18:41.127351 start: 0 validate
3 08:18:41.127821 Start time: 2024-11-11 08:18:41.127791+00:00 (UTC)
4 08:18:41.128375 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:18:41.128899 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 08:18:41.169529 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:18:41.170087 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:18:41.199884 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:18:41.200590 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 08:18:41.232936 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:18:41.233401 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 08:18:41.272793 validate duration: 0.15
14 08:18:41.273656 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:18:41.273989 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:18:41.274294 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:18:41.274883 Not decompressing ramdisk as can be used compressed.
18 08:18:41.275299 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 08:18:41.275578 saving as /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/ramdisk/rootfs.cpio.gz
20 08:18:41.275855 total size: 47897469 (45 MB)
21 08:18:41.314250 progress 0 % (0 MB)
22 08:18:41.344195 progress 5 % (2 MB)
23 08:18:41.373576 progress 10 % (4 MB)
24 08:18:41.402648 progress 15 % (6 MB)
25 08:18:41.432316 progress 20 % (9 MB)
26 08:18:41.461330 progress 25 % (11 MB)
27 08:18:41.490479 progress 30 % (13 MB)
28 08:18:41.522031 progress 35 % (16 MB)
29 08:18:41.552090 progress 40 % (18 MB)
30 08:18:41.581511 progress 45 % (20 MB)
31 08:18:41.610710 progress 50 % (22 MB)
32 08:18:41.640234 progress 55 % (25 MB)
33 08:18:41.669687 progress 60 % (27 MB)
34 08:18:41.698841 progress 65 % (29 MB)
35 08:18:41.728347 progress 70 % (32 MB)
36 08:18:41.757890 progress 75 % (34 MB)
37 08:18:41.787232 progress 80 % (36 MB)
38 08:18:41.816462 progress 85 % (38 MB)
39 08:18:41.845985 progress 90 % (41 MB)
40 08:18:41.875215 progress 95 % (43 MB)
41 08:18:41.903789 progress 100 % (45 MB)
42 08:18:41.904532 45 MB downloaded in 0.63 s (72.66 MB/s)
43 08:18:41.905097 end: 1.1.1 http-download (duration 00:00:01) [common]
45 08:18:41.906006 end: 1.1 download-retry (duration 00:00:01) [common]
46 08:18:41.906319 start: 1.2 download-retry (timeout 00:09:59) [common]
47 08:18:41.906605 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 08:18:41.907095 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/kernel/Image
49 08:18:41.907348 saving as /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/kernel/Image
50 08:18:41.907563 total size: 45713920 (43 MB)
51 08:18:41.907777 No compression specified
52 08:18:41.952546 progress 0 % (0 MB)
53 08:18:41.983567 progress 5 % (2 MB)
54 08:18:42.012868 progress 10 % (4 MB)
55 08:18:42.041636 progress 15 % (6 MB)
56 08:18:42.070732 progress 20 % (8 MB)
57 08:18:42.099324 progress 25 % (10 MB)
58 08:18:42.127942 progress 30 % (13 MB)
59 08:18:42.157884 progress 35 % (15 MB)
60 08:18:42.186438 progress 40 % (17 MB)
61 08:18:42.215481 progress 45 % (19 MB)
62 08:18:42.244488 progress 50 % (21 MB)
63 08:18:42.273216 progress 55 % (24 MB)
64 08:18:42.302426 progress 60 % (26 MB)
65 08:18:42.330882 progress 65 % (28 MB)
66 08:18:42.359866 progress 70 % (30 MB)
67 08:18:42.389540 progress 75 % (32 MB)
68 08:18:42.419246 progress 80 % (34 MB)
69 08:18:42.448199 progress 85 % (37 MB)
70 08:18:42.476822 progress 90 % (39 MB)
71 08:18:42.506049 progress 95 % (41 MB)
72 08:18:42.534468 progress 100 % (43 MB)
73 08:18:42.535022 43 MB downloaded in 0.63 s (69.48 MB/s)
74 08:18:42.535520 end: 1.2.1 http-download (duration 00:00:01) [common]
76 08:18:42.536381 end: 1.2 download-retry (duration 00:00:01) [common]
77 08:18:42.536662 start: 1.3 download-retry (timeout 00:09:59) [common]
78 08:18:42.536929 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 08:18:42.537401 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 08:18:42.537687 saving as /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 08:18:42.537897 total size: 53209 (0 MB)
82 08:18:42.538104 No compression specified
83 08:18:42.577369 progress 61 % (0 MB)
84 08:18:42.578240 progress 100 % (0 MB)
85 08:18:42.578779 0 MB downloaded in 0.04 s (1.24 MB/s)
86 08:18:42.579245 end: 1.3.1 http-download (duration 00:00:00) [common]
88 08:18:42.580092 end: 1.3 download-retry (duration 00:00:00) [common]
89 08:18:42.580362 start: 1.4 download-retry (timeout 00:09:59) [common]
90 08:18:42.580624 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 08:18:42.581077 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/modules.tar.xz
92 08:18:42.581322 saving as /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/modules/modules.tar
93 08:18:42.581526 total size: 11612196 (11 MB)
94 08:18:42.581734 Using unxz to decompress xz
95 08:18:42.616791 progress 0 % (0 MB)
96 08:18:42.681876 progress 5 % (0 MB)
97 08:18:42.754759 progress 10 % (1 MB)
98 08:18:42.849129 progress 15 % (1 MB)
99 08:18:42.940383 progress 20 % (2 MB)
100 08:18:43.018432 progress 25 % (2 MB)
101 08:18:43.093435 progress 30 % (3 MB)
102 08:18:43.170851 progress 35 % (3 MB)
103 08:18:43.242432 progress 40 % (4 MB)
104 08:18:43.317520 progress 45 % (5 MB)
105 08:18:43.401367 progress 50 % (5 MB)
106 08:18:43.478543 progress 55 % (6 MB)
107 08:18:43.563233 progress 60 % (6 MB)
108 08:18:43.643637 progress 65 % (7 MB)
109 08:18:43.723070 progress 70 % (7 MB)
110 08:18:43.801196 progress 75 % (8 MB)
111 08:18:43.888135 progress 80 % (8 MB)
112 08:18:43.969575 progress 85 % (9 MB)
113 08:18:44.048805 progress 90 % (9 MB)
114 08:18:44.126205 progress 95 % (10 MB)
115 08:18:44.204301 progress 100 % (11 MB)
116 08:18:44.218140 11 MB downloaded in 1.64 s (6.77 MB/s)
117 08:18:44.219123 end: 1.4.1 http-download (duration 00:00:02) [common]
119 08:18:44.220834 end: 1.4 download-retry (duration 00:00:02) [common]
120 08:18:44.221398 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 08:18:44.221950 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 08:18:44.222484 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 08:18:44.223016 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 08:18:44.224294 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p
125 08:18:44.225192 makedir: /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin
126 08:18:44.225886 makedir: /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/tests
127 08:18:44.226553 makedir: /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/results
128 08:18:44.227219 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-add-keys
129 08:18:44.228252 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-add-sources
130 08:18:44.229279 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-background-process-start
131 08:18:44.230288 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-background-process-stop
132 08:18:44.231327 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-common-functions
133 08:18:44.232334 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-echo-ipv4
134 08:18:44.233439 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-install-packages
135 08:18:44.234406 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-installed-packages
136 08:18:44.235354 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-os-build
137 08:18:44.236332 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-probe-channel
138 08:18:44.237296 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-probe-ip
139 08:18:44.238251 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-target-ip
140 08:18:44.239200 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-target-mac
141 08:18:44.240171 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-target-storage
142 08:18:44.241149 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-test-case
143 08:18:44.242109 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-test-event
144 08:18:44.243042 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-test-feedback
145 08:18:44.244050 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-test-raise
146 08:18:44.245109 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-test-reference
147 08:18:44.246108 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-test-runner
148 08:18:44.247094 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-test-set
149 08:18:44.248072 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-test-shell
150 08:18:44.249035 Updating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-install-packages (oe)
151 08:18:44.250048 Updating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/bin/lava-installed-packages (oe)
152 08:18:44.250923 Creating /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/environment
153 08:18:44.251663 LAVA metadata
154 08:18:44.252232 - LAVA_JOB_ID=974088
155 08:18:44.252689 - LAVA_DISPATCHER_IP=192.168.6.2
156 08:18:44.253364 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 08:18:44.255164 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 08:18:44.255794 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 08:18:44.256268 skipped lava-vland-overlay
160 08:18:44.256778 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 08:18:44.257305 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 08:18:44.257748 skipped lava-multinode-overlay
163 08:18:44.258254 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 08:18:44.258768 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 08:18:44.259259 Loading test definitions
166 08:18:44.259828 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 08:18:44.260209 Using /lava-974088 at stage 0
168 08:18:44.261501 uuid=974088_1.5.2.4.1 testdef=None
169 08:18:44.261854 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 08:18:44.262165 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 08:18:44.263960 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 08:18:44.264861 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 08:18:44.267069 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 08:18:44.267974 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 08:18:44.270145 runner path: /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/0/tests/0_igt-gpu-panfrost test_uuid 974088_1.5.2.4.1
178 08:18:44.270749 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 08:18:44.271626 Creating lava-test-runner.conf files
181 08:18:44.271853 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/974088/lava-overlay-w0c1n_4p/lava-974088/0 for stage 0
182 08:18:44.272250 - 0_igt-gpu-panfrost
183 08:18:44.272654 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 08:18:44.272980 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 08:18:44.296200 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 08:18:44.296609 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 08:18:44.296913 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 08:18:44.297205 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 08:18:44.297491 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 08:18:51.047608 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 08:18:51.048402 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 08:18:51.048896 extracting modules file /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974088/extract-overlay-ramdisk-qdgij2xy/ramdisk
193 08:18:52.460911 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 08:18:52.461399 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
195 08:18:52.461695 [common] Applying overlay /var/lib/lava/dispatcher/tmp/974088/compress-overlay-wsq55esa/overlay-1.5.2.5.tar.gz to ramdisk
196 08:18:52.461920 [common] Applying overlay /var/lib/lava/dispatcher/tmp/974088/compress-overlay-wsq55esa/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/974088/extract-overlay-ramdisk-qdgij2xy/ramdisk
197 08:18:52.491768 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 08:18:52.492182 start: 1.5.6 prepare-kernel (timeout 00:09:49) [common]
199 08:18:52.492477 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:49) [common]
200 08:18:52.492717 Converting downloaded kernel to a uImage
201 08:18:52.493060 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/kernel/Image /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/kernel/uImage
202 08:18:52.958889 output: Image Name:
203 08:18:52.959310 output: Created: Mon Nov 11 08:18:52 2024
204 08:18:52.959531 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 08:18:52.959739 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 08:18:52.959940 output: Load Address: 01080000
207 08:18:52.960184 output: Entry Point: 01080000
208 08:18:52.960389 output:
209 08:18:52.960726 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 08:18:52.960991 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 08:18:52.961260 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 08:18:52.961514 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 08:18:52.961772 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 08:18:52.962026 Building ramdisk /var/lib/lava/dispatcher/tmp/974088/extract-overlay-ramdisk-qdgij2xy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/974088/extract-overlay-ramdisk-qdgij2xy/ramdisk
215 08:19:00.008189 >> 502416 blocks
216 08:19:21.101812 Adding RAMdisk u-boot header.
217 08:19:21.102456 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/974088/extract-overlay-ramdisk-qdgij2xy/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/974088/extract-overlay-ramdisk-qdgij2xy/ramdisk.cpio.gz.uboot
218 08:19:21.778411 output: Image Name:
219 08:19:21.778806 output: Created: Mon Nov 11 08:19:21 2024
220 08:19:21.779012 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 08:19:21.779215 output: Data Size: 65717293 Bytes = 64177.04 KiB = 62.67 MiB
222 08:19:21.779413 output: Load Address: 00000000
223 08:19:21.779609 output: Entry Point: 00000000
224 08:19:21.779803 output:
225 08:19:21.780688 rename /var/lib/lava/dispatcher/tmp/974088/extract-overlay-ramdisk-qdgij2xy/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/ramdisk/ramdisk.cpio.gz.uboot
226 08:19:21.781464 end: 1.5.8 compress-ramdisk (duration 00:00:29) [common]
227 08:19:21.782052 end: 1.5 prepare-tftp-overlay (duration 00:00:38) [common]
228 08:19:21.782623 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:19) [common]
229 08:19:21.783115 No LXC device requested
230 08:19:21.783659 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 08:19:21.784253 start: 1.7 deploy-device-env (timeout 00:09:19) [common]
232 08:19:21.784794 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 08:19:21.785243 Checking files for TFTP limit of 4294967296 bytes.
234 08:19:21.788149 end: 1 tftp-deploy (duration 00:00:41) [common]
235 08:19:21.788768 start: 2 uboot-action (timeout 00:05:00) [common]
236 08:19:21.789338 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 08:19:21.789879 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 08:19:21.790442 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 08:19:21.791008 Using kernel file from prepare-kernel: 974088/tftp-deploy-1kg41am2/kernel/uImage
240 08:19:21.791665 substitutions:
241 08:19:21.792140 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 08:19:21.792583 - {DTB_ADDR}: 0x01070000
243 08:19:21.793017 - {DTB}: 974088/tftp-deploy-1kg41am2/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 08:19:21.793448 - {INITRD}: 974088/tftp-deploy-1kg41am2/ramdisk/ramdisk.cpio.gz.uboot
245 08:19:21.793879 - {KERNEL_ADDR}: 0x01080000
246 08:19:21.794306 - {KERNEL}: 974088/tftp-deploy-1kg41am2/kernel/uImage
247 08:19:21.794734 - {LAVA_MAC}: None
248 08:19:21.795209 - {PRESEED_CONFIG}: None
249 08:19:21.795641 - {PRESEED_LOCAL}: None
250 08:19:21.796095 - {RAMDISK_ADDR}: 0x08000000
251 08:19:21.796523 - {RAMDISK}: 974088/tftp-deploy-1kg41am2/ramdisk/ramdisk.cpio.gz.uboot
252 08:19:21.796954 - {ROOT_PART}: None
253 08:19:21.797378 - {ROOT}: None
254 08:19:21.797805 - {SERVER_IP}: 192.168.6.2
255 08:19:21.798236 - {TEE_ADDR}: 0x83000000
256 08:19:21.798658 - {TEE}: None
257 08:19:21.799083 Parsed boot commands:
258 08:19:21.799498 - setenv autoload no
259 08:19:21.799917 - setenv initrd_high 0xffffffff
260 08:19:21.800368 - setenv fdt_high 0xffffffff
261 08:19:21.800788 - dhcp
262 08:19:21.801211 - setenv serverip 192.168.6.2
263 08:19:21.801631 - tftpboot 0x01080000 974088/tftp-deploy-1kg41am2/kernel/uImage
264 08:19:21.802052 - tftpboot 0x08000000 974088/tftp-deploy-1kg41am2/ramdisk/ramdisk.cpio.gz.uboot
265 08:19:21.802473 - tftpboot 0x01070000 974088/tftp-deploy-1kg41am2/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 08:19:21.802897 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 08:19:21.803323 - bootm 0x01080000 0x08000000 0x01070000
268 08:19:21.803854 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 08:19:21.805484 start: 2.3 connect-device (timeout 00:05:00) [common]
271 08:19:21.805959 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 08:19:21.822102 Setting prompt string to ['lava-test: # ']
273 08:19:21.823667 end: 2.3 connect-device (duration 00:00:00) [common]
274 08:19:21.824356 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 08:19:21.824941 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 08:19:21.825490 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 08:19:21.826719 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 08:19:21.860564 >> OK - accepted request
279 08:19:21.862716 Returned 0 in 0 seconds
280 08:19:21.963897 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 08:19:21.965619 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 08:19:21.966231 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 08:19:21.966770 Setting prompt string to ['Hit any key to stop autoboot']
285 08:19:21.967255 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 08:19:21.968956 Trying 192.168.56.21...
287 08:19:21.969466 Connected to conserv1.
288 08:19:21.969916 Escape character is '^]'.
289 08:19:21.970365
290 08:19:21.970829 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 08:19:21.971301
292 08:19:28.928185 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 08:19:28.928870 bl2_stage_init 0x01
294 08:19:28.929347 bl2_stage_init 0x81
295 08:19:28.933697 hw id: 0x0000 - pwm id 0x01
296 08:19:28.934259 bl2_stage_init 0xc1
297 08:19:28.939305 bl2_stage_init 0x02
298 08:19:28.939823
299 08:19:28.940311 L0:00000000
300 08:19:28.940745 L1:00000703
301 08:19:28.941170 L2:00008067
302 08:19:28.941596 L3:15000000
303 08:19:28.944886 S1:00000000
304 08:19:28.945405 B2:20282000
305 08:19:28.945840 B1:a0f83180
306 08:19:28.946268
307 08:19:28.946699 TE: 72876
308 08:19:28.947125
309 08:19:28.950443 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 08:19:28.950938
311 08:19:28.956105 Board ID = 1
312 08:19:28.956626 Set cpu clk to 24M
313 08:19:28.957060 Set clk81 to 24M
314 08:19:28.961760 Use GP1_pll as DSU clk.
315 08:19:28.962287 DSU clk: 1200 Mhz
316 08:19:28.962734 CPU clk: 1200 MHz
317 08:19:28.967479 Set clk81 to 166.6M
318 08:19:28.972948 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 08:19:28.973461 board id: 1
320 08:19:28.980198 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 08:19:28.990827 fw parse done
322 08:19:28.995832 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 08:19:29.039469 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 08:19:29.050471 PIEI prepare done
325 08:19:29.051001 fastboot data load
326 08:19:29.051446 fastboot data verify
327 08:19:29.055922 verify result: 266
328 08:19:29.061509 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 08:19:29.062006 LPDDR4 probe
330 08:19:29.062443 ddr clk to 1584MHz
331 08:19:29.069527 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 08:19:29.105894
333 08:19:29.106416 dmc_version 0001
334 08:19:29.113541 Check phy result
335 08:19:29.119440 INFO : End of CA training
336 08:19:29.119944 INFO : End of initialization
337 08:19:29.124955 INFO : Training has run successfully!
338 08:19:29.125458 Check phy result
339 08:19:29.130548 INFO : End of initialization
340 08:19:29.131054 INFO : End of read enable training
341 08:19:29.136156 INFO : End of fine write leveling
342 08:19:29.141707 INFO : End of Write leveling coarse delay
343 08:19:29.142208 INFO : Training has run successfully!
344 08:19:29.142656 Check phy result
345 08:19:29.147414 INFO : End of initialization
346 08:19:29.147912 INFO : End of read dq deskew training
347 08:19:29.152927 INFO : End of MPR read delay center optimization
348 08:19:29.158566 INFO : End of write delay center optimization
349 08:19:29.164173 INFO : End of read delay center optimization
350 08:19:29.164677 INFO : End of max read latency training
351 08:19:29.169735 INFO : Training has run successfully!
352 08:19:29.170254 1D training succeed
353 08:19:29.178325 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 08:19:29.226580 Check phy result
355 08:19:29.227113 INFO : End of initialization
356 08:19:29.248858 INFO : End of 2D read delay Voltage center optimization
357 08:19:29.268018 INFO : End of 2D read delay Voltage center optimization
358 08:19:29.319897 INFO : End of 2D write delay Voltage center optimization
359 08:19:29.369046 INFO : End of 2D write delay Voltage center optimization
360 08:19:29.374612 INFO : Training has run successfully!
361 08:19:29.375143
362 08:19:29.375599 channel==0
363 08:19:29.380347 RxClkDly_Margin_A0==78 ps 8
364 08:19:29.380907 TxDqDly_Margin_A0==98 ps 10
365 08:19:29.383538 RxClkDly_Margin_A1==88 ps 9
366 08:19:29.384109 TxDqDly_Margin_A1==88 ps 9
367 08:19:29.389124 TrainedVREFDQ_A0==74
368 08:19:29.389638 TrainedVREFDQ_A1==74
369 08:19:29.390094 VrefDac_Margin_A0==22
370 08:19:29.394606 DeviceVref_Margin_A0==40
371 08:19:29.395128 VrefDac_Margin_A1==23
372 08:19:29.400296 DeviceVref_Margin_A1==40
373 08:19:29.400814
374 08:19:29.401268
375 08:19:29.401714 channel==1
376 08:19:29.402153 RxClkDly_Margin_A0==88 ps 9
377 08:19:29.405869 TxDqDly_Margin_A0==98 ps 10
378 08:19:29.406381 RxClkDly_Margin_A1==78 ps 8
379 08:19:29.411480 TxDqDly_Margin_A1==88 ps 9
380 08:19:29.412035 TrainedVREFDQ_A0==78
381 08:19:29.412502 TrainedVREFDQ_A1==75
382 08:19:29.417114 VrefDac_Margin_A0==23
383 08:19:29.417653 DeviceVref_Margin_A0==36
384 08:19:29.422621 VrefDac_Margin_A1==22
385 08:19:29.423126 DeviceVref_Margin_A1==39
386 08:19:29.423569
387 08:19:29.428260 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 08:19:29.428766
389 08:19:29.456231 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 08:19:29.461888 2D training succeed
391 08:19:29.467504 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 08:19:29.468042 auto size-- 65535DDR cs0 size: 2048MB
393 08:19:29.473149 DDR cs1 size: 2048MB
394 08:19:29.473658 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 08:19:29.478670 cs0 DataBus test pass
396 08:19:29.479174 cs1 DataBus test pass
397 08:19:29.479621 cs0 AddrBus test pass
398 08:19:29.484281 cs1 AddrBus test pass
399 08:19:29.484783
400 08:19:29.485230 100bdlr_step_size ps== 478
401 08:19:29.485675 result report
402 08:19:29.489858 boot times 0Enable ddr reg access
403 08:19:29.497395 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 08:19:29.511181 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 08:19:30.166971 bl2z: ptr: 05129330, size: 00001e40
406 08:19:30.174600 0.0;M3 CHK:0;cm4_sp_mode 0
407 08:19:30.175134 MVN_1=0x00000000
408 08:19:30.175588 MVN_2=0x00000000
409 08:19:30.186085 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 08:19:30.186623 OPS=0x04
411 08:19:30.187078 ring efuse init
412 08:19:30.189057 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 08:19:30.195022 [0.017319 Inits done]
414 08:19:30.195524 secure task start!
415 08:19:30.195968 high task start!
416 08:19:30.196455 low task start!
417 08:19:30.198404 run into bl31
418 08:19:30.208020 NOTICE: BL31: v1.3(release):4fc40b1
419 08:19:30.214775 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 08:19:30.215294 NOTICE: BL31: G12A normal boot!
421 08:19:30.231500 NOTICE: BL31: BL33 decompress pass
422 08:19:30.237057 ERROR: Error initializing runtime service opteed_fast
423 08:19:32.976979 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 08:19:32.977670 bl2_stage_init 0x01
425 08:19:32.978149 bl2_stage_init 0x81
426 08:19:32.982567 hw id: 0x0000 - pwm id 0x01
427 08:19:32.983115 bl2_stage_init 0xc1
428 08:19:32.988128 bl2_stage_init 0x02
429 08:19:32.988685
430 08:19:32.989355 L0:00000000
431 08:19:32.989798 L1:00000703
432 08:19:32.990230 L2:00008067
433 08:19:32.990657 L3:15000000
434 08:19:32.991403 S1:00000000
435 08:19:32.994635 B2:20282000
436 08:19:32.995146 B1:a0f83180
437 08:19:32.995585
438 08:19:32.996060 TE: 70832
439 08:19:32.996500
440 08:19:33.000139 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 08:19:33.000640
442 08:19:33.001074 Board ID = 1
443 08:19:33.005742 Set cpu clk to 24M
444 08:19:33.006226 Set clk81 to 24M
445 08:19:33.006655 Use GP1_pll as DSU clk.
446 08:19:33.009387 DSU clk: 1200 Mhz
447 08:19:33.009874 CPU clk: 1200 MHz
448 08:19:33.014731 Set clk81 to 166.6M
449 08:19:33.020425 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 08:19:33.020938 board id: 1
451 08:19:33.028928 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 08:19:33.039781 fw parse done
453 08:19:33.045715 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 08:19:33.088831 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 08:19:33.100049 PIEI prepare done
456 08:19:33.100567 fastboot data load
457 08:19:33.100996 fastboot data verify
458 08:19:33.105504 verify result: 266
459 08:19:33.111100 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 08:19:33.111601 LPDDR4 probe
461 08:19:33.112062 ddr clk to 1584MHz
462 08:19:33.119093 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 08:19:33.156823
464 08:19:33.157325 dmc_version 0001
465 08:19:33.163862 Check phy result
466 08:19:33.169850 INFO : End of CA training
467 08:19:33.170357 INFO : End of initialization
468 08:19:33.175544 INFO : Training has run successfully!
469 08:19:33.176075 Check phy result
470 08:19:33.181044 INFO : End of initialization
471 08:19:33.181543 INFO : End of read enable training
472 08:19:33.186689 INFO : End of fine write leveling
473 08:19:33.192428 INFO : End of Write leveling coarse delay
474 08:19:33.192931 INFO : Training has run successfully!
475 08:19:33.193377 Check phy result
476 08:19:33.197885 INFO : End of initialization
477 08:19:33.198383 INFO : End of read dq deskew training
478 08:19:33.203475 INFO : End of MPR read delay center optimization
479 08:19:33.209057 INFO : End of write delay center optimization
480 08:19:33.214726 INFO : End of read delay center optimization
481 08:19:33.215223 INFO : End of max read latency training
482 08:19:33.220361 INFO : Training has run successfully!
483 08:19:33.220870 1D training succeed
484 08:19:33.229490 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 08:19:33.277834 Check phy result
486 08:19:33.278366 INFO : End of initialization
487 08:19:33.305197 INFO : End of 2D read delay Voltage center optimization
488 08:19:33.329324 INFO : End of 2D read delay Voltage center optimization
489 08:19:33.386057 INFO : End of 2D write delay Voltage center optimization
490 08:19:33.440332 INFO : End of 2D write delay Voltage center optimization
491 08:19:33.445753 INFO : Training has run successfully!
492 08:19:33.446264
493 08:19:33.446718 channel==0
494 08:19:33.451286 RxClkDly_Margin_A0==78 ps 8
495 08:19:33.451790 TxDqDly_Margin_A0==98 ps 10
496 08:19:33.454720 RxClkDly_Margin_A1==88 ps 9
497 08:19:33.455211 TxDqDly_Margin_A1==98 ps 10
498 08:19:33.460242 TrainedVREFDQ_A0==74
499 08:19:33.460746 TrainedVREFDQ_A1==74
500 08:19:33.461196 VrefDac_Margin_A0==24
501 08:19:33.465804 DeviceVref_Margin_A0==40
502 08:19:33.466296 VrefDac_Margin_A1==23
503 08:19:33.471564 DeviceVref_Margin_A1==40
504 08:19:33.472101
505 08:19:33.472557
506 08:19:33.472998 channel==1
507 08:19:33.473426 RxClkDly_Margin_A0==78 ps 8
508 08:19:33.477099 TxDqDly_Margin_A0==98 ps 10
509 08:19:33.477599 RxClkDly_Margin_A1==78 ps 8
510 08:19:33.482560 TxDqDly_Margin_A1==98 ps 10
511 08:19:33.483061 TrainedVREFDQ_A0==78
512 08:19:33.483513 TrainedVREFDQ_A1==75
513 08:19:33.488228 VrefDac_Margin_A0==22
514 08:19:33.488752 DeviceVref_Margin_A0==36
515 08:19:33.493806 VrefDac_Margin_A1==22
516 08:19:33.494309 DeviceVref_Margin_A1==38
517 08:19:33.494752
518 08:19:33.499408 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 08:19:33.499917
520 08:19:33.527356 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
521 08:19:33.533200 2D training succeed
522 08:19:33.538602 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 08:19:33.539135 auto size-- 65535DDR cs0 size: 2048MB
524 08:19:33.544258 DDR cs1 size: 2048MB
525 08:19:33.544780 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 08:19:33.549769 cs0 DataBus test pass
527 08:19:33.550276 cs1 DataBus test pass
528 08:19:33.550723 cs0 AddrBus test pass
529 08:19:33.555425 cs1 AddrBus test pass
530 08:19:33.555936
531 08:19:33.556442 100bdlr_step_size ps== 471
532 08:19:33.556894 result report
533 08:19:33.561141 boot times 0Enable ddr reg access
534 08:19:33.568545 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 08:19:33.582295 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 08:19:34.241983 bl2z: ptr: 05129330, size: 00001e40
537 08:19:34.250087 0.0;M3 CHK:0;cm4_sp_mode 0
538 08:19:34.250610 MVN_1=0x00000000
539 08:19:34.251053 MVN_2=0x00000000
540 08:19:34.261476 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 08:19:34.261997 OPS=0x04
542 08:19:34.262449 ring efuse init
543 08:19:34.264443 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 08:19:34.270579 [0.017354 Inits done]
545 08:19:34.271077 secure task start!
546 08:19:34.271524 high task start!
547 08:19:34.271960 low task start!
548 08:19:34.274149 run into bl31
549 08:19:34.283579 NOTICE: BL31: v1.3(release):4fc40b1
550 08:19:34.291364 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 08:19:34.291891 NOTICE: BL31: G12A normal boot!
552 08:19:34.306951 NOTICE: BL31: BL33 decompress pass
553 08:19:34.312632 ERROR: Error initializing runtime service opteed_fast
554 08:19:35.675069 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 08:19:35.675729 bl2_stage_init 0x01
556 08:19:35.676267 bl2_stage_init 0x81
557 08:19:35.680686 hw id: 0x0000 - pwm id 0x01
558 08:19:35.681218 bl2_stage_init 0xc1
559 08:19:35.686373 bl2_stage_init 0x02
560 08:19:35.686882
561 08:19:35.687343 L0:00000000
562 08:19:35.687785 L1:00000703
563 08:19:35.688276 L2:00008067
564 08:19:35.688718 L3:15000000
565 08:19:35.691837 S1:00000000
566 08:19:35.692389 B2:20282000
567 08:19:35.692840 B1:a0f83180
568 08:19:35.693278
569 08:19:35.693717 TE: 69522
570 08:19:35.694153
571 08:19:35.697486 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 08:19:35.697996
573 08:19:35.703040 Board ID = 1
574 08:19:35.703553 Set cpu clk to 24M
575 08:19:35.704045 Set clk81 to 24M
576 08:19:35.708660 Use GP1_pll as DSU clk.
577 08:19:35.709194 DSU clk: 1200 Mhz
578 08:19:35.709647 CPU clk: 1200 MHz
579 08:19:35.714356 Set clk81 to 166.6M
580 08:19:35.719849 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 08:19:35.720390 board id: 1
582 08:19:35.727032 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 08:19:35.737661 fw parse done
584 08:19:35.743700 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 08:19:35.785484 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 08:19:35.797227 PIEI prepare done
587 08:19:35.797806 fastboot data load
588 08:19:35.798274 fastboot data verify
589 08:19:35.802823 verify result: 266
590 08:19:35.808411 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 08:19:35.808926 LPDDR4 probe
592 08:19:35.809381 ddr clk to 1584MHz
593 08:19:35.816436 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 08:19:35.853611
595 08:19:35.854175 dmc_version 0001
596 08:19:35.860503 Check phy result
597 08:19:35.866231 INFO : End of CA training
598 08:19:35.866742 INFO : End of initialization
599 08:19:35.871852 INFO : Training has run successfully!
600 08:19:35.872419 Check phy result
601 08:19:35.877436 INFO : End of initialization
602 08:19:35.877949 INFO : End of read enable training
603 08:19:35.883070 INFO : End of fine write leveling
604 08:19:35.888645 INFO : End of Write leveling coarse delay
605 08:19:35.889153 INFO : Training has run successfully!
606 08:19:35.889607 Check phy result
607 08:19:35.894254 INFO : End of initialization
608 08:19:35.894757 INFO : End of read dq deskew training
609 08:19:35.899793 INFO : End of MPR read delay center optimization
610 08:19:35.905427 INFO : End of write delay center optimization
611 08:19:35.911012 INFO : End of read delay center optimization
612 08:19:35.911522 INFO : End of max read latency training
613 08:19:35.916676 INFO : Training has run successfully!
614 08:19:35.917206 1D training succeed
615 08:19:35.925765 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 08:19:35.973493 Check phy result
617 08:19:35.974052 INFO : End of initialization
618 08:19:35.995786 INFO : End of 2D read delay Voltage center optimization
619 08:19:36.014920 INFO : End of 2D read delay Voltage center optimization
620 08:19:36.066814 INFO : End of 2D write delay Voltage center optimization
621 08:19:36.115940 INFO : End of 2D write delay Voltage center optimization
622 08:19:36.121587 INFO : Training has run successfully!
623 08:19:36.122101
624 08:19:36.122561 channel==0
625 08:19:36.127163 RxClkDly_Margin_A0==78 ps 8
626 08:19:36.127686 TxDqDly_Margin_A0==98 ps 10
627 08:19:36.132694 RxClkDly_Margin_A1==88 ps 9
628 08:19:36.133204 TxDqDly_Margin_A1==88 ps 9
629 08:19:36.133658 TrainedVREFDQ_A0==74
630 08:19:36.138432 TrainedVREFDQ_A1==74
631 08:19:36.138939 VrefDac_Margin_A0==25
632 08:19:36.139384 DeviceVref_Margin_A0==40
633 08:19:36.143957 VrefDac_Margin_A1==23
634 08:19:36.144494 DeviceVref_Margin_A1==40
635 08:19:36.144941
636 08:19:36.145379
637 08:19:36.145813 channel==1
638 08:19:36.149522 RxClkDly_Margin_A0==78 ps 8
639 08:19:36.150023 TxDqDly_Margin_A0==98 ps 10
640 08:19:36.155109 RxClkDly_Margin_A1==78 ps 8
641 08:19:36.155616 TxDqDly_Margin_A1==88 ps 9
642 08:19:36.160718 TrainedVREFDQ_A0==78
643 08:19:36.161226 TrainedVREFDQ_A1==77
644 08:19:36.161674 VrefDac_Margin_A0==22
645 08:19:36.166458 DeviceVref_Margin_A0==36
646 08:19:36.166980 VrefDac_Margin_A1==22
647 08:19:36.171957 DeviceVref_Margin_A1==37
648 08:19:36.172500
649 08:19:36.172950 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 08:19:36.173393
651 08:19:36.205484 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
652 08:19:36.206066 2D training succeed
653 08:19:36.211173 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 08:19:36.216714 auto size-- 65535DDR cs0 size: 2048MB
655 08:19:36.217223 DDR cs1 size: 2048MB
656 08:19:36.222449 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 08:19:36.222958 cs0 DataBus test pass
658 08:19:36.227934 cs1 DataBus test pass
659 08:19:36.228475 cs0 AddrBus test pass
660 08:19:36.228924 cs1 AddrBus test pass
661 08:19:36.229359
662 08:19:36.233490 100bdlr_step_size ps== 478
663 08:19:36.234005 result report
664 08:19:36.239112 boot times 0Enable ddr reg access
665 08:19:36.244303 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 08:19:36.258062 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 08:19:36.913110 bl2z: ptr: 05129330, size: 00001e40
668 08:19:36.919736 0.0;M3 CHK:0;cm4_sp_mode 0
669 08:19:36.920344 MVN_1=0x00000000
670 08:19:36.920809 MVN_2=0x00000000
671 08:19:36.931152 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 08:19:36.931698 OPS=0x04
673 08:19:36.932195 ring efuse init
674 08:19:36.934115 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 08:19:36.939936 [0.017310 Inits done]
676 08:19:36.940465 secure task start!
677 08:19:36.940916 high task start!
678 08:19:36.941359 low task start!
679 08:19:36.944244 run into bl31
680 08:19:36.952884 NOTICE: BL31: v1.3(release):4fc40b1
681 08:19:36.960678 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 08:19:36.961215 NOTICE: BL31: G12A normal boot!
683 08:19:36.976202 NOTICE: BL31: BL33 decompress pass
684 08:19:36.981865 ERROR: Error initializing runtime service opteed_fast
685 08:19:37.777272
686 08:19:37.777880
687 08:19:37.782661 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 08:19:37.783171
689 08:19:37.786147 Model: Libre Computer AML-S905D3-CC Solitude
690 08:19:37.933118 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 08:19:37.948649 DRAM: 2 GiB (effective 3.8 GiB)
692 08:19:38.049622 Core: 406 devices, 33 uclasses, devicetree: separate
693 08:19:38.055507 WDT: Not starting watchdog@f0d0
694 08:19:38.080589 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 08:19:38.092646 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 08:19:38.097603 ** Bad device specification mmc 0 **
697 08:19:38.107687 Card did not respond to voltage select! : -110
698 08:19:38.114577 ** Bad device specification mmc 0 **
699 08:19:38.115018 Couldn't find partition mmc 0
700 08:19:38.123695 Card did not respond to voltage select! : -110
701 08:19:38.129178 ** Bad device specification mmc 0 **
702 08:19:38.129616 Couldn't find partition mmc 0
703 08:19:38.134254 Error: could not access storage.
704 08:19:38.431752 Net: eth0: ethernet@ff3f0000
705 08:19:38.432407 starting USB...
706 08:19:38.676584 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 08:19:38.677191 Starting the controller
708 08:19:38.683447 USB XHCI 1.10
709 08:19:40.253433 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 08:19:40.256499 scanning usb for storage devices... 0 Storage Device(s) found
712 08:19:40.308018 Hit any key to stop autoboot: 1
713 08:19:40.308856 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
714 08:19:40.309445 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 08:19:40.309923 Setting prompt string to ['=>']
716 08:19:40.310403 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 08:19:40.314123 0
718 08:19:40.314998 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 08:19:40.416215 => setenv autoload no
721 08:19:40.416991 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 08:19:40.421800 setenv autoload no
724 08:19:40.523261 => setenv initrd_high 0xffffffff
725 08:19:40.523899 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 08:19:40.528567 setenv initrd_high 0xffffffff
728 08:19:40.629998 => setenv fdt_high 0xffffffff
729 08:19:40.630627 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 08:19:40.635152 setenv fdt_high 0xffffffff
732 08:19:40.736633 => dhcp
733 08:19:40.737267 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 08:19:40.741635 dhcp
735 08:19:41.347038 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 08:19:41.347637 Speed: 1000, full duplex
737 08:19:41.348143 BOOTP broadcast 1
738 08:19:41.355428 DHCP client bound to address 192.168.6.21 (8 ms)
740 08:19:41.456887 => setenv serverip 192.168.6.2
741 08:19:41.457652 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
742 08:19:41.462154 setenv serverip 192.168.6.2
744 08:19:41.563537 => tftpboot 0x01080000 974088/tftp-deploy-1kg41am2/kernel/uImage
745 08:19:41.564206 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
746 08:19:41.570843 tftpboot 0x01080000 974088/tftp-deploy-1kg41am2/kernel/uImage
747 08:19:41.571316 Speed: 1000, full duplex
748 08:19:41.571727 Using ethernet@ff3f0000 device
749 08:19:41.576312 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
750 08:19:41.582166 Filename '974088/tftp-deploy-1kg41am2/kernel/uImage'.
751 08:19:41.585851 Load address: 0x1080000
752 08:19:44.517273 Loading: *################################################## 43.6 MiB
753 08:19:44.517949 14.9 MiB/s
754 08:19:44.518397 done
755 08:19:44.521789 Bytes transferred = 45713984 (2b98a40 hex)
757 08:19:44.623371 => tftpboot 0x08000000 974088/tftp-deploy-1kg41am2/ramdisk/ramdisk.cpio.gz.uboot
758 08:19:44.624093 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
759 08:19:44.630976 tftpboot 0x08000000 974088/tftp-deploy-1kg41am2/ramdisk/ramdisk.cpio.gz.uboot
760 08:19:44.631492 Speed: 1000, full duplex
761 08:19:44.631927 Using ethernet@ff3f0000 device
762 08:19:44.636587 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
763 08:19:44.646284 Filename '974088/tftp-deploy-1kg41am2/ramdisk/ramdisk.cpio.gz.uboot'.
764 08:19:44.646799 Load address: 0x8000000
765 08:19:48.618830 Loading: *################################################# UDP wrong checksum 0000000f 00005aaa
766 08:19:53.620506 T UDP wrong checksum 0000000f 00005aaa
767 08:20:03.622250 T T UDP wrong checksum 0000000f 00005aaa
768 08:20:23.626427 T T T T UDP wrong checksum 0000000f 00005aaa
769 08:20:43.631247 T T T
770 08:20:43.631916 Retry count exceeded; starting again
772 08:20:43.633507 end: 2.4.3 bootloader-commands (duration 00:01:03) [common]
775 08:20:43.635545 end: 2.4 uboot-commands (duration 00:01:22) [common]
777 08:20:43.637324 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
779 08:20:43.638461 end: 2 uboot-action (duration 00:01:22) [common]
781 08:20:43.640142 Cleaning after the job
782 08:20:43.640735 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/ramdisk
783 08:20:43.642049 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/kernel
784 08:20:43.690472 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/dtb
785 08:20:43.691250 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974088/tftp-deploy-1kg41am2/modules
786 08:20:43.710326 start: 4.1 power-off (timeout 00:00:30) [common]
787 08:20:43.710969 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
788 08:20:43.742421 >> OK - accepted request
789 08:20:43.744601 Returned 0 in 0 seconds
790 08:20:43.845656 end: 4.1 power-off (duration 00:00:00) [common]
792 08:20:43.846636 start: 4.2 read-feedback (timeout 00:10:00) [common]
793 08:20:43.847301 Listened to connection for namespace 'common' for up to 1s
794 08:20:44.848252 Finalising connection for namespace 'common'
795 08:20:44.848799 Disconnecting from shell: Finalise
796 08:20:44.849091 =>
797 08:20:44.949850 end: 4.2 read-feedback (duration 00:00:01) [common]
798 08:20:44.950370 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/974088
799 08:20:45.558467 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/974088
800 08:20:45.559087 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.