Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:35:21.675656 lava-dispatcher, installed at version: 2024.01
2 08:35:21.676469 start: 0 validate
3 08:35:21.676943 Start time: 2024-11-11 08:35:21.676914+00:00 (UTC)
4 08:35:21.677539 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:35:21.678076 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:35:21.719663 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:35:21.720234 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:35:21.754671 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:35:21.755295 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 08:35:21.788275 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:35:21.788784 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:35:21.821737 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:35:21.822229 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 08:35:21.866770 validate duration: 0.19
16 08:35:21.868266 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:35:21.868871 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:35:21.869459 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:35:21.870400 Not decompressing ramdisk as can be used compressed.
20 08:35:21.871150 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 08:35:21.871660 saving as /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/ramdisk/initrd.cpio.gz
22 08:35:21.872212 total size: 5628169 (5 MB)
23 08:35:21.917799 progress 0 % (0 MB)
24 08:35:21.925360 progress 5 % (0 MB)
25 08:35:21.933079 progress 10 % (0 MB)
26 08:35:21.939877 progress 15 % (0 MB)
27 08:35:21.947476 progress 20 % (1 MB)
28 08:35:21.953241 progress 25 % (1 MB)
29 08:35:21.957183 progress 30 % (1 MB)
30 08:35:21.961148 progress 35 % (1 MB)
31 08:35:21.964664 progress 40 % (2 MB)
32 08:35:21.968561 progress 45 % (2 MB)
33 08:35:21.972139 progress 50 % (2 MB)
34 08:35:21.976163 progress 55 % (2 MB)
35 08:35:21.980219 progress 60 % (3 MB)
36 08:35:21.983750 progress 65 % (3 MB)
37 08:35:21.987791 progress 70 % (3 MB)
38 08:35:21.991298 progress 75 % (4 MB)
39 08:35:21.995219 progress 80 % (4 MB)
40 08:35:21.998790 progress 85 % (4 MB)
41 08:35:22.002865 progress 90 % (4 MB)
42 08:35:22.006727 progress 95 % (5 MB)
43 08:35:22.009985 progress 100 % (5 MB)
44 08:35:22.010648 5 MB downloaded in 0.14 s (38.77 MB/s)
45 08:35:22.011166 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:35:22.012063 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:35:22.012356 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:35:22.012668 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:35:22.013212 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/kernel/Image
51 08:35:22.013487 saving as /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/kernel/Image
52 08:35:22.013703 total size: 45713920 (43 MB)
53 08:35:22.013918 No compression specified
54 08:35:22.051588 progress 0 % (0 MB)
55 08:35:22.079753 progress 5 % (2 MB)
56 08:35:22.108479 progress 10 % (4 MB)
57 08:35:22.137487 progress 15 % (6 MB)
58 08:35:22.165317 progress 20 % (8 MB)
59 08:35:22.193310 progress 25 % (10 MB)
60 08:35:22.221461 progress 30 % (13 MB)
61 08:35:22.249181 progress 35 % (15 MB)
62 08:35:22.277150 progress 40 % (17 MB)
63 08:35:22.304896 progress 45 % (19 MB)
64 08:35:22.333108 progress 50 % (21 MB)
65 08:35:22.361051 progress 55 % (24 MB)
66 08:35:22.388999 progress 60 % (26 MB)
67 08:35:22.416879 progress 65 % (28 MB)
68 08:35:22.445116 progress 70 % (30 MB)
69 08:35:22.473161 progress 75 % (32 MB)
70 08:35:22.501563 progress 80 % (34 MB)
71 08:35:22.529711 progress 85 % (37 MB)
72 08:35:22.557846 progress 90 % (39 MB)
73 08:35:22.585841 progress 95 % (41 MB)
74 08:35:22.613340 progress 100 % (43 MB)
75 08:35:22.613877 43 MB downloaded in 0.60 s (72.64 MB/s)
76 08:35:22.614358 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:35:22.615167 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:35:22.615440 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:35:22.615706 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:35:22.616192 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 08:35:22.616467 saving as /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/dtb/meson-g12b-a311d-libretech-cc.dtb
83 08:35:22.616676 total size: 54703 (0 MB)
84 08:35:22.616885 No compression specified
85 08:35:22.659248 progress 59 % (0 MB)
86 08:35:22.660128 progress 100 % (0 MB)
87 08:35:22.660684 0 MB downloaded in 0.04 s (1.19 MB/s)
88 08:35:22.661146 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:35:22.661961 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:35:22.662224 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:35:22.662488 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:35:22.662938 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 08:35:22.663180 saving as /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/nfsrootfs/full.rootfs.tar
95 08:35:22.663385 total size: 120894716 (115 MB)
96 08:35:22.663596 Using unxz to decompress xz
97 08:35:22.706743 progress 0 % (0 MB)
98 08:35:23.494411 progress 5 % (5 MB)
99 08:35:24.332936 progress 10 % (11 MB)
100 08:35:25.127913 progress 15 % (17 MB)
101 08:35:25.863757 progress 20 % (23 MB)
102 08:35:26.457938 progress 25 % (28 MB)
103 08:35:27.286794 progress 30 % (34 MB)
104 08:35:28.076016 progress 35 % (40 MB)
105 08:35:28.421808 progress 40 % (46 MB)
106 08:35:28.791405 progress 45 % (51 MB)
107 08:35:29.540304 progress 50 % (57 MB)
108 08:35:30.446414 progress 55 % (63 MB)
109 08:35:31.231788 progress 60 % (69 MB)
110 08:35:31.988599 progress 65 % (74 MB)
111 08:35:32.781479 progress 70 % (80 MB)
112 08:35:33.604360 progress 75 % (86 MB)
113 08:35:34.389055 progress 80 % (92 MB)
114 08:35:35.147636 progress 85 % (98 MB)
115 08:35:35.999037 progress 90 % (103 MB)
116 08:35:36.777743 progress 95 % (109 MB)
117 08:35:37.608229 progress 100 % (115 MB)
118 08:35:37.620738 115 MB downloaded in 14.96 s (7.71 MB/s)
119 08:35:37.621673 end: 1.4.1 http-download (duration 00:00:15) [common]
121 08:35:37.623419 end: 1.4 download-retry (duration 00:00:15) [common]
122 08:35:37.624030 start: 1.5 download-retry (timeout 00:09:44) [common]
123 08:35:37.624607 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 08:35:37.625562 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/modules.tar.xz
125 08:35:37.626070 saving as /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/modules/modules.tar
126 08:35:37.626516 total size: 11612196 (11 MB)
127 08:35:37.626971 Using unxz to decompress xz
128 08:35:37.677057 progress 0 % (0 MB)
129 08:35:37.743315 progress 5 % (0 MB)
130 08:35:37.818471 progress 10 % (1 MB)
131 08:35:37.914052 progress 15 % (1 MB)
132 08:35:38.006354 progress 20 % (2 MB)
133 08:35:38.085942 progress 25 % (2 MB)
134 08:35:38.162015 progress 30 % (3 MB)
135 08:35:38.241636 progress 35 % (3 MB)
136 08:35:38.313964 progress 40 % (4 MB)
137 08:35:38.390128 progress 45 % (5 MB)
138 08:35:38.474960 progress 50 % (5 MB)
139 08:35:38.553357 progress 55 % (6 MB)
140 08:35:38.639162 progress 60 % (6 MB)
141 08:35:38.721787 progress 65 % (7 MB)
142 08:35:38.804987 progress 70 % (7 MB)
143 08:35:38.882331 progress 75 % (8 MB)
144 08:35:38.967744 progress 80 % (8 MB)
145 08:35:39.047681 progress 85 % (9 MB)
146 08:35:39.126000 progress 90 % (9 MB)
147 08:35:39.203520 progress 95 % (10 MB)
148 08:35:39.280264 progress 100 % (11 MB)
149 08:35:39.291890 11 MB downloaded in 1.67 s (6.65 MB/s)
150 08:35:39.292794 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:35:39.294378 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:35:39.294887 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 08:35:39.295395 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 08:35:55.800263 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/974139/extract-nfsrootfs-cavk1itc
156 08:35:55.800867 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 08:35:55.801145 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 08:35:55.801885 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw
159 08:35:55.802366 makedir: /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin
160 08:35:55.802712 makedir: /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/tests
161 08:35:55.803027 makedir: /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/results
162 08:35:55.803354 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-add-keys
163 08:35:55.803875 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-add-sources
164 08:35:55.804421 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-background-process-start
165 08:35:55.804919 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-background-process-stop
166 08:35:55.805437 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-common-functions
167 08:35:55.805976 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-echo-ipv4
168 08:35:55.806506 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-install-packages
169 08:35:55.807066 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-installed-packages
170 08:35:55.807615 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-os-build
171 08:35:55.808113 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-probe-channel
172 08:35:55.808600 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-probe-ip
173 08:35:55.809069 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-target-ip
174 08:35:55.809540 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-target-mac
175 08:35:55.810008 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-target-storage
176 08:35:55.810486 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-test-case
177 08:35:55.810962 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-test-event
178 08:35:55.811427 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-test-feedback
179 08:35:55.811897 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-test-raise
180 08:35:55.812423 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-test-reference
181 08:35:55.812939 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-test-runner
182 08:35:55.813419 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-test-set
183 08:35:55.813889 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-test-shell
184 08:35:55.814364 Updating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-add-keys (debian)
185 08:35:55.814879 Updating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-add-sources (debian)
186 08:35:55.815370 Updating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-install-packages (debian)
187 08:35:55.815855 Updating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-installed-packages (debian)
188 08:35:55.816390 Updating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/bin/lava-os-build (debian)
189 08:35:55.816824 Creating /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/environment
190 08:35:55.817189 LAVA metadata
191 08:35:55.817445 - LAVA_JOB_ID=974139
192 08:35:55.817656 - LAVA_DISPATCHER_IP=192.168.6.2
193 08:35:55.818003 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 08:35:55.818943 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 08:35:55.819244 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 08:35:55.819448 skipped lava-vland-overlay
197 08:35:55.819685 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 08:35:55.819932 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 08:35:55.820178 skipped lava-multinode-overlay
200 08:35:55.820420 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 08:35:55.820669 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 08:35:55.820915 Loading test definitions
203 08:35:55.821184 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 08:35:55.821399 Using /lava-974139 at stage 0
205 08:35:55.822468 uuid=974139_1.6.2.4.1 testdef=None
206 08:35:55.822767 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 08:35:55.823025 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 08:35:55.824608 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 08:35:55.825380 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 08:35:55.827255 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 08:35:55.828141 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 08:35:55.829940 runner path: /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/0/tests/0_timesync-off test_uuid 974139_1.6.2.4.1
215 08:35:55.830468 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 08:35:55.831259 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 08:35:55.831476 Using /lava-974139 at stage 0
219 08:35:55.831819 Fetching tests from https://github.com/kernelci/test-definitions.git
220 08:35:55.832133 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/0/tests/1_kselftest-alsa'
221 08:35:59.525133 Running '/usr/bin/git checkout kernelci.org
222 08:35:59.943506 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 08:35:59.944971 uuid=974139_1.6.2.4.5 testdef=None
224 08:35:59.945326 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 08:35:59.946100 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 08:35:59.948984 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 08:35:59.949811 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 08:35:59.953501 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 08:35:59.954356 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 08:35:59.958006 runner path: /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/0/tests/1_kselftest-alsa test_uuid 974139_1.6.2.4.5
234 08:35:59.958290 BOARD='meson-g12b-a311d-libretech-cc'
235 08:35:59.958506 BRANCH='tip'
236 08:35:59.958708 SKIPFILE='/dev/null'
237 08:35:59.958908 SKIP_INSTALL='True'
238 08:35:59.959105 TESTPROG_URL='http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 08:35:59.959306 TST_CASENAME=''
240 08:35:59.959503 TST_CMDFILES='alsa'
241 08:35:59.960074 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 08:35:59.960869 Creating lava-test-runner.conf files
244 08:35:59.961079 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/974139/lava-overlay-gxlb9fbw/lava-974139/0 for stage 0
245 08:35:59.961465 - 0_timesync-off
246 08:35:59.961711 - 1_kselftest-alsa
247 08:35:59.962053 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 08:35:59.962340 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 08:36:23.242726 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 08:36:23.243168 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 08:36:23.243430 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 08:36:23.243701 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 08:36:23.243963 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 08:36:23.940007 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 08:36:23.940500 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 08:36:23.940751 extracting modules file /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974139/extract-nfsrootfs-cavk1itc
257 08:36:25.306181 extracting modules file /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974139/extract-overlay-ramdisk-qx5t_l8q/ramdisk
258 08:36:26.719234 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 08:36:26.719723 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 08:36:26.720143 [common] Applying overlay to NFS
261 08:36:26.720710 [common] Applying overlay /var/lib/lava/dispatcher/tmp/974139/compress-overlay-n56bidae/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/974139/extract-nfsrootfs-cavk1itc
262 08:36:29.450334 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 08:36:29.450809 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 08:36:29.451089 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 08:36:29.451321 Converting downloaded kernel to a uImage
266 08:36:29.451642 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/kernel/Image /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/kernel/uImage
267 08:36:29.937480 output: Image Name:
268 08:36:29.937905 output: Created: Mon Nov 11 08:36:29 2024
269 08:36:29.938114 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 08:36:29.938318 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 08:36:29.938519 output: Load Address: 01080000
272 08:36:29.938720 output: Entry Point: 01080000
273 08:36:29.938920 output:
274 08:36:29.939257 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 08:36:29.939529 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 08:36:29.939799 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 08:36:29.940098 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 08:36:29.940372 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 08:36:29.940630 Building ramdisk /var/lib/lava/dispatcher/tmp/974139/extract-overlay-ramdisk-qx5t_l8q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/974139/extract-overlay-ramdisk-qx5t_l8q/ramdisk
280 08:36:32.284500 >> 166829 blocks
281 08:36:39.972386 Adding RAMdisk u-boot header.
282 08:36:39.973247 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/974139/extract-overlay-ramdisk-qx5t_l8q/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/974139/extract-overlay-ramdisk-qx5t_l8q/ramdisk.cpio.gz.uboot
283 08:36:40.212985 output: Image Name:
284 08:36:40.213402 output: Created: Mon Nov 11 08:36:39 2024
285 08:36:40.213611 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 08:36:40.213818 output: Data Size: 23435011 Bytes = 22885.75 KiB = 22.35 MiB
287 08:36:40.214018 output: Load Address: 00000000
288 08:36:40.214218 output: Entry Point: 00000000
289 08:36:40.214420 output:
290 08:36:40.214899 rename /var/lib/lava/dispatcher/tmp/974139/extract-overlay-ramdisk-qx5t_l8q/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/ramdisk/ramdisk.cpio.gz.uboot
291 08:36:40.215299 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 08:36:40.215583 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 08:36:40.215857 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 08:36:40.216236 No LXC device requested
295 08:36:40.216768 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 08:36:40.217304 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 08:36:40.217833 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 08:36:40.218253 Checking files for TFTP limit of 4294967296 bytes.
299 08:36:40.220939 end: 1 tftp-deploy (duration 00:01:18) [common]
300 08:36:40.221526 start: 2 uboot-action (timeout 00:05:00) [common]
301 08:36:40.222064 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 08:36:40.222567 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 08:36:40.223080 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 08:36:40.223615 Using kernel file from prepare-kernel: 974139/tftp-deploy-h7eodqjd/kernel/uImage
305 08:36:40.224282 substitutions:
306 08:36:40.224704 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 08:36:40.225112 - {DTB_ADDR}: 0x01070000
308 08:36:40.225516 - {DTB}: 974139/tftp-deploy-h7eodqjd/dtb/meson-g12b-a311d-libretech-cc.dtb
309 08:36:40.225919 - {INITRD}: 974139/tftp-deploy-h7eodqjd/ramdisk/ramdisk.cpio.gz.uboot
310 08:36:40.226320 - {KERNEL_ADDR}: 0x01080000
311 08:36:40.226715 - {KERNEL}: 974139/tftp-deploy-h7eodqjd/kernel/uImage
312 08:36:40.227113 - {LAVA_MAC}: None
313 08:36:40.227548 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/974139/extract-nfsrootfs-cavk1itc
314 08:36:40.227946 - {NFS_SERVER_IP}: 192.168.6.2
315 08:36:40.228367 - {PRESEED_CONFIG}: None
316 08:36:40.228760 - {PRESEED_LOCAL}: None
317 08:36:40.229149 - {RAMDISK_ADDR}: 0x08000000
318 08:36:40.229535 - {RAMDISK}: 974139/tftp-deploy-h7eodqjd/ramdisk/ramdisk.cpio.gz.uboot
319 08:36:40.229922 - {ROOT_PART}: None
320 08:36:40.230307 - {ROOT}: None
321 08:36:40.230693 - {SERVER_IP}: 192.168.6.2
322 08:36:40.231077 - {TEE_ADDR}: 0x83000000
323 08:36:40.231465 - {TEE}: None
324 08:36:40.231853 Parsed boot commands:
325 08:36:40.232257 - setenv autoload no
326 08:36:40.232646 - setenv initrd_high 0xffffffff
327 08:36:40.233033 - setenv fdt_high 0xffffffff
328 08:36:40.233416 - dhcp
329 08:36:40.233798 - setenv serverip 192.168.6.2
330 08:36:40.234182 - tftpboot 0x01080000 974139/tftp-deploy-h7eodqjd/kernel/uImage
331 08:36:40.234570 - tftpboot 0x08000000 974139/tftp-deploy-h7eodqjd/ramdisk/ramdisk.cpio.gz.uboot
332 08:36:40.234956 - tftpboot 0x01070000 974139/tftp-deploy-h7eodqjd/dtb/meson-g12b-a311d-libretech-cc.dtb
333 08:36:40.235341 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/974139/extract-nfsrootfs-cavk1itc,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 08:36:40.235739 - bootm 0x01080000 0x08000000 0x01070000
335 08:36:40.236269 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 08:36:40.237754 start: 2.3 connect-device (timeout 00:05:00) [common]
338 08:36:40.238175 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 08:36:40.253052 Setting prompt string to ['lava-test: # ']
340 08:36:40.254557 end: 2.3 connect-device (duration 00:00:00) [common]
341 08:36:40.255189 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 08:36:40.255779 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 08:36:40.256415 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 08:36:40.257562 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 08:36:40.296793 >> OK - accepted request
346 08:36:40.298928 Returned 0 in 0 seconds
347 08:36:40.400057 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 08:36:40.401656 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 08:36:40.402234 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 08:36:40.402753 Setting prompt string to ['Hit any key to stop autoboot']
352 08:36:40.403210 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 08:36:40.404772 Trying 192.168.56.21...
354 08:36:40.405255 Connected to conserv1.
355 08:36:40.405677 Escape character is '^]'.
356 08:36:40.406104
357 08:36:40.406533 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 08:36:40.406951
359 08:36:53.097759 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 08:36:53.098379 bl2_stage_init 0x01
361 08:36:53.098800 bl2_stage_init 0x81
362 08:36:53.103428 hw id: 0x0000 - pwm id 0x01
363 08:36:53.103883 bl2_stage_init 0xc1
364 08:36:53.104359 bl2_stage_init 0x02
365 08:36:53.104769
366 08:36:53.108899 L0:00000000
367 08:36:53.109356 L1:20000703
368 08:36:53.109765 L2:00008067
369 08:36:53.110161 L3:14000000
370 08:36:53.114652 B2:00402000
371 08:36:53.115088 B1:e0f83180
372 08:36:53.115486
373 08:36:53.115874 TE: 58124
374 08:36:53.116306
375 08:36:53.120117 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 08:36:53.120541
377 08:36:53.120929 Board ID = 1
378 08:36:53.125686 Set A53 clk to 24M
379 08:36:53.126098 Set A73 clk to 24M
380 08:36:53.126484 Set clk81 to 24M
381 08:36:53.131354 A53 clk: 1200 MHz
382 08:36:53.131765 A73 clk: 1200 MHz
383 08:36:53.132185 CLK81: 166.6M
384 08:36:53.132567 smccc: 00012a92
385 08:36:53.136893 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 08:36:53.142646 board id: 1
387 08:36:53.148380 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 08:36:53.159042 fw parse done
389 08:36:53.164980 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 08:36:53.207704 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 08:36:53.218643 PIEI prepare done
392 08:36:53.219055 fastboot data load
393 08:36:53.219442 fastboot data verify
394 08:36:53.224252 verify result: 266
395 08:36:53.229814 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 08:36:53.230257 LPDDR4 probe
397 08:36:53.230647 ddr clk to 1584MHz
398 08:36:53.237795 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 08:36:53.275008
400 08:36:53.275427 dmc_version 0001
401 08:36:53.281791 Check phy result
402 08:36:53.287720 INFO : End of CA training
403 08:36:53.288170 INFO : End of initialization
404 08:36:53.293176 INFO : Training has run successfully!
405 08:36:53.293590 Check phy result
406 08:36:53.298773 INFO : End of initialization
407 08:36:53.299182 INFO : End of read enable training
408 08:36:53.304394 INFO : End of fine write leveling
409 08:36:53.309994 INFO : End of Write leveling coarse delay
410 08:36:53.310410 INFO : Training has run successfully!
411 08:36:53.310800 Check phy result
412 08:36:53.315602 INFO : End of initialization
413 08:36:53.316049 INFO : End of read dq deskew training
414 08:36:53.321165 INFO : End of MPR read delay center optimization
415 08:36:53.326763 INFO : End of write delay center optimization
416 08:36:53.332341 INFO : End of read delay center optimization
417 08:36:53.332756 INFO : End of max read latency training
418 08:36:53.337959 INFO : Training has run successfully!
419 08:36:53.338384 1D training succeed
420 08:36:53.347188 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 08:36:53.394929 Check phy result
422 08:36:53.395352 INFO : End of initialization
423 08:36:53.416524 INFO : End of 2D read delay Voltage center optimization
424 08:36:53.436636 INFO : End of 2D read delay Voltage center optimization
425 08:36:53.487759 INFO : End of 2D write delay Voltage center optimization
426 08:36:53.537727 INFO : End of 2D write delay Voltage center optimization
427 08:36:53.543365 INFO : Training has run successfully!
428 08:36:53.543903
429 08:36:53.544411 channel==0
430 08:36:53.548939 RxClkDly_Margin_A0==88 ps 9
431 08:36:53.549450 TxDqDly_Margin_A0==98 ps 10
432 08:36:53.554511 RxClkDly_Margin_A1==88 ps 9
433 08:36:53.555021 TxDqDly_Margin_A1==98 ps 10
434 08:36:53.555465 TrainedVREFDQ_A0==74
435 08:36:53.560124 TrainedVREFDQ_A1==74
436 08:36:53.560641 VrefDac_Margin_A0==25
437 08:36:53.561088 DeviceVref_Margin_A0==40
438 08:36:53.565725 VrefDac_Margin_A1==25
439 08:36:53.566245 DeviceVref_Margin_A1==40
440 08:36:53.566684
441 08:36:53.567123
442 08:36:53.571292 channel==1
443 08:36:53.571828 RxClkDly_Margin_A0==98 ps 10
444 08:36:53.572322 TxDqDly_Margin_A0==88 ps 9
445 08:36:53.576910 RxClkDly_Margin_A1==88 ps 9
446 08:36:53.577415 TxDqDly_Margin_A1==88 ps 9
447 08:36:53.582506 TrainedVREFDQ_A0==76
448 08:36:53.583012 TrainedVREFDQ_A1==77
449 08:36:53.583459 VrefDac_Margin_A0==22
450 08:36:53.588092 DeviceVref_Margin_A0==38
451 08:36:53.588590 VrefDac_Margin_A1==24
452 08:36:53.593713 DeviceVref_Margin_A1==37
453 08:36:53.594218
454 08:36:53.594655 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 08:36:53.595093
456 08:36:53.627199 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 08:36:53.627781 2D training succeed
458 08:36:53.632879 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 08:36:53.638509 auto size-- 65535DDR cs0 size: 2048MB
460 08:36:53.639023 DDR cs1 size: 2048MB
461 08:36:53.644086 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 08:36:53.644590 cs0 DataBus test pass
463 08:36:53.649661 cs1 DataBus test pass
464 08:36:53.650160 cs0 AddrBus test pass
465 08:36:53.650601 cs1 AddrBus test pass
466 08:36:53.651033
467 08:36:53.655251 100bdlr_step_size ps== 420
468 08:36:53.655758 result report
469 08:36:53.660844 boot times 0Enable ddr reg access
470 08:36:53.665490 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 08:36:53.679512 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 08:36:54.251494 0.0;M3 CHK:0;cm4_sp_mode 0
473 08:36:54.252136 MVN_1=0x00000000
474 08:36:54.256974 MVN_2=0x00000000
475 08:36:54.262814 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 08:36:54.263303 OPS=0x10
477 08:36:54.263746 ring efuse init
478 08:36:54.264219 chipver efuse init
479 08:36:54.268338 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 08:36:54.273951 [0.018961 Inits done]
481 08:36:54.274430 secure task start!
482 08:36:54.274866 high task start!
483 08:36:54.278524 low task start!
484 08:36:54.279001 run into bl31
485 08:36:54.285171 NOTICE: BL31: v1.3(release):4fc40b1
486 08:36:54.293003 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 08:36:54.293487 NOTICE: BL31: G12A normal boot!
488 08:36:54.318328 NOTICE: BL31: BL33 decompress pass
489 08:36:54.324048 ERROR: Error initializing runtime service opteed_fast
490 08:36:55.557048
491 08:36:55.557730
492 08:36:55.565368 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 08:36:55.565905
494 08:36:55.566370 Model: Libre Computer AML-A311D-CC Alta
495 08:36:55.773691 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 08:36:55.797117 DRAM: 2 GiB (effective 3.8 GiB)
497 08:36:55.940078 Core: 408 devices, 31 uclasses, devicetree: separate
498 08:36:55.946006 WDT: Not starting watchdog@f0d0
499 08:36:55.978238 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 08:36:55.990688 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 08:36:55.995692 ** Bad device specification mmc 0 **
502 08:36:56.006054 Card did not respond to voltage select! : -110
503 08:36:56.013680 ** Bad device specification mmc 0 **
504 08:36:56.014163 Couldn't find partition mmc 0
505 08:36:56.022074 Card did not respond to voltage select! : -110
506 08:36:56.027529 ** Bad device specification mmc 0 **
507 08:36:56.028069 Couldn't find partition mmc 0
508 08:36:56.032568 Error: could not access storage.
509 08:36:57.298310 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 08:36:57.298960 bl2_stage_init 0x01
511 08:36:57.299442 bl2_stage_init 0x81
512 08:36:57.303880 hw id: 0x0000 - pwm id 0x01
513 08:36:57.304419 bl2_stage_init 0xc1
514 08:36:57.304882 bl2_stage_init 0x02
515 08:36:57.305333
516 08:36:57.309534 L0:00000000
517 08:36:57.310023 L1:20000703
518 08:36:57.310471 L2:00008067
519 08:36:57.310919 L3:14000000
520 08:36:57.312398 B2:00402000
521 08:36:57.312889 B1:e0f83180
522 08:36:57.313340
523 08:36:57.313784 TE: 58124
524 08:36:57.314229
525 08:36:57.323549 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 08:36:57.324072
527 08:36:57.324542 Board ID = 1
528 08:36:57.324993 Set A53 clk to 24M
529 08:36:57.325438 Set A73 clk to 24M
530 08:36:57.329241 Set clk81 to 24M
531 08:36:57.329730 A53 clk: 1200 MHz
532 08:36:57.330175 A73 clk: 1200 MHz
533 08:36:57.334758 CLK81: 166.6M
534 08:36:57.335245 smccc: 00012a91
535 08:36:57.340364 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 08:36:57.340856 board id: 1
537 08:36:57.348016 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 08:36:57.359645 fw parse done
539 08:36:57.364614 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 08:36:57.408335 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 08:36:57.419151 PIEI prepare done
542 08:36:57.419676 fastboot data load
543 08:36:57.420194 fastboot data verify
544 08:36:57.424876 verify result: 266
545 08:36:57.430440 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 08:36:57.430959 LPDDR4 probe
547 08:36:57.431416 ddr clk to 1584MHz
548 08:36:57.438469 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 08:36:57.475654
550 08:36:57.476222 dmc_version 0001
551 08:36:57.482464 Check phy result
552 08:36:57.488251 INFO : End of CA training
553 08:36:57.488771 INFO : End of initialization
554 08:36:57.493847 INFO : Training has run successfully!
555 08:36:57.494356 Check phy result
556 08:36:57.499443 INFO : End of initialization
557 08:36:57.499955 INFO : End of read enable training
558 08:36:57.505047 INFO : End of fine write leveling
559 08:36:57.510660 INFO : End of Write leveling coarse delay
560 08:36:57.511181 INFO : Training has run successfully!
561 08:36:57.511636 Check phy result
562 08:36:57.516286 INFO : End of initialization
563 08:36:57.516810 INFO : End of read dq deskew training
564 08:36:57.521866 INFO : End of MPR read delay center optimization
565 08:36:57.527440 INFO : End of write delay center optimization
566 08:36:57.533047 INFO : End of read delay center optimization
567 08:36:57.533573 INFO : End of max read latency training
568 08:36:57.538658 INFO : Training has run successfully!
569 08:36:57.539188 1D training succeed
570 08:36:57.547803 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 08:36:57.595524 Check phy result
572 08:36:57.596111 INFO : End of initialization
573 08:36:57.617176 INFO : End of 2D read delay Voltage center optimization
574 08:36:57.637492 INFO : End of 2D read delay Voltage center optimization
575 08:36:57.689626 INFO : End of 2D write delay Voltage center optimization
576 08:36:57.738898 INFO : End of 2D write delay Voltage center optimization
577 08:36:57.744467 INFO : Training has run successfully!
578 08:36:57.745057
579 08:36:57.745548 channel==0
580 08:36:57.750044 RxClkDly_Margin_A0==88 ps 9
581 08:36:57.750660 TxDqDly_Margin_A0==98 ps 10
582 08:36:57.755677 RxClkDly_Margin_A1==88 ps 9
583 08:36:57.756314 TxDqDly_Margin_A1==98 ps 10
584 08:36:57.756788 TrainedVREFDQ_A0==74
585 08:36:57.761259 TrainedVREFDQ_A1==74
586 08:36:57.761832 VrefDac_Margin_A0==25
587 08:36:57.762336 DeviceVref_Margin_A0==40
588 08:36:57.766797 VrefDac_Margin_A1==25
589 08:36:57.767194 DeviceVref_Margin_A1==40
590 08:36:57.767484
591 08:36:57.767954
592 08:36:57.772489 channel==1
593 08:36:57.773064 RxClkDly_Margin_A0==98 ps 10
594 08:36:57.773479 TxDqDly_Margin_A0==88 ps 9
595 08:36:57.778108 RxClkDly_Margin_A1==98 ps 10
596 08:36:57.778737 TxDqDly_Margin_A1==88 ps 9
597 08:36:57.783648 TrainedVREFDQ_A0==76
598 08:36:57.784263 TrainedVREFDQ_A1==77
599 08:36:57.784771 VrefDac_Margin_A0==22
600 08:36:57.789322 DeviceVref_Margin_A0==38
601 08:36:57.789980 VrefDac_Margin_A1==24
602 08:36:57.795150 DeviceVref_Margin_A1==37
603 08:36:57.795827
604 08:36:57.796398 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 08:36:57.796913
606 08:36:57.828670 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 08:36:57.829127 2D training succeed
608 08:36:57.834472 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 08:36:57.839612 auto size-- 65535DDR cs0 size: 2048MB
610 08:36:57.840052 DDR cs1 size: 2048MB
611 08:36:57.845328 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 08:36:57.845740 cs0 DataBus test pass
613 08:36:57.851070 cs1 DataBus test pass
614 08:36:57.852091 cs0 AddrBus test pass
615 08:36:57.852384 cs1 AddrBus test pass
616 08:36:57.852626
617 08:36:57.856829 100bdlr_step_size ps== 420
618 08:36:57.857245 result report
619 08:36:57.862284 boot times 0Enable ddr reg access
620 08:36:57.867527 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 08:36:57.881002 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 08:36:58.454499 0.0;M3 CHK:0;cm4_sp_mode 0
623 08:36:58.455195 MVN_1=0x00000000
624 08:36:58.459832 MVN_2=0x00000000
625 08:36:58.465591 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 08:36:58.466143 OPS=0x10
627 08:36:58.466616 ring efuse init
628 08:36:58.467103 chipver efuse init
629 08:36:58.473892 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 08:36:58.474446 [0.018961 Inits done]
631 08:36:58.474886 secure task start!
632 08:36:58.481441 high task start!
633 08:36:58.481926 low task start!
634 08:36:58.482360 run into bl31
635 08:36:58.488003 NOTICE: BL31: v1.3(release):4fc40b1
636 08:36:58.495801 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 08:36:58.496360 NOTICE: BL31: G12A normal boot!
638 08:36:58.521225 NOTICE: BL31: BL33 decompress pass
639 08:36:58.526893 ERROR: Error initializing runtime service opteed_fast
640 08:36:59.760103
641 08:36:59.760735
642 08:36:59.768368 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 08:36:59.768906
644 08:36:59.769375 Model: Libre Computer AML-A311D-CC Alta
645 08:36:59.976501 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 08:37:00.000167 DRAM: 2 GiB (effective 3.8 GiB)
647 08:37:00.143114 Core: 408 devices, 31 uclasses, devicetree: separate
648 08:37:00.148940 WDT: Not starting watchdog@f0d0
649 08:37:00.181147 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 08:37:00.193727 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 08:37:00.198619 ** Bad device specification mmc 0 **
652 08:37:00.208942 Card did not respond to voltage select! : -110
653 08:37:00.216582 ** Bad device specification mmc 0 **
654 08:37:00.217063 Couldn't find partition mmc 0
655 08:37:00.224945 Card did not respond to voltage select! : -110
656 08:37:00.230455 ** Bad device specification mmc 0 **
657 08:37:00.230956 Couldn't find partition mmc 0
658 08:37:00.235610 Error: could not access storage.
659 08:37:00.577181 Net: eth0: ethernet@ff3f0000
660 08:37:00.577771 starting USB...
661 08:37:00.830136 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 08:37:00.830724 Starting the controller
663 08:37:00.836110 USB XHCI 1.10
664 08:37:02.547368 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 08:37:02.548101 bl2_stage_init 0x01
666 08:37:02.548591 bl2_stage_init 0x81
667 08:37:02.552512 hw id: 0x0000 - pwm id 0x01
668 08:37:02.553006 bl2_stage_init 0xc1
669 08:37:02.553462 bl2_stage_init 0x02
670 08:37:02.553907
671 08:37:02.558159 L0:00000000
672 08:37:02.558689 L1:20000703
673 08:37:02.559149 L2:00008067
674 08:37:02.559595 L3:14000000
675 08:37:02.561229 B2:00402000
676 08:37:02.561716 B1:e0f83180
677 08:37:02.562170
678 08:37:02.562616 TE: 58124
679 08:37:02.563061
680 08:37:02.572475 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 08:37:02.572987
682 08:37:02.573447 Board ID = 1
683 08:37:02.573894 Set A53 clk to 24M
684 08:37:02.574333 Set A73 clk to 24M
685 08:37:02.578129 Set clk81 to 24M
686 08:37:02.578615 A53 clk: 1200 MHz
687 08:37:02.579068 A73 clk: 1200 MHz
688 08:37:02.583549 CLK81: 166.6M
689 08:37:02.584060 smccc: 00012a92
690 08:37:02.589154 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 08:37:02.589641 board id: 1
692 08:37:02.597570 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 08:37:02.608244 fw parse done
694 08:37:02.614227 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 08:37:02.656752 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 08:37:02.667627 PIEI prepare done
697 08:37:02.668191 fastboot data load
698 08:37:02.668665 fastboot data verify
699 08:37:02.673325 verify result: 266
700 08:37:02.679037 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 08:37:02.679521 LPDDR4 probe
702 08:37:02.679969 ddr clk to 1584MHz
703 08:37:02.686842 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 08:37:02.724149
705 08:37:02.724684 dmc_version 0001
706 08:37:02.730843 Check phy result
707 08:37:02.736651 INFO : End of CA training
708 08:37:02.737134 INFO : End of initialization
709 08:37:02.742293 INFO : Training has run successfully!
710 08:37:02.742774 Check phy result
711 08:37:02.747853 INFO : End of initialization
712 08:37:02.748366 INFO : End of read enable training
713 08:37:02.753469 INFO : End of fine write leveling
714 08:37:02.759066 INFO : End of Write leveling coarse delay
715 08:37:02.759551 INFO : Training has run successfully!
716 08:37:02.760027 Check phy result
717 08:37:02.764648 INFO : End of initialization
718 08:37:02.765126 INFO : End of read dq deskew training
719 08:37:02.770250 INFO : End of MPR read delay center optimization
720 08:37:02.776009 INFO : End of write delay center optimization
721 08:37:02.781551 INFO : End of read delay center optimization
722 08:37:02.782068 INFO : End of max read latency training
723 08:37:02.787085 INFO : Training has run successfully!
724 08:37:02.787584 1D training succeed
725 08:37:02.796353 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 08:37:02.843916 Check phy result
727 08:37:02.844483 INFO : End of initialization
728 08:37:02.865562 INFO : End of 2D read delay Voltage center optimization
729 08:37:02.885893 INFO : End of 2D read delay Voltage center optimization
730 08:37:02.937917 INFO : End of 2D write delay Voltage center optimization
731 08:37:02.987237 INFO : End of 2D write delay Voltage center optimization
732 08:37:02.992826 INFO : Training has run successfully!
733 08:37:02.993318
734 08:37:02.993775 channel==0
735 08:37:02.998409 RxClkDly_Margin_A0==88 ps 9
736 08:37:02.998888 TxDqDly_Margin_A0==98 ps 10
737 08:37:03.004094 RxClkDly_Margin_A1==88 ps 9
738 08:37:03.004624 TxDqDly_Margin_A1==98 ps 10
739 08:37:03.005096 TrainedVREFDQ_A0==74
740 08:37:03.009595 TrainedVREFDQ_A1==75
741 08:37:03.010110 VrefDac_Margin_A0==25
742 08:37:03.010573 DeviceVref_Margin_A0==40
743 08:37:03.015197 VrefDac_Margin_A1==25
744 08:37:03.015681 DeviceVref_Margin_A1==39
745 08:37:03.016167
746 08:37:03.016632
747 08:37:03.020812 channel==1
748 08:37:03.021306 RxClkDly_Margin_A0==98 ps 10
749 08:37:03.021760 TxDqDly_Margin_A0==88 ps 9
750 08:37:03.026368 RxClkDly_Margin_A1==88 ps 9
751 08:37:03.026858 TxDqDly_Margin_A1==88 ps 9
752 08:37:03.032129 TrainedVREFDQ_A0==76
753 08:37:03.032660 TrainedVREFDQ_A1==77
754 08:37:03.033128 VrefDac_Margin_A0==22
755 08:37:03.037617 DeviceVref_Margin_A0==38
756 08:37:03.038214 VrefDac_Margin_A1==24
757 08:37:03.046111 DeviceVref_Margin_A1==37
758 08:37:03.046788
759 08:37:03.047265 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 08:37:03.047724
761 08:37:03.076913 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
762 08:37:03.077630 2D training succeed
763 08:37:03.082400 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 08:37:03.088103 auto size-- 65535DDR cs0 size: 2048MB
765 08:37:03.088933 DDR cs1 size: 2048MB
766 08:37:03.093638 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 08:37:03.094277 cs0 DataBus test pass
768 08:37:03.099190 cs1 DataBus test pass
769 08:37:03.099767 cs0 AddrBus test pass
770 08:37:03.100270 cs1 AddrBus test pass
771 08:37:03.100743
772 08:37:03.104921 100bdlr_step_size ps== 420
773 08:37:03.105583 result report
774 08:37:03.110583 boot times 0Enable ddr reg access
775 08:37:03.115844 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 08:37:03.129230 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 08:37:03.702816 0.0;M3 CHK:0;cm4_sp_mode 0
778 08:37:03.703480 MVN_1=0x00000000
779 08:37:03.708376 MVN_2=0x00000000
780 08:37:03.714207 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 08:37:03.714809 OPS=0x10
782 08:37:03.715274 ring efuse init
783 08:37:03.715708 chipver efuse init
784 08:37:03.719672 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 08:37:03.725237 [0.018961 Inits done]
786 08:37:03.725750 secure task start!
787 08:37:03.726192 high task start!
788 08:37:03.729774 low task start!
789 08:37:03.730286 run into bl31
790 08:37:03.736414 NOTICE: BL31: v1.3(release):4fc40b1
791 08:37:03.744253 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 08:37:03.744766 NOTICE: BL31: G12A normal boot!
793 08:37:03.769621 NOTICE: BL31: BL33 decompress pass
794 08:37:03.775329 ERROR: Error initializing runtime service opteed_fast
795 08:37:05.008276
796 08:37:05.008947
797 08:37:05.016646 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 08:37:05.017187
799 08:37:05.017661 Model: Libre Computer AML-A311D-CC Alta
800 08:37:05.225074 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 08:37:05.247939 DRAM: 2 GiB (effective 3.8 GiB)
802 08:37:05.391492 Core: 408 devices, 31 uclasses, devicetree: separate
803 08:37:05.397298 WDT: Not starting watchdog@f0d0
804 08:37:05.429573 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 08:37:05.441987 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 08:37:05.446997 ** Bad device specification mmc 0 **
807 08:37:05.457407 Card did not respond to voltage select! : -110
808 08:37:05.464062 ** Bad device specification mmc 0 **
809 08:37:05.464587 Couldn't find partition mmc 0
810 08:37:05.473418 Card did not respond to voltage select! : -110
811 08:37:05.478838 ** Bad device specification mmc 0 **
812 08:37:05.479359 Couldn't find partition mmc 0
813 08:37:05.483874 Error: could not access storage.
814 08:37:05.826322 Net: eth0: ethernet@ff3f0000
815 08:37:05.826934 starting USB...
816 08:37:06.078208 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 08:37:06.078798 Starting the controller
818 08:37:06.085154 USB XHCI 1.10
819 08:37:08.247281 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 08:37:08.247933 bl2_stage_init 0x01
821 08:37:08.248470 bl2_stage_init 0x81
822 08:37:08.252822 hw id: 0x0000 - pwm id 0x01
823 08:37:08.253344 bl2_stage_init 0xc1
824 08:37:08.253804 bl2_stage_init 0x02
825 08:37:08.254254
826 08:37:08.258460 L0:00000000
827 08:37:08.258970 L1:20000703
828 08:37:08.259421 L2:00008067
829 08:37:08.259867 L3:14000000
830 08:37:08.261379 B2:00402000
831 08:37:08.261891 B1:e0f83180
832 08:37:08.262343
833 08:37:08.262786 TE: 58124
834 08:37:08.263233
835 08:37:08.272411 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 08:37:08.272932
837 08:37:08.273390 Board ID = 1
838 08:37:08.273835 Set A53 clk to 24M
839 08:37:08.274271 Set A73 clk to 24M
840 08:37:08.278086 Set clk81 to 24M
841 08:37:08.278602 A53 clk: 1200 MHz
842 08:37:08.279052 A73 clk: 1200 MHz
843 08:37:08.281939 CLK81: 166.6M
844 08:37:08.282447 smccc: 00012a92
845 08:37:08.287449 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 08:37:08.287964 board id: 1
847 08:37:08.297940 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 08:37:08.308338 fw parse done
849 08:37:08.314299 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 08:37:08.356899 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 08:37:08.367936 PIEI prepare done
852 08:37:08.368495 fastboot data load
853 08:37:08.368953 fastboot data verify
854 08:37:08.373544 verify result: 266
855 08:37:08.379154 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 08:37:08.379679 LPDDR4 probe
857 08:37:08.380177 ddr clk to 1584MHz
858 08:37:08.387125 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 08:37:08.424385
860 08:37:08.424941 dmc_version 0001
861 08:37:08.431042 Check phy result
862 08:37:08.436937 INFO : End of CA training
863 08:37:08.437456 INFO : End of initialization
864 08:37:08.442537 INFO : Training has run successfully!
865 08:37:08.443051 Check phy result
866 08:37:08.448121 INFO : End of initialization
867 08:37:08.448644 INFO : End of read enable training
868 08:37:08.453729 INFO : End of fine write leveling
869 08:37:08.459291 INFO : End of Write leveling coarse delay
870 08:37:08.459803 INFO : Training has run successfully!
871 08:37:08.460303 Check phy result
872 08:37:08.464935 INFO : End of initialization
873 08:37:08.465447 INFO : End of read dq deskew training
874 08:37:08.470504 INFO : End of MPR read delay center optimization
875 08:37:08.476088 INFO : End of write delay center optimization
876 08:37:08.481740 INFO : End of read delay center optimization
877 08:37:08.482263 INFO : End of max read latency training
878 08:37:08.487316 INFO : Training has run successfully!
879 08:37:08.487829 1D training succeed
880 08:37:08.496457 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 08:37:08.544142 Check phy result
882 08:37:08.544727 INFO : End of initialization
883 08:37:08.565929 INFO : End of 2D read delay Voltage center optimization
884 08:37:08.585279 INFO : End of 2D read delay Voltage center optimization
885 08:37:08.637309 INFO : End of 2D write delay Voltage center optimization
886 08:37:08.686740 INFO : End of 2D write delay Voltage center optimization
887 08:37:08.692317 INFO : Training has run successfully!
888 08:37:08.692833
889 08:37:08.693295 channel==0
890 08:37:08.697958 RxClkDly_Margin_A0==88 ps 9
891 08:37:08.698477 TxDqDly_Margin_A0==98 ps 10
892 08:37:08.703464 RxClkDly_Margin_A1==88 ps 9
893 08:37:08.704014 TxDqDly_Margin_A1==98 ps 10
894 08:37:08.704513 TrainedVREFDQ_A0==74
895 08:37:08.709141 TrainedVREFDQ_A1==74
896 08:37:08.709687 VrefDac_Margin_A0==25
897 08:37:08.710142 DeviceVref_Margin_A0==40
898 08:37:08.714728 VrefDac_Margin_A1==25
899 08:37:08.715255 DeviceVref_Margin_A1==40
900 08:37:08.715689
901 08:37:08.716158
902 08:37:08.720280 channel==1
903 08:37:08.720782 RxClkDly_Margin_A0==78 ps 8
904 08:37:08.721227 TxDqDly_Margin_A0==88 ps 9
905 08:37:08.725929 RxClkDly_Margin_A1==88 ps 9
906 08:37:08.726432 TxDqDly_Margin_A1==88 ps 9
907 08:37:08.731458 TrainedVREFDQ_A0==76
908 08:37:08.732010 TrainedVREFDQ_A1==77
909 08:37:08.732455 VrefDac_Margin_A0==22
910 08:37:08.737047 DeviceVref_Margin_A0==38
911 08:37:08.737549 VrefDac_Margin_A1==24
912 08:37:08.742694 DeviceVref_Margin_A1==37
913 08:37:08.743198
914 08:37:08.743634 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 08:37:08.744098
916 08:37:08.776265 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000019 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 08:37:08.776807 2D training succeed
918 08:37:08.781940 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 08:37:08.787439 auto size-- 65535DDR cs0 size: 2048MB
920 08:37:08.787942 DDR cs1 size: 2048MB
921 08:37:08.793065 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 08:37:08.793569 cs0 DataBus test pass
923 08:37:08.798745 cs1 DataBus test pass
924 08:37:08.799242 cs0 AddrBus test pass
925 08:37:08.799675 cs1 AddrBus test pass
926 08:37:08.800136
927 08:37:08.804285 100bdlr_step_size ps== 420
928 08:37:08.804796 result report
929 08:37:08.809947 boot times 0Enable ddr reg access
930 08:37:08.815060 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 08:37:08.828490 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 08:37:09.402160 0.0;M3 CHK:0;cm4_sp_mode 0
933 08:37:09.402794 MVN_1=0x00000000
934 08:37:09.407603 MVN_2=0x00000000
935 08:37:09.413391 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 08:37:09.413934 OPS=0x10
937 08:37:09.414400 ring efuse init
938 08:37:09.414850 chipver efuse init
939 08:37:09.418976 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 08:37:09.424580 [0.018961 Inits done]
941 08:37:09.425090 secure task start!
942 08:37:09.425542 high task start!
943 08:37:09.429165 low task start!
944 08:37:09.429683 run into bl31
945 08:37:09.435819 NOTICE: BL31: v1.3(release):4fc40b1
946 08:37:09.443597 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 08:37:09.444154 NOTICE: BL31: G12A normal boot!
948 08:37:09.469016 NOTICE: BL31: BL33 decompress pass
949 08:37:09.474645 ERROR: Error initializing runtime service opteed_fast
950 08:37:10.707594
951 08:37:10.708303
952 08:37:10.716011 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 08:37:10.716542
954 08:37:10.717018 Model: Libre Computer AML-A311D-CC Alta
955 08:37:10.924361 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 08:37:10.947795 DRAM: 2 GiB (effective 3.8 GiB)
957 08:37:11.090757 Core: 408 devices, 31 uclasses, devicetree: separate
958 08:37:11.096640 WDT: Not starting watchdog@f0d0
959 08:37:11.128965 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 08:37:11.141386 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 08:37:11.146332 ** Bad device specification mmc 0 **
962 08:37:11.156684 Card did not respond to voltage select! : -110
963 08:37:11.164378 ** Bad device specification mmc 0 **
964 08:37:11.164885 Couldn't find partition mmc 0
965 08:37:11.172643 Card did not respond to voltage select! : -110
966 08:37:11.178210 ** Bad device specification mmc 0 **
967 08:37:11.178732 Couldn't find partition mmc 0
968 08:37:11.183270 Error: could not access storage.
969 08:37:11.525702 Net: eth0: ethernet@ff3f0000
970 08:37:11.526342 starting USB...
971 08:37:11.777549 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 08:37:11.778139 Starting the controller
973 08:37:11.784500 USB XHCI 1.10
974 08:37:13.647110 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
975 08:37:13.647757 bl2_stage_init 0x01
976 08:37:13.648284 bl2_stage_init 0x81
977 08:37:13.652700 hw id: 0x0000 - pwm id 0x01
978 08:37:13.653212 bl2_stage_init 0xc1
979 08:37:13.653663 bl2_stage_init 0x02
980 08:37:13.654109
981 08:37:13.658150 L0:00000000
982 08:37:13.658658 L1:20000703
983 08:37:13.659112 L2:00008067
984 08:37:13.659550 L3:14000000
985 08:37:13.663727 B2:00402000
986 08:37:13.664266 B1:e0f83180
987 08:37:13.664722
988 08:37:13.665170 TE: 58159
989 08:37:13.665612
990 08:37:13.669346 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
991 08:37:13.669851
992 08:37:13.670302 Board ID = 1
993 08:37:13.674893 Set A53 clk to 24M
994 08:37:13.675400 Set A73 clk to 24M
995 08:37:13.675850 Set clk81 to 24M
996 08:37:13.680632 A53 clk: 1200 MHz
997 08:37:13.681135 A73 clk: 1200 MHz
998 08:37:13.681586 CLK81: 166.6M
999 08:37:13.682026 smccc: 00012ab5
1000 08:37:13.686166 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1001 08:37:13.691779 board id: 1
1002 08:37:13.697723 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1003 08:37:13.708220 fw parse done
1004 08:37:13.714284 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 08:37:13.756773 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1006 08:37:13.767662 PIEI prepare done
1007 08:37:13.768193 fastboot data load
1008 08:37:13.768634 fastboot data verify
1009 08:37:13.773359 verify result: 266
1010 08:37:13.778969 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1011 08:37:13.779470 LPDDR4 probe
1012 08:37:13.779902 ddr clk to 1584MHz
1013 08:37:13.786949 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1014 08:37:13.824202
1015 08:37:13.824701 dmc_version 0001
1016 08:37:13.830863 Check phy result
1017 08:37:13.836747 INFO : End of CA training
1018 08:37:13.837238 INFO : End of initialization
1019 08:37:13.842463 INFO : Training has run successfully!
1020 08:37:13.842991 Check phy result
1021 08:37:13.847962 INFO : End of initialization
1022 08:37:13.848510 INFO : End of read enable training
1023 08:37:13.853652 INFO : End of fine write leveling
1024 08:37:13.859118 INFO : End of Write leveling coarse delay
1025 08:37:13.859628 INFO : Training has run successfully!
1026 08:37:13.860127 Check phy result
1027 08:37:13.864733 INFO : End of initialization
1028 08:37:13.865236 INFO : End of read dq deskew training
1029 08:37:13.870421 INFO : End of MPR read delay center optimization
1030 08:37:13.875938 INFO : End of write delay center optimization
1031 08:37:13.881658 INFO : End of read delay center optimization
1032 08:37:13.882163 INFO : End of max read latency training
1033 08:37:13.887136 INFO : Training has run successfully!
1034 08:37:13.887641 1D training succeed
1035 08:37:13.896317 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1036 08:37:13.943907 Check phy result
1037 08:37:13.944452 INFO : End of initialization
1038 08:37:13.965736 INFO : End of 2D read delay Voltage center optimization
1039 08:37:13.985886 INFO : End of 2D read delay Voltage center optimization
1040 08:37:14.037972 INFO : End of 2D write delay Voltage center optimization
1041 08:37:14.087305 INFO : End of 2D write delay Voltage center optimization
1042 08:37:14.092888 INFO : Training has run successfully!
1043 08:37:14.093398
1044 08:37:14.093855 channel==0
1045 08:37:14.098486 RxClkDly_Margin_A0==88 ps 9
1046 08:37:14.098996 TxDqDly_Margin_A0==98 ps 10
1047 08:37:14.104107 RxClkDly_Margin_A1==88 ps 9
1048 08:37:14.104612 TxDqDly_Margin_A1==98 ps 10
1049 08:37:14.105075 TrainedVREFDQ_A0==74
1050 08:37:14.109696 TrainedVREFDQ_A1==74
1051 08:37:14.110200 VrefDac_Margin_A0==25
1052 08:37:14.110651 DeviceVref_Margin_A0==40
1053 08:37:14.115297 VrefDac_Margin_A1==25
1054 08:37:14.115805 DeviceVref_Margin_A1==40
1055 08:37:14.116296
1056 08:37:14.116744
1057 08:37:14.120859 channel==1
1058 08:37:14.121361 RxClkDly_Margin_A0==98 ps 10
1059 08:37:14.121814 TxDqDly_Margin_A0==88 ps 9
1060 08:37:14.126476 RxClkDly_Margin_A1==88 ps 9
1061 08:37:14.126979 TxDqDly_Margin_A1==88 ps 9
1062 08:37:14.132101 TrainedVREFDQ_A0==77
1063 08:37:14.132605 TrainedVREFDQ_A1==77
1064 08:37:14.133061 VrefDac_Margin_A0==22
1065 08:37:14.137716 DeviceVref_Margin_A0==37
1066 08:37:14.138230 VrefDac_Margin_A1==24
1067 08:37:14.143324 DeviceVref_Margin_A1==37
1068 08:37:14.143862
1069 08:37:14.144381 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1070 08:37:14.144845
1071 08:37:14.176819 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
1072 08:37:14.177375 2D training succeed
1073 08:37:14.182496 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1074 08:37:14.188098 auto size-- 65535DDR cs0 size: 2048MB
1075 08:37:14.188607 DDR cs1 size: 2048MB
1076 08:37:14.193694 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1077 08:37:14.194205 cs0 DataBus test pass
1078 08:37:14.199292 cs1 DataBus test pass
1079 08:37:14.199799 cs0 AddrBus test pass
1080 08:37:14.200298 cs1 AddrBus test pass
1081 08:37:14.200751
1082 08:37:14.204901 100bdlr_step_size ps== 420
1083 08:37:14.205426 result report
1084 08:37:14.210488 boot times 0Enable ddr reg access
1085 08:37:14.215851 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1086 08:37:14.229193 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1087 08:37:14.802974 0.0;M3 CHK:0;cm4_sp_mode 0
1088 08:37:14.803620 MVN_1=0x00000000
1089 08:37:14.808373 MVN_2=0x00000000
1090 08:37:14.814121 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1091 08:37:14.814634 OPS=0x10
1092 08:37:14.815095 ring efuse init
1093 08:37:14.815547 chipver efuse init
1094 08:37:14.819785 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1095 08:37:14.825316 [0.018960 Inits done]
1096 08:37:14.825830 secure task start!
1097 08:37:14.826290 high task start!
1098 08:37:14.829914 low task start!
1099 08:37:14.830424 run into bl31
1100 08:37:14.836545 NOTICE: BL31: v1.3(release):4fc40b1
1101 08:37:14.844370 NOTICE: BL31: Built : 15:58:17, May 22 2019
1102 08:37:14.844890 NOTICE: BL31: G12A normal boot!
1103 08:37:14.869796 NOTICE: BL31: BL33 decompress pass
1104 08:37:14.875354 ERROR: Error initializing runtime service opteed_fast
1105 08:37:16.108289
1106 08:37:16.108972
1107 08:37:16.116682 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1108 08:37:16.117207
1109 08:37:16.117682 Model: Libre Computer AML-A311D-CC Alta
1110 08:37:16.325090 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1111 08:37:16.348411 DRAM: 2 GiB (effective 3.8 GiB)
1112 08:37:16.491475 Core: 408 devices, 31 uclasses, devicetree: separate
1113 08:37:16.497286 WDT: Not starting watchdog@f0d0
1114 08:37:16.529583 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1115 08:37:16.541969 Loading Environment from FAT... Card did not respond to voltage select! : -110
1116 08:37:16.547106 ** Bad device specification mmc 0 **
1117 08:37:16.557335 Card did not respond to voltage select! : -110
1118 08:37:16.565114 ** Bad device specification mmc 0 **
1119 08:37:16.565641 Couldn't find partition mmc 0
1120 08:37:16.573340 Card did not respond to voltage select! : -110
1121 08:37:16.578819 ** Bad device specification mmc 0 **
1122 08:37:16.579338 Couldn't find partition mmc 0
1123 08:37:16.583876 Error: could not access storage.
1124 08:37:16.926286 Net: eth0: ethernet@ff3f0000
1125 08:37:16.926828 starting USB...
1126 08:37:17.178207 Bus usb@ff500000: Register 3000140 NbrPorts 3
1127 08:37:17.178783 Starting the controller
1128 08:37:17.185196 USB XHCI 1.10
1129 08:37:18.742340 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1130 08:37:18.750716 scanning usb for storage devices... 0 Storage Device(s) found
1132 08:37:18.802430 Hit any key to stop autoboot: 1
1133 08:37:18.803282 end: 2.4.2 bootloader-interrupt (duration 00:00:38) [common]
1134 08:37:18.804015 start: 2.4.3 bootloader-commands (timeout 00:04:21) [common]
1135 08:37:18.804542 Setting prompt string to ['=>']
1136 08:37:18.805070 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:21)
1137 08:37:18.818190 0
1138 08:37:18.819110 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1139 08:37:18.819644 Sending with 10 millisecond of delay
1141 08:37:19.954537 => setenv autoload no
1142 08:37:19.965390 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1143 08:37:19.970784 setenv autoload no
1144 08:37:19.971581 Sending with 10 millisecond of delay
1146 08:37:21.768697 => setenv initrd_high 0xffffffff
1147 08:37:21.779544 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1148 08:37:21.780513 setenv initrd_high 0xffffffff
1149 08:37:21.781278 Sending with 10 millisecond of delay
1151 08:37:23.397580 => setenv fdt_high 0xffffffff
1152 08:37:23.408421 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1153 08:37:23.409327 setenv fdt_high 0xffffffff
1154 08:37:23.410095 Sending with 10 millisecond of delay
1156 08:37:23.702011 => dhcp
1157 08:37:23.712811 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1158 08:37:23.713707 dhcp
1159 08:37:23.714190 Speed: 1000, full duplex
1160 08:37:23.714647 BOOTP broadcast 1
1161 08:37:23.721337 DHCP client bound to address 192.168.6.27 (8 ms)
1162 08:37:23.722110 Sending with 10 millisecond of delay
1164 08:37:25.398589 => setenv serverip 192.168.6.2
1165 08:37:25.409442 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:15)
1166 08:37:25.410405 setenv serverip 192.168.6.2
1167 08:37:25.411150 Sending with 10 millisecond of delay
1169 08:37:29.134480 => tftpboot 0x01080000 974139/tftp-deploy-h7eodqjd/kernel/uImage
1170 08:37:29.145344 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1171 08:37:29.146257 tftpboot 0x01080000 974139/tftp-deploy-h7eodqjd/kernel/uImage
1172 08:37:29.146751 Speed: 1000, full duplex
1173 08:37:29.147207 Using ethernet@ff3f0000 device
1174 08:37:29.148632 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1175 08:37:29.153831 Filename '974139/tftp-deploy-h7eodqjd/kernel/uImage'.
1176 08:37:29.157620 Load address: 0x1080000
1177 08:37:31.919015 Loading: *################################################## 43.6 MiB
1178 08:37:31.919682 15.8 MiB/s
1179 08:37:31.920380 done
1180 08:37:31.923563 Bytes transferred = 45713984 (2b98a40 hex)
1181 08:37:31.924320 Sending with 10 millisecond of delay
1183 08:37:36.610550 => tftpboot 0x08000000 974139/tftp-deploy-h7eodqjd/ramdisk/ramdisk.cpio.gz.uboot
1184 08:37:36.621355 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1185 08:37:36.622167 tftpboot 0x08000000 974139/tftp-deploy-h7eodqjd/ramdisk/ramdisk.cpio.gz.uboot
1186 08:37:36.622636 Speed: 1000, full duplex
1187 08:37:36.623059 Using ethernet@ff3f0000 device
1188 08:37:36.624226 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1189 08:37:36.632805 Filename '974139/tftp-deploy-h7eodqjd/ramdisk/ramdisk.cpio.gz.uboot'.
1190 08:37:36.633287 Load address: 0x8000000
1191 08:37:43.531635 Loading: *########################T ######################### UDP wrong checksum 00000005 00003756
1192 08:37:48.532244 T UDP wrong checksum 00000005 00003756
1193 08:37:58.535276 T T UDP wrong checksum 00000005 00003756
1194 08:38:18.539436 T T T T UDP wrong checksum 00000005 00003756
1195 08:38:33.543518 T T
1196 08:38:33.543974 Retry count exceeded; starting again
1198 08:38:33.544929 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1201 08:38:33.545961 end: 2.4 uboot-commands (duration 00:01:53) [common]
1203 08:38:33.546710 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1205 08:38:33.547286 end: 2 uboot-action (duration 00:01:53) [common]
1207 08:38:33.548178 Cleaning after the job
1208 08:38:33.548524 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/ramdisk
1209 08:38:33.549560 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/kernel
1210 08:38:33.574365 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/dtb
1211 08:38:33.575142 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/nfsrootfs
1212 08:38:33.740026 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974139/tftp-deploy-h7eodqjd/modules
1213 08:38:33.759336 start: 4.1 power-off (timeout 00:00:30) [common]
1214 08:38:33.759973 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1215 08:38:33.808168 >> OK - accepted request
1216 08:38:33.810426 Returned 0 in 0 seconds
1217 08:38:33.911167 end: 4.1 power-off (duration 00:00:00) [common]
1219 08:38:33.912103 start: 4.2 read-feedback (timeout 00:10:00) [common]
1220 08:38:33.912757 Listened to connection for namespace 'common' for up to 1s
1221 08:38:34.913260 Finalising connection for namespace 'common'
1222 08:38:34.913731 Disconnecting from shell: Finalise
1223 08:38:34.914017 =>
1224 08:38:35.014815 end: 4.2 read-feedback (duration 00:00:01) [common]
1225 08:38:35.015448 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/974139
1226 08:38:37.906473 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/974139
1227 08:38:37.907090 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.