Boot log: meson-sm1-s905d3-libretech-cc

    1 08:38:41.784135  lava-dispatcher, installed at version: 2024.01
    2 08:38:41.784938  start: 0 validate
    3 08:38:41.785387  Start time: 2024-11-11 08:38:41.785357+00:00 (UTC)
    4 08:38:41.785949  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 08:38:41.786477  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 08:38:41.831088  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 08:38:41.831645  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 08:38:41.864091  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 08:38:41.864701  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 08:38:41.896325  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 08:38:41.896784  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 08:38:41.928901  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 08:38:41.929366  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 08:38:41.972984  validate duration: 0.19
   16 08:38:41.974455  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 08:38:41.975105  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 08:38:41.975691  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 08:38:41.976727  Not decompressing ramdisk as can be used compressed.
   20 08:38:41.977514  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
   21 08:38:41.978025  saving as /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/ramdisk/initrd.cpio.gz
   22 08:38:41.978555  total size: 5628169 (5 MB)
   23 08:38:42.022258  progress   0 % (0 MB)
   24 08:38:42.031112  progress   5 % (0 MB)
   25 08:38:42.039842  progress  10 % (0 MB)
   26 08:38:42.047700  progress  15 % (0 MB)
   27 08:38:42.055932  progress  20 % (1 MB)
   28 08:38:42.059631  progress  25 % (1 MB)
   29 08:38:42.063726  progress  30 % (1 MB)
   30 08:38:42.067774  progress  35 % (1 MB)
   31 08:38:42.071440  progress  40 % (2 MB)
   32 08:38:42.075499  progress  45 % (2 MB)
   33 08:38:42.079124  progress  50 % (2 MB)
   34 08:38:42.083146  progress  55 % (2 MB)
   35 08:38:42.087158  progress  60 % (3 MB)
   36 08:38:42.090750  progress  65 % (3 MB)
   37 08:38:42.094803  progress  70 % (3 MB)
   38 08:38:42.098528  progress  75 % (4 MB)
   39 08:38:42.102538  progress  80 % (4 MB)
   40 08:38:42.106140  progress  85 % (4 MB)
   41 08:38:42.110073  progress  90 % (4 MB)
   42 08:38:42.113719  progress  95 % (5 MB)
   43 08:38:42.117004  progress 100 % (5 MB)
   44 08:38:42.117658  5 MB downloaded in 0.14 s (38.59 MB/s)
   45 08:38:42.118235  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 08:38:42.119167  end: 1.1 download-retry (duration 00:00:00) [common]
   48 08:38:42.119493  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 08:38:42.119783  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 08:38:42.120297  downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/kernel/Image
   51 08:38:42.120564  saving as /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/kernel/Image
   52 08:38:42.120788  total size: 45713920 (43 MB)
   53 08:38:42.121007  No compression specified
   54 08:38:42.160325  progress   0 % (0 MB)
   55 08:38:42.188763  progress   5 % (2 MB)
   56 08:38:42.217499  progress  10 % (4 MB)
   57 08:38:42.246316  progress  15 % (6 MB)
   58 08:38:42.277195  progress  20 % (8 MB)
   59 08:38:42.307599  progress  25 % (10 MB)
   60 08:38:42.336041  progress  30 % (13 MB)
   61 08:38:42.364771  progress  35 % (15 MB)
   62 08:38:42.394735  progress  40 % (17 MB)
   63 08:38:42.423856  progress  45 % (19 MB)
   64 08:38:42.453118  progress  50 % (21 MB)
   65 08:38:42.481821  progress  55 % (24 MB)
   66 08:38:42.512254  progress  60 % (26 MB)
   67 08:38:42.544389  progress  65 % (28 MB)
   68 08:38:42.581005  progress  70 % (30 MB)
   69 08:38:42.615673  progress  75 % (32 MB)
   70 08:38:42.649569  progress  80 % (34 MB)
   71 08:38:42.677884  progress  85 % (37 MB)
   72 08:38:42.709034  progress  90 % (39 MB)
   73 08:38:42.737811  progress  95 % (41 MB)
   74 08:38:42.765830  progress 100 % (43 MB)
   75 08:38:42.766386  43 MB downloaded in 0.65 s (67.53 MB/s)
   76 08:38:42.766883  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 08:38:42.767723  end: 1.2 download-retry (duration 00:00:01) [common]
   79 08:38:42.768026  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 08:38:42.768312  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 08:38:42.768773  downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 08:38:42.769064  saving as /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 08:38:42.769276  total size: 53209 (0 MB)
   84 08:38:42.769486  No compression specified
   85 08:38:42.807000  progress  61 % (0 MB)
   86 08:38:42.807859  progress 100 % (0 MB)
   87 08:38:42.808455  0 MB downloaded in 0.04 s (1.30 MB/s)
   88 08:38:42.808954  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 08:38:42.809780  end: 1.3 download-retry (duration 00:00:00) [common]
   91 08:38:42.810044  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 08:38:42.810312  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 08:38:42.810758  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
   94 08:38:42.811020  saving as /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/nfsrootfs/full.rootfs.tar
   95 08:38:42.811228  total size: 120894716 (115 MB)
   96 08:38:42.811440  Using unxz to decompress xz
   97 08:38:42.849842  progress   0 % (0 MB)
   98 08:38:43.632090  progress   5 % (5 MB)
   99 08:38:44.455043  progress  10 % (11 MB)
  100 08:38:45.239682  progress  15 % (17 MB)
  101 08:38:45.967471  progress  20 % (23 MB)
  102 08:38:46.558148  progress  25 % (28 MB)
  103 08:38:47.404437  progress  30 % (34 MB)
  104 08:38:48.189375  progress  35 % (40 MB)
  105 08:38:48.551067  progress  40 % (46 MB)
  106 08:38:48.927260  progress  45 % (51 MB)
  107 08:38:49.648693  progress  50 % (57 MB)
  108 08:38:50.532693  progress  55 % (63 MB)
  109 08:38:51.305105  progress  60 % (69 MB)
  110 08:38:52.068842  progress  65 % (74 MB)
  111 08:38:52.845474  progress  70 % (80 MB)
  112 08:38:53.661001  progress  75 % (86 MB)
  113 08:38:54.439647  progress  80 % (92 MB)
  114 08:38:55.196207  progress  85 % (98 MB)
  115 08:38:56.042068  progress  90 % (103 MB)
  116 08:38:56.809998  progress  95 % (109 MB)
  117 08:38:57.638682  progress 100 % (115 MB)
  118 08:38:57.651064  115 MB downloaded in 14.84 s (7.77 MB/s)
  119 08:38:57.651947  end: 1.4.1 http-download (duration 00:00:15) [common]
  121 08:38:57.653626  end: 1.4 download-retry (duration 00:00:15) [common]
  122 08:38:57.654159  start: 1.5 download-retry (timeout 00:09:44) [common]
  123 08:38:57.654691  start: 1.5.1 http-download (timeout 00:09:44) [common]
  124 08:38:57.655945  downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/modules.tar.xz
  125 08:38:57.656472  saving as /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/modules/modules.tar
  126 08:38:57.656894  total size: 11612196 (11 MB)
  127 08:38:57.657315  Using unxz to decompress xz
  128 08:38:57.704799  progress   0 % (0 MB)
  129 08:38:57.771238  progress   5 % (0 MB)
  130 08:38:57.844941  progress  10 % (1 MB)
  131 08:38:57.939641  progress  15 % (1 MB)
  132 08:38:58.031407  progress  20 % (2 MB)
  133 08:38:58.110277  progress  25 % (2 MB)
  134 08:38:58.185399  progress  30 % (3 MB)
  135 08:38:58.262963  progress  35 % (3 MB)
  136 08:38:58.334749  progress  40 % (4 MB)
  137 08:38:58.410421  progress  45 % (5 MB)
  138 08:38:58.494486  progress  50 % (5 MB)
  139 08:38:58.572056  progress  55 % (6 MB)
  140 08:38:58.656650  progress  60 % (6 MB)
  141 08:38:58.736976  progress  65 % (7 MB)
  142 08:38:58.816588  progress  70 % (7 MB)
  143 08:38:58.893422  progress  75 % (8 MB)
  144 08:38:58.976179  progress  80 % (8 MB)
  145 08:38:59.055559  progress  85 % (9 MB)
  146 08:38:59.133484  progress  90 % (9 MB)
  147 08:38:59.210665  progress  95 % (10 MB)
  148 08:38:59.286807  progress 100 % (11 MB)
  149 08:38:59.298355  11 MB downloaded in 1.64 s (6.75 MB/s)
  150 08:38:59.299099  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 08:38:59.301002  end: 1.5 download-retry (duration 00:00:02) [common]
  153 08:38:59.301612  start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
  154 08:38:59.302210  start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
  155 08:39:16.265007  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/974175/extract-nfsrootfs-_iepfgsm
  156 08:39:16.265619  end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
  157 08:39:16.265909  start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
  158 08:39:16.266596  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt
  159 08:39:16.267039  makedir: /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin
  160 08:39:16.267367  makedir: /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/tests
  161 08:39:16.267679  makedir: /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/results
  162 08:39:16.268029  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-add-keys
  163 08:39:16.268566  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-add-sources
  164 08:39:16.269072  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-background-process-start
  165 08:39:16.269569  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-background-process-stop
  166 08:39:16.270095  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-common-functions
  167 08:39:16.270593  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-echo-ipv4
  168 08:39:16.271119  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-install-packages
  169 08:39:16.271600  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-installed-packages
  170 08:39:16.272096  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-os-build
  171 08:39:16.272579  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-probe-channel
  172 08:39:16.273054  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-probe-ip
  173 08:39:16.273548  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-target-ip
  174 08:39:16.274074  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-target-mac
  175 08:39:16.274556  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-target-storage
  176 08:39:16.275030  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-test-case
  177 08:39:16.275577  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-test-event
  178 08:39:16.276120  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-test-feedback
  179 08:39:16.276618  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-test-raise
  180 08:39:16.277098  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-test-reference
  181 08:39:16.277584  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-test-runner
  182 08:39:16.278080  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-test-set
  183 08:39:16.278566  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-test-shell
  184 08:39:16.279046  Updating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-add-keys (debian)
  185 08:39:16.279570  Updating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-add-sources (debian)
  186 08:39:16.280090  Updating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-install-packages (debian)
  187 08:39:16.280600  Updating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-installed-packages (debian)
  188 08:39:16.281084  Updating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/bin/lava-os-build (debian)
  189 08:39:16.281515  Creating /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/environment
  190 08:39:16.281879  LAVA metadata
  191 08:39:16.282141  - LAVA_JOB_ID=974175
  192 08:39:16.282355  - LAVA_DISPATCHER_IP=192.168.6.2
  193 08:39:16.282715  start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
  194 08:39:16.283668  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  195 08:39:16.284023  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
  196 08:39:16.284242  skipped lava-vland-overlay
  197 08:39:16.284485  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  198 08:39:16.284747  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
  199 08:39:16.284967  skipped lava-multinode-overlay
  200 08:39:16.285208  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  201 08:39:16.285456  start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
  202 08:39:16.285700  Loading test definitions
  203 08:39:16.285974  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
  204 08:39:16.286192  Using /lava-974175 at stage 0
  205 08:39:16.287285  uuid=974175_1.6.2.4.1 testdef=None
  206 08:39:16.287593  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  207 08:39:16.287855  start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
  208 08:39:16.289430  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  210 08:39:16.290220  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
  211 08:39:16.292161  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  213 08:39:16.292985  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
  214 08:39:16.294803  runner path: /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/0/tests/0_timesync-off test_uuid 974175_1.6.2.4.1
  215 08:39:16.295343  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  217 08:39:16.296183  start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
  218 08:39:16.296410  Using /lava-974175 at stage 0
  219 08:39:16.296762  Fetching tests from https://github.com/kernelci/test-definitions.git
  220 08:39:16.297052  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/0/tests/1_kselftest-kvm'
  221 08:39:19.720882  Running '/usr/bin/git checkout kernelci.org
  222 08:39:20.169798  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/0/tests/1_kselftest-kvm/automated/linux/kselftest/kselftest.yaml
  223 08:39:20.171226  uuid=974175_1.6.2.4.5 testdef=None
  224 08:39:20.171564  end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
  226 08:39:20.172677  start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
  227 08:39:20.178006  end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
  229 08:39:20.179599  start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
  230 08:39:20.186760  end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
  232 08:39:20.188436  start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
  233 08:39:20.195346  runner path: /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/0/tests/1_kselftest-kvm test_uuid 974175_1.6.2.4.5
  234 08:39:20.195863  BOARD='meson-sm1-s905d3-libretech-cc'
  235 08:39:20.196305  BRANCH='tip'
  236 08:39:20.196700  SKIPFILE='/dev/null'
  237 08:39:20.197091  SKIP_INSTALL='True'
  238 08:39:20.197480  TESTPROG_URL='http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/kselftest.tar.xz'
  239 08:39:20.197877  TST_CASENAME=''
  240 08:39:20.198266  TST_CMDFILES='kvm'
  241 08:39:20.199220  end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
  243 08:39:20.200795  Creating lava-test-runner.conf files
  244 08:39:20.201201  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/974175/lava-overlay-n8c9ycrt/lava-974175/0 for stage 0
  245 08:39:20.201836  - 0_timesync-off
  246 08:39:20.202295  - 1_kselftest-kvm
  247 08:39:20.202912  end: 1.6.2.4 test-definition (duration 00:00:04) [common]
  248 08:39:20.203443  start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
  249 08:39:43.447117  end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
  250 08:39:43.447567  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
  251 08:39:43.447864  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  252 08:39:43.448528  end: 1.6.2 lava-overlay (duration 00:00:27) [common]
  253 08:39:43.449098  start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
  254 08:39:44.056987  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  255 08:39:44.057459  start: 1.6.4 extract-modules (timeout 00:08:58) [common]
  256 08:39:44.057718  extracting modules file /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974175/extract-nfsrootfs-_iepfgsm
  257 08:39:45.624882  extracting modules file /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974175/extract-overlay-ramdisk-41ib3vzn/ramdisk
  258 08:39:47.025273  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  259 08:39:47.025761  start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
  260 08:39:47.026049  [common] Applying overlay to NFS
  261 08:39:47.026267  [common] Applying overlay /var/lib/lava/dispatcher/tmp/974175/compress-overlay-5p43m30d/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/974175/extract-nfsrootfs-_iepfgsm
  262 08:39:49.731779  end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
  263 08:39:49.732271  start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
  264 08:39:49.732546  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
  265 08:39:49.732778  Converting downloaded kernel to a uImage
  266 08:39:49.733085  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/kernel/Image /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/kernel/uImage
  267 08:39:50.200590  output: Image Name:   
  268 08:39:50.201014  output: Created:      Mon Nov 11 08:39:49 2024
  269 08:39:50.201224  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  270 08:39:50.201431  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  271 08:39:50.201633  output: Load Address: 01080000
  272 08:39:50.201834  output: Entry Point:  01080000
  273 08:39:50.202033  output: 
  274 08:39:50.202368  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  275 08:39:50.202636  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  276 08:39:50.202908  start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
  277 08:39:50.203164  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  278 08:39:50.203422  start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
  279 08:39:50.203681  Building ramdisk /var/lib/lava/dispatcher/tmp/974175/extract-overlay-ramdisk-41ib3vzn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/974175/extract-overlay-ramdisk-41ib3vzn/ramdisk
  280 08:39:52.319926  >> 166829 blocks

  281 08:39:59.994084  Adding RAMdisk u-boot header.
  282 08:39:59.994817  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/974175/extract-overlay-ramdisk-41ib3vzn/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/974175/extract-overlay-ramdisk-41ib3vzn/ramdisk.cpio.gz.uboot
  283 08:40:00.294111  output: Image Name:   
  284 08:40:00.294527  output: Created:      Mon Nov 11 08:39:59 2024
  285 08:40:00.294738  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  286 08:40:00.294944  output: Data Size:    23436411 Bytes = 22887.12 KiB = 22.35 MiB
  287 08:40:00.295149  output: Load Address: 00000000
  288 08:40:00.295349  output: Entry Point:  00000000
  289 08:40:00.295550  output: 
  290 08:40:00.296282  rename /var/lib/lava/dispatcher/tmp/974175/extract-overlay-ramdisk-41ib3vzn/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/ramdisk/ramdisk.cpio.gz.uboot
  291 08:40:00.297006  end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
  292 08:40:00.297550  end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
  293 08:40:00.298107  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
  294 08:40:00.298552  No LXC device requested
  295 08:40:00.299047  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  296 08:40:00.299551  start: 1.8 deploy-device-env (timeout 00:08:42) [common]
  297 08:40:00.300076  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  298 08:40:00.300495  Checking files for TFTP limit of 4294967296 bytes.
  299 08:40:00.303142  end: 1 tftp-deploy (duration 00:01:18) [common]
  300 08:40:00.303708  start: 2 uboot-action (timeout 00:05:00) [common]
  301 08:40:00.304265  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  302 08:40:00.304768  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  303 08:40:00.305270  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  304 08:40:00.305792  Using kernel file from prepare-kernel: 974175/tftp-deploy-nl45mw5b/kernel/uImage
  305 08:40:00.306408  substitutions:
  306 08:40:00.306814  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  307 08:40:00.307214  - {DTB_ADDR}: 0x01070000
  308 08:40:00.307612  - {DTB}: 974175/tftp-deploy-nl45mw5b/dtb/meson-sm1-s905d3-libretech-cc.dtb
  309 08:40:00.308082  - {INITRD}: 974175/tftp-deploy-nl45mw5b/ramdisk/ramdisk.cpio.gz.uboot
  310 08:40:00.308493  - {KERNEL_ADDR}: 0x01080000
  311 08:40:00.308887  - {KERNEL}: 974175/tftp-deploy-nl45mw5b/kernel/uImage
  312 08:40:00.309277  - {LAVA_MAC}: None
  313 08:40:00.309708  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/974175/extract-nfsrootfs-_iepfgsm
  314 08:40:00.310101  - {NFS_SERVER_IP}: 192.168.6.2
  315 08:40:00.310488  - {PRESEED_CONFIG}: None
  316 08:40:00.310875  - {PRESEED_LOCAL}: None
  317 08:40:00.311262  - {RAMDISK_ADDR}: 0x08000000
  318 08:40:00.311646  - {RAMDISK}: 974175/tftp-deploy-nl45mw5b/ramdisk/ramdisk.cpio.gz.uboot
  319 08:40:00.312058  - {ROOT_PART}: None
  320 08:40:00.312449  - {ROOT}: None
  321 08:40:00.312832  - {SERVER_IP}: 192.168.6.2
  322 08:40:00.313214  - {TEE_ADDR}: 0x83000000
  323 08:40:00.313595  - {TEE}: None
  324 08:40:00.313978  Parsed boot commands:
  325 08:40:00.314353  - setenv autoload no
  326 08:40:00.314735  - setenv initrd_high 0xffffffff
  327 08:40:00.315116  - setenv fdt_high 0xffffffff
  328 08:40:00.315495  - dhcp
  329 08:40:00.315876  - setenv serverip 192.168.6.2
  330 08:40:00.316293  - tftpboot 0x01080000 974175/tftp-deploy-nl45mw5b/kernel/uImage
  331 08:40:00.316683  - tftpboot 0x08000000 974175/tftp-deploy-nl45mw5b/ramdisk/ramdisk.cpio.gz.uboot
  332 08:40:00.317071  - tftpboot 0x01070000 974175/tftp-deploy-nl45mw5b/dtb/meson-sm1-s905d3-libretech-cc.dtb
  333 08:40:00.317456  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/974175/extract-nfsrootfs-_iepfgsm,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  334 08:40:00.317852  - bootm 0x01080000 0x08000000 0x01070000
  335 08:40:00.318337  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  337 08:40:00.319806  start: 2.3 connect-device (timeout 00:05:00) [common]
  338 08:40:00.320253  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  339 08:40:00.335312  Setting prompt string to ['lava-test: # ']
  340 08:40:00.336839  end: 2.3 connect-device (duration 00:00:00) [common]
  341 08:40:00.337453  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  342 08:40:00.338018  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  343 08:40:00.338565  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  344 08:40:00.339757  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  345 08:40:00.380492  >> OK - accepted request

  346 08:40:00.382881  Returned 0 in 0 seconds
  347 08:40:00.484038  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  349 08:40:00.485674  end: 2.4.1 reset-device (duration 00:00:00) [common]
  350 08:40:00.486250  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  351 08:40:00.486760  Setting prompt string to ['Hit any key to stop autoboot']
  352 08:40:00.487218  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  353 08:40:00.488852  Trying 192.168.56.21...
  354 08:40:00.489356  Connected to conserv1.
  355 08:40:00.489776  Escape character is '^]'.
  356 08:40:00.490202  
  357 08:40:00.490627  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  358 08:40:00.491057  
  359 08:40:07.982993  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  360 08:40:07.983622  bl2_stage_init 0x01
  361 08:40:07.984089  bl2_stage_init 0x81
  362 08:40:07.988536  hw id: 0x0000 - pwm id 0x01
  363 08:40:07.989019  bl2_stage_init 0xc1
  364 08:40:07.993973  bl2_stage_init 0x02
  365 08:40:07.994422  
  366 08:40:07.994844  L0:00000000
  367 08:40:07.995257  L1:00000703
  368 08:40:07.995659  L2:00008067
  369 08:40:07.996097  L3:15000000
  370 08:40:07.999570  S1:00000000
  371 08:40:08.000049  B2:20282000
  372 08:40:08.000463  B1:a0f83180
  373 08:40:08.000855  
  374 08:40:08.001248  TE: 69916
  375 08:40:08.001639  
  376 08:40:08.005272  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  377 08:40:08.005704  
  378 08:40:08.010875  Board ID = 1
  379 08:40:08.011296  Set cpu clk to 24M
  380 08:40:08.011687  Set clk81 to 24M
  381 08:40:08.016414  Use GP1_pll as DSU clk.
  382 08:40:08.016849  DSU clk: 1200 Mhz
  383 08:40:08.017242  CPU clk: 1200 MHz
  384 08:40:08.022132  Set clk81 to 166.6M
  385 08:40:08.027577  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  386 08:40:08.028039  board id: 1
  387 08:40:08.034978  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  388 08:40:08.045558  fw parse done
  389 08:40:08.051552  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  390 08:40:08.094662  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  391 08:40:08.105855  PIEI prepare done
  392 08:40:08.106277  fastboot data load
  393 08:40:08.106672  fastboot data verify
  394 08:40:08.111443  verify result: 266
  395 08:40:08.117034  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  396 08:40:08.117457  LPDDR4 probe
  397 08:40:08.117852  ddr clk to 1584MHz
  398 08:40:08.124998  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  399 08:40:08.162762  
  400 08:40:08.163211  dmc_version 0001
  401 08:40:08.169808  Check phy result
  402 08:40:08.175792  INFO : End of CA training
  403 08:40:08.176259  INFO : End of initialization
  404 08:40:08.181426  INFO : Training has run successfully!
  405 08:40:08.181848  Check phy result
  406 08:40:08.186986  INFO : End of initialization
  407 08:40:08.187404  INFO : End of read enable training
  408 08:40:08.190404  INFO : End of fine write leveling
  409 08:40:08.195916  INFO : End of Write leveling coarse delay
  410 08:40:08.201518  INFO : Training has run successfully!
  411 08:40:08.201936  Check phy result
  412 08:40:08.202332  INFO : End of initialization
  413 08:40:08.207126  INFO : End of read dq deskew training
  414 08:40:08.212703  INFO : End of MPR read delay center optimization
  415 08:40:08.213143  INFO : End of write delay center optimization
  416 08:40:08.218380  INFO : End of read delay center optimization
  417 08:40:08.223907  INFO : End of max read latency training
  418 08:40:08.224352  INFO : Training has run successfully!
  419 08:40:08.229484  1D training succeed
  420 08:40:08.235456  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  421 08:40:08.283665  Check phy result
  422 08:40:08.284142  INFO : End of initialization
  423 08:40:08.311046  INFO : End of 2D read delay Voltage center optimization
  424 08:40:08.335193  INFO : End of 2D read delay Voltage center optimization
  425 08:40:08.391901  INFO : End of 2D write delay Voltage center optimization
  426 08:40:08.446035  INFO : End of 2D write delay Voltage center optimization
  427 08:40:08.451477  INFO : Training has run successfully!
  428 08:40:08.451911  
  429 08:40:08.452355  channel==0
  430 08:40:08.457061  RxClkDly_Margin_A0==78 ps 8
  431 08:40:08.457489  TxDqDly_Margin_A0==98 ps 10
  432 08:40:08.460430  RxClkDly_Margin_A1==88 ps 9
  433 08:40:08.460848  TxDqDly_Margin_A1==98 ps 10
  434 08:40:08.465985  TrainedVREFDQ_A0==74
  435 08:40:08.466420  TrainedVREFDQ_A1==74
  436 08:40:08.466814  VrefDac_Margin_A0==25
  437 08:40:08.471577  DeviceVref_Margin_A0==40
  438 08:40:08.472024  VrefDac_Margin_A1==23
  439 08:40:08.477200  DeviceVref_Margin_A1==40
  440 08:40:08.477631  
  441 08:40:08.478027  
  442 08:40:08.478418  channel==1
  443 08:40:08.478801  RxClkDly_Margin_A0==78 ps 8
  444 08:40:08.482775  TxDqDly_Margin_A0==98 ps 10
  445 08:40:08.483196  RxClkDly_Margin_A1==78 ps 8
  446 08:40:08.488406  TxDqDly_Margin_A1==88 ps 9
  447 08:40:08.488829  TrainedVREFDQ_A0==78
  448 08:40:08.489224  TrainedVREFDQ_A1==75
  449 08:40:08.493983  VrefDac_Margin_A0==22
  450 08:40:08.494398  DeviceVref_Margin_A0==36
  451 08:40:08.499582  VrefDac_Margin_A1==22
  452 08:40:08.500038  DeviceVref_Margin_A1==39
  453 08:40:08.500440  
  454 08:40:08.505193   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  455 08:40:08.505636  
  456 08:40:08.533181  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
  457 08:40:08.538765  2D training succeed
  458 08:40:08.544441  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  459 08:40:08.544875  auto size-- 65535DDR cs0 size: 2048MB
  460 08:40:08.549978  DDR cs1 size: 2048MB
  461 08:40:08.550404  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  462 08:40:08.555584  cs0 DataBus test pass
  463 08:40:08.556030  cs1 DataBus test pass
  464 08:40:08.556425  cs0 AddrBus test pass
  465 08:40:08.561191  cs1 AddrBus test pass
  466 08:40:08.561619  
  467 08:40:08.562011  100bdlr_step_size ps== 471
  468 08:40:08.562410  result report
  469 08:40:08.566795  boot times 0Enable ddr reg access
  470 08:40:08.574378  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  471 08:40:08.588221  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  472 08:40:09.247648  bl2z: ptr: 05129330, size: 00001e40
  473 08:40:09.256172  0.0;M3 CHK:0;cm4_sp_mode 0
  474 08:40:09.256659  MVN_1=0x00000000
  475 08:40:09.257075  MVN_2=0x00000000
  476 08:40:09.267644  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  477 08:40:09.268129  OPS=0x04
  478 08:40:09.268552  ring efuse init
  479 08:40:09.273262  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  480 08:40:09.273737  [0.017354 Inits done]
  481 08:40:09.274148  secure task start!
  482 08:40:09.280740  high task start!
  483 08:40:09.281181  low task start!
  484 08:40:09.281587  run into bl31
  485 08:40:09.289452  NOTICE:  BL31: v1.3(release):4fc40b1
  486 08:40:09.297161  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  487 08:40:09.297607  NOTICE:  BL31: G12A normal boot!
  488 08:40:09.312731  NOTICE:  BL31: BL33 decompress pass
  489 08:40:09.318403  ERROR:   Error initializing runtime service opteed_fast
  490 08:40:12.032133  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0
  491 08:40:12.032760  bl2_stage_init 0x01
  492 08:40:12.033184  bl2_stage_init 0x81
  493 08:40:12.037713  hw id: 0x0000 - pwm id 0x01
  494 08:40:12.038184  bl2_stage_init 0xc1
  495 08:40:12.043357  bl2_stage_init 0x02
  496 08:40:12.043847  
  497 08:40:12.044289  L0:00000000
  498 08:40:12.044685  L1:00000703
  499 08:40:12.045074  L2:00008067
  500 08:40:12.045457  L3:15000000
  501 08:40:12.046140  S1:00000000
  502 08:40:12.050419  B2:20282000
  503 08:40:12.050839  B1:a0f83180
  504 08:40:12.051227  
  505 08:40:12.051613  TE: 67897
  506 08:40:12.052029  
  507 08:40:12.056048  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  508 08:40:12.056476  
  509 08:40:12.056872  Board ID = 1
  510 08:40:12.061630  Set cpu clk to 24M
  511 08:40:12.062050  Set clk81 to 24M
  512 08:40:12.062441  Use GP1_pll as DSU clk.
  513 08:40:12.067222  DSU clk: 1200 Mhz
  514 08:40:12.067642  CPU clk: 1200 MHz
  515 08:40:12.068061  Set clk81 to 166.6M
  516 08:40:12.072843  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  517 08:40:12.078409  board id: 1
  518 08:40:12.083906  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  519 08:40:12.094538  fw parse done
  520 08:40:12.100490  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  521 08:40:12.143243  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  522 08:40:12.154098  PIEI prepare done
  523 08:40:12.154520  fastboot data load
  524 08:40:12.154913  fastboot data verify
  525 08:40:12.159702  verify result: 266
  526 08:40:12.165291  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  527 08:40:12.165710  LPDDR4 probe
  528 08:40:12.166097  ddr clk to 1584MHz
  529 08:40:12.173267  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  530 08:40:12.210509  
  531 08:40:12.210935  dmc_version 0001
  532 08:40:12.217202  Check phy result
  533 08:40:12.223122  INFO : End of CA training
  534 08:40:12.223530  INFO : End of initialization
  535 08:40:12.228709  INFO : Training has run successfully!
  536 08:40:12.229130  Check phy result
  537 08:40:12.234302  INFO : End of initialization
  538 08:40:12.234731  INFO : End of read enable training
  539 08:40:12.239927  INFO : End of fine write leveling
  540 08:40:12.245526  INFO : End of Write leveling coarse delay
  541 08:40:12.245959  INFO : Training has run successfully!
  542 08:40:12.246363  Check phy result
  543 08:40:12.251115  INFO : End of initialization
  544 08:40:12.251543  INFO : End of read dq deskew training
  545 08:40:12.256717  INFO : End of MPR read delay center optimization
  546 08:40:12.262299  INFO : End of write delay center optimization
  547 08:40:12.267908  INFO : End of read delay center optimization
  548 08:40:12.268367  INFO : End of max read latency training
  549 08:40:12.273492  INFO : Training has run successfully!
  550 08:40:12.273919  1D training succeed
  551 08:40:12.282717  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  552 08:40:12.330257  Check phy result
  553 08:40:12.330696  INFO : End of initialization
  554 08:40:12.352606  INFO : End of 2D read delay Voltage center optimization
  555 08:40:12.371788  INFO : End of 2D read delay Voltage center optimization
  556 08:40:12.423846  INFO : End of 2D write delay Voltage center optimization
  557 08:40:12.472927  INFO : End of 2D write delay Voltage center optimization
  558 08:40:12.478752  INFO : Training has run successfully!
  559 08:40:12.479329  
  560 08:40:12.479834  channel==0
  561 08:40:12.484299  RxClkDly_Margin_A0==69 ps 7
  562 08:40:12.484895  TxDqDly_Margin_A0==98 ps 10
  563 08:40:12.489784  RxClkDly_Margin_A1==78 ps 8
  564 08:40:12.490348  TxDqDly_Margin_A1==98 ps 10
  565 08:40:12.490818  TrainedVREFDQ_A0==74
  566 08:40:12.495392  TrainedVREFDQ_A1==74
  567 08:40:12.495963  VrefDac_Margin_A0==24
  568 08:40:12.496473  DeviceVref_Margin_A0==40
  569 08:40:12.500977  VrefDac_Margin_A1==23
  570 08:40:12.501544  DeviceVref_Margin_A1==40
  571 08:40:12.502004  
  572 08:40:12.502458  
  573 08:40:12.506586  channel==1
  574 08:40:12.507155  RxClkDly_Margin_A0==88 ps 9
  575 08:40:12.507614  TxDqDly_Margin_A0==98 ps 10
  576 08:40:12.512184  RxClkDly_Margin_A1==78 ps 8
  577 08:40:12.512769  TxDqDly_Margin_A1==78 ps 8
  578 08:40:12.517744  TrainedVREFDQ_A0==78
  579 08:40:12.518315  TrainedVREFDQ_A1==75
  580 08:40:12.518783  VrefDac_Margin_A0==23
  581 08:40:12.523356  DeviceVref_Margin_A0==36
  582 08:40:12.523950  VrefDac_Margin_A1==22
  583 08:40:12.529004  DeviceVref_Margin_A1==38
  584 08:40:12.529584  
  585 08:40:12.530055   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  586 08:40:12.530512  
  587 08:40:12.562473  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  588 08:40:12.563206  2D training succeed
  589 08:40:12.568070  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  590 08:40:12.573624  auto size-- 65535DDR cs0 size: 2048MB
  591 08:40:12.574175  DDR cs1 size: 2048MB
  592 08:40:12.579244  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  593 08:40:12.579777  cs0 DataBus test pass
  594 08:40:12.584869  cs1 DataBus test pass
  595 08:40:12.585401  cs0 AddrBus test pass
  596 08:40:12.585870  cs1 AddrBus test pass
  597 08:40:12.586328  
  598 08:40:12.590427  100bdlr_step_size ps== 478
  599 08:40:12.590963  result report
  600 08:40:12.596092  boot times 0Enable ddr reg access
  601 08:40:12.601308  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  602 08:40:12.615132  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  603 08:40:13.271147  bl2z: ptr: 05129330, size: 00001e40
  604 08:40:13.279091  0.0;M3 CHK:0;cm4_sp_mode 0
  605 08:40:13.279627  MVN_1=0x00000000
  606 08:40:13.280124  MVN_2=0x00000000
  607 08:40:13.290585  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  608 08:40:13.291087  OPS=0x04
  609 08:40:13.291565  ring efuse init
  610 08:40:13.293541  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  611 08:40:13.299258  [0.017319 Inits done]
  612 08:40:13.299752  secure task start!
  613 08:40:13.300248  high task start!
  614 08:40:13.300708  low task start!
  615 08:40:13.303521  run into bl31
  616 08:40:13.312084  NOTICE:  BL31: v1.3(release):4fc40b1
  617 08:40:13.319834  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  618 08:40:13.320363  NOTICE:  BL31: G12A normal boot!
  619 08:40:13.335310  NOTICE:  BL31: BL33 decompress pass
  620 08:40:13.341086  ERROR:   Error initializing runtime service opteed_fast
  621 08:40:14.733757  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  622 08:40:14.734408  bl2_stage_init 0x01
  623 08:40:14.734884  bl2_stage_init 0x81
  624 08:40:14.739433  hw id: 0x0000 - pwm id 0x01
  625 08:40:14.739935  bl2_stage_init 0xc1
  626 08:40:14.745068  bl2_stage_init 0x02
  627 08:40:14.745668  
  628 08:40:14.746155  L0:00000000
  629 08:40:14.746615  L1:00000703
  630 08:40:14.747072  L2:00008067
  631 08:40:14.747520  L3:15000000
  632 08:40:14.750777  S1:00000000
  633 08:40:14.751318  B2:20282000
  634 08:40:14.751781  B1:a0f83180
  635 08:40:14.752276  
  636 08:40:14.752731  TE: 70672
  637 08:40:14.753181  
  638 08:40:14.756238  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  639 08:40:14.756775  
  640 08:40:14.761925  Board ID = 1
  641 08:40:14.762453  Set cpu clk to 24M
  642 08:40:14.762910  Set clk81 to 24M
  643 08:40:14.767528  Use GP1_pll as DSU clk.
  644 08:40:14.768086  DSU clk: 1200 Mhz
  645 08:40:14.768553  CPU clk: 1200 MHz
  646 08:40:14.773099  Set clk81 to 166.6M
  647 08:40:14.778708  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  648 08:40:14.779244  board id: 1
  649 08:40:14.785969  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  650 08:40:14.796539  fw parse done
  651 08:40:14.802652  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  652 08:40:14.844975  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  653 08:40:14.855937  PIEI prepare done
  654 08:40:14.856510  fastboot data load
  655 08:40:14.856979  fastboot data verify
  656 08:40:14.861550  verify result: 266
  657 08:40:14.867135  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  658 08:40:14.867672  LPDDR4 probe
  659 08:40:14.868179  ddr clk to 1584MHz
  660 08:40:14.875044  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  661 08:40:14.912375  
  662 08:40:14.912928  dmc_version 0001
  663 08:40:14.919041  Check phy result
  664 08:40:14.924958  INFO : End of CA training
  665 08:40:14.925496  INFO : End of initialization
  666 08:40:14.930567  INFO : Training has run successfully!
  667 08:40:14.931106  Check phy result
  668 08:40:14.936218  INFO : End of initialization
  669 08:40:14.936763  INFO : End of read enable training
  670 08:40:14.941759  INFO : End of fine write leveling
  671 08:40:14.947417  INFO : End of Write leveling coarse delay
  672 08:40:14.947961  INFO : Training has run successfully!
  673 08:40:14.948482  Check phy result
  674 08:40:14.952971  INFO : End of initialization
  675 08:40:14.953517  INFO : End of read dq deskew training
  676 08:40:14.958566  INFO : End of MPR read delay center optimization
  677 08:40:14.964181  INFO : End of write delay center optimization
  678 08:40:14.969742  INFO : End of read delay center optimization
  679 08:40:14.970278  INFO : End of max read latency training
  680 08:40:14.975427  INFO : Training has run successfully!
  681 08:40:14.975966  1D training succeed
  682 08:40:14.984487  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  683 08:40:15.032125  Check phy result
  684 08:40:15.032696  INFO : End of initialization
  685 08:40:15.054530  INFO : End of 2D read delay Voltage center optimization
  686 08:40:15.073637  INFO : End of 2D read delay Voltage center optimization
  687 08:40:15.125534  INFO : End of 2D write delay Voltage center optimization
  688 08:40:15.174656  INFO : End of 2D write delay Voltage center optimization
  689 08:40:15.180292  INFO : Training has run successfully!
  690 08:40:15.180846  
  691 08:40:15.181321  channel==0
  692 08:40:15.185844  RxClkDly_Margin_A0==88 ps 9
  693 08:40:15.186399  TxDqDly_Margin_A0==98 ps 10
  694 08:40:15.191443  RxClkDly_Margin_A1==88 ps 9
  695 08:40:15.192035  TxDqDly_Margin_A1==98 ps 10
  696 08:40:15.192512  TrainedVREFDQ_A0==76
  697 08:40:15.197032  TrainedVREFDQ_A1==75
  698 08:40:15.197588  VrefDac_Margin_A0==25
  699 08:40:15.198049  DeviceVref_Margin_A0==38
  700 08:40:15.202635  VrefDac_Margin_A1==23
  701 08:40:15.203184  DeviceVref_Margin_A1==39
  702 08:40:15.203651  
  703 08:40:15.204147  
  704 08:40:15.208284  channel==1
  705 08:40:15.208834  RxClkDly_Margin_A0==78 ps 8
  706 08:40:15.209300  TxDqDly_Margin_A0==98 ps 10
  707 08:40:15.213854  RxClkDly_Margin_A1==78 ps 8
  708 08:40:15.214404  TxDqDly_Margin_A1==88 ps 9
  709 08:40:15.219461  TrainedVREFDQ_A0==78
  710 08:40:15.220037  TrainedVREFDQ_A1==75
  711 08:40:15.220511  VrefDac_Margin_A0==22
  712 08:40:15.225047  DeviceVref_Margin_A0==36
  713 08:40:15.225596  VrefDac_Margin_A1==22
  714 08:40:15.230655  DeviceVref_Margin_A1==39
  715 08:40:15.231201  
  716 08:40:15.231664   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  717 08:40:15.232159  
  718 08:40:15.264224  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
  719 08:40:15.264817  2D training succeed
  720 08:40:15.269844  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  721 08:40:15.275477  auto size-- 65535DDR cs0 size: 2048MB
  722 08:40:15.276055  DDR cs1 size: 2048MB
  723 08:40:15.281026  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  724 08:40:15.281575  cs0 DataBus test pass
  725 08:40:15.286649  cs1 DataBus test pass
  726 08:40:15.287219  cs0 AddrBus test pass
  727 08:40:15.287698  cs1 AddrBus test pass
  728 08:40:15.288207  
  729 08:40:15.292298  100bdlr_step_size ps== 478
  730 08:40:15.292862  result report
  731 08:40:15.297869  boot times 0Enable ddr reg access
  732 08:40:15.303110  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  733 08:40:15.316901  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  734 08:40:15.972018  bl2z: ptr: 05129330, size: 00001e40
  735 08:40:15.979426  0.0;M3 CHK:0;cm4_sp_mode 0
  736 08:40:15.980028  MVN_1=0x00000000
  737 08:40:15.980509  MVN_2=0x00000000
  738 08:40:15.990829  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  739 08:40:15.991389  OPS=0x04
  740 08:40:15.991865  ring efuse init
  741 08:40:15.996551  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  742 08:40:15.997112  [0.017320 Inits done]
  743 08:40:15.997581  secure task start!
  744 08:40:16.004131  high task start!
  745 08:40:16.004680  low task start!
  746 08:40:16.005152  run into bl31
  747 08:40:16.012734  NOTICE:  BL31: v1.3(release):4fc40b1
  748 08:40:16.020661  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  749 08:40:16.021232  NOTICE:  BL31: G12A normal boot!
  750 08:40:16.036141  NOTICE:  BL31: BL33 decompress pass
  751 08:40:16.041801  ERROR:   Error initializing runtime service opteed_fast
  752 08:40:16.837260  
  753 08:40:16.837906  
  754 08:40:16.842684  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  755 08:40:16.843231  
  756 08:40:16.846147  Model: Libre Computer AML-S905D3-CC Solitude
  757 08:40:16.993104  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  758 08:40:17.008535  DRAM:  2 GiB (effective 3.8 GiB)
  759 08:40:17.109608  Core:  406 devices, 33 uclasses, devicetree: separate
  760 08:40:17.115458  WDT:   Not starting watchdog@f0d0
  761 08:40:17.140453  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  762 08:40:17.152633  Loading Environment from FAT... Card did not respond to voltage select! : -110
  763 08:40:17.157773  ** Bad device specification mmc 0 **
  764 08:40:17.167739  Card did not respond to voltage select! : -110
  765 08:40:17.175384  ** Bad device specification mmc 0 **
  766 08:40:17.175912  Couldn't find partition mmc 0
  767 08:40:17.183685  Card did not respond to voltage select! : -110
  768 08:40:17.189225  ** Bad device specification mmc 0 **
  769 08:40:17.189746  Couldn't find partition mmc 0
  770 08:40:17.194280  Error: could not access storage.
  771 08:40:17.491691  Net:   eth0: ethernet@ff3f0000
  772 08:40:17.492379  starting USB...
  773 08:40:17.736440  Bus usb@ff500000: Register 3000140 NbrPorts 3
  774 08:40:17.737034  Starting the controller
  775 08:40:17.743372  USB XHCI 1.10
  776 08:40:19.297690  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  777 08:40:19.305980         scanning usb for storage devices... 0 Storage Device(s) found
  779 08:40:19.357610  Hit any key to stop autoboot:  1 
  780 08:40:19.358584  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  781 08:40:19.359415  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  782 08:40:19.359960  Setting prompt string to ['=>']
  783 08:40:19.360560  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  784 08:40:19.371952   0 
  785 08:40:19.372993  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  787 08:40:19.474401  => setenv autoload no
  788 08:40:19.475433  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  789 08:40:19.480897  setenv autoload no
  791 08:40:19.582567  => setenv initrd_high 0xffffffff
  792 08:40:19.583648  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  793 08:40:19.587860  setenv initrd_high 0xffffffff
  795 08:40:19.689435  => setenv fdt_high 0xffffffff
  796 08:40:19.690318  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  797 08:40:19.694540  setenv fdt_high 0xffffffff
  799 08:40:19.796099  => dhcp
  800 08:40:19.796965  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  801 08:40:19.800951  dhcp
  802 08:40:20.356385  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
  803 08:40:20.356996  Speed: 1000, full duplex
  804 08:40:20.357462  BOOTP broadcast 1
  805 08:40:20.373384  DHCP client bound to address 192.168.6.21 (17 ms)
  807 08:40:20.474986  => setenv serverip 192.168.6.2
  808 08:40:20.475944  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  809 08:40:20.480333  setenv serverip 192.168.6.2
  811 08:40:20.581905  => tftpboot 0x01080000 974175/tftp-deploy-nl45mw5b/kernel/uImage
  812 08:40:20.582757  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  813 08:40:20.590517  tftpboot 0x01080000 974175/tftp-deploy-nl45mw5b/kernel/uImage
  814 08:40:20.591060  Speed: 1000, full duplex
  815 08:40:20.591532  Using ethernet@ff3f0000 device
  816 08:40:20.596020  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  817 08:40:20.601565  Filename '974175/tftp-deploy-nl45mw5b/kernel/uImage'.
  818 08:40:20.605399  Load address: 0x1080000
  819 08:40:23.408325  Loading: *##################################################  43.6 MiB
  820 08:40:23.409005  	 15.5 MiB/s
  821 08:40:23.409497  done
  822 08:40:23.412758  Bytes transferred = 45713984 (2b98a40 hex)
  824 08:40:23.516580  => tftpboot 0x08000000 974175/tftp-deploy-nl45mw5b/ramdisk/ramdisk.cpio.gz.uboot
  825 08:40:23.517251  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
  826 08:40:23.523942  tftpboot 0x08000000 974175/tftp-deploy-nl45mw5b/ramdisk/ramdisk.cpio.gz.uboot
  827 08:40:23.524450  Speed: 1000, full duplex
  828 08:40:23.524851  Using ethernet@ff3f0000 device
  829 08:40:23.529541  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  830 08:40:23.539265  Filename '974175/tftp-deploy-nl45mw5b/ramdisk/ramdisk.cpio.gz.uboot'.
  831 08:40:23.539795  Load address: 0x8000000
  832 08:40:24.949534  Loading: *################################################# UDP wrong checksum 00000005 00001ea3
  833 08:40:29.951064  T  UDP wrong checksum 00000005 00001ea3
  834 08:40:39.953141  T T  UDP wrong checksum 00000005 00001ea3
  835 08:40:59.957111  T T T T  UDP wrong checksum 00000005 00001ea3
  836 08:41:19.962011  T T T 
  837 08:41:19.962694  Retry count exceeded; starting again
  839 08:41:19.964295  end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
  842 08:41:19.966350  end: 2.4 uboot-commands (duration 00:01:20) [common]
  844 08:41:19.967871  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  846 08:41:19.969026  end: 2 uboot-action (duration 00:01:20) [common]
  848 08:41:19.970679  Cleaning after the job
  849 08:41:19.971273  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/ramdisk
  850 08:41:19.972500  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/kernel
  851 08:41:20.021842  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/dtb
  852 08:41:20.022583  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/nfsrootfs
  853 08:41:20.186639  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974175/tftp-deploy-nl45mw5b/modules
  854 08:41:20.206279  start: 4.1 power-off (timeout 00:00:30) [common]
  855 08:41:20.206935  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  856 08:41:20.240707  >> OK - accepted request

  857 08:41:20.242828  Returned 0 in 0 seconds
  858 08:41:20.343562  end: 4.1 power-off (duration 00:00:00) [common]
  860 08:41:20.344467  start: 4.2 read-feedback (timeout 00:10:00) [common]
  861 08:41:20.345106  Listened to connection for namespace 'common' for up to 1s
  862 08:41:21.346065  Finalising connection for namespace 'common'
  863 08:41:21.346532  Disconnecting from shell: Finalise
  864 08:41:21.346815  => 
  865 08:41:21.447673  end: 4.2 read-feedback (duration 00:00:01) [common]
  866 08:41:21.448440  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/974175
  867 08:41:24.320855  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/974175
  868 08:41:24.321478  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.