Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:11:02.063336 lava-dispatcher, installed at version: 2024.01
2 08:11:02.064128 start: 0 validate
3 08:11:02.064600 Start time: 2024-11-11 08:11:02.064570+00:00 (UTC)
4 08:11:02.065159 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:11:02.065696 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:11:02.110957 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:11:02.111485 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:11:02.143329 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:11:02.143972 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 08:11:03.195960 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:11:03.196546 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:11:03.232477 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:11:03.233009 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Ftip%2Fmaster%2Fv6.12-rc7-405-g8005ac45ca72b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 08:11:03.270898 validate duration: 1.21
16 08:11:03.272059 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:11:03.272446 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:11:03.272815 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:11:03.273427 Not decompressing ramdisk as can be used compressed.
20 08:11:03.273921 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 08:11:03.274224 saving as /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/ramdisk/initrd.cpio.gz
22 08:11:03.274503 total size: 5628169 (5 MB)
23 08:11:03.318492 progress 0 % (0 MB)
24 08:11:03.323194 progress 5 % (0 MB)
25 08:11:03.331839 progress 10 % (0 MB)
26 08:11:03.335946 progress 15 % (0 MB)
27 08:11:03.340285 progress 20 % (1 MB)
28 08:11:03.344161 progress 25 % (1 MB)
29 08:11:03.348346 progress 30 % (1 MB)
30 08:11:03.352586 progress 35 % (1 MB)
31 08:11:03.356564 progress 40 % (2 MB)
32 08:11:03.360954 progress 45 % (2 MB)
33 08:11:03.364953 progress 50 % (2 MB)
34 08:11:03.369400 progress 55 % (2 MB)
35 08:11:03.373908 progress 60 % (3 MB)
36 08:11:03.377960 progress 65 % (3 MB)
37 08:11:03.382356 progress 70 % (3 MB)
38 08:11:03.386249 progress 75 % (4 MB)
39 08:11:03.390728 progress 80 % (4 MB)
40 08:11:03.394984 progress 85 % (4 MB)
41 08:11:03.399310 progress 90 % (4 MB)
42 08:11:03.403623 progress 95 % (5 MB)
43 08:11:03.407059 progress 100 % (5 MB)
44 08:11:03.407759 5 MB downloaded in 0.13 s (40.29 MB/s)
45 08:11:03.408355 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:11:03.409359 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:11:03.409712 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:11:03.410035 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:11:03.410568 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/kernel/Image
51 08:11:03.410838 saving as /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/kernel/Image
52 08:11:03.411060 total size: 45713920 (43 MB)
53 08:11:03.411288 No compression specified
54 08:11:03.451320 progress 0 % (0 MB)
55 08:11:03.481434 progress 5 % (2 MB)
56 08:11:03.512800 progress 10 % (4 MB)
57 08:11:03.544428 progress 15 % (6 MB)
58 08:11:03.574394 progress 20 % (8 MB)
59 08:11:03.603766 progress 25 % (10 MB)
60 08:11:03.634062 progress 30 % (13 MB)
61 08:11:03.664516 progress 35 % (15 MB)
62 08:11:03.694120 progress 40 % (17 MB)
63 08:11:03.723171 progress 45 % (19 MB)
64 08:11:03.752970 progress 50 % (21 MB)
65 08:11:03.782337 progress 55 % (24 MB)
66 08:11:03.811973 progress 60 % (26 MB)
67 08:11:03.841341 progress 65 % (28 MB)
68 08:11:03.870848 progress 70 % (30 MB)
69 08:11:03.900318 progress 75 % (32 MB)
70 08:11:03.929875 progress 80 % (34 MB)
71 08:11:03.958931 progress 85 % (37 MB)
72 08:11:03.988363 progress 90 % (39 MB)
73 08:11:04.017993 progress 95 % (41 MB)
74 08:11:04.047072 progress 100 % (43 MB)
75 08:11:04.047601 43 MB downloaded in 0.64 s (68.49 MB/s)
76 08:11:04.048115 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:11:04.048938 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:11:04.049216 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:11:04.049479 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:11:04.049952 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 08:11:04.050220 saving as /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/dtb/meson-g12b-a311d-libretech-cc.dtb
83 08:11:04.050427 total size: 54703 (0 MB)
84 08:11:04.050636 No compression specified
85 08:11:04.091642 progress 59 % (0 MB)
86 08:11:04.092647 progress 100 % (0 MB)
87 08:11:04.093223 0 MB downloaded in 0.04 s (1.22 MB/s)
88 08:11:04.093712 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:11:04.094566 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:11:04.095574 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:11:04.095883 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:11:04.096439 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 08:11:04.096707 saving as /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/nfsrootfs/full.rootfs.tar
95 08:11:04.096920 total size: 120894716 (115 MB)
96 08:11:04.097140 Using unxz to decompress xz
97 08:11:04.133849 progress 0 % (0 MB)
98 08:11:04.940297 progress 5 % (5 MB)
99 08:11:05.820419 progress 10 % (11 MB)
100 08:11:06.629105 progress 15 % (17 MB)
101 08:11:07.381497 progress 20 % (23 MB)
102 08:11:07.977861 progress 25 % (28 MB)
103 08:11:08.810266 progress 30 % (34 MB)
104 08:11:09.611523 progress 35 % (40 MB)
105 08:11:09.990143 progress 40 % (46 MB)
106 08:11:10.365876 progress 45 % (51 MB)
107 08:11:11.119708 progress 50 % (57 MB)
108 08:11:12.038927 progress 55 % (63 MB)
109 08:11:12.828868 progress 60 % (69 MB)
110 08:11:13.586699 progress 65 % (74 MB)
111 08:11:14.362927 progress 70 % (80 MB)
112 08:11:15.188282 progress 75 % (86 MB)
113 08:11:15.982883 progress 80 % (92 MB)
114 08:11:16.751891 progress 85 % (98 MB)
115 08:11:17.631611 progress 90 % (103 MB)
116 08:11:18.430127 progress 95 % (109 MB)
117 08:11:19.270770 progress 100 % (115 MB)
118 08:11:19.283399 115 MB downloaded in 15.19 s (7.59 MB/s)
119 08:11:19.284260 end: 1.4.1 http-download (duration 00:00:15) [common]
121 08:11:19.285938 end: 1.4 download-retry (duration 00:00:15) [common]
122 08:11:19.286491 start: 1.5 download-retry (timeout 00:09:44) [common]
123 08:11:19.287019 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 08:11:19.287833 downloading http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/modules.tar.xz
125 08:11:19.288341 saving as /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/modules/modules.tar
126 08:11:19.288757 total size: 11612196 (11 MB)
127 08:11:19.289180 Using unxz to decompress xz
128 08:11:19.334725 progress 0 % (0 MB)
129 08:11:19.402540 progress 5 % (0 MB)
130 08:11:19.484814 progress 10 % (1 MB)
131 08:11:19.600088 progress 15 % (1 MB)
132 08:11:19.711570 progress 20 % (2 MB)
133 08:11:19.806592 progress 25 % (2 MB)
134 08:11:19.897707 progress 30 % (3 MB)
135 08:11:19.992177 progress 35 % (3 MB)
136 08:11:20.079574 progress 40 % (4 MB)
137 08:11:20.172073 progress 45 % (5 MB)
138 08:11:20.274297 progress 50 % (5 MB)
139 08:11:20.367680 progress 55 % (6 MB)
140 08:11:20.470483 progress 60 % (6 MB)
141 08:11:20.566710 progress 65 % (7 MB)
142 08:11:20.656303 progress 70 % (7 MB)
143 08:11:20.734643 progress 75 % (8 MB)
144 08:11:20.818914 progress 80 % (8 MB)
145 08:11:20.899906 progress 85 % (9 MB)
146 08:11:20.979589 progress 90 % (9 MB)
147 08:11:21.060687 progress 95 % (10 MB)
148 08:11:21.138275 progress 100 % (11 MB)
149 08:11:21.149996 11 MB downloaded in 1.86 s (5.95 MB/s)
150 08:11:21.150740 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:11:21.152456 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:11:21.152999 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 08:11:21.153526 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 08:11:40.356698 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/974115/extract-nfsrootfs-k0ot9znc
156 08:11:40.357355 end: 1.6.1 extract-nfsrootfs (duration 00:00:19) [common]
157 08:11:40.357713 start: 1.6.2 lava-overlay (timeout 00:09:23) [common]
158 08:11:40.358383 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce
159 08:11:40.358939 makedir: /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin
160 08:11:40.360228 makedir: /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/tests
161 08:11:40.360783 makedir: /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/results
162 08:11:40.361175 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-add-keys
163 08:11:40.362197 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-add-sources
164 08:11:40.363670 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-background-process-start
165 08:11:40.364709 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-background-process-stop
166 08:11:40.365845 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-common-functions
167 08:11:40.366491 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-echo-ipv4
168 08:11:40.367071 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-install-packages
169 08:11:40.367715 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-installed-packages
170 08:11:40.368333 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-os-build
171 08:11:40.368922 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-probe-channel
172 08:11:40.369491 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-probe-ip
173 08:11:40.370697 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-target-ip
174 08:11:40.371923 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-target-mac
175 08:11:40.372929 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-target-storage
176 08:11:40.373553 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-test-case
177 08:11:40.374120 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-test-event
178 08:11:40.374689 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-test-feedback
179 08:11:40.375251 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-test-raise
180 08:11:40.375827 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-test-reference
181 08:11:40.377278 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-test-runner
182 08:11:40.377902 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-test-set
183 08:11:40.378463 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-test-shell
184 08:11:40.379105 Updating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-add-keys (debian)
185 08:11:40.379774 Updating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-add-sources (debian)
186 08:11:40.380480 Updating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-install-packages (debian)
187 08:11:40.381157 Updating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-installed-packages (debian)
188 08:11:40.381803 Updating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/bin/lava-os-build (debian)
189 08:11:40.382343 Creating /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/environment
190 08:11:40.382782 LAVA metadata
191 08:11:40.383077 - LAVA_JOB_ID=974115
192 08:11:40.383314 - LAVA_DISPATCHER_IP=192.168.6.2
193 08:11:40.383724 start: 1.6.2.1 ssh-authorize (timeout 00:09:23) [common]
194 08:11:40.384875 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 08:11:40.385287 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:23) [common]
196 08:11:40.385525 skipped lava-vland-overlay
197 08:11:40.385801 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 08:11:40.386125 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:23) [common]
199 08:11:40.386380 skipped lava-multinode-overlay
200 08:11:40.386653 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 08:11:40.386938 start: 1.6.2.4 test-definition (timeout 00:09:23) [common]
202 08:11:40.387220 Loading test definitions
203 08:11:40.387549 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:23) [common]
204 08:11:40.387812 Using /lava-974115 at stage 0
205 08:11:40.389398 uuid=974115_1.6.2.4.1 testdef=None
206 08:11:40.389799 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 08:11:40.390107 start: 1.6.2.4.2 test-overlay (timeout 00:09:23) [common]
208 08:11:40.391938 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 08:11:40.392987 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:23) [common]
211 08:11:40.395389 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 08:11:40.396412 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:23) [common]
214 08:11:40.398728 runner path: /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/0/tests/0_timesync-off test_uuid 974115_1.6.2.4.1
215 08:11:40.399452 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 08:11:40.400429 start: 1.6.2.4.5 git-repo-action (timeout 00:09:23) [common]
218 08:11:40.400699 Using /lava-974115 at stage 0
219 08:11:40.401092 Fetching tests from https://github.com/kernelci/test-definitions.git
220 08:11:40.401428 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/0/tests/1_kselftest-rtc'
221 08:11:44.098265 Running '/usr/bin/git checkout kernelci.org
222 08:11:44.225986 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 08:11:44.227460 uuid=974115_1.6.2.4.5 testdef=None
224 08:11:44.227816 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 08:11:44.228687 start: 1.6.2.4.6 test-overlay (timeout 00:09:19) [common]
227 08:11:44.231544 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 08:11:44.232407 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:19) [common]
230 08:11:44.236193 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 08:11:44.237073 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:19) [common]
233 08:11:44.240735 runner path: /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/0/tests/1_kselftest-rtc test_uuid 974115_1.6.2.4.5
234 08:11:44.241033 BOARD='meson-g12b-a311d-libretech-cc'
235 08:11:44.241250 BRANCH='tip'
236 08:11:44.241457 SKIPFILE='/dev/null'
237 08:11:44.241660 SKIP_INSTALL='True'
238 08:11:44.241859 TESTPROG_URL='http://storage.kernelci.org/tip/master/v6.12-rc7-405-g8005ac45ca72b/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 08:11:44.242064 TST_CASENAME=''
240 08:11:44.242263 TST_CMDFILES='rtc'
241 08:11:44.242838 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 08:11:44.243648 Creating lava-test-runner.conf files
244 08:11:44.243862 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/974115/lava-overlay-lf0riyce/lava-974115/0 for stage 0
245 08:11:44.244304 - 0_timesync-off
246 08:11:44.244567 - 1_kselftest-rtc
247 08:11:44.244931 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 08:11:44.245233 start: 1.6.2.5 compress-overlay (timeout 00:09:19) [common]
249 08:12:07.580200 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 08:12:07.580661 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:56) [common]
251 08:12:07.580959 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 08:12:07.581273 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 08:12:07.581570 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:56) [common]
254 08:12:08.208366 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 08:12:08.208866 start: 1.6.4 extract-modules (timeout 00:08:55) [common]
256 08:12:08.209128 extracting modules file /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974115/extract-nfsrootfs-k0ot9znc
257 08:12:09.571088 extracting modules file /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974115/extract-overlay-ramdisk-_mgafusf/ramdisk
258 08:12:11.210289 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 08:12:11.210799 start: 1.6.5 apply-overlay-tftp (timeout 00:08:52) [common]
260 08:12:11.211109 [common] Applying overlay to NFS
261 08:12:11.211343 [common] Applying overlay /var/lib/lava/dispatcher/tmp/974115/compress-overlay-5cotrq79/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/974115/extract-nfsrootfs-k0ot9znc
262 08:12:13.961547 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 08:12:13.962040 start: 1.6.6 prepare-kernel (timeout 00:08:49) [common]
264 08:12:13.962341 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:49) [common]
265 08:12:13.962603 Converting downloaded kernel to a uImage
266 08:12:13.962937 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/kernel/Image /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/kernel/uImage
267 08:12:14.465319 output: Image Name:
268 08:12:14.465752 output: Created: Mon Nov 11 08:12:13 2024
269 08:12:14.465962 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 08:12:14.466165 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 08:12:14.466366 output: Load Address: 01080000
272 08:12:14.466566 output: Entry Point: 01080000
273 08:12:14.466762 output:
274 08:12:14.467095 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 08:12:14.467365 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 08:12:14.467632 start: 1.6.7 configure-preseed-file (timeout 00:08:49) [common]
277 08:12:14.467885 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 08:12:14.468188 start: 1.6.8 compress-ramdisk (timeout 00:08:49) [common]
279 08:12:14.468446 Building ramdisk /var/lib/lava/dispatcher/tmp/974115/extract-overlay-ramdisk-_mgafusf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/974115/extract-overlay-ramdisk-_mgafusf/ramdisk
280 08:12:16.738285 >> 166829 blocks
281 08:12:24.423299 Adding RAMdisk u-boot header.
282 08:12:24.423759 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/974115/extract-overlay-ramdisk-_mgafusf/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/974115/extract-overlay-ramdisk-_mgafusf/ramdisk.cpio.gz.uboot
283 08:12:24.660196 output: Image Name:
284 08:12:24.660614 output: Created: Mon Nov 11 08:12:24 2024
285 08:12:24.660827 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 08:12:24.661031 output: Data Size: 23435295 Bytes = 22886.03 KiB = 22.35 MiB
287 08:12:24.661233 output: Load Address: 00000000
288 08:12:24.661430 output: Entry Point: 00000000
289 08:12:24.661629 output:
290 08:12:24.662213 rename /var/lib/lava/dispatcher/tmp/974115/extract-overlay-ramdisk-_mgafusf/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/ramdisk/ramdisk.cpio.gz.uboot
291 08:12:24.662631 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 08:12:24.662918 end: 1.6 prepare-tftp-overlay (duration 00:01:04) [common]
293 08:12:24.663192 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:39) [common]
294 08:12:24.663437 No LXC device requested
295 08:12:24.663692 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 08:12:24.663953 start: 1.8 deploy-device-env (timeout 00:08:39) [common]
297 08:12:24.664525 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 08:12:24.664987 Checking files for TFTP limit of 4294967296 bytes.
299 08:12:24.668029 end: 1 tftp-deploy (duration 00:01:21) [common]
300 08:12:24.668662 start: 2 uboot-action (timeout 00:05:00) [common]
301 08:12:24.669234 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 08:12:24.669773 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 08:12:24.670322 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 08:12:24.670897 Using kernel file from prepare-kernel: 974115/tftp-deploy-2_kc2au_/kernel/uImage
305 08:12:24.671578 substitutions:
306 08:12:24.672051 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 08:12:24.672498 - {DTB_ADDR}: 0x01070000
308 08:12:24.672937 - {DTB}: 974115/tftp-deploy-2_kc2au_/dtb/meson-g12b-a311d-libretech-cc.dtb
309 08:12:24.673382 - {INITRD}: 974115/tftp-deploy-2_kc2au_/ramdisk/ramdisk.cpio.gz.uboot
310 08:12:24.673817 - {KERNEL_ADDR}: 0x01080000
311 08:12:24.674250 - {KERNEL}: 974115/tftp-deploy-2_kc2au_/kernel/uImage
312 08:12:24.674684 - {LAVA_MAC}: None
313 08:12:24.675152 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/974115/extract-nfsrootfs-k0ot9znc
314 08:12:24.675590 - {NFS_SERVER_IP}: 192.168.6.2
315 08:12:24.676045 - {PRESEED_CONFIG}: None
316 08:12:24.676477 - {PRESEED_LOCAL}: None
317 08:12:24.676907 - {RAMDISK_ADDR}: 0x08000000
318 08:12:24.677333 - {RAMDISK}: 974115/tftp-deploy-2_kc2au_/ramdisk/ramdisk.cpio.gz.uboot
319 08:12:24.677758 - {ROOT_PART}: None
320 08:12:24.678179 - {ROOT}: None
321 08:12:24.678603 - {SERVER_IP}: 192.168.6.2
322 08:12:24.679026 - {TEE_ADDR}: 0x83000000
323 08:12:24.679450 - {TEE}: None
324 08:12:24.679873 Parsed boot commands:
325 08:12:24.680320 - setenv autoload no
326 08:12:24.680744 - setenv initrd_high 0xffffffff
327 08:12:24.681166 - setenv fdt_high 0xffffffff
328 08:12:24.681584 - dhcp
329 08:12:24.682007 - setenv serverip 192.168.6.2
330 08:12:24.682430 - tftpboot 0x01080000 974115/tftp-deploy-2_kc2au_/kernel/uImage
331 08:12:24.682855 - tftpboot 0x08000000 974115/tftp-deploy-2_kc2au_/ramdisk/ramdisk.cpio.gz.uboot
332 08:12:24.683281 - tftpboot 0x01070000 974115/tftp-deploy-2_kc2au_/dtb/meson-g12b-a311d-libretech-cc.dtb
333 08:12:24.683703 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/974115/extract-nfsrootfs-k0ot9znc,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 08:12:24.684169 - bootm 0x01080000 0x08000000 0x01070000
335 08:12:24.684715 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 08:12:24.686328 start: 2.3 connect-device (timeout 00:05:00) [common]
338 08:12:24.686785 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 08:12:24.702911 Setting prompt string to ['lava-test: # ']
340 08:12:24.704600 end: 2.3 connect-device (duration 00:00:00) [common]
341 08:12:24.705264 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 08:12:24.705876 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 08:12:24.706476 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 08:12:24.707689 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 08:12:24.744144 >> OK - accepted request
346 08:12:24.746786 Returned 0 in 0 seconds
347 08:12:24.847932 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 08:12:24.849711 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 08:12:24.850325 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 08:12:24.850870 Setting prompt string to ['Hit any key to stop autoboot']
352 08:12:24.851364 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 08:12:24.853091 Trying 192.168.56.21...
354 08:12:24.853612 Connected to conserv1.
355 08:12:24.854058 Escape character is '^]'.
356 08:12:24.854512
357 08:12:24.854968 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 08:12:24.855431
359 08:12:36.676885 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 08:12:36.677526 bl2_stage_init 0x01
361 08:12:36.677994 bl2_stage_init 0x81
362 08:12:36.682466 hw id: 0x0000 - pwm id 0x01
363 08:12:36.682967 bl2_stage_init 0xc1
364 08:12:36.683415 bl2_stage_init 0x02
365 08:12:36.683865
366 08:12:36.688176 L0:00000000
367 08:12:36.688675 L1:20000703
368 08:12:36.689124 L2:00008067
369 08:12:36.689568 L3:14000000
370 08:12:36.693662 B2:00402000
371 08:12:36.694136 B1:e0f83180
372 08:12:36.694577
373 08:12:36.695007 TE: 58124
374 08:12:36.695434
375 08:12:36.699194 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 08:12:36.699659
377 08:12:36.700145 Board ID = 1
378 08:12:36.704881 Set A53 clk to 24M
379 08:12:36.705338 Set A73 clk to 24M
380 08:12:36.705764 Set clk81 to 24M
381 08:12:36.710550 A53 clk: 1200 MHz
382 08:12:36.711005 A73 clk: 1200 MHz
383 08:12:36.711432 CLK81: 166.6M
384 08:12:36.711856 smccc: 00012a92
385 08:12:36.716046 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 08:12:36.721735 board id: 1
387 08:12:36.727477 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 08:12:36.738111 fw parse done
389 08:12:36.744111 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 08:12:36.786837 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 08:12:36.797737 PIEI prepare done
392 08:12:36.798189 fastboot data load
393 08:12:36.798619 fastboot data verify
394 08:12:36.803287 verify result: 266
395 08:12:36.808925 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 08:12:36.809399 LPDDR4 probe
397 08:12:36.809853 ddr clk to 1584MHz
398 08:12:36.816875 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 08:12:36.854172
400 08:12:36.854644 dmc_version 0001
401 08:12:36.860940 Check phy result
402 08:12:36.866677 INFO : End of CA training
403 08:12:36.867141 INFO : End of initialization
404 08:12:36.872321 INFO : Training has run successfully!
405 08:12:36.872793 Check phy result
406 08:12:36.877907 INFO : End of initialization
407 08:12:36.878368 INFO : End of read enable training
408 08:12:36.883420 INFO : End of fine write leveling
409 08:12:36.889087 INFO : End of Write leveling coarse delay
410 08:12:36.889557 INFO : Training has run successfully!
411 08:12:36.890007 Check phy result
412 08:12:36.894659 INFO : End of initialization
413 08:12:36.895132 INFO : End of read dq deskew training
414 08:12:36.900299 INFO : End of MPR read delay center optimization
415 08:12:36.905819 INFO : End of write delay center optimization
416 08:12:36.911491 INFO : End of read delay center optimization
417 08:12:36.911953 INFO : End of max read latency training
418 08:12:36.917087 INFO : Training has run successfully!
419 08:12:36.917546 1D training succeed
420 08:12:36.926292 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 08:12:36.973889 Check phy result
422 08:12:36.974350 INFO : End of initialization
423 08:12:36.996364 INFO : End of 2D read delay Voltage center optimization
424 08:12:37.015611 INFO : End of 2D read delay Voltage center optimization
425 08:12:37.068658 INFO : End of 2D write delay Voltage center optimization
426 08:12:37.118004 INFO : End of 2D write delay Voltage center optimization
427 08:12:37.123566 INFO : Training has run successfully!
428 08:12:37.124074
429 08:12:37.124540 channel==0
430 08:12:37.129176 RxClkDly_Margin_A0==88 ps 9
431 08:12:37.129638 TxDqDly_Margin_A0==108 ps 11
432 08:12:37.134790 RxClkDly_Margin_A1==88 ps 9
433 08:12:37.135252 TxDqDly_Margin_A1==98 ps 10
434 08:12:37.135698 TrainedVREFDQ_A0==74
435 08:12:37.140404 TrainedVREFDQ_A1==74
436 08:12:37.140866 VrefDac_Margin_A0==25
437 08:12:37.145969 DeviceVref_Margin_A0==40
438 08:12:37.146439 VrefDac_Margin_A1==25
439 08:12:37.146881 DeviceVref_Margin_A1==40
440 08:12:37.147318
441 08:12:37.147756
442 08:12:37.151599 channel==1
443 08:12:37.152149 RxClkDly_Margin_A0==98 ps 10
444 08:12:37.152617 TxDqDly_Margin_A0==88 ps 9
445 08:12:37.157152 RxClkDly_Margin_A1==98 ps 10
446 08:12:37.157636 TxDqDly_Margin_A1==88 ps 9
447 08:12:37.162782 TrainedVREFDQ_A0==76
448 08:12:37.163254 TrainedVREFDQ_A1==76
449 08:12:37.163707 VrefDac_Margin_A0==22
450 08:12:37.168418 DeviceVref_Margin_A0==38
451 08:12:37.168893 VrefDac_Margin_A1==23
452 08:12:37.173981 DeviceVref_Margin_A1==38
453 08:12:37.174447
454 08:12:37.174903 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 08:12:37.179588
456 08:12:37.207571 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 0000001a 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 08:12:37.208138 2D training succeed
458 08:12:37.213191 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 08:12:37.218798 auto size-- 65535DDR cs0 size: 2048MB
460 08:12:37.219264 DDR cs1 size: 2048MB
461 08:12:37.224439 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 08:12:37.224907 cs0 DataBus test pass
463 08:12:37.229974 cs1 DataBus test pass
464 08:12:37.230444 cs0 AddrBus test pass
465 08:12:37.230893 cs1 AddrBus test pass
466 08:12:37.231332
467 08:12:37.235558 100bdlr_step_size ps== 420
468 08:12:37.236066 result report
469 08:12:37.241172 boot times 0Enable ddr reg access
470 08:12:37.246630 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 08:12:37.260193 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 08:12:37.832966 0.0;M3 CHK:0;cm4_sp_mode 0
473 08:12:37.833606 MVN_1=0x00000000
474 08:12:37.838448 MVN_2=0x00000000
475 08:12:37.844204 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 08:12:37.844686 OPS=0x10
477 08:12:37.845140 ring efuse init
478 08:12:37.845585 chipver efuse init
479 08:12:37.849812 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 08:12:37.855468 [0.018961 Inits done]
481 08:12:37.855974 secure task start!
482 08:12:37.856479 high task start!
483 08:12:37.860031 low task start!
484 08:12:37.860505 run into bl31
485 08:12:37.866601 NOTICE: BL31: v1.3(release):4fc40b1
486 08:12:37.874431 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 08:12:37.874918 NOTICE: BL31: G12A normal boot!
488 08:12:37.899857 NOTICE: BL31: BL33 decompress pass
489 08:12:37.905518 ERROR: Error initializing runtime service opteed_fast
490 08:12:39.138413
491 08:12:39.139001
492 08:12:39.146766 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 08:12:39.147256
494 08:12:39.147711 Model: Libre Computer AML-A311D-CC Alta
495 08:12:39.355219 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 08:12:39.378639 DRAM: 2 GiB (effective 3.8 GiB)
497 08:12:39.521588 Core: 408 devices, 31 uclasses, devicetree: separate
498 08:12:39.527450 WDT: Not starting watchdog@f0d0
499 08:12:39.559768 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 08:12:39.572210 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 08:12:39.577192 ** Bad device specification mmc 0 **
502 08:12:39.587496 Card did not respond to voltage select! : -110
503 08:12:39.595153 ** Bad device specification mmc 0 **
504 08:12:39.595631 Couldn't find partition mmc 0
505 08:12:39.603490 Card did not respond to voltage select! : -110
506 08:12:39.609099 ** Bad device specification mmc 0 **
507 08:12:39.609574 Couldn't find partition mmc 0
508 08:12:39.614131 Error: could not access storage.
509 08:12:40.876426 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 08:12:40.877078 bl2_stage_init 0x01
511 08:12:40.877556 bl2_stage_init 0x81
512 08:12:40.881945 hw id: 0x0000 - pwm id 0x01
513 08:12:40.882441 bl2_stage_init 0xc1
514 08:12:40.882896 bl2_stage_init 0x02
515 08:12:40.883340
516 08:12:40.887657 L0:00000000
517 08:12:40.888214 L1:20000703
518 08:12:40.888677 L2:00008067
519 08:12:40.889121 L3:14000000
520 08:12:40.893267 B2:00402000
521 08:12:40.893758 B1:e0f83180
522 08:12:40.894207
523 08:12:40.894653 TE: 58159
524 08:12:40.895095
525 08:12:40.898726 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 08:12:40.899221
527 08:12:40.899671 Board ID = 1
528 08:12:40.904339 Set A53 clk to 24M
529 08:12:40.904827 Set A73 clk to 24M
530 08:12:40.905277 Set clk81 to 24M
531 08:12:40.909931 A53 clk: 1200 MHz
532 08:12:40.910405 A73 clk: 1200 MHz
533 08:12:40.910852 CLK81: 166.6M
534 08:12:40.911285 smccc: 00012ab5
535 08:12:40.915543 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 08:12:40.921340 board id: 1
537 08:12:40.927040 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 08:12:40.937752 fw parse done
539 08:12:40.943633 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 08:12:40.986403 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 08:12:40.997356 PIEI prepare done
542 08:12:40.997886 fastboot data load
543 08:12:40.998322 fastboot data verify
544 08:12:41.002958 verify result: 266
545 08:12:41.008559 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 08:12:41.009057 LPDDR4 probe
547 08:12:41.009479 ddr clk to 1584MHz
548 08:12:41.016529 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 08:12:41.053836
550 08:12:41.054445 dmc_version 0001
551 08:12:41.060532 Check phy result
552 08:12:41.066330 INFO : End of CA training
553 08:12:41.066832 INFO : End of initialization
554 08:12:41.071931 INFO : Training has run successfully!
555 08:12:41.072490 Check phy result
556 08:12:41.077593 INFO : End of initialization
557 08:12:41.078162 INFO : End of read enable training
558 08:12:41.083173 INFO : End of fine write leveling
559 08:12:41.088721 INFO : End of Write leveling coarse delay
560 08:12:41.089236 INFO : Training has run successfully!
561 08:12:41.089655 Check phy result
562 08:12:41.094265 INFO : End of initialization
563 08:12:41.094602 INFO : End of read dq deskew training
564 08:12:41.099770 INFO : End of MPR read delay center optimization
565 08:12:41.105401 INFO : End of write delay center optimization
566 08:12:41.111042 INFO : End of read delay center optimization
567 08:12:41.111574 INFO : End of max read latency training
568 08:12:41.116685 INFO : Training has run successfully!
569 08:12:41.117195 1D training succeed
570 08:12:41.125860 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 08:12:41.173566 Check phy result
572 08:12:41.174133 INFO : End of initialization
573 08:12:41.196138 INFO : End of 2D read delay Voltage center optimization
574 08:12:41.216372 INFO : End of 2D read delay Voltage center optimization
575 08:12:41.268440 INFO : End of 2D write delay Voltage center optimization
576 08:12:41.317765 INFO : End of 2D write delay Voltage center optimization
577 08:12:41.323296 INFO : Training has run successfully!
578 08:12:41.323805
579 08:12:41.324302 channel==0
580 08:12:41.328915 RxClkDly_Margin_A0==88 ps 9
581 08:12:41.329419 TxDqDly_Margin_A0==98 ps 10
582 08:12:41.334534 RxClkDly_Margin_A1==88 ps 9
583 08:12:41.335029 TxDqDly_Margin_A1==98 ps 10
584 08:12:41.335451 TrainedVREFDQ_A0==74
585 08:12:41.340119 TrainedVREFDQ_A1==74
586 08:12:41.340623 VrefDac_Margin_A0==25
587 08:12:41.341055 DeviceVref_Margin_A0==40
588 08:12:41.345704 VrefDac_Margin_A1==25
589 08:12:41.346207 DeviceVref_Margin_A1==40
590 08:12:41.346617
591 08:12:41.347022
592 08:12:41.351302 channel==1
593 08:12:41.351796 RxClkDly_Margin_A0==98 ps 10
594 08:12:41.352256 TxDqDly_Margin_A0==88 ps 9
595 08:12:41.356901 RxClkDly_Margin_A1==88 ps 9
596 08:12:41.357406 TxDqDly_Margin_A1==98 ps 10
597 08:12:41.362574 TrainedVREFDQ_A0==76
598 08:12:41.363089 TrainedVREFDQ_A1==78
599 08:12:41.363502 VrefDac_Margin_A0==23
600 08:12:41.368124 DeviceVref_Margin_A0==38
601 08:12:41.368627 VrefDac_Margin_A1==24
602 08:12:41.373705 DeviceVref_Margin_A1==36
603 08:12:41.374199
604 08:12:41.374612 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 08:12:41.375019
606 08:12:41.407261 soc_vref_reg_value 0x 0000001a 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 08:12:41.407845 2D training succeed
608 08:12:41.412927 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 08:12:41.418481 auto size-- 65535DDR cs0 size: 2048MB
610 08:12:41.418993 DDR cs1 size: 2048MB
611 08:12:41.424126 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 08:12:41.424627 cs0 DataBus test pass
613 08:12:41.429711 cs1 DataBus test pass
614 08:12:41.430200 cs0 AddrBus test pass
615 08:12:41.430611 cs1 AddrBus test pass
616 08:12:41.431009
617 08:12:41.435290 100bdlr_step_size ps== 420
618 08:12:41.435782 result report
619 08:12:41.440927 boot times 0Enable ddr reg access
620 08:12:41.446252 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 08:12:41.459677 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 08:12:42.033460 0.0;M3 CHK:0;cm4_sp_mode 0
623 08:12:42.033872 MVN_1=0x00000000
624 08:12:42.038893 MVN_2=0x00000000
625 08:12:42.044676 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 08:12:42.045021 OPS=0x10
627 08:12:42.045226 ring efuse init
628 08:12:42.045425 chipver efuse init
629 08:12:42.050213 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 08:12:42.056022 [0.018961 Inits done]
631 08:12:42.056554 secure task start!
632 08:12:42.056952 high task start!
633 08:12:42.060499 low task start!
634 08:12:42.060970 run into bl31
635 08:12:42.067161 NOTICE: BL31: v1.3(release):4fc40b1
636 08:12:42.074985 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 08:12:42.075479 NOTICE: BL31: G12A normal boot!
638 08:12:42.100357 NOTICE: BL31: BL33 decompress pass
639 08:12:42.106037 ERROR: Error initializing runtime service opteed_fast
640 08:12:43.339045
641 08:12:43.339682
642 08:12:43.347528 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 08:12:43.347895
644 08:12:43.348153 Model: Libre Computer AML-A311D-CC Alta
645 08:12:43.554968 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 08:12:43.582762 DRAM: 2 GiB (effective 3.8 GiB)
647 08:12:43.722280 Core: 408 devices, 31 uclasses, devicetree: separate
648 08:12:43.727062 WDT: Not starting watchdog@f0d0
649 08:12:43.760340 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 08:12:43.772820 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 08:12:43.776840 ** Bad device specification mmc 0 **
652 08:12:43.788105 Card did not respond to voltage select! : -110
653 08:12:43.794762 ** Bad device specification mmc 0 **
654 08:12:43.795380 Couldn't find partition mmc 0
655 08:12:43.804026 Card did not respond to voltage select! : -110
656 08:12:43.809583 ** Bad device specification mmc 0 **
657 08:12:43.810165 Couldn't find partition mmc 0
658 08:12:43.813634 Error: could not access storage.
659 08:12:44.156135 Net: eth0: ethernet@ff3f0000
660 08:12:44.156727 starting USB...
661 08:12:44.408934 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 08:12:44.409722 Starting the controller
663 08:12:44.416085 USB XHCI 1.10
664 08:12:46.128240 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 08:12:46.129041 bl2_stage_init 0x01
666 08:12:46.129618 bl2_stage_init 0x81
667 08:12:46.133744 hw id: 0x0000 - pwm id 0x01
668 08:12:46.134358 bl2_stage_init 0xc1
669 08:12:46.134914 bl2_stage_init 0x02
670 08:12:46.135465
671 08:12:46.139331 L0:00000000
672 08:12:46.140017 L1:20000703
673 08:12:46.140583 L2:00008067
674 08:12:46.141121 L3:14000000
675 08:12:46.144873 B2:00402000
676 08:12:46.145471 B1:e0f83180
677 08:12:46.146008
678 08:12:46.146529 TE: 58124
679 08:12:46.147059
680 08:12:46.150442 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 08:12:46.151035
682 08:12:46.151579 Board ID = 1
683 08:12:46.156025 Set A53 clk to 24M
684 08:12:46.156606 Set A73 clk to 24M
685 08:12:46.157142 Set clk81 to 24M
686 08:12:46.161626 A53 clk: 1200 MHz
687 08:12:46.162184 A73 clk: 1200 MHz
688 08:12:46.162715 CLK81: 166.6M
689 08:12:46.163231 smccc: 00012a92
690 08:12:46.167229 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 08:12:46.172819 board id: 1
692 08:12:46.178720 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 08:12:46.189420 fw parse done
694 08:12:46.195392 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 08:12:46.238082 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 08:12:46.249109 PIEI prepare done
697 08:12:46.249729 fastboot data load
698 08:12:46.250274 fastboot data verify
699 08:12:46.254551 verify result: 266
700 08:12:46.260197 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 08:12:46.260756 LPDDR4 probe
702 08:12:46.261187 ddr clk to 1584MHz
703 08:12:46.268298 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 08:12:46.305512
705 08:12:46.306077 dmc_version 0001
706 08:12:46.312221 Check phy result
707 08:12:46.318000 INFO : End of CA training
708 08:12:46.318522 INFO : End of initialization
709 08:12:46.323612 INFO : Training has run successfully!
710 08:12:46.324214 Check phy result
711 08:12:46.329232 INFO : End of initialization
712 08:12:46.329756 INFO : End of read enable training
713 08:12:46.334839 INFO : End of fine write leveling
714 08:12:46.340384 INFO : End of Write leveling coarse delay
715 08:12:46.340905 INFO : Training has run successfully!
716 08:12:46.341323 Check phy result
717 08:12:46.345995 INFO : End of initialization
718 08:12:46.346509 INFO : End of read dq deskew training
719 08:12:46.351685 INFO : End of MPR read delay center optimization
720 08:12:46.357256 INFO : End of write delay center optimization
721 08:12:46.362805 INFO : End of read delay center optimization
722 08:12:46.363324 INFO : End of max read latency training
723 08:12:46.368438 INFO : Training has run successfully!
724 08:12:46.368962 1D training succeed
725 08:12:46.377515 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 08:12:46.425360 Check phy result
727 08:12:46.425928 INFO : End of initialization
728 08:12:46.447809 INFO : End of 2D read delay Voltage center optimization
729 08:12:46.468111 INFO : End of 2D read delay Voltage center optimization
730 08:12:46.520012 INFO : End of 2D write delay Voltage center optimization
731 08:12:46.569364 INFO : End of 2D write delay Voltage center optimization
732 08:12:46.574860 INFO : Training has run successfully!
733 08:12:46.575219
734 08:12:46.575455 channel==0
735 08:12:46.580475 RxClkDly_Margin_A0==88 ps 9
736 08:12:46.580963 TxDqDly_Margin_A0==98 ps 10
737 08:12:46.586092 RxClkDly_Margin_A1==88 ps 9
738 08:12:46.586579 TxDqDly_Margin_A1==98 ps 10
739 08:12:46.586861 TrainedVREFDQ_A0==74
740 08:12:46.591734 TrainedVREFDQ_A1==76
741 08:12:46.592101 VrefDac_Margin_A0==25
742 08:12:46.592341 DeviceVref_Margin_A0==40
743 08:12:46.597253 VrefDac_Margin_A1==25
744 08:12:46.597600 DeviceVref_Margin_A1==38
745 08:12:46.597825
746 08:12:46.598040
747 08:12:46.602926 channel==1
748 08:12:46.603406 RxClkDly_Margin_A0==98 ps 10
749 08:12:46.603788 TxDqDly_Margin_A0==88 ps 9
750 08:12:46.608474 RxClkDly_Margin_A1==98 ps 10
751 08:12:46.608946 TxDqDly_Margin_A1==88 ps 9
752 08:12:46.614090 TrainedVREFDQ_A0==76
753 08:12:46.614580 TrainedVREFDQ_A1==77
754 08:12:46.614863 VrefDac_Margin_A0==24
755 08:12:46.619691 DeviceVref_Margin_A0==38
756 08:12:46.620214 VrefDac_Margin_A1==23
757 08:12:46.625394 DeviceVref_Margin_A1==37
758 08:12:46.625921
759 08:12:46.626355 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 08:12:46.626770
761 08:12:46.658923 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000019 00000018 00000019 00000018 00000018 00000019 0000001a 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
762 08:12:46.659492 2D training succeed
763 08:12:46.664613 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 08:12:46.670200 auto size-- 65535DDR cs0 size: 2048MB
765 08:12:46.670711 DDR cs1 size: 2048MB
766 08:12:46.675805 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 08:12:46.676353 cs0 DataBus test pass
768 08:12:46.681354 cs1 DataBus test pass
769 08:12:46.681856 cs0 AddrBus test pass
770 08:12:46.682273 cs1 AddrBus test pass
771 08:12:46.682679
772 08:12:46.687020 100bdlr_step_size ps== 420
773 08:12:46.687561 result report
774 08:12:46.692580 boot times 0Enable ddr reg access
775 08:12:46.697928 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 08:12:46.711374 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 08:12:47.284990 0.0;M3 CHK:0;cm4_sp_mode 0
778 08:12:47.285439 MVN_1=0x00000000
779 08:12:47.290432 MVN_2=0x00000000
780 08:12:47.296191 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 08:12:47.296503 OPS=0x10
782 08:12:47.296714 ring efuse init
783 08:12:47.296930 chipver efuse init
784 08:12:47.301794 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 08:12:47.307355 [0.018960 Inits done]
786 08:12:47.307638 secure task start!
787 08:12:47.307846 high task start!
788 08:12:47.311997 low task start!
789 08:12:47.312290 run into bl31
790 08:12:47.318724 NOTICE: BL31: v1.3(release):4fc40b1
791 08:12:47.326465 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 08:12:47.326772 NOTICE: BL31: G12A normal boot!
793 08:12:47.351792 NOTICE: BL31: BL33 decompress pass
794 08:12:47.357509 ERROR: Error initializing runtime service opteed_fast
795 08:12:48.590547
796 08:12:48.590976
797 08:12:48.599000 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 08:12:48.599361
799 08:12:48.599580 Model: Libre Computer AML-A311D-CC Alta
800 08:12:48.807431 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 08:12:48.830907 DRAM: 2 GiB (effective 3.8 GiB)
802 08:12:48.973812 Core: 408 devices, 31 uclasses, devicetree: separate
803 08:12:48.979686 WDT: Not starting watchdog@f0d0
804 08:12:49.011888 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 08:12:49.024340 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 08:12:49.029355 ** Bad device specification mmc 0 **
807 08:12:49.039666 Card did not respond to voltage select! : -110
808 08:12:49.047310 ** Bad device specification mmc 0 **
809 08:12:49.047849 Couldn't find partition mmc 0
810 08:12:49.055707 Card did not respond to voltage select! : -110
811 08:12:49.061101 ** Bad device specification mmc 0 **
812 08:12:49.061599 Couldn't find partition mmc 0
813 08:12:49.066155 Error: could not access storage.
814 08:12:49.408792 Net: eth0: ethernet@ff3f0000
815 08:12:49.409235 starting USB...
816 08:12:49.660553 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 08:12:49.661214 Starting the controller
818 08:12:49.666666 USB XHCI 1.10
819 08:12:51.826876 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 08:12:51.827736 bl2_stage_init 0x01
821 08:12:51.828451 bl2_stage_init 0x81
822 08:12:51.832398 hw id: 0x0000 - pwm id 0x01
823 08:12:51.833080 bl2_stage_init 0xc1
824 08:12:51.833740 bl2_stage_init 0x02
825 08:12:51.834380
826 08:12:51.838175 L0:00000000
827 08:12:51.838740 L1:20000703
828 08:12:51.839346 L2:00008067
829 08:12:51.839841 L3:14000000
830 08:12:51.840911 B2:00402000
831 08:12:51.841180 B1:e0f83180
832 08:12:51.841412
833 08:12:51.841643 TE: 58159
834 08:12:51.841890
835 08:12:51.852078 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 08:12:51.852407
837 08:12:51.852652 Board ID = 1
838 08:12:51.852895 Set A53 clk to 24M
839 08:12:51.853135 Set A73 clk to 24M
840 08:12:51.857638 Set clk81 to 24M
841 08:12:51.857950 A53 clk: 1200 MHz
842 08:12:51.858231 A73 clk: 1200 MHz
843 08:12:51.861125 CLK81: 166.6M
844 08:12:51.861496 smccc: 00012ab5
845 08:12:51.866834 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 08:12:51.872416 board id: 1
847 08:12:51.876768 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 08:12:51.888349 fw parse done
849 08:12:51.893294 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 08:12:51.936388 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 08:12:51.947704 PIEI prepare done
852 08:12:51.948658 fastboot data load
853 08:12:51.949684 fastboot data verify
854 08:12:51.953207 verify result: 266
855 08:12:51.958880 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 08:12:51.959904 LPDDR4 probe
857 08:12:51.960970 ddr clk to 1584MHz
858 08:12:51.966070 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 08:12:52.003327
860 08:12:52.003729 dmc_version 0001
861 08:12:52.010601 Check phy result
862 08:12:52.016585 INFO : End of CA training
863 08:12:52.017067 INFO : End of initialization
864 08:12:52.022262 INFO : Training has run successfully!
865 08:12:52.022862 Check phy result
866 08:12:52.027879 INFO : End of initialization
867 08:12:52.028650 INFO : End of read enable training
868 08:12:52.033438 INFO : End of fine write leveling
869 08:12:52.039008 INFO : End of Write leveling coarse delay
870 08:12:52.039931 INFO : Training has run successfully!
871 08:12:52.040886 Check phy result
872 08:12:52.044568 INFO : End of initialization
873 08:12:52.045530 INFO : End of read dq deskew training
874 08:12:52.050174 INFO : End of MPR read delay center optimization
875 08:12:52.055737 INFO : End of write delay center optimization
876 08:12:52.061309 INFO : End of read delay center optimization
877 08:12:52.062250 INFO : End of max read latency training
878 08:12:52.067686 INFO : Training has run successfully!
879 08:12:52.068627 1D training succeed
880 08:12:52.076323 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 08:12:52.123683 Check phy result
882 08:12:52.124792 INFO : End of initialization
883 08:12:52.145968 INFO : End of 2D read delay Voltage center optimization
884 08:12:52.165877 INFO : End of 2D read delay Voltage center optimization
885 08:12:52.218926 INFO : End of 2D write delay Voltage center optimization
886 08:12:52.268108 INFO : End of 2D write delay Voltage center optimization
887 08:12:52.273641 INFO : Training has run successfully!
888 08:12:52.274144
889 08:12:52.274549 channel==0
890 08:12:52.279102 RxClkDly_Margin_A0==88 ps 9
891 08:12:52.279599 TxDqDly_Margin_A0==98 ps 10
892 08:12:52.282489 RxClkDly_Margin_A1==88 ps 9
893 08:12:52.282978 TxDqDly_Margin_A1==98 ps 10
894 08:12:52.288001 TrainedVREFDQ_A0==74
895 08:12:52.288515 TrainedVREFDQ_A1==74
896 08:12:52.293625 VrefDac_Margin_A0==25
897 08:12:52.294133 DeviceVref_Margin_A0==40
898 08:12:52.294527 VrefDac_Margin_A1==25
899 08:12:52.299203 DeviceVref_Margin_A1==40
900 08:12:52.299694
901 08:12:52.300129
902 08:12:52.300525 channel==1
903 08:12:52.300911 RxClkDly_Margin_A0==98 ps 10
904 08:12:52.304855 TxDqDly_Margin_A0==98 ps 10
905 08:12:52.305349 RxClkDly_Margin_A1==98 ps 10
906 08:12:52.310434 TxDqDly_Margin_A1==98 ps 10
907 08:12:52.310937 TrainedVREFDQ_A0==77
908 08:12:52.311365 TrainedVREFDQ_A1==77
909 08:12:52.316021 VrefDac_Margin_A0==22
910 08:12:52.316515 DeviceVref_Margin_A0==37
911 08:12:52.321598 VrefDac_Margin_A1==23
912 08:12:52.322097 DeviceVref_Margin_A1==37
913 08:12:52.322506
914 08:12:52.327212 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 08:12:52.327699
916 08:12:52.355123 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 0000001a 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 08:12:52.360812 2D training succeed
918 08:12:52.366266 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 08:12:52.366668 auto size-- 65535DDR cs0 size: 2048MB
920 08:12:52.371923 DDR cs1 size: 2048MB
921 08:12:52.372352 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 08:12:52.377514 cs0 DataBus test pass
923 08:12:52.378021 cs1 DataBus test pass
924 08:12:52.378367 cs0 AddrBus test pass
925 08:12:52.383121 cs1 AddrBus test pass
926 08:12:52.383598
927 08:12:52.383951 100bdlr_step_size ps== 420
928 08:12:52.384355 result report
929 08:12:52.388716 boot times 0Enable ddr reg access
930 08:12:52.396367 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 08:12:52.409243 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 08:12:52.983781 0.0;M3 CHK:0;cm4_sp_mode 0
933 08:12:52.984614 MVN_1=0x00000000
934 08:12:52.989165 MVN_2=0x00000000
935 08:12:52.995033 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 08:12:52.995704 OPS=0x10
937 08:12:52.996317 ring efuse init
938 08:12:52.996835 chipver efuse init
939 08:12:53.000584 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 08:12:53.006140 [0.018961 Inits done]
941 08:12:53.006832 secure task start!
942 08:12:53.007405 high task start!
943 08:12:53.010320 low task start!
944 08:12:53.010914 run into bl31
945 08:12:53.017371 NOTICE: BL31: v1.3(release):4fc40b1
946 08:12:53.024934 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 08:12:53.025627 NOTICE: BL31: G12A normal boot!
948 08:12:53.051118 NOTICE: BL31: BL33 decompress pass
949 08:12:53.055893 ERROR: Error initializing runtime service opteed_fast
950 08:12:54.289611
951 08:12:54.290417
952 08:12:54.297280 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 08:12:54.297965
954 08:12:54.298549 Model: Libre Computer AML-A311D-CC Alta
955 08:12:54.506340 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 08:12:54.529442 DRAM: 2 GiB (effective 3.8 GiB)
957 08:12:54.672855 Core: 408 devices, 31 uclasses, devicetree: separate
958 08:12:54.677950 WDT: Not starting watchdog@f0d0
959 08:12:54.710977 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 08:12:54.723481 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 08:12:54.727484 ** Bad device specification mmc 0 **
962 08:12:54.738732 Card did not respond to voltage select! : -110
963 08:12:54.746178 ** Bad device specification mmc 0 **
964 08:12:54.746839 Couldn't find partition mmc 0
965 08:12:54.754722 Card did not respond to voltage select! : -110
966 08:12:54.760289 ** Bad device specification mmc 0 **
967 08:12:54.760931 Couldn't find partition mmc 0
968 08:12:54.764322 Error: could not access storage.
969 08:12:55.106876 Net: eth0: ethernet@ff3f0000
970 08:12:55.107688 starting USB...
971 08:12:55.359583 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 08:12:55.360379 Starting the controller
973 08:12:55.365754 USB XHCI 1.10
974 08:12:56.920621 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 08:12:56.928874 scanning usb for storage devices... 0 Storage Device(s) found
977 08:12:56.980772 Hit any key to stop autoboot: 1
978 08:12:56.981823 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 08:12:56.982476 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 08:12:56.982970 Setting prompt string to ['=>']
981 08:12:56.983443 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 08:12:56.996481 0
983 08:12:56.997601 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 08:12:56.998267 Sending with 10 millisecond of delay
986 08:12:58.134170 => setenv autoload no
987 08:12:58.145313 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 08:12:58.152078 setenv autoload no
989 08:12:58.153059 Sending with 10 millisecond of delay
991 08:12:59.951527 => setenv initrd_high 0xffffffff
992 08:12:59.962323 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 08:12:59.963109 setenv initrd_high 0xffffffff
994 08:12:59.963792 Sending with 10 millisecond of delay
996 08:13:01.579946 => setenv fdt_high 0xffffffff
997 08:13:01.590773 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 08:13:01.591574 setenv fdt_high 0xffffffff
999 08:13:01.592304 Sending with 10 millisecond of delay
1001 08:13:01.884101 => dhcp
1002 08:13:01.894826 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 08:13:01.895626 dhcp
1004 08:13:01.896109 Speed: 1000, full duplex
1005 08:13:01.896527 BOOTP broadcast 1
1006 08:13:01.904867 DHCP client bound to address 192.168.6.27 (10 ms)
1007 08:13:01.905598 Sending with 10 millisecond of delay
1009 08:13:03.582990 => setenv serverip 192.168.6.2
1010 08:13:03.593855 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 08:13:03.594807 setenv serverip 192.168.6.2
1012 08:13:03.595550 Sending with 10 millisecond of delay
1014 08:13:07.320482 => tftpboot 0x01080000 974115/tftp-deploy-2_kc2au_/kernel/uImage
1015 08:13:07.331092 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1016 08:13:07.331623 tftpboot 0x01080000 974115/tftp-deploy-2_kc2au_/kernel/uImage
1017 08:13:07.331875 Speed: 1000, full duplex
1018 08:13:07.332318 Using ethernet@ff3f0000 device
1019 08:13:07.333756 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 08:13:07.339194 Filename '974115/tftp-deploy-2_kc2au_/kernel/uImage'.
1021 08:13:07.342643 Load address: 0x1080000
1022 08:13:10.350341 Loading: *################################################## 43.6 MiB
1023 08:13:10.350996 14.5 MiB/s
1024 08:13:10.351476 done
1025 08:13:10.353656 Bytes transferred = 45713984 (2b98a40 hex)
1026 08:13:10.354487 Sending with 10 millisecond of delay
1028 08:13:15.057422 => tftpboot 0x08000000 974115/tftp-deploy-2_kc2au_/ramdisk/ramdisk.cpio.gz.uboot
1029 08:13:15.068259 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 08:13:15.069112 tftpboot 0x08000000 974115/tftp-deploy-2_kc2au_/ramdisk/ramdisk.cpio.gz.uboot
1031 08:13:15.069604 Speed: 1000, full duplex
1032 08:13:15.070059 Using ethernet@ff3f0000 device
1033 08:13:15.070999 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 08:13:15.082878 Filename '974115/tftp-deploy-2_kc2au_/ramdisk/ramdisk.cpio.gz.uboot'.
1035 08:13:15.083381 Load address: 0x8000000
1036 08:13:18.390379 Loading: *################ UDP wrong checksum 000000ff 0000173e
1037 08:13:18.431589 UDP wrong checksum 000000ff 0000b330
1038 08:13:21.380415 T #################### UDP wrong checksum 000000ff 0000840f
1039 08:13:21.432931 # UDP wrong checksum 000000ff 00000a02
1040 08:13:21.924596 ############ UDP wrong checksum 00000005 0000a494
1041 08:13:26.925439 T UDP wrong checksum 00000005 0000a494
1042 08:13:36.927603 T T UDP wrong checksum 00000005 0000a494
1043 08:13:40.441540 UDP wrong checksum 000000ff 00003ed3
1044 08:13:40.445685 UDP wrong checksum 000000ff 0000cbc5
1045 08:13:44.192552 T UDP wrong checksum 000000ff 0000ebe5
1046 08:13:44.252126 UDP wrong checksum 000000ff 000086d8
1047 08:13:56.931660 T T T UDP wrong checksum 00000005 0000a494
1048 08:13:58.840833 UDP wrong checksum 000000ff 00006f63
1049 08:13:58.892524 UDP wrong checksum 000000ff 0000f955
1050 08:13:59.141070 UDP wrong checksum 000000ff 0000dd27
1051 08:13:59.206451 UDP wrong checksum 000000ff 0000681a
1052 08:14:09.931834 T T UDP wrong checksum 000000ff 0000767a
1053 08:14:09.939326 UDP wrong checksum 000000ff 0000ff6c
1054 08:14:11.935655
1055 08:14:11.936384 Retry count exceeded; starting again
1057 08:14:11.937962 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1060 08:14:11.940039 end: 2.4 uboot-commands (duration 00:01:47) [common]
1062 08:14:11.941576 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1064 08:14:11.942748 end: 2 uboot-action (duration 00:01:47) [common]
1066 08:14:11.944515 Cleaning after the job
1067 08:14:11.945146 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/ramdisk
1068 08:14:11.946540 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/kernel
1069 08:14:11.976046 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/dtb
1070 08:14:11.977550 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/nfsrootfs
1071 08:14:12.009878 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974115/tftp-deploy-2_kc2au_/modules
1072 08:14:12.016254 start: 4.1 power-off (timeout 00:00:30) [common]
1073 08:14:12.016898 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1074 08:14:12.050772 >> OK - accepted request
1075 08:14:12.053048 Returned 0 in 0 seconds
1076 08:14:12.153855 end: 4.1 power-off (duration 00:00:00) [common]
1078 08:14:12.154845 start: 4.2 read-feedback (timeout 00:10:00) [common]
1079 08:14:12.155497 Listened to connection for namespace 'common' for up to 1s
1080 08:14:13.156498 Finalising connection for namespace 'common'
1081 08:14:13.157259 Disconnecting from shell: Finalise
1082 08:14:13.157825 =>
1083 08:14:13.258862 end: 4.2 read-feedback (duration 00:00:01) [common]
1084 08:14:13.259489 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/974115
1085 08:14:16.474444 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/974115
1086 08:14:16.475066 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.