Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 12:04:36.239030 lava-dispatcher, installed at version: 2024.01
2 12:04:36.239818 start: 0 validate
3 12:04:36.240357 Start time: 2024-11-04 12:04:36.240327+00:00 (UTC)
4 12:04:36.240906 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 12:04:36.241448 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 12:04:36.285207 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 12:04:36.285814 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fulfh%2Fnext%2Fmmc-v6.12-rc3-75-g84185573da38%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 12:04:36.316659 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 12:04:36.317342 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fulfh%2Fnext%2Fmmc-v6.12-rc3-75-g84185573da38%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 12:04:36.347715 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 12:04:36.348291 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 12:04:36.380393 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 12:04:36.380895 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fulfh%2Fnext%2Fmmc-v6.12-rc3-75-g84185573da38%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 12:04:36.419834 validate duration: 0.18
16 12:04:36.420711 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 12:04:36.421030 start: 1.1 download-retry (timeout 00:10:00) [common]
18 12:04:36.421329 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 12:04:36.421892 Not decompressing ramdisk as can be used compressed.
20 12:04:36.422330 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 12:04:36.422601 saving as /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/ramdisk/initrd.cpio.gz
22 12:04:36.422864 total size: 5628182 (5 MB)
23 12:04:36.464297 progress 0 % (0 MB)
24 12:04:36.472053 progress 5 % (0 MB)
25 12:04:36.480286 progress 10 % (0 MB)
26 12:04:36.487509 progress 15 % (0 MB)
27 12:04:36.493767 progress 20 % (1 MB)
28 12:04:36.497472 progress 25 % (1 MB)
29 12:04:36.501658 progress 30 % (1 MB)
30 12:04:36.505878 progress 35 % (1 MB)
31 12:04:36.509666 progress 40 % (2 MB)
32 12:04:36.513782 progress 45 % (2 MB)
33 12:04:36.517529 progress 50 % (2 MB)
34 12:04:36.521688 progress 55 % (2 MB)
35 12:04:36.526011 progress 60 % (3 MB)
36 12:04:36.529805 progress 65 % (3 MB)
37 12:04:36.534010 progress 70 % (3 MB)
38 12:04:36.537774 progress 75 % (4 MB)
39 12:04:36.541848 progress 80 % (4 MB)
40 12:04:36.545558 progress 85 % (4 MB)
41 12:04:36.549731 progress 90 % (4 MB)
42 12:04:36.553727 progress 95 % (5 MB)
43 12:04:36.557049 progress 100 % (5 MB)
44 12:04:36.557710 5 MB downloaded in 0.13 s (39.81 MB/s)
45 12:04:36.558256 end: 1.1.1 http-download (duration 00:00:00) [common]
47 12:04:36.559129 end: 1.1 download-retry (duration 00:00:00) [common]
48 12:04:36.559420 start: 1.2 download-retry (timeout 00:10:00) [common]
49 12:04:36.559688 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 12:04:36.560168 downloading http://storage.kernelci.org/ulfh/next/mmc-v6.12-rc3-75-g84185573da38/arm64/defconfig/gcc-12/kernel/Image
51 12:04:36.560423 saving as /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/kernel/Image
52 12:04:36.560630 total size: 45713920 (43 MB)
53 12:04:36.560838 No compression specified
54 12:04:36.600866 progress 0 % (0 MB)
55 12:04:36.630098 progress 5 % (2 MB)
56 12:04:36.658359 progress 10 % (4 MB)
57 12:04:36.686485 progress 15 % (6 MB)
58 12:04:36.714635 progress 20 % (8 MB)
59 12:04:36.742356 progress 25 % (10 MB)
60 12:04:36.770307 progress 30 % (13 MB)
61 12:04:36.798315 progress 35 % (15 MB)
62 12:04:36.826428 progress 40 % (17 MB)
63 12:04:36.854457 progress 45 % (19 MB)
64 12:04:36.882857 progress 50 % (21 MB)
65 12:04:36.911208 progress 55 % (24 MB)
66 12:04:36.939590 progress 60 % (26 MB)
67 12:04:36.967535 progress 65 % (28 MB)
68 12:04:36.995938 progress 70 % (30 MB)
69 12:04:37.026610 progress 75 % (32 MB)
70 12:04:37.054790 progress 80 % (34 MB)
71 12:04:37.082920 progress 85 % (37 MB)
72 12:04:37.111023 progress 90 % (39 MB)
73 12:04:37.139533 progress 95 % (41 MB)
74 12:04:37.167002 progress 100 % (43 MB)
75 12:04:37.167512 43 MB downloaded in 0.61 s (71.84 MB/s)
76 12:04:37.168002 end: 1.2.1 http-download (duration 00:00:01) [common]
78 12:04:37.168826 end: 1.2 download-retry (duration 00:00:01) [common]
79 12:04:37.169099 start: 1.3 download-retry (timeout 00:09:59) [common]
80 12:04:37.169365 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 12:04:37.169826 downloading http://storage.kernelci.org/ulfh/next/mmc-v6.12-rc3-75-g84185573da38/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 12:04:37.170107 saving as /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/dtb/meson-g12b-a311d-libretech-cc.dtb
83 12:04:37.170316 total size: 54703 (0 MB)
84 12:04:37.170520 No compression specified
85 12:04:37.213003 progress 59 % (0 MB)
86 12:04:37.213872 progress 100 % (0 MB)
87 12:04:37.214446 0 MB downloaded in 0.04 s (1.18 MB/s)
88 12:04:37.214938 end: 1.3.1 http-download (duration 00:00:00) [common]
90 12:04:37.215771 end: 1.3 download-retry (duration 00:00:00) [common]
91 12:04:37.216085 start: 1.4 download-retry (timeout 00:09:59) [common]
92 12:04:37.216366 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 12:04:37.216819 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 12:04:37.217060 saving as /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/nfsrootfs/full.rootfs.tar
95 12:04:37.217265 total size: 107552908 (102 MB)
96 12:04:37.217479 Using unxz to decompress xz
97 12:04:37.250327 progress 0 % (0 MB)
98 12:04:37.941843 progress 5 % (5 MB)
99 12:04:38.694949 progress 10 % (10 MB)
100 12:04:39.519131 progress 15 % (15 MB)
101 12:04:40.329361 progress 20 % (20 MB)
102 12:04:40.926183 progress 25 % (25 MB)
103 12:04:41.569073 progress 30 % (30 MB)
104 12:04:42.324028 progress 35 % (35 MB)
105 12:04:42.689519 progress 40 % (41 MB)
106 12:04:43.134550 progress 45 % (46 MB)
107 12:04:43.878100 progress 50 % (51 MB)
108 12:04:44.564869 progress 55 % (56 MB)
109 12:04:45.324196 progress 60 % (61 MB)
110 12:04:46.088395 progress 65 % (66 MB)
111 12:04:46.842170 progress 70 % (71 MB)
112 12:04:47.631146 progress 75 % (76 MB)
113 12:04:48.335924 progress 80 % (82 MB)
114 12:04:49.048134 progress 85 % (87 MB)
115 12:04:49.797781 progress 90 % (92 MB)
116 12:04:50.519065 progress 95 % (97 MB)
117 12:04:51.271296 progress 100 % (102 MB)
118 12:04:51.284610 102 MB downloaded in 14.07 s (7.29 MB/s)
119 12:04:51.285228 end: 1.4.1 http-download (duration 00:00:14) [common]
121 12:04:51.286084 end: 1.4 download-retry (duration 00:00:14) [common]
122 12:04:51.286357 start: 1.5 download-retry (timeout 00:09:45) [common]
123 12:04:51.286619 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 12:04:51.287208 downloading http://storage.kernelci.org/ulfh/next/mmc-v6.12-rc3-75-g84185573da38/arm64/defconfig/gcc-12/modules.tar.xz
125 12:04:51.287479 saving as /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/modules/modules.tar
126 12:04:51.287686 total size: 11606276 (11 MB)
127 12:04:51.287899 Using unxz to decompress xz
128 12:04:51.326467 progress 0 % (0 MB)
129 12:04:51.394157 progress 5 % (0 MB)
130 12:04:51.471376 progress 10 % (1 MB)
131 12:04:51.571227 progress 15 % (1 MB)
132 12:04:51.664345 progress 20 % (2 MB)
133 12:04:51.744157 progress 25 % (2 MB)
134 12:04:51.821786 progress 30 % (3 MB)
135 12:04:51.897494 progress 35 % (3 MB)
136 12:04:51.975625 progress 40 % (4 MB)
137 12:04:52.054283 progress 45 % (5 MB)
138 12:04:52.140174 progress 50 % (5 MB)
139 12:04:52.219648 progress 55 % (6 MB)
140 12:04:52.306277 progress 60 % (6 MB)
141 12:04:52.387547 progress 65 % (7 MB)
142 12:04:52.466063 progress 70 % (7 MB)
143 12:04:52.552827 progress 75 % (8 MB)
144 12:04:52.638549 progress 80 % (8 MB)
145 12:04:52.723073 progress 85 % (9 MB)
146 12:04:52.802183 progress 90 % (9 MB)
147 12:04:52.880368 progress 95 % (10 MB)
148 12:04:52.957570 progress 100 % (11 MB)
149 12:04:52.969118 11 MB downloaded in 1.68 s (6.58 MB/s)
150 12:04:52.969713 end: 1.5.1 http-download (duration 00:00:02) [common]
152 12:04:52.970553 end: 1.5 download-retry (duration 00:00:02) [common]
153 12:04:52.970829 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 12:04:52.971099 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 12:05:02.985159 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/933935/extract-nfsrootfs-eh1lj2kv
156 12:05:02.985751 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 12:05:02.986045 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 12:05:02.986666 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz
159 12:05:02.987465 makedir: /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin
160 12:05:02.988499 makedir: /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/tests
161 12:05:02.989035 makedir: /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/results
162 12:05:02.989432 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-add-keys
163 12:05:02.990049 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-add-sources
164 12:05:02.990650 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-background-process-start
165 12:05:02.991292 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-background-process-stop
166 12:05:02.991916 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-common-functions
167 12:05:02.992533 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-echo-ipv4
168 12:05:02.993067 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-install-packages
169 12:05:02.993588 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-installed-packages
170 12:05:02.994123 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-os-build
171 12:05:02.994648 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-probe-channel
172 12:05:02.995241 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-probe-ip
173 12:05:02.995780 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-target-ip
174 12:05:02.996379 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-target-mac
175 12:05:02.996896 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-target-storage
176 12:05:02.997441 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-test-case
177 12:05:02.997934 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-test-event
178 12:05:02.998482 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-test-feedback
179 12:05:02.999035 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-test-raise
180 12:05:02.999578 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-test-reference
181 12:05:03.000203 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-test-runner
182 12:05:03.000788 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-test-set
183 12:05:03.001317 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-test-shell
184 12:05:03.001830 Updating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-install-packages (oe)
185 12:05:03.002392 Updating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/bin/lava-installed-packages (oe)
186 12:05:03.002865 Creating /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/environment
187 12:05:03.003292 LAVA metadata
188 12:05:03.003607 - LAVA_JOB_ID=933935
189 12:05:03.003834 - LAVA_DISPATCHER_IP=192.168.6.2
190 12:05:03.004303 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 12:05:03.006004 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 12:05:03.006459 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 12:05:03.006681 skipped lava-vland-overlay
194 12:05:03.006929 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 12:05:03.007187 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 12:05:03.007415 skipped lava-multinode-overlay
197 12:05:03.007659 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 12:05:03.007915 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 12:05:03.008272 Loading test definitions
200 12:05:03.008594 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 12:05:03.008827 Using /lava-933935 at stage 0
202 12:05:03.010198 uuid=933935_1.6.2.4.1 testdef=None
203 12:05:03.010566 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 12:05:03.010837 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 12:05:03.013928 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 12:05:03.014785 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 12:05:03.017238 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 12:05:03.018086 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 12:05:03.022465 runner path: /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/0/tests/0_dmesg test_uuid 933935_1.6.2.4.1
212 12:05:03.023238 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 12:05:03.024275 Creating lava-test-runner.conf files
215 12:05:03.024531 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/933935/lava-overlay-zdrir3iz/lava-933935/0 for stage 0
216 12:05:03.024962 - 0_dmesg
217 12:05:03.025466 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 12:05:03.025861 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 12:05:03.056854 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 12:05:03.057412 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 12:05:03.057749 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 12:05:03.058089 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 12:05:03.058418 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 12:05:03.681576 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 12:05:03.682032 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 12:05:03.682311 extracting modules file /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933935/extract-nfsrootfs-eh1lj2kv
227 12:05:05.081975 extracting modules file /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933935/extract-overlay-ramdisk-tr5p8e1h/ramdisk
228 12:05:06.552029 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 12:05:06.552475 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 12:05:06.552800 [common] Applying overlay to NFS
231 12:05:06.553051 [common] Applying overlay /var/lib/lava/dispatcher/tmp/933935/compress-overlay-461dzeol/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/933935/extract-nfsrootfs-eh1lj2kv
232 12:05:06.584611 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 12:05:06.584988 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 12:05:06.585389 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 12:05:06.585629 Converting downloaded kernel to a uImage
236 12:05:06.585935 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/kernel/Image /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/kernel/uImage
237 12:05:07.039415 output: Image Name:
238 12:05:07.039828 output: Created: Mon Nov 4 12:05:06 2024
239 12:05:07.040068 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 12:05:07.040276 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 12:05:07.040478 output: Load Address: 01080000
242 12:05:07.040677 output: Entry Point: 01080000
243 12:05:07.040874 output:
244 12:05:07.041205 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 12:05:07.041473 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 12:05:07.041741 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 12:05:07.041994 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 12:05:07.042253 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 12:05:07.042508 Building ramdisk /var/lib/lava/dispatcher/tmp/933935/extract-overlay-ramdisk-tr5p8e1h/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/933935/extract-overlay-ramdisk-tr5p8e1h/ramdisk
250 12:05:09.292904 >> 166781 blocks
251 12:05:17.026585 Adding RAMdisk u-boot header.
252 12:05:17.027241 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/933935/extract-overlay-ramdisk-tr5p8e1h/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/933935/extract-overlay-ramdisk-tr5p8e1h/ramdisk.cpio.gz.uboot
253 12:05:17.274699 output: Image Name:
254 12:05:17.275120 output: Created: Mon Nov 4 12:05:17 2024
255 12:05:17.275333 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 12:05:17.275540 output: Data Size: 23428273 Bytes = 22879.17 KiB = 22.34 MiB
257 12:05:17.275742 output: Load Address: 00000000
258 12:05:17.275940 output: Entry Point: 00000000
259 12:05:17.276353 output:
260 12:05:17.277431 rename /var/lib/lava/dispatcher/tmp/933935/extract-overlay-ramdisk-tr5p8e1h/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/ramdisk/ramdisk.cpio.gz.uboot
261 12:05:17.278201 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 12:05:17.278798 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 12:05:17.279380 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 12:05:17.279896 No LXC device requested
265 12:05:17.280494 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 12:05:17.281069 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 12:05:17.281615 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 12:05:17.282070 Checking files for TFTP limit of 4294967296 bytes.
269 12:05:17.285036 end: 1 tftp-deploy (duration 00:00:41) [common]
270 12:05:17.285671 start: 2 uboot-action (timeout 00:05:00) [common]
271 12:05:17.286253 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 12:05:17.286807 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 12:05:17.287364 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 12:05:17.287946 Using kernel file from prepare-kernel: 933935/tftp-deploy-44sw9ue_/kernel/uImage
275 12:05:17.288677 substitutions:
276 12:05:17.289127 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 12:05:17.289573 - {DTB_ADDR}: 0x01070000
278 12:05:17.290011 - {DTB}: 933935/tftp-deploy-44sw9ue_/dtb/meson-g12b-a311d-libretech-cc.dtb
279 12:05:17.290450 - {INITRD}: 933935/tftp-deploy-44sw9ue_/ramdisk/ramdisk.cpio.gz.uboot
280 12:05:17.290888 - {KERNEL_ADDR}: 0x01080000
281 12:05:17.291323 - {KERNEL}: 933935/tftp-deploy-44sw9ue_/kernel/uImage
282 12:05:17.291758 - {LAVA_MAC}: None
283 12:05:17.292266 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/933935/extract-nfsrootfs-eh1lj2kv
284 12:05:17.292710 - {NFS_SERVER_IP}: 192.168.6.2
285 12:05:17.293143 - {PRESEED_CONFIG}: None
286 12:05:17.293575 - {PRESEED_LOCAL}: None
287 12:05:17.294002 - {RAMDISK_ADDR}: 0x08000000
288 12:05:17.294427 - {RAMDISK}: 933935/tftp-deploy-44sw9ue_/ramdisk/ramdisk.cpio.gz.uboot
289 12:05:17.294855 - {ROOT_PART}: None
290 12:05:17.295283 - {ROOT}: None
291 12:05:17.295712 - {SERVER_IP}: 192.168.6.2
292 12:05:17.296199 - {TEE_ADDR}: 0x83000000
293 12:05:17.296596 - {TEE}: None
294 12:05:17.296985 Parsed boot commands:
295 12:05:17.297361 - setenv autoload no
296 12:05:17.297744 - setenv initrd_high 0xffffffff
297 12:05:17.298127 - setenv fdt_high 0xffffffff
298 12:05:17.298510 - dhcp
299 12:05:17.298891 - setenv serverip 192.168.6.2
300 12:05:17.299272 - tftpboot 0x01080000 933935/tftp-deploy-44sw9ue_/kernel/uImage
301 12:05:17.299655 - tftpboot 0x08000000 933935/tftp-deploy-44sw9ue_/ramdisk/ramdisk.cpio.gz.uboot
302 12:05:17.300070 - tftpboot 0x01070000 933935/tftp-deploy-44sw9ue_/dtb/meson-g12b-a311d-libretech-cc.dtb
303 12:05:17.300504 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/933935/extract-nfsrootfs-eh1lj2kv,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 12:05:17.300944 - bootm 0x01080000 0x08000000 0x01070000
305 12:05:17.301504 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 12:05:17.303142 start: 2.3 connect-device (timeout 00:05:00) [common]
308 12:05:17.303607 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 12:05:17.318785 Setting prompt string to ['lava-test: # ']
310 12:05:17.320457 end: 2.3 connect-device (duration 00:00:00) [common]
311 12:05:17.321135 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 12:05:17.321732 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 12:05:17.322293 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 12:05:17.323537 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 12:05:17.358391 >> OK - accepted request
316 12:05:17.360660 Returned 0 in 0 seconds
317 12:05:17.461855 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 12:05:17.463558 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 12:05:17.464253 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 12:05:17.464829 Setting prompt string to ['Hit any key to stop autoboot']
322 12:05:17.465338 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 12:05:17.467024 Trying 192.168.56.21...
324 12:05:17.467547 Connected to conserv1.
325 12:05:17.468041 Escape character is '^]'.
326 12:05:17.468513
327 12:05:17.468986 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 12:05:17.469459
329 12:05:28.668362 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 12:05:28.669040 bl2_stage_init 0x01
331 12:05:28.669491 bl2_stage_init 0x81
332 12:05:28.673974 hw id: 0x0000 - pwm id 0x01
333 12:05:28.674483 bl2_stage_init 0xc1
334 12:05:28.674921 bl2_stage_init 0x02
335 12:05:28.675350
336 12:05:28.679638 L0:00000000
337 12:05:28.680163 L1:20000703
338 12:05:28.680615 L2:00008067
339 12:05:28.681041 L3:14000000
340 12:05:28.685237 B2:00402000
341 12:05:28.685724 B1:e0f83180
342 12:05:28.686153
343 12:05:28.686581 TE: 58124
344 12:05:28.687010
345 12:05:28.690788 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 12:05:28.691274
347 12:05:28.691708 Board ID = 1
348 12:05:28.696264 Set A53 clk to 24M
349 12:05:28.696747 Set A73 clk to 24M
350 12:05:28.697177 Set clk81 to 24M
351 12:05:28.701845 A53 clk: 1200 MHz
352 12:05:28.702327 A73 clk: 1200 MHz
353 12:05:28.702756 CLK81: 166.6M
354 12:05:28.703180 smccc: 00012a92
355 12:05:28.707447 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 12:05:28.713054 board id: 1
357 12:05:28.718941 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 12:05:28.729581 fw parse done
359 12:05:28.735592 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 12:05:28.778194 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 12:05:28.789132 PIEI prepare done
362 12:05:28.789619 fastboot data load
363 12:05:28.790056 fastboot data verify
364 12:05:28.794812 verify result: 266
365 12:05:28.800307 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 12:05:28.800777 LPDDR4 probe
367 12:05:28.801199 ddr clk to 1584MHz
368 12:05:28.808331 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 12:05:28.845587
370 12:05:28.846086 dmc_version 0001
371 12:05:28.852235 Check phy result
372 12:05:28.858122 INFO : End of CA training
373 12:05:28.858593 INFO : End of initialization
374 12:05:28.863856 INFO : Training has run successfully!
375 12:05:28.864390 Check phy result
376 12:05:28.869359 INFO : End of initialization
377 12:05:28.869832 INFO : End of read enable training
378 12:05:28.872608 INFO : End of fine write leveling
379 12:05:28.878196 INFO : End of Write leveling coarse delay
380 12:05:28.883764 INFO : Training has run successfully!
381 12:05:28.884265 Check phy result
382 12:05:28.884700 INFO : End of initialization
383 12:05:28.889409 INFO : End of read dq deskew training
384 12:05:28.894938 INFO : End of MPR read delay center optimization
385 12:05:28.895417 INFO : End of write delay center optimization
386 12:05:28.900539 INFO : End of read delay center optimization
387 12:05:28.906130 INFO : End of max read latency training
388 12:05:28.906600 INFO : Training has run successfully!
389 12:05:28.911752 1D training succeed
390 12:05:28.917726 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 12:05:28.965266 Check phy result
392 12:05:28.965758 INFO : End of initialization
393 12:05:28.986917 INFO : End of 2D read delay Voltage center optimization
394 12:05:29.007075 INFO : End of 2D read delay Voltage center optimization
395 12:05:29.058959 INFO : End of 2D write delay Voltage center optimization
396 12:05:29.108354 INFO : End of 2D write delay Voltage center optimization
397 12:05:29.113989 INFO : Training has run successfully!
398 12:05:29.114464
399 12:05:29.114902 channel==0
400 12:05:29.119380 RxClkDly_Margin_A0==78 ps 8
401 12:05:29.119853 TxDqDly_Margin_A0==98 ps 10
402 12:05:29.122801 RxClkDly_Margin_A1==88 ps 9
403 12:05:29.123271 TxDqDly_Margin_A1==98 ps 10
404 12:05:29.128346 TrainedVREFDQ_A0==74
405 12:05:29.128826 TrainedVREFDQ_A1==74
406 12:05:29.129264 VrefDac_Margin_A0==25
407 12:05:29.133930 DeviceVref_Margin_A0==40
408 12:05:29.134398 VrefDac_Margin_A1==25
409 12:05:29.139540 DeviceVref_Margin_A1==40
410 12:05:29.140040
411 12:05:29.140479
412 12:05:29.140911 channel==1
413 12:05:29.141335 RxClkDly_Margin_A0==98 ps 10
414 12:05:29.145195 TxDqDly_Margin_A0==98 ps 10
415 12:05:29.145670 RxClkDly_Margin_A1==88 ps 9
416 12:05:29.150720 TxDqDly_Margin_A1==98 ps 10
417 12:05:29.151196 TrainedVREFDQ_A0==77
418 12:05:29.151629 TrainedVREFDQ_A1==78
419 12:05:29.156364 VrefDac_Margin_A0==23
420 12:05:29.156848 DeviceVref_Margin_A0==37
421 12:05:29.161923 VrefDac_Margin_A1==24
422 12:05:29.162391 DeviceVref_Margin_A1==36
423 12:05:29.162819
424 12:05:29.167543 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 12:05:29.168044
426 12:05:29.195456 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 12:05:29.201147 2D training succeed
428 12:05:29.206622 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 12:05:29.207100 auto size-- 65535DDR cs0 size: 2048MB
430 12:05:29.212223 DDR cs1 size: 2048MB
431 12:05:29.212714 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 12:05:29.217864 cs0 DataBus test pass
433 12:05:29.218340 cs1 DataBus test pass
434 12:05:29.218769 cs0 AddrBus test pass
435 12:05:29.223365 cs1 AddrBus test pass
436 12:05:29.223842
437 12:05:29.224325 100bdlr_step_size ps== 420
438 12:05:29.224763 result report
439 12:05:29.229120 boot times 0Enable ddr reg access
440 12:05:29.236717 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 12:05:29.250192 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 12:05:29.822260 0.0;M3 CHK:0;cm4_sp_mode 0
443 12:05:29.822829 MVN_1=0x00000000
444 12:05:29.827658 MVN_2=0x00000000
445 12:05:29.833425 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 12:05:29.833921 OPS=0x10
447 12:05:29.834361 ring efuse init
448 12:05:29.834788 chipver efuse init
449 12:05:29.839026 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 12:05:29.844609 [0.018961 Inits done]
451 12:05:29.845098 secure task start!
452 12:05:29.845530 high task start!
453 12:05:29.849223 low task start!
454 12:05:29.849695 run into bl31
455 12:05:29.855831 NOTICE: BL31: v1.3(release):4fc40b1
456 12:05:29.863623 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 12:05:29.864152 NOTICE: BL31: G12A normal boot!
458 12:05:29.889002 NOTICE: BL31: BL33 decompress pass
459 12:05:29.894696 ERROR: Error initializing runtime service opteed_fast
460 12:05:31.127662
461 12:05:31.128397
462 12:05:31.136100 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 12:05:31.136600
464 12:05:31.137037 Model: Libre Computer AML-A311D-CC Alta
465 12:05:31.344509 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 12:05:31.367812 DRAM: 2 GiB (effective 3.8 GiB)
467 12:05:31.510825 Core: 408 devices, 31 uclasses, devicetree: separate
468 12:05:31.516700 WDT: Not starting watchdog@f0d0
469 12:05:31.548910 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 12:05:31.561380 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 12:05:31.566471 ** Bad device specification mmc 0 **
472 12:05:31.576685 Card did not respond to voltage select! : -110
473 12:05:31.584464 ** Bad device specification mmc 0 **
474 12:05:31.584937 Couldn't find partition mmc 0
475 12:05:31.592687 Card did not respond to voltage select! : -110
476 12:05:31.598197 ** Bad device specification mmc 0 **
477 12:05:31.598671 Couldn't find partition mmc 0
478 12:05:31.603254 Error: could not access storage.
479 12:05:32.868809 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 12:05:32.869485 bl2_stage_init 0x81
481 12:05:32.874399 hw id: 0x0000 - pwm id 0x01
482 12:05:32.874908 bl2_stage_init 0xc1
483 12:05:32.875358 bl2_stage_init 0x02
484 12:05:32.875797
485 12:05:32.880013 L0:00000000
486 12:05:32.880519 L1:20000703
487 12:05:32.880965 L2:00008067
488 12:05:32.881405 L3:14000000
489 12:05:32.881840 B2:00402000
490 12:05:32.882786 B1:e0f83180
491 12:05:32.883273
492 12:05:32.883722 TE: 58150
493 12:05:32.884201
494 12:05:32.893946 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 12:05:32.894444
496 12:05:32.894893 Board ID = 1
497 12:05:32.895334 Set A53 clk to 24M
498 12:05:32.895769 Set A73 clk to 24M
499 12:05:32.899593 Set clk81 to 24M
500 12:05:32.900117 A53 clk: 1200 MHz
501 12:05:32.900568 A73 clk: 1200 MHz
502 12:05:32.905207 CLK81: 166.6M
503 12:05:32.905711 smccc: 00012aac
504 12:05:32.910756 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 12:05:32.911240 board id: 1
506 12:05:32.919347 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 12:05:32.930016 fw parse done
508 12:05:32.936022 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 12:05:32.978643 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 12:05:32.989598 PIEI prepare done
511 12:05:32.990104 fastboot data load
512 12:05:32.990557 fastboot data verify
513 12:05:32.995244 verify result: 266
514 12:05:33.000857 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 12:05:33.001343 LPDDR4 probe
516 12:05:33.001790 ddr clk to 1584MHz
517 12:05:33.008791 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 12:05:33.045981
519 12:05:33.046463 dmc_version 0001
520 12:05:33.052748 Check phy result
521 12:05:33.058655 INFO : End of CA training
522 12:05:33.059141 INFO : End of initialization
523 12:05:33.064231 INFO : Training has run successfully!
524 12:05:33.064708 Check phy result
525 12:05:33.069745 INFO : End of initialization
526 12:05:33.070220 INFO : End of read enable training
527 12:05:33.075358 INFO : End of fine write leveling
528 12:05:33.080958 INFO : End of Write leveling coarse delay
529 12:05:33.081436 INFO : Training has run successfully!
530 12:05:33.081881 Check phy result
531 12:05:33.086680 INFO : End of initialization
532 12:05:33.087157 INFO : End of read dq deskew training
533 12:05:33.092197 INFO : End of MPR read delay center optimization
534 12:05:33.097753 INFO : End of write delay center optimization
535 12:05:33.103359 INFO : End of read delay center optimization
536 12:05:33.103845 INFO : End of max read latency training
537 12:05:33.108957 INFO : Training has run successfully!
538 12:05:33.109432 1D training succeed
539 12:05:33.118130 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 12:05:33.165755 Check phy result
541 12:05:33.166243 INFO : End of initialization
542 12:05:33.187456 INFO : End of 2D read delay Voltage center optimization
543 12:05:33.207771 INFO : End of 2D read delay Voltage center optimization
544 12:05:33.259782 INFO : End of 2D write delay Voltage center optimization
545 12:05:33.309135 INFO : End of 2D write delay Voltage center optimization
546 12:05:33.314747 INFO : Training has run successfully!
547 12:05:33.315224
548 12:05:33.315674 channel==0
549 12:05:33.320392 RxClkDly_Margin_A0==78 ps 8
550 12:05:33.320876 TxDqDly_Margin_A0==98 ps 10
551 12:05:33.323741 RxClkDly_Margin_A1==88 ps 9
552 12:05:33.324253 TxDqDly_Margin_A1==98 ps 10
553 12:05:33.329324 TrainedVREFDQ_A0==74
554 12:05:33.329817 TrainedVREFDQ_A1==74
555 12:05:33.330265 VrefDac_Margin_A0==25
556 12:05:33.334849 DeviceVref_Margin_A0==40
557 12:05:33.335325 VrefDac_Margin_A1==25
558 12:05:33.340480 DeviceVref_Margin_A1==40
559 12:05:33.340961
560 12:05:33.341409
561 12:05:33.341847 channel==1
562 12:05:33.342275 RxClkDly_Margin_A0==98 ps 10
563 12:05:33.346055 TxDqDly_Margin_A0==88 ps 9
564 12:05:33.346535 RxClkDly_Margin_A1==98 ps 10
565 12:05:33.351705 TxDqDly_Margin_A1==88 ps 9
566 12:05:33.352242 TrainedVREFDQ_A0==77
567 12:05:33.352691 TrainedVREFDQ_A1==77
568 12:05:33.357262 VrefDac_Margin_A0==22
569 12:05:33.357743 DeviceVref_Margin_A0==37
570 12:05:33.362871 VrefDac_Margin_A1==22
571 12:05:33.363345 DeviceVref_Margin_A1==37
572 12:05:33.363789
573 12:05:33.368501 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 12:05:33.368979
575 12:05:33.396474 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
576 12:05:33.402070 2D training succeed
577 12:05:33.407717 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 12:05:33.408247 auto size-- 65535DDR cs0 size: 2048MB
579 12:05:33.413282 DDR cs1 size: 2048MB
580 12:05:33.413813 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 12:05:33.418863 cs0 DataBus test pass
582 12:05:33.419358 cs1 DataBus test pass
583 12:05:33.419809 cs0 AddrBus test pass
584 12:05:33.424507 cs1 AddrBus test pass
585 12:05:33.425001
586 12:05:33.425449 100bdlr_step_size ps== 420
587 12:05:33.425901 result report
588 12:05:33.430102 boot times 0Enable ddr reg access
589 12:05:33.437816 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 12:05:33.451185 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 12:05:34.024792 0.0;M3 CHK:0;cm4_sp_mode 0
592 12:05:34.025315 MVN_1=0x00000000
593 12:05:34.030305 MVN_2=0x00000000
594 12:05:34.036079 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 12:05:34.036596 OPS=0x10
596 12:05:34.037069 ring efuse init
597 12:05:34.037525 chipver efuse init
598 12:05:34.044370 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 12:05:34.044896 [0.018961 Inits done]
600 12:05:34.045327 secure task start!
601 12:05:34.051840 high task start!
602 12:05:34.052358 low task start!
603 12:05:34.052788 run into bl31
604 12:05:34.058516 NOTICE: BL31: v1.3(release):4fc40b1
605 12:05:34.066262 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 12:05:34.066756 NOTICE: BL31: G12A normal boot!
607 12:05:34.091826 NOTICE: BL31: BL33 decompress pass
608 12:05:34.097374 ERROR: Error initializing runtime service opteed_fast
609 12:05:35.330470
610 12:05:35.331067
611 12:05:35.338782 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 12:05:35.339287
613 12:05:35.339757 Model: Libre Computer AML-A311D-CC Alta
614 12:05:35.547288 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 12:05:35.570669 DRAM: 2 GiB (effective 3.8 GiB)
616 12:05:35.713590 Core: 408 devices, 31 uclasses, devicetree: separate
617 12:05:35.719416 WDT: Not starting watchdog@f0d0
618 12:05:35.751626 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 12:05:35.764123 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 12:05:35.769250 ** Bad device specification mmc 0 **
621 12:05:35.779416 Card did not respond to voltage select! : -110
622 12:05:35.787238 ** Bad device specification mmc 0 **
623 12:05:35.787768 Couldn't find partition mmc 0
624 12:05:35.795491 Card did not respond to voltage select! : -110
625 12:05:35.800960 ** Bad device specification mmc 0 **
626 12:05:35.801473 Couldn't find partition mmc 0
627 12:05:35.806089 Error: could not access storage.
628 12:05:36.148537 Net: eth0: ethernet@ff3f0000
629 12:05:36.149134 starting USB...
630 12:05:36.400384 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 12:05:36.401033 Starting the controller
632 12:05:36.407420 USB XHCI 1.10
633 12:05:38.118868 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 12:05:38.119543 bl2_stage_init 0x01
635 12:05:38.120065 bl2_stage_init 0x81
636 12:05:38.124290 hw id: 0x0000 - pwm id 0x01
637 12:05:38.124817 bl2_stage_init 0xc1
638 12:05:38.125276 bl2_stage_init 0x02
639 12:05:38.125723
640 12:05:38.129965 L0:00000000
641 12:05:38.130482 L1:20000703
642 12:05:38.130933 L2:00008067
643 12:05:38.131375 L3:14000000
644 12:05:38.135542 B2:00402000
645 12:05:38.136081 B1:e0f83180
646 12:05:38.136532
647 12:05:38.136979 TE: 58124
648 12:05:38.137420
649 12:05:38.141229 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 12:05:38.141744
651 12:05:38.142196 Board ID = 1
652 12:05:38.146734 Set A53 clk to 24M
653 12:05:38.147241 Set A73 clk to 24M
654 12:05:38.147688 Set clk81 to 24M
655 12:05:38.152352 A53 clk: 1200 MHz
656 12:05:38.152855 A73 clk: 1200 MHz
657 12:05:38.153299 CLK81: 166.6M
658 12:05:38.153739 smccc: 00012a92
659 12:05:38.158011 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 12:05:38.163525 board id: 1
661 12:05:38.169576 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 12:05:38.180012 fw parse done
663 12:05:38.185912 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 12:05:38.228541 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 12:05:38.239462 PIEI prepare done
666 12:05:38.240009 fastboot data load
667 12:05:38.240479 fastboot data verify
668 12:05:38.245180 verify result: 266
669 12:05:38.250732 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 12:05:38.251233 LPDDR4 probe
671 12:05:38.251680 ddr clk to 1584MHz
672 12:05:38.258657 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 12:05:38.295973
674 12:05:38.296540 dmc_version 0001
675 12:05:38.302691 Check phy result
676 12:05:38.308484 INFO : End of CA training
677 12:05:38.308985 INFO : End of initialization
678 12:05:38.314111 INFO : Training has run successfully!
679 12:05:38.314613 Check phy result
680 12:05:38.319745 INFO : End of initialization
681 12:05:38.320273 INFO : End of read enable training
682 12:05:38.325353 INFO : End of fine write leveling
683 12:05:38.330888 INFO : End of Write leveling coarse delay
684 12:05:38.331390 INFO : Training has run successfully!
685 12:05:38.331837 Check phy result
686 12:05:38.336499 INFO : End of initialization
687 12:05:38.336995 INFO : End of read dq deskew training
688 12:05:38.342092 INFO : End of MPR read delay center optimization
689 12:05:38.347758 INFO : End of write delay center optimization
690 12:05:38.353343 INFO : End of read delay center optimization
691 12:05:38.353843 INFO : End of max read latency training
692 12:05:38.358935 INFO : Training has run successfully!
693 12:05:38.359432 1D training succeed
694 12:05:38.368220 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 12:05:38.415670 Check phy result
696 12:05:38.416243 INFO : End of initialization
697 12:05:38.438212 INFO : End of 2D read delay Voltage center optimization
698 12:05:38.458299 INFO : End of 2D read delay Voltage center optimization
699 12:05:38.510275 INFO : End of 2D write delay Voltage center optimization
700 12:05:38.559577 INFO : End of 2D write delay Voltage center optimization
701 12:05:38.565055 INFO : Training has run successfully!
702 12:05:38.565563
703 12:05:38.566019 channel==0
704 12:05:38.570645 RxClkDly_Margin_A0==88 ps 9
705 12:05:38.571146 TxDqDly_Margin_A0==98 ps 10
706 12:05:38.576226 RxClkDly_Margin_A1==88 ps 9
707 12:05:38.576722 TxDqDly_Margin_A1==98 ps 10
708 12:05:38.577172 TrainedVREFDQ_A0==74
709 12:05:38.581830 TrainedVREFDQ_A1==75
710 12:05:38.582335 VrefDac_Margin_A0==25
711 12:05:38.582780 DeviceVref_Margin_A0==40
712 12:05:38.587550 VrefDac_Margin_A1==25
713 12:05:38.588067 DeviceVref_Margin_A1==39
714 12:05:38.588518
715 12:05:38.588958
716 12:05:38.593032 channel==1
717 12:05:38.593523 RxClkDly_Margin_A0==98 ps 10
718 12:05:38.593967 TxDqDly_Margin_A0==98 ps 10
719 12:05:38.598657 RxClkDly_Margin_A1==98 ps 10
720 12:05:38.599160 TxDqDly_Margin_A1==88 ps 9
721 12:05:38.604230 TrainedVREFDQ_A0==77
722 12:05:38.604731 TrainedVREFDQ_A1==77
723 12:05:38.605179 VrefDac_Margin_A0==22
724 12:05:38.609896 DeviceVref_Margin_A0==37
725 12:05:38.610395 VrefDac_Margin_A1==24
726 12:05:38.615509 DeviceVref_Margin_A1==37
727 12:05:38.616026
728 12:05:38.616482 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 12:05:38.621006
730 12:05:38.649001 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
731 12:05:38.649582 2D training succeed
732 12:05:38.654627 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 12:05:38.660228 auto size-- 65535DDR cs0 size: 2048MB
734 12:05:38.660724 DDR cs1 size: 2048MB
735 12:05:38.665771 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 12:05:38.666267 cs0 DataBus test pass
737 12:05:38.671516 cs1 DataBus test pass
738 12:05:38.672042 cs0 AddrBus test pass
739 12:05:38.672496 cs1 AddrBus test pass
740 12:05:38.672932
741 12:05:38.676988 100bdlr_step_size ps== 420
742 12:05:38.677499 result report
743 12:05:38.682656 boot times 0Enable ddr reg access
744 12:05:38.688067 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 12:05:38.701584 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 12:05:39.273455 0.0;M3 CHK:0;cm4_sp_mode 0
747 12:05:39.274071 MVN_1=0x00000000
748 12:05:39.279079 MVN_2=0x00000000
749 12:05:39.284835 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 12:05:39.285383 OPS=0x10
751 12:05:39.285816 ring efuse init
752 12:05:39.286242 chipver efuse init
753 12:05:39.290451 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 12:05:39.296098 [0.018960 Inits done]
755 12:05:39.296607 secure task start!
756 12:05:39.297040 high task start!
757 12:05:39.300757 low task start!
758 12:05:39.301247 run into bl31
759 12:05:39.307313 NOTICE: BL31: v1.3(release):4fc40b1
760 12:05:39.314997 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 12:05:39.315500 NOTICE: BL31: G12A normal boot!
762 12:05:39.340361 NOTICE: BL31: BL33 decompress pass
763 12:05:39.345134 ERROR: Error initializing runtime service opteed_fast
764 12:05:40.578910
765 12:05:40.579551
766 12:05:40.587328 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 12:05:40.587840
768 12:05:40.588328 Model: Libre Computer AML-A311D-CC Alta
769 12:05:40.795863 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 12:05:40.819135 DRAM: 2 GiB (effective 3.8 GiB)
771 12:05:40.962287 Core: 408 devices, 31 uclasses, devicetree: separate
772 12:05:40.967969 WDT: Not starting watchdog@f0d0
773 12:05:41.000266 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 12:05:41.012778 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 12:05:41.017724 ** Bad device specification mmc 0 **
776 12:05:41.027952 Card did not respond to voltage select! : -110
777 12:05:41.035732 ** Bad device specification mmc 0 **
778 12:05:41.036270 Couldn't find partition mmc 0
779 12:05:41.043930 Card did not respond to voltage select! : -110
780 12:05:41.049523 ** Bad device specification mmc 0 **
781 12:05:41.050042 Couldn't find partition mmc 0
782 12:05:41.054609 Error: could not access storage.
783 12:05:41.398209 Net: eth0: ethernet@ff3f0000
784 12:05:41.398863 starting USB...
785 12:05:41.649905 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 12:05:41.650357 Starting the controller
787 12:05:41.656852 USB XHCI 1.10
788 12:05:43.820224 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 12:05:43.820886 bl2_stage_init 0x01
790 12:05:43.821351 bl2_stage_init 0x81
791 12:05:43.825857 hw id: 0x0000 - pwm id 0x01
792 12:05:43.826352 bl2_stage_init 0xc1
793 12:05:43.826806 bl2_stage_init 0x02
794 12:05:43.827249
795 12:05:43.831396 L0:00000000
796 12:05:43.831886 L1:20000703
797 12:05:43.832377 L2:00008067
798 12:05:43.832826 L3:14000000
799 12:05:43.834393 B2:00402000
800 12:05:43.834878 B1:e0f83180
801 12:05:43.835322
802 12:05:43.835763 TE: 58124
803 12:05:43.836248
804 12:05:43.845546 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 12:05:43.846046
806 12:05:43.846497 Board ID = 1
807 12:05:43.846935 Set A53 clk to 24M
808 12:05:43.847367 Set A73 clk to 24M
809 12:05:43.851224 Set clk81 to 24M
810 12:05:43.851711 A53 clk: 1200 MHz
811 12:05:43.852194 A73 clk: 1200 MHz
812 12:05:43.854654 CLK81: 166.6M
813 12:05:43.855133 smccc: 00012a92
814 12:05:43.860231 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 12:05:43.865930 board id: 1
816 12:05:43.871092 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 12:05:43.881453 fw parse done
818 12:05:43.887454 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 12:05:43.930183 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 12:05:43.941112 PIEI prepare done
821 12:05:43.941628 fastboot data load
822 12:05:43.942081 fastboot data verify
823 12:05:43.946673 verify result: 266
824 12:05:43.952306 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 12:05:43.952809 LPDDR4 probe
826 12:05:43.953258 ddr clk to 1584MHz
827 12:05:43.960333 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 12:05:43.997582
829 12:05:43.998126 dmc_version 0001
830 12:05:44.004317 Check phy result
831 12:05:44.010132 INFO : End of CA training
832 12:05:44.010647 INFO : End of initialization
833 12:05:44.015726 INFO : Training has run successfully!
834 12:05:44.016289 Check phy result
835 12:05:44.021302 INFO : End of initialization
836 12:05:44.021807 INFO : End of read enable training
837 12:05:44.024618 INFO : End of fine write leveling
838 12:05:44.030287 INFO : End of Write leveling coarse delay
839 12:05:44.035849 INFO : Training has run successfully!
840 12:05:44.036383 Check phy result
841 12:05:44.036832 INFO : End of initialization
842 12:05:44.041476 INFO : End of read dq deskew training
843 12:05:44.047079 INFO : End of MPR read delay center optimization
844 12:05:44.047580 INFO : End of write delay center optimization
845 12:05:44.052653 INFO : End of read delay center optimization
846 12:05:44.058273 INFO : End of max read latency training
847 12:05:44.058774 INFO : Training has run successfully!
848 12:05:44.063868 1D training succeed
849 12:05:44.069762 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 12:05:44.117329 Check phy result
851 12:05:44.117871 INFO : End of initialization
852 12:05:44.138856 INFO : End of 2D read delay Voltage center optimization
853 12:05:44.159045 INFO : End of 2D read delay Voltage center optimization
854 12:05:44.210385 INFO : End of 2D write delay Voltage center optimization
855 12:05:44.260193 INFO : End of 2D write delay Voltage center optimization
856 12:05:44.265735 INFO : Training has run successfully!
857 12:05:44.266235
858 12:05:44.266686 channel==0
859 12:05:44.271357 RxClkDly_Margin_A0==88 ps 9
860 12:05:44.271865 TxDqDly_Margin_A0==98 ps 10
861 12:05:44.276806 RxClkDly_Margin_A1==88 ps 9
862 12:05:44.277066 TxDqDly_Margin_A1==98 ps 10
863 12:05:44.277285 TrainedVREFDQ_A0==74
864 12:05:44.282566 TrainedVREFDQ_A1==74
865 12:05:44.283097 VrefDac_Margin_A0==25
866 12:05:44.283551 DeviceVref_Margin_A0==40
867 12:05:44.288105 VrefDac_Margin_A1==25
868 12:05:44.288614 DeviceVref_Margin_A1==40
869 12:05:44.289043
870 12:05:44.289467
871 12:05:44.293654 channel==1
872 12:05:44.294185 RxClkDly_Margin_A0==98 ps 10
873 12:05:44.294613 TxDqDly_Margin_A0==98 ps 10
874 12:05:44.299326 RxClkDly_Margin_A1==88 ps 9
875 12:05:44.299827 TxDqDly_Margin_A1==88 ps 9
876 12:05:44.304867 TrainedVREFDQ_A0==77
877 12:05:44.305367 TrainedVREFDQ_A1==77
878 12:05:44.305805 VrefDac_Margin_A0==22
879 12:05:44.310568 DeviceVref_Margin_A0==37
880 12:05:44.311055 VrefDac_Margin_A1==24
881 12:05:44.316015 DeviceVref_Margin_A1==37
882 12:05:44.316487
883 12:05:44.316916 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 12:05:44.317343
885 12:05:44.349517 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
886 12:05:44.350022 2D training succeed
887 12:05:44.355191 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 12:05:44.360892 auto size-- 65535DDR cs0 size: 2048MB
889 12:05:44.361358 DDR cs1 size: 2048MB
890 12:05:44.366350 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 12:05:44.366807 cs0 DataBus test pass
892 12:05:44.371907 cs1 DataBus test pass
893 12:05:44.372400 cs0 AddrBus test pass
894 12:05:44.372829 cs1 AddrBus test pass
895 12:05:44.373249
896 12:05:44.377553 100bdlr_step_size ps== 420
897 12:05:44.378017 result report
898 12:05:44.383206 boot times 0Enable ddr reg access
899 12:05:44.388509 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 12:05:44.402397 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 12:05:44.974008 0.0;M3 CHK:0;cm4_sp_mode 0
902 12:05:44.974658 MVN_1=0x00000000
903 12:05:44.979422 MVN_2=0x00000000
904 12:05:44.985248 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 12:05:44.985735 OPS=0x10
906 12:05:44.986183 ring efuse init
907 12:05:44.986623 chipver efuse init
908 12:05:44.993469 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 12:05:44.993960 [0.018961 Inits done]
910 12:05:44.994403 secure task start!
911 12:05:45.000952 high task start!
912 12:05:45.001427 low task start!
913 12:05:45.001872 run into bl31
914 12:05:45.007593 NOTICE: BL31: v1.3(release):4fc40b1
915 12:05:45.015399 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 12:05:45.015896 NOTICE: BL31: G12A normal boot!
917 12:05:45.040761 NOTICE: BL31: BL33 decompress pass
918 12:05:45.046907 ERROR: Error initializing runtime service opteed_fast
919 12:05:46.279442
920 12:05:46.280113
921 12:05:46.287773 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 12:05:46.288294
923 12:05:46.288749 Model: Libre Computer AML-A311D-CC Alta
924 12:05:46.496219 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 12:05:46.519607 DRAM: 2 GiB (effective 3.8 GiB)
926 12:05:46.662620 Core: 408 devices, 31 uclasses, devicetree: separate
927 12:05:46.668567 WDT: Not starting watchdog@f0d0
928 12:05:46.700703 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 12:05:46.713163 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 12:05:46.718187 ** Bad device specification mmc 0 **
931 12:05:46.728513 Card did not respond to voltage select! : -110
932 12:05:46.736213 ** Bad device specification mmc 0 **
933 12:05:46.736689 Couldn't find partition mmc 0
934 12:05:46.744494 Card did not respond to voltage select! : -110
935 12:05:46.750150 ** Bad device specification mmc 0 **
936 12:05:46.750623 Couldn't find partition mmc 0
937 12:05:46.755012 Error: could not access storage.
938 12:05:47.097704 Net: eth0: ethernet@ff3f0000
939 12:05:47.098492 starting USB...
940 12:05:47.349387 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 12:05:47.350045 Starting the controller
942 12:05:47.356297 USB XHCI 1.10
943 12:05:48.910699 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 12:05:48.918893 scanning usb for storage devices... 0 Storage Device(s) found
946 12:05:48.970547 Hit any key to stop autoboot: 1
947 12:05:48.971394 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 12:05:48.972072 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 12:05:48.972608 Setting prompt string to ['=>']
950 12:05:48.973143 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 12:05:48.986290 0
952 12:05:48.987214 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 12:05:48.987757 Sending with 10 millisecond of delay
955 12:05:50.122582 => setenv autoload no
956 12:05:50.133399 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 12:05:50.138804 setenv autoload no
958 12:05:50.139572 Sending with 10 millisecond of delay
960 12:05:51.936501 => setenv initrd_high 0xffffffff
961 12:05:51.947333 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 12:05:51.948256 setenv initrd_high 0xffffffff
963 12:05:51.949027 Sending with 10 millisecond of delay
965 12:05:53.565475 => setenv fdt_high 0xffffffff
966 12:05:53.576281 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 12:05:53.577122 setenv fdt_high 0xffffffff
968 12:05:53.577880 Sending with 10 millisecond of delay
970 12:05:53.869760 => dhcp
971 12:05:53.880534 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 12:05:53.881394 dhcp
973 12:05:53.881866 Speed: 1000, full duplex
974 12:05:53.882318 BOOTP broadcast 1
975 12:05:53.888807 DHCP client bound to address 192.168.6.27 (8 ms)
976 12:05:53.889543 Sending with 10 millisecond of delay
978 12:05:55.565927 => setenv serverip 192.168.6.2
979 12:05:55.576772 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
980 12:05:55.577772 setenv serverip 192.168.6.2
981 12:05:55.578517 Sending with 10 millisecond of delay
983 12:05:59.302865 => tftpboot 0x01080000 933935/tftp-deploy-44sw9ue_/kernel/uImage
984 12:05:59.313706 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 12:05:59.314596 tftpboot 0x01080000 933935/tftp-deploy-44sw9ue_/kernel/uImage
986 12:05:59.315088 Speed: 1000, full duplex
987 12:05:59.315545 Using ethernet@ff3f0000 device
988 12:05:59.316379 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 12:05:59.321892 Filename '933935/tftp-deploy-44sw9ue_/kernel/uImage'.
990 12:05:59.325894 Load address: 0x1080000
991 12:06:02.135870 Loading: *################################################## 43.6 MiB
992 12:06:02.136589 15.5 MiB/s
993 12:06:02.137069 done
994 12:06:02.140211 Bytes transferred = 45713984 (2b98a40 hex)
995 12:06:02.141064 Sending with 10 millisecond of delay
997 12:06:06.833949 => tftpboot 0x08000000 933935/tftp-deploy-44sw9ue_/ramdisk/ramdisk.cpio.gz.uboot
998 12:06:06.844706 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
999 12:06:06.845246 tftpboot 0x08000000 933935/tftp-deploy-44sw9ue_/ramdisk/ramdisk.cpio.gz.uboot
1000 12:06:06.845496 Speed: 1000, full duplex
1001 12:06:06.845707 Using ethernet@ff3f0000 device
1002 12:06:06.847270 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 12:06:06.859070 Filename '933935/tftp-deploy-44sw9ue_/ramdisk/ramdisk.cpio.gz.uboot'.
1004 12:06:06.859400 Load address: 0x8000000
1005 12:06:13.370451 Loading: *#######################T ########################## UDP wrong checksum 00000005 0000c61d
1006 12:06:16.320250 UDP wrong checksum 000000ff 00002038
1007 12:06:16.543709 UDP wrong checksum 000000ff 0000ac2a
1008 12:06:18.372691 T UDP wrong checksum 00000005 0000c61d
1009 12:06:21.233117 UDP wrong checksum 000000ff 00007ded
1010 12:06:21.255276 UDP wrong checksum 000000ff 000013e0
1011 12:06:28.374469 T T UDP wrong checksum 00000005 0000c61d
1012 12:06:48.377168 T T T UDP wrong checksum 00000005 0000c61d
1013 12:07:03.382694 T T T
1014 12:07:03.383349 Retry count exceeded; starting again
1016 12:07:03.385042 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1019 12:07:03.387099 end: 2.4 uboot-commands (duration 00:01:46) [common]
1021 12:07:03.388755 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1023 12:07:03.389862 end: 2 uboot-action (duration 00:01:46) [common]
1025 12:07:03.391533 Cleaning after the job
1026 12:07:03.392156 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/ramdisk
1027 12:07:03.393528 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/kernel
1028 12:07:03.441755 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/dtb
1029 12:07:03.442514 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/nfsrootfs
1030 12:07:03.588898 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933935/tftp-deploy-44sw9ue_/modules
1031 12:07:03.609383 start: 4.1 power-off (timeout 00:00:30) [common]
1032 12:07:03.610016 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1033 12:07:03.644611 >> OK - accepted request
1034 12:07:03.646308 Returned 0 in 0 seconds
1035 12:07:03.747089 end: 4.1 power-off (duration 00:00:00) [common]
1037 12:07:03.748165 start: 4.2 read-feedback (timeout 00:10:00) [common]
1038 12:07:03.748876 Listened to connection for namespace 'common' for up to 1s
1039 12:07:04.749811 Finalising connection for namespace 'common'
1040 12:07:04.750287 Disconnecting from shell: Finalise
1041 12:07:04.750589 =>
1042 12:07:04.851338 end: 4.2 read-feedback (duration 00:00:01) [common]
1043 12:07:04.851977 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/933935
1044 12:07:06.629881 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/933935
1045 12:07:06.630486 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.