Boot log: meson-sm1-s905d3-libretech-cc

    1 12:04:16.704132  lava-dispatcher, installed at version: 2024.01
    2 12:04:16.704966  start: 0 validate
    3 12:04:16.705461  Start time: 2024-11-04 12:04:16.705432+00:00 (UTC)
    4 12:04:16.706022  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 12:04:16.706585  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 12:04:16.747826  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 12:04:16.748413  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fulfh%2Fnext%2Fmmc-v6.12-rc3-75-g84185573da38%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 12:04:16.778214  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 12:04:16.778857  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fulfh%2Fnext%2Fmmc-v6.12-rc3-75-g84185573da38%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 12:04:16.808429  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 12:04:16.808896  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 12:04:16.840469  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 12:04:16.840999  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fulfh%2Fnext%2Fmmc-v6.12-rc3-75-g84185573da38%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 12:04:16.880368  validate duration: 0.18
   16 12:04:16.881282  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 12:04:16.881642  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 12:04:16.882031  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 12:04:16.882716  Not decompressing ramdisk as can be used compressed.
   20 12:04:16.883226  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
   21 12:04:16.883531  saving as /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/ramdisk/initrd.cpio.gz
   22 12:04:16.883843  total size: 5628182 (5 MB)
   23 12:04:16.921039  progress   0 % (0 MB)
   24 12:04:16.925214  progress   5 % (0 MB)
   25 12:04:16.929664  progress  10 % (0 MB)
   26 12:04:16.933353  progress  15 % (0 MB)
   27 12:04:16.937513  progress  20 % (1 MB)
   28 12:04:16.941305  progress  25 % (1 MB)
   29 12:04:16.945490  progress  30 % (1 MB)
   30 12:04:16.949599  progress  35 % (1 MB)
   31 12:04:16.953354  progress  40 % (2 MB)
   32 12:04:16.957476  progress  45 % (2 MB)
   33 12:04:16.961230  progress  50 % (2 MB)
   34 12:04:16.965313  progress  55 % (2 MB)
   35 12:04:16.969429  progress  60 % (3 MB)
   36 12:04:16.973095  progress  65 % (3 MB)
   37 12:04:16.977205  progress  70 % (3 MB)
   38 12:04:16.981942  progress  75 % (4 MB)
   39 12:04:16.986545  progress  80 % (4 MB)
   40 12:04:16.990249  progress  85 % (4 MB)
   41 12:04:16.994389  progress  90 % (4 MB)
   42 12:04:16.998283  progress  95 % (5 MB)
   43 12:04:17.001631  progress 100 % (5 MB)
   44 12:04:17.002308  5 MB downloaded in 0.12 s (45.32 MB/s)
   45 12:04:17.002878  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 12:04:17.003820  end: 1.1 download-retry (duration 00:00:00) [common]
   48 12:04:17.004168  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 12:04:17.004466  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 12:04:17.004957  downloading http://storage.kernelci.org/ulfh/next/mmc-v6.12-rc3-75-g84185573da38/arm64/defconfig/gcc-12/kernel/Image
   51 12:04:17.005216  saving as /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/kernel/Image
   52 12:04:17.005436  total size: 45713920 (43 MB)
   53 12:04:17.005655  No compression specified
   54 12:04:17.046641  progress   0 % (0 MB)
   55 12:04:17.075544  progress   5 % (2 MB)
   56 12:04:17.104683  progress  10 % (4 MB)
   57 12:04:17.133753  progress  15 % (6 MB)
   58 12:04:17.163128  progress  20 % (8 MB)
   59 12:04:17.191461  progress  25 % (10 MB)
   60 12:04:17.220485  progress  30 % (13 MB)
   61 12:04:17.249307  progress  35 % (15 MB)
   62 12:04:17.278239  progress  40 % (17 MB)
   63 12:04:17.306514  progress  45 % (19 MB)
   64 12:04:17.335415  progress  50 % (21 MB)
   65 12:04:17.364267  progress  55 % (24 MB)
   66 12:04:17.393366  progress  60 % (26 MB)
   67 12:04:17.422560  progress  65 % (28 MB)
   68 12:04:17.452471  progress  70 % (30 MB)
   69 12:04:17.482223  progress  75 % (32 MB)
   70 12:04:17.512940  progress  80 % (34 MB)
   71 12:04:17.543101  progress  85 % (37 MB)
   72 12:04:17.572610  progress  90 % (39 MB)
   73 12:04:17.601912  progress  95 % (41 MB)
   74 12:04:17.629714  progress 100 % (43 MB)
   75 12:04:17.630296  43 MB downloaded in 0.62 s (69.77 MB/s)
   76 12:04:17.630788  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 12:04:17.631607  end: 1.2 download-retry (duration 00:00:01) [common]
   79 12:04:17.631883  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 12:04:17.632185  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 12:04:17.632642  downloading http://storage.kernelci.org/ulfh/next/mmc-v6.12-rc3-75-g84185573da38/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 12:04:17.632914  saving as /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 12:04:17.633132  total size: 53209 (0 MB)
   84 12:04:17.633341  No compression specified
   85 12:04:17.668206  progress  61 % (0 MB)
   86 12:04:17.669103  progress 100 % (0 MB)
   87 12:04:17.669666  0 MB downloaded in 0.04 s (1.39 MB/s)
   88 12:04:17.670146  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 12:04:17.670963  end: 1.3 download-retry (duration 00:00:00) [common]
   91 12:04:17.671226  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 12:04:17.671490  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 12:04:17.671945  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
   94 12:04:17.672232  saving as /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/nfsrootfs/full.rootfs.tar
   95 12:04:17.672437  total size: 107552908 (102 MB)
   96 12:04:17.672647  Using unxz to decompress xz
   97 12:04:17.708208  progress   0 % (0 MB)
   98 12:04:18.359163  progress   5 % (5 MB)
   99 12:04:19.086453  progress  10 % (10 MB)
  100 12:04:19.814760  progress  15 % (15 MB)
  101 12:04:20.576618  progress  20 % (20 MB)
  102 12:04:21.147902  progress  25 % (25 MB)
  103 12:04:21.771939  progress  30 % (30 MB)
  104 12:04:22.510020  progress  35 % (35 MB)
  105 12:04:22.855465  progress  40 % (41 MB)
  106 12:04:23.279043  progress  45 % (46 MB)
  107 12:04:23.972800  progress  50 % (51 MB)
  108 12:04:24.660441  progress  55 % (56 MB)
  109 12:04:25.415348  progress  60 % (61 MB)
  110 12:04:26.171253  progress  65 % (66 MB)
  111 12:04:26.905757  progress  70 % (71 MB)
  112 12:04:27.671144  progress  75 % (76 MB)
  113 12:04:28.353046  progress  80 % (82 MB)
  114 12:04:29.069487  progress  85 % (87 MB)
  115 12:04:29.837235  progress  90 % (92 MB)
  116 12:04:30.572288  progress  95 % (97 MB)
  117 12:04:31.315856  progress 100 % (102 MB)
  118 12:04:31.327741  102 MB downloaded in 13.66 s (7.51 MB/s)
  119 12:04:31.328734  end: 1.4.1 http-download (duration 00:00:14) [common]
  121 12:04:31.330499  end: 1.4 download-retry (duration 00:00:14) [common]
  122 12:04:31.331059  start: 1.5 download-retry (timeout 00:09:46) [common]
  123 12:04:31.331619  start: 1.5.1 http-download (timeout 00:09:46) [common]
  124 12:04:31.332664  downloading http://storage.kernelci.org/ulfh/next/mmc-v6.12-rc3-75-g84185573da38/arm64/defconfig/gcc-12/modules.tar.xz
  125 12:04:31.333185  saving as /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/modules/modules.tar
  126 12:04:31.333631  total size: 11606276 (11 MB)
  127 12:04:31.334088  Using unxz to decompress xz
  128 12:04:31.380747  progress   0 % (0 MB)
  129 12:04:31.447625  progress   5 % (0 MB)
  130 12:04:31.521996  progress  10 % (1 MB)
  131 12:04:31.618157  progress  15 % (1 MB)
  132 12:04:31.713633  progress  20 % (2 MB)
  133 12:04:31.794070  progress  25 % (2 MB)
  134 12:04:31.870302  progress  30 % (3 MB)
  135 12:04:31.944934  progress  35 % (3 MB)
  136 12:04:32.022144  progress  40 % (4 MB)
  137 12:04:32.098552  progress  45 % (5 MB)
  138 12:04:32.183529  progress  50 % (5 MB)
  139 12:04:32.260999  progress  55 % (6 MB)
  140 12:04:32.346279  progress  60 % (6 MB)
  141 12:04:32.429041  progress  65 % (7 MB)
  142 12:04:32.507361  progress  70 % (7 MB)
  143 12:04:32.590958  progress  75 % (8 MB)
  144 12:04:32.675654  progress  80 % (8 MB)
  145 12:04:32.756798  progress  85 % (9 MB)
  146 12:04:32.836966  progress  90 % (9 MB)
  147 12:04:32.915091  progress  95 % (10 MB)
  148 12:04:32.992567  progress 100 % (11 MB)
  149 12:04:33.003422  11 MB downloaded in 1.67 s (6.63 MB/s)
  150 12:04:33.004157  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 12:04:33.005998  end: 1.5 download-retry (duration 00:00:02) [common]
  153 12:04:33.006569  start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
  154 12:04:33.007134  start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
  155 12:04:42.926316  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/933891/extract-nfsrootfs-puymdr_w
  156 12:04:42.926921  end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
  157 12:04:42.927212  start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
  158 12:04:42.927921  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3
  159 12:04:42.928450  makedir: /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin
  160 12:04:42.928796  makedir: /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/tests
  161 12:04:42.929127  makedir: /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/results
  162 12:04:42.929467  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-add-keys
  163 12:04:42.930013  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-add-sources
  164 12:04:42.930541  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-background-process-start
  165 12:04:42.931062  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-background-process-stop
  166 12:04:42.931622  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-common-functions
  167 12:04:42.932183  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-echo-ipv4
  168 12:04:42.932706  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-install-packages
  169 12:04:42.933217  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-installed-packages
  170 12:04:42.933737  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-os-build
  171 12:04:42.934241  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-probe-channel
  172 12:04:42.934769  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-probe-ip
  173 12:04:42.935341  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-target-ip
  174 12:04:42.935946  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-target-mac
  175 12:04:42.936544  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-target-storage
  176 12:04:42.937066  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-test-case
  177 12:04:42.937630  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-test-event
  178 12:04:42.938148  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-test-feedback
  179 12:04:42.938716  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-test-raise
  180 12:04:42.939234  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-test-reference
  181 12:04:42.939745  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-test-runner
  182 12:04:42.940298  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-test-set
  183 12:04:42.940814  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-test-shell
  184 12:04:42.941326  Updating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-install-packages (oe)
  185 12:04:42.941957  Updating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/bin/lava-installed-packages (oe)
  186 12:04:42.942452  Creating /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/environment
  187 12:04:42.942863  LAVA metadata
  188 12:04:42.943134  - LAVA_JOB_ID=933891
  189 12:04:42.943352  - LAVA_DISPATCHER_IP=192.168.6.2
  190 12:04:42.943733  start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
  191 12:04:42.944774  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 12:04:42.945118  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
  193 12:04:42.945332  skipped lava-vland-overlay
  194 12:04:42.945577  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 12:04:42.945839  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
  196 12:04:42.946064  skipped lava-multinode-overlay
  197 12:04:42.946313  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 12:04:42.946568  start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
  199 12:04:42.946822  Loading test definitions
  200 12:04:42.947108  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
  201 12:04:42.947333  Using /lava-933891 at stage 0
  202 12:04:42.948618  uuid=933891_1.6.2.4.1 testdef=None
  203 12:04:42.948960  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 12:04:42.949233  start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
  205 12:04:42.951128  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 12:04:42.951937  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
  208 12:04:42.954318  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 12:04:42.955182  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
  211 12:04:42.957514  runner path: /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/0/tests/0_dmesg test_uuid 933891_1.6.2.4.1
  212 12:04:42.958111  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 12:04:42.958884  Creating lava-test-runner.conf files
  215 12:04:42.959088  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/933891/lava-overlay-rsgedzf3/lava-933891/0 for stage 0
  216 12:04:42.959442  - 0_dmesg
  217 12:04:42.959799  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 12:04:42.960112  start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
  219 12:04:42.982317  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 12:04:42.982776  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
  221 12:04:42.983044  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 12:04:42.983315  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 12:04:42.983581  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
  224 12:04:43.710447  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 12:04:43.710934  start: 1.6.4 extract-modules (timeout 00:09:33) [common]
  226 12:04:43.711211  extracting modules file /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933891/extract-nfsrootfs-puymdr_w
  227 12:04:45.091532  extracting modules file /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933891/extract-overlay-ramdisk-we6r90jf/ramdisk
  228 12:04:46.658257  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 12:04:46.658926  start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
  230 12:04:46.659280  [common] Applying overlay to NFS
  231 12:04:46.659543  [common] Applying overlay /var/lib/lava/dispatcher/tmp/933891/compress-overlay-tsk0fnzw/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/933891/extract-nfsrootfs-puymdr_w
  232 12:04:46.699525  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 12:04:46.700108  start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
  234 12:04:46.700469  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
  235 12:04:46.700761  Converting downloaded kernel to a uImage
  236 12:04:46.701147  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/kernel/Image /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/kernel/uImage
  237 12:04:47.163593  output: Image Name:   
  238 12:04:47.164049  output: Created:      Mon Nov  4 12:04:46 2024
  239 12:04:47.164269  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 12:04:47.164475  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  241 12:04:47.164677  output: Load Address: 01080000
  242 12:04:47.164878  output: Entry Point:  01080000
  243 12:04:47.165076  output: 
  244 12:04:47.165415  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  245 12:04:47.165685  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  246 12:04:47.165955  start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
  247 12:04:47.166208  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 12:04:47.166465  start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
  249 12:04:47.166720  Building ramdisk /var/lib/lava/dispatcher/tmp/933891/extract-overlay-ramdisk-we6r90jf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/933891/extract-overlay-ramdisk-we6r90jf/ramdisk
  250 12:04:49.618953  >> 166781 blocks

  251 12:04:57.864785  Adding RAMdisk u-boot header.
  252 12:04:57.865221  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/933891/extract-overlay-ramdisk-we6r90jf/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/933891/extract-overlay-ramdisk-we6r90jf/ramdisk.cpio.gz.uboot
  253 12:04:58.107435  output: Image Name:   
  254 12:04:58.107846  output: Created:      Mon Nov  4 12:04:57 2024
  255 12:04:58.108236  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 12:04:58.108694  output: Data Size:    23425993 Bytes = 22876.95 KiB = 22.34 MiB
  257 12:04:58.109158  output: Load Address: 00000000
  258 12:04:58.109594  output: Entry Point:  00000000
  259 12:04:58.110025  output: 
  260 12:04:58.111156  rename /var/lib/lava/dispatcher/tmp/933891/extract-overlay-ramdisk-we6r90jf/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/ramdisk/ramdisk.cpio.gz.uboot
  261 12:04:58.111925  end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
  262 12:04:58.112563  end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
  263 12:04:58.113143  start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
  264 12:04:58.113656  No LXC device requested
  265 12:04:58.114228  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 12:04:58.114802  start: 1.8 deploy-device-env (timeout 00:09:19) [common]
  267 12:04:58.115349  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 12:04:58.115800  Checking files for TFTP limit of 4294967296 bytes.
  269 12:04:58.118747  end: 1 tftp-deploy (duration 00:00:41) [common]
  270 12:04:58.119375  start: 2 uboot-action (timeout 00:05:00) [common]
  271 12:04:58.119947  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 12:04:58.120530  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 12:04:58.121081  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 12:04:58.121655  Using kernel file from prepare-kernel: 933891/tftp-deploy-0md6eyxq/kernel/uImage
  275 12:04:58.122333  substitutions:
  276 12:04:58.122780  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 12:04:58.123223  - {DTB_ADDR}: 0x01070000
  278 12:04:58.123657  - {DTB}: 933891/tftp-deploy-0md6eyxq/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 12:04:58.124130  - {INITRD}: 933891/tftp-deploy-0md6eyxq/ramdisk/ramdisk.cpio.gz.uboot
  280 12:04:58.124568  - {KERNEL_ADDR}: 0x01080000
  281 12:04:58.124998  - {KERNEL}: 933891/tftp-deploy-0md6eyxq/kernel/uImage
  282 12:04:58.125428  - {LAVA_MAC}: None
  283 12:04:58.125900  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/933891/extract-nfsrootfs-puymdr_w
  284 12:04:58.126336  - {NFS_SERVER_IP}: 192.168.6.2
  285 12:04:58.126763  - {PRESEED_CONFIG}: None
  286 12:04:58.127189  - {PRESEED_LOCAL}: None
  287 12:04:58.127614  - {RAMDISK_ADDR}: 0x08000000
  288 12:04:58.128064  - {RAMDISK}: 933891/tftp-deploy-0md6eyxq/ramdisk/ramdisk.cpio.gz.uboot
  289 12:04:58.128497  - {ROOT_PART}: None
  290 12:04:58.128926  - {ROOT}: None
  291 12:04:58.129353  - {SERVER_IP}: 192.168.6.2
  292 12:04:58.129776  - {TEE_ADDR}: 0x83000000
  293 12:04:58.130199  - {TEE}: None
  294 12:04:58.130625  Parsed boot commands:
  295 12:04:58.131037  - setenv autoload no
  296 12:04:58.131459  - setenv initrd_high 0xffffffff
  297 12:04:58.131882  - setenv fdt_high 0xffffffff
  298 12:04:58.132366  - dhcp
  299 12:04:58.132795  - setenv serverip 192.168.6.2
  300 12:04:58.133220  - tftpboot 0x01080000 933891/tftp-deploy-0md6eyxq/kernel/uImage
  301 12:04:58.133646  - tftpboot 0x08000000 933891/tftp-deploy-0md6eyxq/ramdisk/ramdisk.cpio.gz.uboot
  302 12:04:58.134071  - tftpboot 0x01070000 933891/tftp-deploy-0md6eyxq/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 12:04:58.134499  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/933891/extract-nfsrootfs-puymdr_w,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 12:04:58.134935  - bootm 0x01080000 0x08000000 0x01070000
  305 12:04:58.135479  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 12:04:58.137142  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 12:04:58.137599  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 12:04:58.152259  Setting prompt string to ['lava-test: # ']
  310 12:04:58.153869  end: 2.3 connect-device (duration 00:00:00) [common]
  311 12:04:58.154503  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 12:04:58.155107  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 12:04:58.155674  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 12:04:58.156953  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 12:04:58.193373  >> OK - accepted request

  316 12:04:58.195630  Returned 0 in 0 seconds
  317 12:04:58.296892  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 12:04:58.298656  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 12:04:58.299304  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 12:04:58.299874  Setting prompt string to ['Hit any key to stop autoboot']
  322 12:04:58.300450  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 12:04:58.302172  Trying 192.168.56.21...
  324 12:04:58.302699  Connected to conserv1.
  325 12:04:58.303165  Escape character is '^]'.
  326 12:04:58.303617  
  327 12:04:58.304124  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  328 12:04:58.304600  
  329 12:05:06.452187  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 12:05:06.452819  bl2_stage_init 0x01
  331 12:05:06.453243  bl2_stage_init 0x81
  332 12:05:06.457692  hw id: 0x0000 - pwm id 0x01
  333 12:05:06.457991  bl2_stage_init 0xc1
  334 12:05:06.463338  bl2_stage_init 0x02
  335 12:05:06.463832  
  336 12:05:06.464278  L0:00000000
  337 12:05:06.464701  L1:00000703
  338 12:05:06.465102  L2:00008067
  339 12:05:06.465509  L3:15000000
  340 12:05:06.468876  S1:00000000
  341 12:05:06.469353  B2:20282000
  342 12:05:06.469765  B1:a0f83180
  343 12:05:06.470178  
  344 12:05:06.470604  TE: 67132
  345 12:05:06.471000  
  346 12:05:06.474501  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 12:05:06.474966  
  348 12:05:06.480068  Board ID = 1
  349 12:05:06.480499  Set cpu clk to 24M
  350 12:05:06.480897  Set clk81 to 24M
  351 12:05:06.483542  Use GP1_pll as DSU clk.
  352 12:05:06.483954  DSU clk: 1200 Mhz
  353 12:05:06.489043  CPU clk: 1200 MHz
  354 12:05:06.489461  Set clk81 to 166.6M
  355 12:05:06.494533  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 12:05:06.494973  board id: 1
  357 12:05:06.504174  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 12:05:06.514583  fw parse done
  359 12:05:06.520542  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 12:05:06.563341  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 12:05:06.574219  PIEI prepare done
  362 12:05:06.574654  fastboot data load
  363 12:05:06.575053  fastboot data verify
  364 12:05:06.579845  verify result: 266
  365 12:05:06.585362  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 12:05:06.585812  LPDDR4 probe
  367 12:05:06.586219  ddr clk to 1584MHz
  368 12:05:06.593375  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 12:05:06.629848  
  370 12:05:06.630420  dmc_version 0001
  371 12:05:06.637290  Check phy result
  372 12:05:06.643195  INFO : End of CA training
  373 12:05:06.643626  INFO : End of initialization
  374 12:05:06.648775  INFO : Training has run successfully!
  375 12:05:06.649195  Check phy result
  376 12:05:06.654411  INFO : End of initialization
  377 12:05:06.654854  INFO : End of read enable training
  378 12:05:06.660107  INFO : End of fine write leveling
  379 12:05:06.665593  INFO : End of Write leveling coarse delay
  380 12:05:06.666123  INFO : Training has run successfully!
  381 12:05:06.666523  Check phy result
  382 12:05:06.671284  INFO : End of initialization
  383 12:05:06.671757  INFO : End of read dq deskew training
  384 12:05:06.676857  INFO : End of MPR read delay center optimization
  385 12:05:06.682316  INFO : End of write delay center optimization
  386 12:05:06.688138  INFO : End of read delay center optimization
  387 12:05:06.688567  INFO : End of max read latency training
  388 12:05:06.693663  INFO : Training has run successfully!
  389 12:05:06.694089  1D training succeed
  390 12:05:06.702858  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 12:05:06.750401  Check phy result
  392 12:05:06.750921  INFO : End of initialization
  393 12:05:06.772756  INFO : End of 2D read delay Voltage center optimization
  394 12:05:06.791909  INFO : End of 2D read delay Voltage center optimization
  395 12:05:06.843942  INFO : End of 2D write delay Voltage center optimization
  396 12:05:06.893039  INFO : End of 2D write delay Voltage center optimization
  397 12:05:06.898573  INFO : Training has run successfully!
  398 12:05:06.899032  
  399 12:05:06.899435  channel==0
  400 12:05:06.904229  RxClkDly_Margin_A0==78 ps 8
  401 12:05:06.904671  TxDqDly_Margin_A0==88 ps 9
  402 12:05:06.909828  RxClkDly_Margin_A1==88 ps 9
  403 12:05:06.910275  TxDqDly_Margin_A1==98 ps 10
  404 12:05:06.910677  TrainedVREFDQ_A0==74
  405 12:05:06.915370  TrainedVREFDQ_A1==75
  406 12:05:06.915821  VrefDac_Margin_A0==24
  407 12:05:06.916263  DeviceVref_Margin_A0==40
  408 12:05:06.920947  VrefDac_Margin_A1==23
  409 12:05:06.921443  DeviceVref_Margin_A1==39
  410 12:05:06.921838  
  411 12:05:06.922232  
  412 12:05:06.922624  channel==1
  413 12:05:06.926573  RxClkDly_Margin_A0==78 ps 8
  414 12:05:06.927015  TxDqDly_Margin_A0==98 ps 10
  415 12:05:06.934403  RxClkDly_Margin_A1==78 ps 8
  416 12:05:06.934846  TxDqDly_Margin_A1==88 ps 9
  417 12:05:06.937291  TrainedVREFDQ_A0==75
  418 12:05:06.937713  TrainedVREFDQ_A1==75
  419 12:05:06.938106  VrefDac_Margin_A0==22
  420 12:05:06.942891  DeviceVref_Margin_A0==39
  421 12:05:06.943317  VrefDac_Margin_A1==22
  422 12:05:06.948499  DeviceVref_Margin_A1==38
  423 12:05:06.948919  
  424 12:05:06.954103   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 12:05:06.954524  
  426 12:05:06.982091  soc_vref_reg_value 0x 00000019 00000018 00000019 00000016 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  427 12:05:06.982702  2D training succeed
  428 12:05:06.987743  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 12:05:06.993239  auto size-- 65535DDR cs0 size: 2048MB
  430 12:05:06.993669  DDR cs1 size: 2048MB
  431 12:05:06.998836  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 12:05:06.999257  cs0 DataBus test pass
  433 12:05:07.004468  cs1 DataBus test pass
  434 12:05:07.004894  cs0 AddrBus test pass
  435 12:05:07.005283  cs1 AddrBus test pass
  436 12:05:07.005669  
  437 12:05:07.010105  100bdlr_step_size ps== 478
  438 12:05:07.010538  result report
  439 12:05:07.015720  boot times 0Enable ddr reg access
  440 12:05:07.021400  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 12:05:07.035269  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 12:05:07.689104  bl2z: ptr: 05129330, size: 00001e40
  443 12:05:07.696454  0.0;M3 CHK:0;cm4_sp_mode 0
  444 12:05:07.696944  MVN_1=0x00000000
  445 12:05:07.697342  MVN_2=0x00000000
  446 12:05:07.707848  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 12:05:07.708377  OPS=0x04
  448 12:05:07.708780  ring efuse init
  449 12:05:07.713519  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 12:05:07.713985  [0.017319 Inits done]
  451 12:05:07.714379  secure task start!
  452 12:05:07.721293  high task start!
  453 12:05:07.721753  low task start!
  454 12:05:07.722146  run into bl31
  455 12:05:07.729902  NOTICE:  BL31: v1.3(release):4fc40b1
  456 12:05:07.737669  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 12:05:07.738134  NOTICE:  BL31: G12A normal boot!
  458 12:05:07.753339  NOTICE:  BL31: BL33 decompress pass
  459 12:05:07.758485  ERROR:   Error initializing runtime service opteed_fast
  460 12:05:10.504567  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 12:05:10.505235  bl2_stage_init 0x01
  462 12:05:10.505718  bl2_stage_init 0x81
  463 12:05:10.510229  hw id: 0x0000 - pwm id 0x01
  464 12:05:10.510775  bl2_stage_init 0xc1
  465 12:05:10.515534  bl2_stage_init 0x02
  466 12:05:10.516129  
  467 12:05:10.516587  L0:00000000
  468 12:05:10.517024  L1:00000703
  469 12:05:10.517457  L2:00008067
  470 12:05:10.517888  L3:15000000
  471 12:05:10.521224  S1:00000000
  472 12:05:10.521689  B2:20282000
  473 12:05:10.522120  B1:a0f83180
  474 12:05:10.522545  
  475 12:05:10.522972  TE: 69640
  476 12:05:10.523399  
  477 12:05:10.526701  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 12:05:10.527160  
  479 12:05:10.532267  Board ID = 1
  480 12:05:10.532717  Set cpu clk to 24M
  481 12:05:10.533146  Set clk81 to 24M
  482 12:05:10.537862  Use GP1_pll as DSU clk.
  483 12:05:10.538316  DSU clk: 1200 Mhz
  484 12:05:10.538744  CPU clk: 1200 MHz
  485 12:05:10.543424  Set clk81 to 166.6M
  486 12:05:10.549077  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 12:05:10.549554  board id: 1
  488 12:05:10.556327  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 12:05:10.567067  fw parse done
  490 12:05:10.572992  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 12:05:10.615622  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 12:05:10.626618  PIEI prepare done
  493 12:05:10.627088  fastboot data load
  494 12:05:10.627526  fastboot data verify
  495 12:05:10.632195  verify result: 266
  496 12:05:10.637764  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 12:05:10.638222  LPDDR4 probe
  498 12:05:10.638648  ddr clk to 1584MHz
  499 12:05:10.645810  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 12:05:10.683087  
  501 12:05:10.683585  dmc_version 0001
  502 12:05:10.689757  Check phy result
  503 12:05:10.695631  INFO : End of CA training
  504 12:05:10.696153  INFO : End of initialization
  505 12:05:10.701226  INFO : Training has run successfully!
  506 12:05:10.701741  Check phy result
  507 12:05:10.706836  INFO : End of initialization
  508 12:05:10.707373  INFO : End of read enable training
  509 12:05:10.712433  INFO : End of fine write leveling
  510 12:05:10.718035  INFO : End of Write leveling coarse delay
  511 12:05:10.718499  INFO : Training has run successfully!
  512 12:05:10.718931  Check phy result
  513 12:05:10.723570  INFO : End of initialization
  514 12:05:10.724064  INFO : End of read dq deskew training
  515 12:05:10.729192  INFO : End of MPR read delay center optimization
  516 12:05:10.734862  INFO : End of write delay center optimization
  517 12:05:10.740431  INFO : End of read delay center optimization
  518 12:05:10.740900  INFO : End of max read latency training
  519 12:05:10.746013  INFO : Training has run successfully!
  520 12:05:10.746480  1D training succeed
  521 12:05:10.755301  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 12:05:10.802860  Check phy result
  523 12:05:10.803427  INFO : End of initialization
  524 12:05:10.825147  INFO : End of 2D read delay Voltage center optimization
  525 12:05:10.844323  INFO : End of 2D read delay Voltage center optimization
  526 12:05:10.896336  INFO : End of 2D write delay Voltage center optimization
  527 12:05:10.945406  INFO : End of 2D write delay Voltage center optimization
  528 12:05:10.950914  INFO : Training has run successfully!
  529 12:05:10.951404  
  530 12:05:10.951865  channel==0
  531 12:05:10.956604  RxClkDly_Margin_A0==88 ps 9
  532 12:05:10.957086  TxDqDly_Margin_A0==98 ps 10
  533 12:05:10.962137  RxClkDly_Margin_A1==88 ps 9
  534 12:05:10.962631  TxDqDly_Margin_A1==88 ps 9
  535 12:05:10.963081  TrainedVREFDQ_A0==76
  536 12:05:10.967708  TrainedVREFDQ_A1==74
  537 12:05:10.968245  VrefDac_Margin_A0==24
  538 12:05:10.968703  DeviceVref_Margin_A0==38
  539 12:05:10.973297  VrefDac_Margin_A1==23
  540 12:05:10.973774  DeviceVref_Margin_A1==40
  541 12:05:10.974223  
  542 12:05:10.974675  
  543 12:05:10.975124  channel==1
  544 12:05:10.978909  RxClkDly_Margin_A0==88 ps 9
  545 12:05:10.979390  TxDqDly_Margin_A0==98 ps 10
  546 12:05:10.984584  RxClkDly_Margin_A1==78 ps 8
  547 12:05:10.985059  TxDqDly_Margin_A1==88 ps 9
  548 12:05:10.990118  TrainedVREFDQ_A0==78
  549 12:05:10.990590  TrainedVREFDQ_A1==77
  550 12:05:10.991073  VrefDac_Margin_A0==22
  551 12:05:10.995775  DeviceVref_Margin_A0==36
  552 12:05:10.996350  VrefDac_Margin_A1==22
  553 12:05:11.001298  DeviceVref_Margin_A1==37
  554 12:05:11.001765  
  555 12:05:11.002203   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 12:05:11.002634  
  557 12:05:11.034892  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000018 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
  558 12:05:11.035401  2D training succeed
  559 12:05:11.040590  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 12:05:11.046143  auto size-- 65535DDR cs0 size: 2048MB
  561 12:05:11.046611  DDR cs1 size: 2048MB
  562 12:05:11.051692  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 12:05:11.052199  cs0 DataBus test pass
  564 12:05:11.057312  cs1 DataBus test pass
  565 12:05:11.057770  cs0 AddrBus test pass
  566 12:05:11.058204  cs1 AddrBus test pass
  567 12:05:11.058632  
  568 12:05:11.062907  100bdlr_step_size ps== 478
  569 12:05:11.063377  result report
  570 12:05:11.068602  boot times 0Enable ddr reg access
  571 12:05:11.073678  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 12:05:11.087498  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 12:05:11.743294  bl2z: ptr: 05129330, size: 00001e40
  574 12:05:11.748826  0.0;M3 CHK:0;cm4_sp_mode 0
  575 12:05:11.749341  MVN_1=0x00000000
  576 12:05:11.749797  MVN_2=0x00000000
  577 12:05:11.754397  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 12:05:11.754877  OPS=0x04
  579 12:05:11.760295  ring efuse init
  580 12:05:11.765940  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 12:05:11.766422  [0.017310 Inits done]
  582 12:05:11.766866  secure task start!
  583 12:05:11.772719  high task start!
  584 12:05:11.773187  low task start!
  585 12:05:11.773630  run into bl31
  586 12:05:11.781260  NOTICE:  BL31: v1.3(release):4fc40b1
  587 12:05:11.789063  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 12:05:11.789547  NOTICE:  BL31: G12A normal boot!
  589 12:05:11.804658  NOTICE:  BL31: BL33 decompress pass
  590 12:05:11.810330  ERROR:   Error initializing runtime service opteed_fast
  591 12:05:13.204189  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 12:05:13.204840  bl2_stage_init 0x01
  593 12:05:13.205309  bl2_stage_init 0x81
  594 12:05:13.209719  hw id: 0x0000 - pwm id 0x01
  595 12:05:13.210205  bl2_stage_init 0xc1
  596 12:05:13.215418  bl2_stage_init 0x02
  597 12:05:13.215897  
  598 12:05:13.216422  L0:00000000
  599 12:05:13.216873  L1:00000703
  600 12:05:13.217313  L2:00008067
  601 12:05:13.217750  L3:15000000
  602 12:05:13.221216  S1:00000000
  603 12:05:13.221707  B2:20282000
  604 12:05:13.222154  B1:a0f83180
  605 12:05:13.222596  
  606 12:05:13.223036  TE: 68990
  607 12:05:13.223474  
  608 12:05:13.226952  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 12:05:13.227436  
  610 12:05:13.232477  Board ID = 1
  611 12:05:13.232956  Set cpu clk to 24M
  612 12:05:13.233403  Set clk81 to 24M
  613 12:05:13.238097  Use GP1_pll as DSU clk.
  614 12:05:13.238591  DSU clk: 1200 Mhz
  615 12:05:13.239041  CPU clk: 1200 MHz
  616 12:05:13.243593  Set clk81 to 166.6M
  617 12:05:13.249275  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 12:05:13.249750  board id: 1
  619 12:05:13.256237  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 12:05:13.267074  fw parse done
  621 12:05:13.273068  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 12:05:13.316300  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 12:05:13.327254  PIEI prepare done
  624 12:05:13.327750  fastboot data load
  625 12:05:13.328267  fastboot data verify
  626 12:05:13.332999  verify result: 266
  627 12:05:13.338381  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 12:05:13.338864  LPDDR4 probe
  629 12:05:13.339318  ddr clk to 1584MHz
  630 12:05:13.346485  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 12:05:13.384252  
  632 12:05:13.384741  dmc_version 0001
  633 12:05:13.391290  Check phy result
  634 12:05:13.397230  INFO : End of CA training
  635 12:05:13.397714  INFO : End of initialization
  636 12:05:13.402824  INFO : Training has run successfully!
  637 12:05:13.403303  Check phy result
  638 12:05:13.408466  INFO : End of initialization
  639 12:05:13.408943  INFO : End of read enable training
  640 12:05:13.413986  INFO : End of fine write leveling
  641 12:05:13.419664  INFO : End of Write leveling coarse delay
  642 12:05:13.420164  INFO : Training has run successfully!
  643 12:05:13.420614  Check phy result
  644 12:05:13.425230  INFO : End of initialization
  645 12:05:13.425696  INFO : End of read dq deskew training
  646 12:05:13.430797  INFO : End of MPR read delay center optimization
  647 12:05:13.436416  INFO : End of write delay center optimization
  648 12:05:13.442027  INFO : End of read delay center optimization
  649 12:05:13.442499  INFO : End of max read latency training
  650 12:05:13.447687  INFO : Training has run successfully!
  651 12:05:13.448202  1D training succeed
  652 12:05:13.456881  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 12:05:13.505215  Check phy result
  654 12:05:13.505700  INFO : End of initialization
  655 12:05:13.532507  INFO : End of 2D read delay Voltage center optimization
  656 12:05:13.557400  INFO : End of 2D read delay Voltage center optimization
  657 12:05:13.613309  INFO : End of 2D write delay Voltage center optimization
  658 12:05:13.667206  INFO : End of 2D write delay Voltage center optimization
  659 12:05:13.672737  INFO : Training has run successfully!
  660 12:05:13.673218  
  661 12:05:13.673671  channel==0
  662 12:05:13.678414  RxClkDly_Margin_A0==69 ps 7
  663 12:05:13.678896  TxDqDly_Margin_A0==98 ps 10
  664 12:05:13.684078  RxClkDly_Margin_A1==69 ps 7
  665 12:05:13.684549  TxDqDly_Margin_A1==98 ps 10
  666 12:05:13.685000  TrainedVREFDQ_A0==74
  667 12:05:13.689623  TrainedVREFDQ_A1==75
  668 12:05:13.690098  VrefDac_Margin_A0==22
  669 12:05:13.690542  DeviceVref_Margin_A0==40
  670 12:05:13.695185  VrefDac_Margin_A1==23
  671 12:05:13.695655  DeviceVref_Margin_A1==39
  672 12:05:13.696137  
  673 12:05:13.696584  
  674 12:05:13.700807  channel==1
  675 12:05:13.701274  RxClkDly_Margin_A0==78 ps 8
  676 12:05:13.701717  TxDqDly_Margin_A0==88 ps 9
  677 12:05:13.706346  RxClkDly_Margin_A1==78 ps 8
  678 12:05:13.706826  TxDqDly_Margin_A1==78 ps 8
  679 12:05:13.712076  TrainedVREFDQ_A0==75
  680 12:05:13.712560  TrainedVREFDQ_A1==77
  681 12:05:13.713011  VrefDac_Margin_A0==22
  682 12:05:13.717578  DeviceVref_Margin_A0==39
  683 12:05:13.718047  VrefDac_Margin_A1==22
  684 12:05:13.723206  DeviceVref_Margin_A1==37
  685 12:05:13.723676  
  686 12:05:13.724159   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 12:05:13.724604  
  688 12:05:13.756642  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
  689 12:05:13.757176  2D training succeed
  690 12:05:13.762246  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 12:05:13.767967  auto size-- 65535DDR cs0 size: 2048MB
  692 12:05:13.768502  DDR cs1 size: 2048MB
  693 12:05:13.773483  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 12:05:13.773958  cs0 DataBus test pass
  695 12:05:13.779056  cs1 DataBus test pass
  696 12:05:13.779532  cs0 AddrBus test pass
  697 12:05:13.779975  cs1 AddrBus test pass
  698 12:05:13.780463  
  699 12:05:13.784641  100bdlr_step_size ps== 471
  700 12:05:13.784954  result report
  701 12:05:13.790223  boot times 0Enable ddr reg access
  702 12:05:13.795399  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 12:05:13.809255  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 12:05:14.467820  bl2z: ptr: 05129330, size: 00001e40
  705 12:05:14.476004  0.0;M3 CHK:0;cm4_sp_mode 0
  706 12:05:14.476353  MVN_1=0x00000000
  707 12:05:14.476586  MVN_2=0x00000000
  708 12:05:14.487415  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 12:05:14.487723  OPS=0x04
  710 12:05:14.487954  ring efuse init
  711 12:05:14.493045  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 12:05:14.493328  [0.017354 Inits done]
  713 12:05:14.493553  secure task start!
  714 12:05:14.500942  high task start!
  715 12:05:14.501237  low task start!
  716 12:05:14.501463  run into bl31
  717 12:05:14.509524  NOTICE:  BL31: v1.3(release):4fc40b1
  718 12:05:14.517361  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 12:05:14.517666  NOTICE:  BL31: G12A normal boot!
  720 12:05:14.532899  NOTICE:  BL31: BL33 decompress pass
  721 12:05:14.538509  ERROR:   Error initializing runtime service opteed_fast
  722 12:05:15.332740  
  723 12:05:15.333403  
  724 12:05:15.338141  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 12:05:15.338635  
  726 12:05:15.341608  Model: Libre Computer AML-S905D3-CC Solitude
  727 12:05:15.488486  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 12:05:15.503861  DRAM:  2 GiB (effective 3.8 GiB)
  729 12:05:15.604952  Core:  406 devices, 33 uclasses, devicetree: separate
  730 12:05:15.609687  WDT:   Not starting watchdog@f0d0
  731 12:05:15.635723  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 12:05:15.647946  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 12:05:15.652939  ** Bad device specification mmc 0 **
  734 12:05:15.662983  Card did not respond to voltage select! : -110
  735 12:05:15.670668  ** Bad device specification mmc 0 **
  736 12:05:15.671140  Couldn't find partition mmc 0
  737 12:05:15.678971  Card did not respond to voltage select! : -110
  738 12:05:15.684491  ** Bad device specification mmc 0 **
  739 12:05:15.684960  Couldn't find partition mmc 0
  740 12:05:15.689547  Error: could not access storage.
  741 12:05:15.987158  Net:   eth0: ethernet@ff3f0000
  742 12:05:15.987824  starting USB...
  743 12:05:16.231728  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 12:05:16.232372  Starting the controller
  745 12:05:16.238595  USB XHCI 1.10
  746 12:05:17.792459  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 12:05:17.800686         scanning usb for storage devices... 0 Storage Device(s) found
  749 12:05:17.852249  Hit any key to stop autoboot:  1 
  750 12:05:17.853083  end: 2.4.2 bootloader-interrupt (duration 00:00:20) [common]
  751 12:05:17.853726  start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
  752 12:05:17.854250  Setting prompt string to ['=>']
  753 12:05:17.854780  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
  754 12:05:17.866695   0 
  755 12:05:17.867628  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 12:05:17.968969  => setenv autoload no
  758 12:05:17.969647  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  759 12:05:17.974959  setenv autoload no
  761 12:05:18.076533  => setenv initrd_high 0xffffffff
  762 12:05:18.077209  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  763 12:05:18.081646  setenv initrd_high 0xffffffff
  765 12:05:18.183122  => setenv fdt_high 0xffffffff
  766 12:05:18.183745  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  767 12:05:18.188085  setenv fdt_high 0xffffffff
  769 12:05:18.289601  => dhcp
  770 12:05:18.290255  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  771 12:05:18.294310  dhcp
  772 12:05:19.200253  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  773 12:05:19.200915  Speed: 1000, full duplex
  774 12:05:19.201394  BOOTP broadcast 1
  775 12:05:19.449027  BOOTP broadcast 2
  776 12:05:19.471040  DHCP client bound to address 192.168.6.21 (270 ms)
  778 12:05:19.572628  => setenv serverip 192.168.6.2
  779 12:05:19.573319  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  780 12:05:19.577779  setenv serverip 192.168.6.2
  782 12:05:19.679260  => tftpboot 0x01080000 933891/tftp-deploy-0md6eyxq/kernel/uImage
  783 12:05:19.679947  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:38)
  784 12:05:19.686795  tftpboot 0x01080000 933891/tftp-deploy-0md6eyxq/kernel/uImage
  785 12:05:19.687342  Speed: 1000, full duplex
  786 12:05:19.687800  Using ethernet@ff3f0000 device
  787 12:05:19.692205  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  788 12:05:19.697653  Filename '933891/tftp-deploy-0md6eyxq/kernel/uImage'.
  789 12:05:19.701653  Load address: 0x1080000
  790 12:05:22.542745  Loading: *##################################################  43.6 MiB
  791 12:05:22.543427  	 15.3 MiB/s
  792 12:05:22.543913  done
  793 12:05:22.547139  Bytes transferred = 45713984 (2b98a40 hex)
  795 12:05:22.648810  => tftpboot 0x08000000 933891/tftp-deploy-0md6eyxq/ramdisk/ramdisk.cpio.gz.uboot
  796 12:05:22.649365  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
  797 12:05:22.656302  tftpboot 0x08000000 933891/tftp-deploy-0md6eyxq/ramdisk/ramdisk.cpio.gz.uboot
  798 12:05:22.656621  Speed: 1000, full duplex
  799 12:05:22.656848  Using ethernet@ff3f0000 device
  800 12:05:22.661814  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  801 12:05:22.671732  Filename '933891/tftp-deploy-0md6eyxq/ramdisk/ramdisk.cpio.gz.uboot'.
  802 12:05:22.672370  Load address: 0x8000000
  803 12:05:24.212147  Loading: *################################################# UDP wrong checksum 00000005 0000ac47
  804 12:05:29.211727  T  UDP wrong checksum 00000005 0000ac47
  805 12:05:39.215084  T T  UDP wrong checksum 00000005 0000ac47
  806 12:05:45.912730  T  UDP wrong checksum 000000ff 0000c9f2
  807 12:05:45.972926   UDP wrong checksum 000000ff 000064e5
  808 12:05:59.218929  T T T  UDP wrong checksum 00000005 0000ac47
  809 12:06:05.943210  T  UDP wrong checksum 000000ff 0000286b
  810 12:06:05.984074   UDP wrong checksum 000000ff 0000c25d
  811 12:06:16.323861  T T  UDP wrong checksum 000000ff 00002038
  812 12:06:16.595216   UDP wrong checksum 000000ff 0000ac2a
  813 12:06:19.223717  
  814 12:06:19.224435  Retry count exceeded; starting again
  816 12:06:19.225960  end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
  819 12:06:19.228015  end: 2.4 uboot-commands (duration 00:01:21) [common]
  821 12:06:19.229545  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  823 12:06:19.230681  end: 2 uboot-action (duration 00:01:21) [common]
  825 12:06:19.232435  Cleaning after the job
  826 12:06:19.233062  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/ramdisk
  827 12:06:19.234298  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/kernel
  828 12:06:19.281214  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/dtb
  829 12:06:19.282032  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/nfsrootfs
  830 12:06:19.426362  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933891/tftp-deploy-0md6eyxq/modules
  831 12:06:19.445088  start: 4.1 power-off (timeout 00:00:30) [common]
  832 12:06:19.445727  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  833 12:06:19.483455  >> OK - accepted request

  834 12:06:19.485520  Returned 0 in 0 seconds
  835 12:06:19.586271  end: 4.1 power-off (duration 00:00:00) [common]
  837 12:06:19.587238  start: 4.2 read-feedback (timeout 00:10:00) [common]
  838 12:06:19.587894  Listened to connection for namespace 'common' for up to 1s
  839 12:06:20.587863  Finalising connection for namespace 'common'
  840 12:06:20.588342  Disconnecting from shell: Finalise
  841 12:06:20.588618  => 
  842 12:06:20.689374  end: 4.2 read-feedback (duration 00:00:01) [common]
  843 12:06:20.690102  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/933891
  844 12:06:22.820767  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/933891
  845 12:06:22.822277  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.