Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 12:42:37.721182 lava-dispatcher, installed at version: 2024.01
2 12:42:37.721916 start: 0 validate
3 12:42:37.722412 Start time: 2024-11-04 12:42:37.722384+00:00 (UTC)
4 12:42:37.722936 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 12:42:37.723481 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 12:42:37.765591 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 12:42:37.766126 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fulfh%2Fnext%2Fmmc-v6.12-rc3-75-g84185573da38%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 12:42:37.796478 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 12:42:37.797082 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fulfh%2Fnext%2Fmmc-v6.12-rc3-75-g84185573da38%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 12:42:37.828092 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 12:42:37.828570 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 12:42:37.858797 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 12:42:37.859280 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fulfh%2Fnext%2Fmmc-v6.12-rc3-75-g84185573da38%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 12:42:37.906698 validate duration: 0.18
16 12:42:37.908276 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 12:42:37.908914 start: 1.1 download-retry (timeout 00:10:00) [common]
18 12:42:37.909526 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 12:42:37.910567 Not decompressing ramdisk as can be used compressed.
20 12:42:37.911362 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 12:42:37.911892 saving as /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/ramdisk/initrd.cpio.gz
22 12:42:37.912462 total size: 5628140 (5 MB)
23 12:42:37.953980 progress 0 % (0 MB)
24 12:42:37.962602 progress 5 % (0 MB)
25 12:42:37.969931 progress 10 % (0 MB)
26 12:42:37.977480 progress 15 % (0 MB)
27 12:42:37.985809 progress 20 % (1 MB)
28 12:42:37.991399 progress 25 % (1 MB)
29 12:42:37.995763 progress 30 % (1 MB)
30 12:42:37.999964 progress 35 % (1 MB)
31 12:42:38.004121 progress 40 % (2 MB)
32 12:42:38.008189 progress 45 % (2 MB)
33 12:42:38.011794 progress 50 % (2 MB)
34 12:42:38.015764 progress 55 % (2 MB)
35 12:42:38.019802 progress 60 % (3 MB)
36 12:42:38.023368 progress 65 % (3 MB)
37 12:42:38.027291 progress 70 % (3 MB)
38 12:42:38.030959 progress 75 % (4 MB)
39 12:42:38.034976 progress 80 % (4 MB)
40 12:42:38.038612 progress 85 % (4 MB)
41 12:42:38.042565 progress 90 % (4 MB)
42 12:42:38.046355 progress 95 % (5 MB)
43 12:42:38.049725 progress 100 % (5 MB)
44 12:42:38.050462 5 MB downloaded in 0.14 s (38.90 MB/s)
45 12:42:38.051040 end: 1.1.1 http-download (duration 00:00:00) [common]
47 12:42:38.051925 end: 1.1 download-retry (duration 00:00:00) [common]
48 12:42:38.052259 start: 1.2 download-retry (timeout 00:10:00) [common]
49 12:42:38.052538 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 12:42:38.053704 downloading http://storage.kernelci.org/ulfh/next/mmc-v6.12-rc3-75-g84185573da38/arm64/defconfig/gcc-12/kernel/Image
51 12:42:38.054044 saving as /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/kernel/Image
52 12:42:38.054275 total size: 45713920 (43 MB)
53 12:42:38.054505 No compression specified
54 12:42:38.092703 progress 0 % (0 MB)
55 12:42:38.121818 progress 5 % (2 MB)
56 12:42:38.150645 progress 10 % (4 MB)
57 12:42:38.179476 progress 15 % (6 MB)
58 12:42:38.208409 progress 20 % (8 MB)
59 12:42:38.236508 progress 25 % (10 MB)
60 12:42:38.265098 progress 30 % (13 MB)
61 12:42:38.293709 progress 35 % (15 MB)
62 12:42:38.322763 progress 40 % (17 MB)
63 12:42:38.351251 progress 45 % (19 MB)
64 12:42:38.379954 progress 50 % (21 MB)
65 12:42:38.408193 progress 55 % (24 MB)
66 12:42:38.435759 progress 60 % (26 MB)
67 12:42:38.463096 progress 65 % (28 MB)
68 12:42:38.490764 progress 70 % (30 MB)
69 12:42:38.518684 progress 75 % (32 MB)
70 12:42:38.548541 progress 80 % (34 MB)
71 12:42:38.575819 progress 85 % (37 MB)
72 12:42:38.603728 progress 90 % (39 MB)
73 12:42:38.631548 progress 95 % (41 MB)
74 12:42:38.661081 progress 100 % (43 MB)
75 12:42:38.661629 43 MB downloaded in 0.61 s (71.78 MB/s)
76 12:42:38.662147 end: 1.2.1 http-download (duration 00:00:01) [common]
78 12:42:38.663017 end: 1.2 download-retry (duration 00:00:01) [common]
79 12:42:38.663321 start: 1.3 download-retry (timeout 00:09:59) [common]
80 12:42:38.663610 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 12:42:38.664255 downloading http://storage.kernelci.org/ulfh/next/mmc-v6.12-rc3-75-g84185573da38/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 12:42:38.664591 saving as /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/dtb/meson-g12b-a311d-libretech-cc.dtb
83 12:42:38.664822 total size: 54703 (0 MB)
84 12:42:38.665039 No compression specified
85 12:42:38.701474 progress 59 % (0 MB)
86 12:42:38.702373 progress 100 % (0 MB)
87 12:42:38.702984 0 MB downloaded in 0.04 s (1.37 MB/s)
88 12:42:38.703480 end: 1.3.1 http-download (duration 00:00:00) [common]
90 12:42:38.704387 end: 1.3 download-retry (duration 00:00:00) [common]
91 12:42:38.704679 start: 1.4 download-retry (timeout 00:09:59) [common]
92 12:42:38.704965 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 12:42:38.705548 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 12:42:38.705855 saving as /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/nfsrootfs/full.rootfs.tar
95 12:42:38.706074 total size: 474398908 (452 MB)
96 12:42:38.706292 Using unxz to decompress xz
97 12:42:38.744537 progress 0 % (0 MB)
98 12:42:39.838680 progress 5 % (22 MB)
99 12:42:41.300069 progress 10 % (45 MB)
100 12:42:41.761572 progress 15 % (67 MB)
101 12:42:42.611649 progress 20 % (90 MB)
102 12:42:43.140276 progress 25 % (113 MB)
103 12:42:43.492908 progress 30 % (135 MB)
104 12:42:44.093929 progress 35 % (158 MB)
105 12:42:45.010081 progress 40 % (181 MB)
106 12:42:45.877441 progress 45 % (203 MB)
107 12:42:46.627656 progress 50 % (226 MB)
108 12:42:47.419491 progress 55 % (248 MB)
109 12:42:48.637514 progress 60 % (271 MB)
110 12:42:50.126955 progress 65 % (294 MB)
111 12:42:51.765581 progress 70 % (316 MB)
112 12:42:54.838823 progress 75 % (339 MB)
113 12:42:57.270801 progress 80 % (361 MB)
114 12:43:00.126980 progress 85 % (384 MB)
115 12:43:03.229930 progress 90 % (407 MB)
116 12:43:06.412289 progress 95 % (429 MB)
117 12:43:09.614914 progress 100 % (452 MB)
118 12:43:09.630446 452 MB downloaded in 30.92 s (14.63 MB/s)
119 12:43:09.631589 end: 1.4.1 http-download (duration 00:00:31) [common]
121 12:43:09.633582 end: 1.4 download-retry (duration 00:00:31) [common]
122 12:43:09.634246 start: 1.5 download-retry (timeout 00:09:28) [common]
123 12:43:09.634880 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 12:43:09.635922 downloading http://storage.kernelci.org/ulfh/next/mmc-v6.12-rc3-75-g84185573da38/arm64/defconfig/gcc-12/modules.tar.xz
125 12:43:09.636515 saving as /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/modules/modules.tar
126 12:43:09.637004 total size: 11606276 (11 MB)
127 12:43:09.637491 Using unxz to decompress xz
128 12:43:09.722342 progress 0 % (0 MB)
129 12:43:09.797025 progress 5 % (0 MB)
130 12:43:09.878137 progress 10 % (1 MB)
131 12:43:09.985745 progress 15 % (1 MB)
132 12:43:10.091105 progress 20 % (2 MB)
133 12:43:10.179370 progress 25 % (2 MB)
134 12:43:10.262691 progress 30 % (3 MB)
135 12:43:10.345519 progress 35 % (3 MB)
136 12:43:10.430825 progress 40 % (4 MB)
137 12:43:10.514957 progress 45 % (5 MB)
138 12:43:10.608525 progress 50 % (5 MB)
139 12:43:10.693943 progress 55 % (6 MB)
140 12:43:10.788646 progress 60 % (6 MB)
141 12:43:10.877822 progress 65 % (7 MB)
142 12:43:10.962122 progress 70 % (7 MB)
143 12:43:11.054061 progress 75 % (8 MB)
144 12:43:11.146984 progress 80 % (8 MB)
145 12:43:11.237283 progress 85 % (9 MB)
146 12:43:11.316486 progress 90 % (9 MB)
147 12:43:11.394422 progress 95 % (10 MB)
148 12:43:11.472223 progress 100 % (11 MB)
149 12:43:11.483057 11 MB downloaded in 1.85 s (6.00 MB/s)
150 12:43:11.484007 end: 1.5.1 http-download (duration 00:00:02) [common]
152 12:43:11.485765 end: 1.5 download-retry (duration 00:00:02) [common]
153 12:43:11.486322 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 12:43:11.486886 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 12:43:26.603776 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/933944/extract-nfsrootfs-eqth495x
156 12:43:26.604405 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 12:43:26.604691 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 12:43:26.605334 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5
159 12:43:26.605810 makedir: /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin
160 12:43:26.606145 makedir: /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/tests
161 12:43:26.606459 makedir: /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/results
162 12:43:26.606792 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-add-keys
163 12:43:26.607325 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-add-sources
164 12:43:26.607832 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-background-process-start
165 12:43:26.608372 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-background-process-stop
166 12:43:26.608900 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-common-functions
167 12:43:26.609401 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-echo-ipv4
168 12:43:26.609883 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-install-packages
169 12:43:26.610459 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-installed-packages
170 12:43:26.610946 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-os-build
171 12:43:26.611420 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-probe-channel
172 12:43:26.611895 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-probe-ip
173 12:43:26.612422 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-target-ip
174 12:43:26.612920 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-target-mac
175 12:43:26.613425 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-target-storage
176 12:43:26.613912 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-test-case
177 12:43:26.614388 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-test-event
178 12:43:26.614857 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-test-feedback
179 12:43:26.615329 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-test-raise
180 12:43:26.615797 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-test-reference
181 12:43:26.616330 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-test-runner
182 12:43:26.616833 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-test-set
183 12:43:26.617329 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-test-shell
184 12:43:26.617811 Updating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-install-packages (oe)
185 12:43:26.618344 Updating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/bin/lava-installed-packages (oe)
186 12:43:26.618787 Creating /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/environment
187 12:43:26.619155 LAVA metadata
188 12:43:26.619413 - LAVA_JOB_ID=933944
189 12:43:26.619626 - LAVA_DISPATCHER_IP=192.168.6.2
190 12:43:26.619998 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 12:43:26.620958 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 12:43:26.621264 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 12:43:26.621470 skipped lava-vland-overlay
194 12:43:26.621708 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 12:43:26.621960 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 12:43:26.622173 skipped lava-multinode-overlay
197 12:43:26.622412 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 12:43:26.622660 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 12:43:26.622903 Loading test definitions
200 12:43:26.623175 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 12:43:26.623391 Using /lava-933944 at stage 0
202 12:43:26.624572 uuid=933944_1.6.2.4.1 testdef=None
203 12:43:26.624880 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 12:43:26.625139 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 12:43:26.626839 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 12:43:26.627620 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 12:43:26.629768 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 12:43:26.630586 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 12:43:26.632650 runner path: /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 933944_1.6.2.4.1
212 12:43:26.633189 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 12:43:26.633941 Creating lava-test-runner.conf files
215 12:43:26.634140 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/933944/lava-overlay-7pybgmm5/lava-933944/0 for stage 0
216 12:43:26.634466 - 0_v4l2-decoder-conformance-h264
217 12:43:26.634802 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 12:43:26.635072 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 12:43:26.656515 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 12:43:26.656854 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 12:43:26.657108 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 12:43:26.657366 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 12:43:26.657625 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 12:43:27.348165 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 12:43:27.348633 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 12:43:27.348881 extracting modules file /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933944/extract-nfsrootfs-eqth495x
227 12:43:28.689288 extracting modules file /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933944/extract-overlay-ramdisk-hv2vf9hl/ramdisk
228 12:43:30.063049 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 12:43:30.063528 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 12:43:30.063808 [common] Applying overlay to NFS
231 12:43:30.064048 [common] Applying overlay /var/lib/lava/dispatcher/tmp/933944/compress-overlay-dpli4jlt/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/933944/extract-nfsrootfs-eqth495x
232 12:43:30.093164 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 12:43:30.093540 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 12:43:30.093812 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 12:43:30.094041 Converting downloaded kernel to a uImage
236 12:43:30.094349 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/kernel/Image /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/kernel/uImage
237 12:43:30.561958 output: Image Name:
238 12:43:30.562359 output: Created: Mon Nov 4 12:43:30 2024
239 12:43:30.562567 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 12:43:30.562772 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 12:43:30.562973 output: Load Address: 01080000
242 12:43:30.563171 output: Entry Point: 01080000
243 12:43:30.563368 output:
244 12:43:30.563700 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 12:43:30.563965 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 12:43:30.564282 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 12:43:30.564538 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 12:43:30.564796 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 12:43:30.565049 Building ramdisk /var/lib/lava/dispatcher/tmp/933944/extract-overlay-ramdisk-hv2vf9hl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/933944/extract-overlay-ramdisk-hv2vf9hl/ramdisk
250 12:43:32.703100 >> 166781 blocks
251 12:43:40.380133 Adding RAMdisk u-boot header.
252 12:43:40.380836 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/933944/extract-overlay-ramdisk-hv2vf9hl/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/933944/extract-overlay-ramdisk-hv2vf9hl/ramdisk.cpio.gz.uboot
253 12:43:40.669824 output: Image Name:
254 12:43:40.670287 output: Created: Mon Nov 4 12:43:40 2024
255 12:43:40.670785 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 12:43:40.671253 output: Data Size: 23428031 Bytes = 22878.94 KiB = 22.34 MiB
257 12:43:40.671729 output: Load Address: 00000000
258 12:43:40.672229 output: Entry Point: 00000000
259 12:43:40.672676 output:
260 12:43:40.673679 rename /var/lib/lava/dispatcher/tmp/933944/extract-overlay-ramdisk-hv2vf9hl/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/ramdisk/ramdisk.cpio.gz.uboot
261 12:43:40.674460 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 12:43:40.675070 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 12:43:40.675661 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 12:43:40.676215 No LXC device requested
265 12:43:40.676791 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 12:43:40.677367 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 12:43:40.677928 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 12:43:40.678390 Checking files for TFTP limit of 4294967296 bytes.
269 12:43:40.681453 end: 1 tftp-deploy (duration 00:01:03) [common]
270 12:43:40.682109 start: 2 uboot-action (timeout 00:05:00) [common]
271 12:43:40.682712 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 12:43:40.683277 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 12:43:40.683843 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 12:43:40.684468 Using kernel file from prepare-kernel: 933944/tftp-deploy-t3me2iwa/kernel/uImage
275 12:43:40.685169 substitutions:
276 12:43:40.685625 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 12:43:40.686072 - {DTB_ADDR}: 0x01070000
278 12:43:40.686517 - {DTB}: 933944/tftp-deploy-t3me2iwa/dtb/meson-g12b-a311d-libretech-cc.dtb
279 12:43:40.686960 - {INITRD}: 933944/tftp-deploy-t3me2iwa/ramdisk/ramdisk.cpio.gz.uboot
280 12:43:40.687403 - {KERNEL_ADDR}: 0x01080000
281 12:43:40.687840 - {KERNEL}: 933944/tftp-deploy-t3me2iwa/kernel/uImage
282 12:43:40.688316 - {LAVA_MAC}: None
283 12:43:40.688803 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/933944/extract-nfsrootfs-eqth495x
284 12:43:40.689251 - {NFS_SERVER_IP}: 192.168.6.2
285 12:43:40.689689 - {PRESEED_CONFIG}: None
286 12:43:40.690128 - {PRESEED_LOCAL}: None
287 12:43:40.690565 - {RAMDISK_ADDR}: 0x08000000
288 12:43:40.690999 - {RAMDISK}: 933944/tftp-deploy-t3me2iwa/ramdisk/ramdisk.cpio.gz.uboot
289 12:43:40.691431 - {ROOT_PART}: None
290 12:43:40.691862 - {ROOT}: None
291 12:43:40.692326 - {SERVER_IP}: 192.168.6.2
292 12:43:40.692762 - {TEE_ADDR}: 0x83000000
293 12:43:40.693190 - {TEE}: None
294 12:43:40.693620 Parsed boot commands:
295 12:43:40.694041 - setenv autoload no
296 12:43:40.694471 - setenv initrd_high 0xffffffff
297 12:43:40.694902 - setenv fdt_high 0xffffffff
298 12:43:40.695333 - dhcp
299 12:43:40.695763 - setenv serverip 192.168.6.2
300 12:43:40.696272 - tftpboot 0x01080000 933944/tftp-deploy-t3me2iwa/kernel/uImage
301 12:43:40.696725 - tftpboot 0x08000000 933944/tftp-deploy-t3me2iwa/ramdisk/ramdisk.cpio.gz.uboot
302 12:43:40.697166 - tftpboot 0x01070000 933944/tftp-deploy-t3me2iwa/dtb/meson-g12b-a311d-libretech-cc.dtb
303 12:43:40.697608 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/933944/extract-nfsrootfs-eqth495x,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 12:43:40.698064 - bootm 0x01080000 0x08000000 0x01070000
305 12:43:40.698627 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 12:43:40.700350 start: 2.3 connect-device (timeout 00:05:00) [common]
308 12:43:40.700837 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 12:43:40.716593 Setting prompt string to ['lava-test: # ']
310 12:43:40.718227 end: 2.3 connect-device (duration 00:00:00) [common]
311 12:43:40.718909 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 12:43:40.719529 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 12:43:40.720169 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 12:43:40.721409 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 12:43:40.758912 >> OK - accepted request
316 12:43:40.761022 Returned 0 in 0 seconds
317 12:43:40.862244 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 12:43:40.864055 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 12:43:40.864710 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 12:43:40.865303 Setting prompt string to ['Hit any key to stop autoboot']
322 12:43:40.865835 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 12:43:40.867540 Trying 192.168.56.21...
324 12:43:40.868147 Connected to conserv1.
325 12:43:40.868646 Escape character is '^]'.
326 12:43:40.869131
327 12:43:40.869609 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 12:43:40.870087
329 12:43:51.963299 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 12:43:51.963945 bl2_stage_init 0x01
331 12:43:51.964482 bl2_stage_init 0x81
332 12:43:51.968883 hw id: 0x0000 - pwm id 0x01
333 12:43:51.969431 bl2_stage_init 0xc1
334 12:43:51.969872 bl2_stage_init 0x02
335 12:43:51.970323
336 12:43:51.974398 L0:00000000
337 12:43:51.974874 L1:20000703
338 12:43:51.975309 L2:00008067
339 12:43:51.975733 L3:14000000
340 12:43:51.980051 B2:00402000
341 12:43:51.980524 B1:e0f83180
342 12:43:51.980971
343 12:43:51.981408 TE: 58124
344 12:43:51.981839
345 12:43:51.985655 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 12:43:51.986126
347 12:43:51.986566 Board ID = 1
348 12:43:51.991274 Set A53 clk to 24M
349 12:43:51.991741 Set A73 clk to 24M
350 12:43:51.992210 Set clk81 to 24M
351 12:43:51.996854 A53 clk: 1200 MHz
352 12:43:51.997318 A73 clk: 1200 MHz
353 12:43:51.997751 CLK81: 166.6M
354 12:43:51.998174 smccc: 00012a91
355 12:43:52.002408 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 12:43:52.008047 board id: 1
357 12:43:52.013904 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 12:43:52.024643 fw parse done
359 12:43:52.029765 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 12:43:52.073324 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 12:43:52.084056 PIEI prepare done
362 12:43:52.084522 fastboot data load
363 12:43:52.084955 fastboot data verify
364 12:43:52.089609 verify result: 266
365 12:43:52.095207 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 12:43:52.095666 LPDDR4 probe
367 12:43:52.096129 ddr clk to 1584MHz
368 12:43:52.103199 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 12:43:52.140478
370 12:43:52.140962 dmc_version 0001
371 12:43:52.147158 Check phy result
372 12:43:52.153002 INFO : End of CA training
373 12:43:52.153476 INFO : End of initialization
374 12:43:52.158603 INFO : Training has run successfully!
375 12:43:52.159073 Check phy result
376 12:43:52.164231 INFO : End of initialization
377 12:43:52.164702 INFO : End of read enable training
378 12:43:52.169816 INFO : End of fine write leveling
379 12:43:52.175396 INFO : End of Write leveling coarse delay
380 12:43:52.175870 INFO : Training has run successfully!
381 12:43:52.176355 Check phy result
382 12:43:52.181002 INFO : End of initialization
383 12:43:52.181477 INFO : End of read dq deskew training
384 12:43:52.186588 INFO : End of MPR read delay center optimization
385 12:43:52.192210 INFO : End of write delay center optimization
386 12:43:52.197832 INFO : End of read delay center optimization
387 12:43:52.198306 INFO : End of max read latency training
388 12:43:52.203397 INFO : Training has run successfully!
389 12:43:52.203869 1D training succeed
390 12:43:52.211636 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 12:43:52.260204 Check phy result
392 12:43:52.260694 INFO : End of initialization
393 12:43:52.281941 INFO : End of 2D read delay Voltage center optimization
394 12:43:52.302160 INFO : End of 2D read delay Voltage center optimization
395 12:43:52.354204 INFO : End of 2D write delay Voltage center optimization
396 12:43:52.403576 INFO : End of 2D write delay Voltage center optimization
397 12:43:52.409140 INFO : Training has run successfully!
398 12:43:52.409625
399 12:43:52.410094 channel==0
400 12:43:52.414770 RxClkDly_Margin_A0==88 ps 9
401 12:43:52.415243 TxDqDly_Margin_A0==98 ps 10
402 12:43:52.420344 RxClkDly_Margin_A1==88 ps 9
403 12:43:52.420834 TxDqDly_Margin_A1==98 ps 10
404 12:43:52.421289 TrainedVREFDQ_A0==74
405 12:43:52.425993 TrainedVREFDQ_A1==74
406 12:43:52.426476 VrefDac_Margin_A0==25
407 12:43:52.426925 DeviceVref_Margin_A0==40
408 12:43:52.431556 VrefDac_Margin_A1==24
409 12:43:52.432064 DeviceVref_Margin_A1==40
410 12:43:52.432519
411 12:43:52.432966
412 12:43:52.437176 channel==1
413 12:43:52.437697 RxClkDly_Margin_A0==98 ps 10
414 12:43:52.438167 TxDqDly_Margin_A0==88 ps 9
415 12:43:52.442754 RxClkDly_Margin_A1==98 ps 10
416 12:43:52.443231 TxDqDly_Margin_A1==88 ps 9
417 12:43:52.448358 TrainedVREFDQ_A0==76
418 12:43:52.448833 TrainedVREFDQ_A1==77
419 12:43:52.449281 VrefDac_Margin_A0==22
420 12:43:52.453996 DeviceVref_Margin_A0==38
421 12:43:52.454468 VrefDac_Margin_A1==22
422 12:43:52.459559 DeviceVref_Margin_A1==37
423 12:43:52.460058
424 12:43:52.460513 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 12:43:52.460951
426 12:43:52.493156 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 12:43:52.493710 2D training succeed
428 12:43:52.498747 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 12:43:52.504358 auto size-- 65535DDR cs0 size: 2048MB
430 12:43:52.504829 DDR cs1 size: 2048MB
431 12:43:52.510006 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 12:43:52.510481 cs0 DataBus test pass
433 12:43:52.515555 cs1 DataBus test pass
434 12:43:52.516106 cs0 AddrBus test pass
435 12:43:52.516582 cs1 AddrBus test pass
436 12:43:52.517040
437 12:43:52.521158 100bdlr_step_size ps== 420
438 12:43:52.521652 result report
439 12:43:52.526763 boot times 0Enable ddr reg access
440 12:43:52.532157 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 12:43:52.545596 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 12:43:53.118698 0.0;M3 CHK:0;cm4_sp_mode 0
443 12:43:53.119242 MVN_1=0x00000000
444 12:43:53.124201 MVN_2=0x00000000
445 12:43:53.129945 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 12:43:53.130425 OPS=0x10
447 12:43:53.130881 ring efuse init
448 12:43:53.131327 chipver efuse init
449 12:43:53.135552 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 12:43:53.141160 [0.018961 Inits done]
451 12:43:53.141644 secure task start!
452 12:43:53.142094 high task start!
453 12:43:53.145741 low task start!
454 12:43:53.146214 run into bl31
455 12:43:53.152390 NOTICE: BL31: v1.3(release):4fc40b1
456 12:43:53.160217 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 12:43:53.160692 NOTICE: BL31: G12A normal boot!
458 12:43:53.185559 NOTICE: BL31: BL33 decompress pass
459 12:43:53.191245 ERROR: Error initializing runtime service opteed_fast
460 12:43:54.424149
461 12:43:54.424755
462 12:43:54.432510 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 12:43:54.433049
464 12:43:54.433553 Model: Libre Computer AML-A311D-CC Alta
465 12:43:54.639936 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 12:43:54.664401 DRAM: 2 GiB (effective 3.8 GiB)
467 12:43:54.807400 Core: 408 devices, 31 uclasses, devicetree: separate
468 12:43:54.813161 WDT: Not starting watchdog@f0d0
469 12:43:54.845405 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 12:43:54.857887 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 12:43:54.862860 ** Bad device specification mmc 0 **
472 12:43:54.873194 Card did not respond to voltage select! : -110
473 12:43:54.880846 ** Bad device specification mmc 0 **
474 12:43:54.881322 Couldn't find partition mmc 0
475 12:43:54.889192 Card did not respond to voltage select! : -110
476 12:43:54.894701 ** Bad device specification mmc 0 **
477 12:43:54.895176 Couldn't find partition mmc 0
478 12:43:54.898781 Error: could not access storage.
479 12:43:56.163560 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 12:43:56.164269 bl2_stage_init 0x01
481 12:43:56.164750 bl2_stage_init 0x81
482 12:43:56.169111 hw id: 0x0000 - pwm id 0x01
483 12:43:56.169615 bl2_stage_init 0xc1
484 12:43:56.170073 bl2_stage_init 0x02
485 12:43:56.170521
486 12:43:56.174706 L0:00000000
487 12:43:56.175187 L1:20000703
488 12:43:56.175636 L2:00008067
489 12:43:56.176119 L3:14000000
490 12:43:56.180388 B2:00402000
491 12:43:56.180879 B1:e0f83180
492 12:43:56.181324
493 12:43:56.181766 TE: 58124
494 12:43:56.182208
495 12:43:56.185914 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 12:43:56.186412
497 12:43:56.186869 Board ID = 1
498 12:43:56.191549 Set A53 clk to 24M
499 12:43:56.192081 Set A73 clk to 24M
500 12:43:56.192536 Set clk81 to 24M
501 12:43:56.197232 A53 clk: 1200 MHz
502 12:43:56.197826 A73 clk: 1200 MHz
503 12:43:56.198259 CLK81: 166.6M
504 12:43:56.198685 smccc: 00012a92
505 12:43:56.202865 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 12:43:56.208446 board id: 1
507 12:43:56.214298 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 12:43:56.224978 fw parse done
509 12:43:56.230901 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 12:43:56.272626 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 12:43:56.284544 PIEI prepare done
512 12:43:56.285111 fastboot data load
513 12:43:56.285546 fastboot data verify
514 12:43:56.290072 verify result: 266
515 12:43:56.295728 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 12:43:56.296356 LPDDR4 probe
517 12:43:56.296794 ddr clk to 1584MHz
518 12:43:56.303789 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 12:43:56.340999
520 12:43:56.341679 dmc_version 0001
521 12:43:56.347656 Check phy result
522 12:43:56.353644 INFO : End of CA training
523 12:43:56.354031 INFO : End of initialization
524 12:43:56.359046 INFO : Training has run successfully!
525 12:43:56.359422 Check phy result
526 12:43:56.364701 INFO : End of initialization
527 12:43:56.365286 INFO : End of read enable training
528 12:43:56.370198 INFO : End of fine write leveling
529 12:43:56.375893 INFO : End of Write leveling coarse delay
530 12:43:56.376539 INFO : Training has run successfully!
531 12:43:56.376986 Check phy result
532 12:43:56.381469 INFO : End of initialization
533 12:43:56.382046 INFO : End of read dq deskew training
534 12:43:56.387052 INFO : End of MPR read delay center optimization
535 12:43:56.392686 INFO : End of write delay center optimization
536 12:43:56.398318 INFO : End of read delay center optimization
537 12:43:56.398887 INFO : End of max read latency training
538 12:43:56.403975 INFO : Training has run successfully!
539 12:43:56.404644 1D training succeed
540 12:43:56.412383 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 12:43:56.460730 Check phy result
542 12:43:56.461382 INFO : End of initialization
543 12:43:56.482385 INFO : End of 2D read delay Voltage center optimization
544 12:43:56.502575 INFO : End of 2D read delay Voltage center optimization
545 12:43:56.553722 INFO : End of 2D write delay Voltage center optimization
546 12:43:56.604115 INFO : End of 2D write delay Voltage center optimization
547 12:43:56.609592 INFO : Training has run successfully!
548 12:43:56.610154
549 12:43:56.610606 channel==0
550 12:43:56.615139 RxClkDly_Margin_A0==88 ps 9
551 12:43:56.615691 TxDqDly_Margin_A0==98 ps 10
552 12:43:56.620762 RxClkDly_Margin_A1==88 ps 9
553 12:43:56.621320 TxDqDly_Margin_A1==98 ps 10
554 12:43:56.621753 TrainedVREFDQ_A0==74
555 12:43:56.626400 TrainedVREFDQ_A1==74
556 12:43:56.626975 VrefDac_Margin_A0==25
557 12:43:56.627416 DeviceVref_Margin_A0==40
558 12:43:56.631977 VrefDac_Margin_A1==25
559 12:43:56.632551 DeviceVref_Margin_A1==40
560 12:43:56.632982
561 12:43:56.633400
562 12:43:56.637830 channel==1
563 12:43:56.638424 RxClkDly_Margin_A0==98 ps 10
564 12:43:56.638893 TxDqDly_Margin_A0==88 ps 9
565 12:43:56.643213 RxClkDly_Margin_A1==88 ps 9
566 12:43:56.643807 TxDqDly_Margin_A1==88 ps 9
567 12:43:56.648792 TrainedVREFDQ_A0==76
568 12:43:56.649349 TrainedVREFDQ_A1==77
569 12:43:56.649774 VrefDac_Margin_A0==22
570 12:43:56.654376 DeviceVref_Margin_A0==38
571 12:43:56.654919 VrefDac_Margin_A1==24
572 12:43:56.660059 DeviceVref_Margin_A1==37
573 12:43:56.660651
574 12:43:56.661090 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 12:43:56.661512
576 12:43:56.693519 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 12:43:56.694139 2D training succeed
578 12:43:56.699255 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 12:43:56.704838 auto size-- 65535DDR cs0 size: 2048MB
580 12:43:56.705399 DDR cs1 size: 2048MB
581 12:43:56.710424 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 12:43:56.711273 cs0 DataBus test pass
583 12:43:56.716056 cs1 DataBus test pass
584 12:43:56.716657 cs0 AddrBus test pass
585 12:43:56.717130 cs1 AddrBus test pass
586 12:43:56.717602
587 12:43:56.721690 100bdlr_step_size ps== 420
588 12:43:56.722176 result report
589 12:43:56.727038 boot times 0Enable ddr reg access
590 12:43:56.731297 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 12:43:56.745844 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 12:43:57.319613 0.0;M3 CHK:0;cm4_sp_mode 0
593 12:43:57.320322 MVN_1=0x00000000
594 12:43:57.325217 MVN_2=0x00000000
595 12:43:57.331020 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 12:43:57.331556 OPS=0x10
597 12:43:57.332046 ring efuse init
598 12:43:57.332465 chipver efuse init
599 12:43:57.336516 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 12:43:57.342086 [0.018961 Inits done]
601 12:43:57.342568 secure task start!
602 12:43:57.342962 high task start!
603 12:43:57.346740 low task start!
604 12:43:57.347244 run into bl31
605 12:43:57.353401 NOTICE: BL31: v1.3(release):4fc40b1
606 12:43:57.361183 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 12:43:57.361671 NOTICE: BL31: G12A normal boot!
608 12:43:57.386526 NOTICE: BL31: BL33 decompress pass
609 12:43:57.391342 ERROR: Error initializing runtime service opteed_fast
610 12:43:58.625039
611 12:43:58.625641
612 12:43:58.633430 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 12:43:58.633922
614 12:43:58.634349 Model: Libre Computer AML-A311D-CC Alta
615 12:43:58.841915 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 12:43:58.864356 DRAM: 2 GiB (effective 3.8 GiB)
617 12:43:59.008320 Core: 408 devices, 31 uclasses, devicetree: separate
618 12:43:59.013189 WDT: Not starting watchdog@f0d0
619 12:43:59.046446 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 12:43:59.058833 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 12:43:59.063834 ** Bad device specification mmc 0 **
622 12:43:59.074167 Card did not respond to voltage select! : -110
623 12:43:59.081807 ** Bad device specification mmc 0 **
624 12:43:59.082294 Couldn't find partition mmc 0
625 12:43:59.090171 Card did not respond to voltage select! : -110
626 12:43:59.095651 ** Bad device specification mmc 0 **
627 12:43:59.096167 Couldn't find partition mmc 0
628 12:43:59.100718 Error: could not access storage.
629 12:43:59.444215 Net: eth0: ethernet@ff3f0000
630 12:43:59.444648 starting USB...
631 12:43:59.696178 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 12:43:59.696843 Starting the controller
633 12:43:59.702048 USB XHCI 1.10
634 12:44:01.413862 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 12:44:01.414526 bl2_stage_init 0x01
636 12:44:01.414996 bl2_stage_init 0x81
637 12:44:01.419491 hw id: 0x0000 - pwm id 0x01
638 12:44:01.420097 bl2_stage_init 0xc1
639 12:44:01.420569 bl2_stage_init 0x02
640 12:44:01.421032
641 12:44:01.425054 L0:00000000
642 12:44:01.425583 L1:20000703
643 12:44:01.426046 L2:00008067
644 12:44:01.426496 L3:14000000
645 12:44:01.430724 B2:00402000
646 12:44:01.431223 B1:e0f83180
647 12:44:01.431714
648 12:44:01.432250 TE: 58167
649 12:44:01.432713
650 12:44:01.436279 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 12:44:01.436787
652 12:44:01.437244 Board ID = 1
653 12:44:01.441814 Set A53 clk to 24M
654 12:44:01.442347 Set A73 clk to 24M
655 12:44:01.442803 Set clk81 to 24M
656 12:44:01.447410 A53 clk: 1200 MHz
657 12:44:01.447935 A73 clk: 1200 MHz
658 12:44:01.448434 CLK81: 166.6M
659 12:44:01.448886 smccc: 00012abe
660 12:44:01.452990 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 12:44:01.458604 board id: 1
662 12:44:01.464512 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 12:44:01.475257 fw parse done
664 12:44:01.481129 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 12:44:01.523765 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 12:44:01.534662 PIEI prepare done
667 12:44:01.535217 fastboot data load
668 12:44:01.535687 fastboot data verify
669 12:44:01.540280 verify result: 266
670 12:44:01.545846 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 12:44:01.546409 LPDDR4 probe
672 12:44:01.546871 ddr clk to 1584MHz
673 12:44:01.553834 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 12:44:01.590116
675 12:44:01.590744 dmc_version 0001
676 12:44:01.596919 Check phy result
677 12:44:01.603598 INFO : End of CA training
678 12:44:01.604157 INFO : End of initialization
679 12:44:01.609260 INFO : Training has run successfully!
680 12:44:01.609792 Check phy result
681 12:44:01.614849 INFO : End of initialization
682 12:44:01.615388 INFO : End of read enable training
683 12:44:01.618202 INFO : End of fine write leveling
684 12:44:01.623655 INFO : End of Write leveling coarse delay
685 12:44:01.629251 INFO : Training has run successfully!
686 12:44:01.629784 Check phy result
687 12:44:01.630249 INFO : End of initialization
688 12:44:01.634829 INFO : End of read dq deskew training
689 12:44:01.640461 INFO : End of MPR read delay center optimization
690 12:44:01.640994 INFO : End of write delay center optimization
691 12:44:01.646056 INFO : End of read delay center optimization
692 12:44:01.651685 INFO : End of max read latency training
693 12:44:01.652267 INFO : Training has run successfully!
694 12:44:01.657299 1D training succeed
695 12:44:01.663235 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 12:44:01.710820 Check phy result
697 12:44:01.711435 INFO : End of initialization
698 12:44:01.732475 INFO : End of 2D read delay Voltage center optimization
699 12:44:01.752578 INFO : End of 2D read delay Voltage center optimization
700 12:44:01.803615 INFO : End of 2D write delay Voltage center optimization
701 12:44:01.853711 INFO : End of 2D write delay Voltage center optimization
702 12:44:01.859420 INFO : Training has run successfully!
703 12:44:01.859952
704 12:44:01.860452 channel==0
705 12:44:01.865001 RxClkDly_Margin_A0==88 ps 9
706 12:44:01.865532 TxDqDly_Margin_A0==98 ps 10
707 12:44:01.868293 RxClkDly_Margin_A1==88 ps 9
708 12:44:01.868906 TxDqDly_Margin_A1==98 ps 10
709 12:44:01.873833 TrainedVREFDQ_A0==74
710 12:44:01.874431 TrainedVREFDQ_A1==74
711 12:44:01.874846 VrefDac_Margin_A0==25
712 12:44:01.879553 DeviceVref_Margin_A0==40
713 12:44:01.880231 VrefDac_Margin_A1==25
714 12:44:01.885200 DeviceVref_Margin_A1==40
715 12:44:01.885836
716 12:44:01.886322
717 12:44:01.886794 channel==1
718 12:44:01.887245 RxClkDly_Margin_A0==98 ps 10
719 12:44:01.890903 TxDqDly_Margin_A0==88 ps 9
720 12:44:01.891549 RxClkDly_Margin_A1==88 ps 9
721 12:44:01.896438 TxDqDly_Margin_A1==98 ps 10
722 12:44:01.897088 TrainedVREFDQ_A0==77
723 12:44:01.897580 TrainedVREFDQ_A1==77
724 12:44:01.901916 VrefDac_Margin_A0==22
725 12:44:01.902495 DeviceVref_Margin_A0==37
726 12:44:01.907442 VrefDac_Margin_A1==24
727 12:44:01.908052 DeviceVref_Margin_A1==37
728 12:44:01.908496
729 12:44:01.913206 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 12:44:01.913768
731 12:44:01.941292 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 12:44:01.946833 2D training succeed
733 12:44:01.952469 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 12:44:01.953068 auto size-- 65535DDR cs0 size: 2048MB
735 12:44:01.957883 DDR cs1 size: 2048MB
736 12:44:01.958473 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 12:44:01.963525 cs0 DataBus test pass
738 12:44:01.964196 cs1 DataBus test pass
739 12:44:01.964658 cs0 AddrBus test pass
740 12:44:01.969187 cs1 AddrBus test pass
741 12:44:01.969763
742 12:44:01.970222 100bdlr_step_size ps== 420
743 12:44:01.970681 result report
744 12:44:01.974776 boot times 0Enable ddr reg access
745 12:44:01.982247 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 12:44:01.995671 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 12:44:02.567826 0.0;M3 CHK:0;cm4_sp_mode 0
748 12:44:02.568305 MVN_1=0x00000000
749 12:44:02.573285 MVN_2=0x00000000
750 12:44:02.579022 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 12:44:02.579596 OPS=0x10
752 12:44:02.580090 ring efuse init
753 12:44:02.580540 chipver efuse init
754 12:44:02.584514 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 12:44:02.590252 [0.018961 Inits done]
756 12:44:02.590756 secure task start!
757 12:44:02.591202 high task start!
758 12:44:02.594795 low task start!
759 12:44:02.595293 run into bl31
760 12:44:02.601447 NOTICE: BL31: v1.3(release):4fc40b1
761 12:44:02.609294 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 12:44:02.609795 NOTICE: BL31: G12A normal boot!
763 12:44:02.634758 NOTICE: BL31: BL33 decompress pass
764 12:44:02.639465 ERROR: Error initializing runtime service opteed_fast
765 12:44:03.873424
766 12:44:03.874098
767 12:44:03.881966 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 12:44:03.882481
769 12:44:03.882946 Model: Libre Computer AML-A311D-CC Alta
770 12:44:04.089081 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 12:44:04.112367 DRAM: 2 GiB (effective 3.8 GiB)
772 12:44:04.256298 Core: 408 devices, 31 uclasses, devicetree: separate
773 12:44:04.261238 WDT: Not starting watchdog@f0d0
774 12:44:04.294504 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 12:44:04.306954 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 12:44:04.310894 ** Bad device specification mmc 0 **
777 12:44:04.322219 Card did not respond to voltage select! : -110
778 12:44:04.329015 ** Bad device specification mmc 0 **
779 12:44:04.329528 Couldn't find partition mmc 0
780 12:44:04.338196 Card did not respond to voltage select! : -110
781 12:44:04.343724 ** Bad device specification mmc 0 **
782 12:44:04.344278 Couldn't find partition mmc 0
783 12:44:04.347816 Error: could not access storage.
784 12:44:04.690291 Net: eth0: ethernet@ff3f0000
785 12:44:04.690908 starting USB...
786 12:44:04.943094 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 12:44:04.943673 Starting the controller
788 12:44:04.949107 USB XHCI 1.10
789 12:44:07.115429 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
790 12:44:07.116105 bl2_stage_init 0x81
791 12:44:07.121142 hw id: 0x0000 - pwm id 0x01
792 12:44:07.121632 bl2_stage_init 0xc1
793 12:44:07.122086 bl2_stage_init 0x02
794 12:44:07.122531
795 12:44:07.126663 L0:00000000
796 12:44:07.127148 L1:20000703
797 12:44:07.127600 L2:00008067
798 12:44:07.128078 L3:14000000
799 12:44:07.128525 B2:00402000
800 12:44:07.132207 B1:e0f83180
801 12:44:07.132694
802 12:44:07.133150 TE: 58150
803 12:44:07.133600
804 12:44:07.137837 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 12:44:07.138334
806 12:44:07.138789 Board ID = 1
807 12:44:07.143380 Set A53 clk to 24M
808 12:44:07.143866 Set A73 clk to 24M
809 12:44:07.144357 Set clk81 to 24M
810 12:44:07.149060 A53 clk: 1200 MHz
811 12:44:07.149547 A73 clk: 1200 MHz
812 12:44:07.150001 CLK81: 166.6M
813 12:44:07.150443 smccc: 00012aac
814 12:44:07.154583 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 12:44:07.160283 board id: 1
816 12:44:07.165105 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 12:44:07.176640 fw parse done
818 12:44:07.181654 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 12:44:07.224290 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 12:44:07.236233 PIEI prepare done
821 12:44:07.236744 fastboot data load
822 12:44:07.237204 fastboot data verify
823 12:44:07.241901 verify result: 266
824 12:44:07.247423 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 12:44:07.247940 LPDDR4 probe
826 12:44:07.248457 ddr clk to 1584MHz
827 12:44:07.254437 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 12:44:07.291717
829 12:44:07.292259 dmc_version 0001
830 12:44:07.298417 Check phy result
831 12:44:07.305264 INFO : End of CA training
832 12:44:07.305756 INFO : End of initialization
833 12:44:07.310840 INFO : Training has run successfully!
834 12:44:07.311322 Check phy result
835 12:44:07.316416 INFO : End of initialization
836 12:44:07.316905 INFO : End of read enable training
837 12:44:07.319693 INFO : End of fine write leveling
838 12:44:07.325216 INFO : End of Write leveling coarse delay
839 12:44:07.330890 INFO : Training has run successfully!
840 12:44:07.331379 Check phy result
841 12:44:07.331830 INFO : End of initialization
842 12:44:07.336427 INFO : End of read dq deskew training
843 12:44:07.339789 INFO : End of MPR read delay center optimization
844 12:44:07.345371 INFO : End of write delay center optimization
845 12:44:07.350940 INFO : End of read delay center optimization
846 12:44:07.351434 INFO : End of max read latency training
847 12:44:07.356542 INFO : Training has run successfully!
848 12:44:07.357029 1D training succeed
849 12:44:07.363809 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 12:44:07.411387 Check phy result
851 12:44:07.411896 INFO : End of initialization
852 12:44:07.433227 INFO : End of 2D read delay Voltage center optimization
853 12:44:07.453453 INFO : End of 2D read delay Voltage center optimization
854 12:44:07.505445 INFO : End of 2D write delay Voltage center optimization
855 12:44:07.555736 INFO : End of 2D write delay Voltage center optimization
856 12:44:07.561326 INFO : Training has run successfully!
857 12:44:07.561806
858 12:44:07.562258 channel==0
859 12:44:07.566967 RxClkDly_Margin_A0==88 ps 9
860 12:44:07.567460 TxDqDly_Margin_A0==98 ps 10
861 12:44:07.570257 RxClkDly_Margin_A1==88 ps 9
862 12:44:07.570742 TxDqDly_Margin_A1==98 ps 10
863 12:44:07.575783 TrainedVREFDQ_A0==74
864 12:44:07.576354 TrainedVREFDQ_A1==74
865 12:44:07.581385 VrefDac_Margin_A0==25
866 12:44:07.581905 DeviceVref_Margin_A0==40
867 12:44:07.582340 VrefDac_Margin_A1==25
868 12:44:07.586968 DeviceVref_Margin_A1==40
869 12:44:07.587437
870 12:44:07.587871
871 12:44:07.588336 channel==1
872 12:44:07.588759 RxClkDly_Margin_A0==98 ps 10
873 12:44:07.590347 TxDqDly_Margin_A0==98 ps 10
874 12:44:07.595918 RxClkDly_Margin_A1==88 ps 9
875 12:44:07.596413 TxDqDly_Margin_A1==88 ps 9
876 12:44:07.596849 TrainedVREFDQ_A0==77
877 12:44:07.601466 TrainedVREFDQ_A1==77
878 12:44:07.601935 VrefDac_Margin_A0==22
879 12:44:07.607103 DeviceVref_Margin_A0==37
880 12:44:07.607591 VrefDac_Margin_A1==24
881 12:44:07.608055 DeviceVref_Margin_A1==37
882 12:44:07.608490
883 12:44:07.616109 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 12:44:07.616590
885 12:44:07.644092 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
886 12:44:07.644606 2D training succeed
887 12:44:07.655204 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 12:44:07.655685 auto size-- 65535DDR cs0 size: 2048MB
889 12:44:07.660841 DDR cs1 size: 2048MB
890 12:44:07.661307 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 12:44:07.661741 cs0 DataBus test pass
892 12:44:07.666390 cs1 DataBus test pass
893 12:44:07.666859 cs0 AddrBus test pass
894 12:44:07.672087 cs1 AddrBus test pass
895 12:44:07.672554
896 12:44:07.672991 100bdlr_step_size ps== 432
897 12:44:07.673436 result report
898 12:44:07.677642 boot times 0Enable ddr reg access
899 12:44:07.683345 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 12:44:07.696768 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 12:44:08.270814 0.0;M3 CHK:0;cm4_sp_mode 0
902 12:44:08.271441 MVN_1=0x00000000
903 12:44:08.276223 MVN_2=0x00000000
904 12:44:08.281996 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 12:44:08.282484 OPS=0x10
906 12:44:08.282940 ring efuse init
907 12:44:08.283383 chipver efuse init
908 12:44:08.287649 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 12:44:08.293223 [0.018961 Inits done]
910 12:44:08.293713 secure task start!
911 12:44:08.294166 high task start!
912 12:44:08.296800 low task start!
913 12:44:08.297280 run into bl31
914 12:44:08.304455 NOTICE: BL31: v1.3(release):4fc40b1
915 12:44:08.311280 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 12:44:08.311780 NOTICE: BL31: G12A normal boot!
917 12:44:08.337687 NOTICE: BL31: BL33 decompress pass
918 12:44:08.342373 ERROR: Error initializing runtime service opteed_fast
919 12:44:09.576303
920 12:44:09.576945
921 12:44:09.583652 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 12:44:09.584214
923 12:44:09.584685 Model: Libre Computer AML-A311D-CC Alta
924 12:44:09.792171 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 12:44:09.815780 DRAM: 2 GiB (effective 3.8 GiB)
926 12:44:09.959732 Core: 408 devices, 31 uclasses, devicetree: separate
927 12:44:09.964438 WDT: Not starting watchdog@f0d0
928 12:44:09.997624 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 12:44:10.010099 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 12:44:10.014145 ** Bad device specification mmc 0 **
931 12:44:10.025432 Card did not respond to voltage select! : -110
932 12:44:10.032087 ** Bad device specification mmc 0 **
933 12:44:10.032581 Couldn't find partition mmc 0
934 12:44:10.041418 Card did not respond to voltage select! : -110
935 12:44:10.046960 ** Bad device specification mmc 0 **
936 12:44:10.047451 Couldn't find partition mmc 0
937 12:44:10.050970 Error: could not access storage.
938 12:44:10.393454 Net: eth0: ethernet@ff3f0000
939 12:44:10.393858 starting USB...
940 12:44:10.646289 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 12:44:10.646682 Starting the controller
942 12:44:10.652249 USB XHCI 1.10
943 12:44:12.207254 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 12:44:12.214643 scanning usb for storage devices... 0 Storage Device(s) found
946 12:44:12.266250 Hit any key to stop autoboot: 1
947 12:44:12.267072 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
948 12:44:12.267740 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 12:44:12.268282 Setting prompt string to ['=>']
950 12:44:12.268780 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 12:44:12.272204 0
952 12:44:12.273107 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 12:44:12.273603 Sending with 10 millisecond of delay
955 12:44:13.408315 => setenv autoload no
956 12:44:13.418915 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 12:44:13.423808 setenv autoload no
958 12:44:13.424554 Sending with 10 millisecond of delay
960 12:44:15.221432 => setenv initrd_high 0xffffffff
961 12:44:15.232198 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 12:44:15.233039 setenv initrd_high 0xffffffff
963 12:44:15.233753 Sending with 10 millisecond of delay
965 12:44:16.849658 => setenv fdt_high 0xffffffff
966 12:44:16.860395 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 12:44:16.861216 setenv fdt_high 0xffffffff
968 12:44:16.861930 Sending with 10 millisecond of delay
970 12:44:17.153745 => dhcp
971 12:44:17.164496 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
972 12:44:17.165347 dhcp
973 12:44:17.165785 Speed: 1000, full duplex
974 12:44:17.166192 BOOTP broadcast 1
975 12:44:17.182337 DHCP client bound to address 192.168.6.27 (19 ms)
976 12:44:17.183078 Sending with 10 millisecond of delay
978 12:44:18.859639 => setenv serverip 192.168.6.2
979 12:44:18.870485 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
980 12:44:18.871359 setenv serverip 192.168.6.2
981 12:44:18.872067 Sending with 10 millisecond of delay
983 12:44:22.595722 => tftpboot 0x01080000 933944/tftp-deploy-t3me2iwa/kernel/uImage
984 12:44:22.606581 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 12:44:22.607469 tftpboot 0x01080000 933944/tftp-deploy-t3me2iwa/kernel/uImage
986 12:44:22.607933 Speed: 1000, full duplex
987 12:44:22.608395 Using ethernet@ff3f0000 device
988 12:44:22.609290 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 12:44:22.614751 Filename '933944/tftp-deploy-t3me2iwa/kernel/uImage'.
990 12:44:22.617895 Load address: 0x1080000
991 12:44:25.453419 Loading: *################################################## 43.6 MiB
992 12:44:25.454028 15.4 MiB/s
993 12:44:25.454464 done
994 12:44:25.456961 Bytes transferred = 45713984 (2b98a40 hex)
995 12:44:25.457760 Sending with 10 millisecond of delay
997 12:44:30.145388 => tftpboot 0x08000000 933944/tftp-deploy-t3me2iwa/ramdisk/ramdisk.cpio.gz.uboot
998 12:44:30.156155 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
999 12:44:30.156792 tftpboot 0x08000000 933944/tftp-deploy-t3me2iwa/ramdisk/ramdisk.cpio.gz.uboot
1000 12:44:30.157268 Speed: 1000, full duplex
1001 12:44:30.157699 Using ethernet@ff3f0000 device
1002 12:44:30.158812 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 12:44:30.169823 Filename '933944/tftp-deploy-t3me2iwa/ramdisk/ramdisk.cpio.gz.uboot'.
1004 12:44:30.170379 Load address: 0x8000000
1005 12:44:37.059774 Loading: *####################T ############################# UDP wrong checksum 00000005 0000d11c
1006 12:44:38.371143 UDP wrong checksum 000000ff 00005c8a
1007 12:44:38.432818 UDP wrong checksum 000000ff 0000e67c
1008 12:44:42.062165 T UDP wrong checksum 00000005 0000d11c
1009 12:44:52.065240 T T UDP wrong checksum 00000005 0000d11c
1010 12:45:12.069590 T T T T UDP wrong checksum 00000005 0000d11c
1011 12:45:22.096724 T T UDP wrong checksum 000000ff 000002a6
1012 12:45:22.137651 UDP wrong checksum 000000ff 00009c98
1013 12:45:27.073649
1014 12:45:27.074310 Retry count exceeded; starting again
1016 12:45:27.076171 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1019 12:45:27.078074 end: 2.4 uboot-commands (duration 00:01:46) [common]
1021 12:45:27.079467 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1023 12:45:27.080550 end: 2 uboot-action (duration 00:01:46) [common]
1025 12:45:27.082127 Cleaning after the job
1026 12:45:27.082704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/ramdisk
1027 12:45:27.084240 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/kernel
1028 12:45:27.123304 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/dtb
1029 12:45:27.124094 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/nfsrootfs
1030 12:45:27.398576 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933944/tftp-deploy-t3me2iwa/modules
1031 12:45:27.417148 start: 4.1 power-off (timeout 00:00:30) [common]
1032 12:45:27.417752 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1033 12:45:27.452365 >> OK - accepted request
1034 12:45:27.454513 Returned 0 in 0 seconds
1035 12:45:27.555333 end: 4.1 power-off (duration 00:00:00) [common]
1037 12:45:27.556445 start: 4.2 read-feedback (timeout 00:10:00) [common]
1038 12:45:27.557084 Listened to connection for namespace 'common' for up to 1s
1039 12:45:28.557945 Finalising connection for namespace 'common'
1040 12:45:28.558368 Disconnecting from shell: Finalise
1041 12:45:28.558652 =>
1042 12:45:28.659222 end: 4.2 read-feedback (duration 00:00:01) [common]
1043 12:45:28.659543 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/933944
1044 12:45:31.261136 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/933944
1045 12:45:31.261822 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.